Deformable Part Model (DPM) is one of the best algorithms for image-based object detection. However, the high computation intensity leads to relatively long detecting time. Even with the powerful CPU or GPU computing system, it is still too slow for practical applications. To solve this problem, this paper proposes a high performance DPM accelerator based on FPGA, where a dedicated JPEG decoder is integrated to process the images with the 1080p JPEG format. Pipelined architecture and data reuse strategies are developed to achieve the high throughput and energy efficiency. The proposed accelerator can process input images with 22 fps at the frequency of 156MHz on Xilinx VC709 board, which outperforms previous approaches.