SPFD-based flexible transformation of LUT-based FPGA circuits

K Tanaka, S Yamashita… - IEICE transactions on …, 2005 - search.ieice.org
In this paper, we present the condition for the effective wire addition in Look-Up-Table-based
(LUT-based) field programmable gate array (FPGA) circuits, and an optimization procedure
utilizing the effective wire addition. Each wire has different characteristics, such as delay and
power dissipation. Therefore, the replacement of one critical wire for the circuit performance
with many non-critical ones, ie, many-addition-for-one-removal (m-for-1) is sufficiently useful.
However, the conventional logic optimization methods based on sets of pairs of functions to …

SPFD-Based Flexible Transformation of LUT-Based FPGA Circuits (VLSI Design Technology and CAD)

T Katsunori, Y Shigeru, K Yahiko - IEICE transactions on fundamentals …, 2005 - cir.nii.ac.jp
In this paper, we present the condition for the effective wire addition in Look-Up-Table-based
(LUT-based) field programmable gate array (FPGA) circuits, and an optimization procedure
utilizing the effective wire addition. Each wire has different characteristics, such as delay and
power dissipation. Therefore, the replacement of one critical wire for the circuit performance
with many non-critical ones, ie, many-addition-for-one-removal (m-for-1) is sufficiently useful.
However, the conventional logic optimization methods based on sets of pairs of functions to …
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