Sub-baudrate sampling at DAC and ADC for next generation 200G systems
2018 European Conference on Optical Communication (ECOC), 2018•ieeexplore.ieee.org
… To attain these speeds using CMOS technology, we propose aggressive undersampling
at transmitter (DAC) and/or receiver (ADC) sides. Here, we demonstrate two proofs of
concept in a simple scheme: 112 GBd OOK with 0.78 samples/symbol at DAC and 0.82 at
ADC obtaining sensitivity of -7 dBm for 3.8 10-3 BER (PIN-TIA); 100 GBd PAM4 with sub-baudrate
sampling only at the transmitter side (0.89 at DAC) with sensitivity of 5 dBm for 3.8 10-3 BER
(PIN-only). Future work includes scaling this proposal to 250 Gb/s per lane which can be a …
at transmitter (DAC) and/or receiver (ADC) sides. Here, we demonstrate two proofs of
concept in a simple scheme: 112 GBd OOK with 0.78 samples/symbol at DAC and 0.82 at
ADC obtaining sensitivity of -7 dBm for 3.8 10-3 BER (PIN-TIA); 100 GBd PAM4 with sub-baudrate
sampling only at the transmitter side (0.89 at DAC) with sensitivity of 5 dBm for 3.8 10-3 BER
(PIN-only). Future work includes scaling this proposal to 250 Gb/s per lane which can be a …
We investigate generation and detection of signals with baudrate above the DAC and ADC sampling rates. We demonstrate 112 GBd OOK with 88 GS/s DAC and 92 GS/s ADC; as well as 100 GBd PAM4 with under 90 GS/s DAC.
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