One-Dimensional Nanostructures: Principles and Applications

Foreword

Nanotechnology has had a profound impact on human economy and society in the twenty-first century that is perhaps comparable to the influence of information technology on human history. Science and engineering research in nanotechnology hold the key to breakthroughs in areas of materials and manufacturing, physics and chemistry, electronics, medicine, energy and the environment, biotechnology, information technology, and national security. It's widely believed that nanotechnology will be the driving force of the next industrial revolution.

One-dimensional (1D) nanostructures, such as nanowires, nanotubes, and nanobelts, constitute the fundamentals of nanoscience and nanotechnology. They have demonstrated their genius in wide applications such as electronics, optoelectronics, sensors, catalysts, energy conversion and storage, plasmonics, and spintronics. This book on the principles and applications of one-dimensional nanostructures, penetrates the tremendous worldwide interest in 1D nanostructures, ranging from the synthesis and properties to device applications of these structures. Prof. Tianyou Zhai and Prof. Jiannian Yao have harnessed their own knowledge and experience, and assembled internationally recognized authorities from 11 countries on four continents to contribute chapters covering a broad overview of important 1D nanostructure topics.

It is hoped that this book will provide an indispensable source of information for scientists, graduate students, engineers, industrial researchers, and other professionals working in the fields of nanomaterials, nanotechnology, materials science, chemistry, physics, polymer science, engineering and bioscience. It is also intended as an essential reference source for libraries in universities and industrial institutions, government laboratories and independent institutes, individual research groups, and scientists working in the field of nanoscience and nanotechnology.

I believe that this book will be useful in enabling readers to grasp the leading concepts of developments in this area, promoting cross-disciplinary integration, and enhancing original innovations.

Chunli Bai

President of the Chinese Academy of Sciences (CAS)

Preface

Since the revolutionary discovery of carbon nanotubes in 1991, one-dimensional (1D) nanostructures such as nanowires, nanobelts, and nanotubes have attracted tremendous attention due to their significance in basic scientific research and potential technological applications, based on their specific geometries and distinct properties. They are regarded as the most ideal systems for investigation of the dependence of electrical, optical, or mechanical properties on dimensionality and size reduction, and are expected to become the most promising building block for the next-generation nanoscale electronic and optoelectronic devices in the future. Nanocircuits built using semiconductor nanowires were declared as a breakthrough in science by Science magazine in 2001. Nature magazine published a report claiming that Nanowires, nanorods or nanowhiskers. It doesn't matter what you call them, they're the hottest property in nanotechnology. There is no doubt that 1D nanostructures represent the most important yet controverzial field in nanoscience and nanotechnology because of their significant consequences.

This book, reflects the tremendous worldwide interest in 1D nanostructures. It covers the synthesis, properties, device applications, and major classes of 1D nanostructures, such as carbon nanotubes, semiconductor nanowires and nanotubes, organic molecule nanostructures, polymer nanofibers, peptide nanostructures, supramolecular nanostructures, and many other types of 1D nanomaterials. In addition, this book highlights various properties of 1D nanostructures such as optical, electronic, magnetic, catalytic properties as well as their advanced applications in photovoltaics, piezoelectrics, thermoelectrics, lithium ion batteries, field-effect transistors (FET), photodetectors, light emitting diodes (LED), lasers, field emitters (FE), waveguides, modulators, sensors, plasmonics, spintronics, and bioscience. This book contains 25 state-of-the art review chapters written by 68 internationally renowned experts in this field. The contents can be summarized as follows.

For the synthesis of 1D nanostructures (Chapters 1–5), Z. Zhang and S. Senz review their more recent efforts to control the growth of 1D semiconductor nanostructures with the assistance of porous templates. R. Mas-Ballesté and F. Zamora provide an overview of the construction of coordination polymers as 1D nanostructures. B. Korgel reports the fabrication of semiconductor nanowires through a supercritical fluid–liquid–solid process. Z. Li, G. Lu, and coworkers review the more recent progress of different types of colloidal nanowires produced from different wet-chemical approaches, including their optical, electronic, and magnetic properties, as well as their potential applications in the energy conversion and biomedical fields. Y. Chou and K. Tu discuss the core–shell effect on the nucleation and growth of nanoscale silicides.

For the properties of 1D nanostructures (Chapters 6–10), C. N. R. Rao and coworkers describe some of salient features of the electronic structure and properties (including Raman spectroscopy, chemical doping, electronic and magnetic properties, molecular charge transfer, and metal nanoparticle decoration) of carbon nanotubes and graphene. Q. Xiong and coworkers review the rational synthesis of various of 1D semiconductor nanowires and heterostructrues and systematically discuss the Raman scattering of 1D nanostructures of phonon confinement, radial breathing modes, surface optical phonons, the antenna effect, and stimulated Raman scattering. J. Zhang, Y. Li, and coworkers provide a brief overview of the synthesis, optical properties, charge carrier dynamics, and applications of 1D hematite nanostructures. B. Zou and coworkers investigate the doping effect on the novel optical properties of 1D semiconductor nanowires, and find that the confined elementary excitation in the 1D nanowire could be modified by minor doping, forming other quantum states and producing novel optical properties. G. Rosenman and N. Amdursky present the basic physics of quantum confinement phonomena and related optical effects in self-assembled biological fibrils and bioinspired peptide nanotubular materials.

For energy-related applications of 1D nanostructures (Chapters 11–13), Z. Fan and coworkers review advances in energy harvesting technologies utilizing 1D semiconductor nanowires and nanopillars. These materials are widely investigated as promising candidates for photovoltaics, piezoelectrics, and thermoelectrics. J. Luo and J. Zhu overview the fabrication and characteristics of p–n junctions, and the photovoltaic applications of p–n junction (including axial junction, radial junction, and individual junction) silicon nanowire arrays. H. Zhou and colleagues review the more recent development of nanomaterials for both cathodes and anodes in lithium ion batteries, focusing on 1D nanostructured metal oxides, which offer promise for higher energy density, higher performance rates, and longer lifecycles.

For applications in photonics and optoelectronics of 1D nanostructures (Chapters 14–18), Peng and coworkers report the controlled growth of carbon nanotube (CNT) arrays and their product electronic and optoelectronics devices, including field-effect transistors (FETs), photodetectors, and light emitting diodes (LEDs). J. Xu and colleagues give a brief survey of the application of scanning probe microscopy for investigation of local nanometer-scale electrical and optoelectrical properties of 1D nanostructures. L. Liao and X. Duan survey the more recent research on 1D metal oxide synthesis and their interesting applications in photonics and optoelectronics, including waveguides, light emitters, laser diodes, solar cells, and photodetectors. Y. Zhao and J. Yao describe more recent progress on the construction and unique optical and electronic properties of organic 1D nanostructures, as well as their applications as building blocks in optoelectronic functions and devices such as multicolor emission, tunable emission, optical waveguides, lasing, and modulators. W. Hu and colleagues review advances in the synthesis of 1D organic nanostructures in a wide range of organic functional materials ranging from polymers to small molecules, fabrication strategies of ordered 1D nanostructures, and their potential applications for optoelectronic devices, including photovoltaic cells, FETs, and photoswitches.

For applications in sensing, plasmonics, electronics, and biosciences of 1D nanostructures (Chapters 19–25), M. Razeghi and B. Nguyen present 1D physics of type II anotimonide-based superlattices and review the progress and performance of superlattice infrared photon detectors. A. Ponzoni, G. Sberveglieri, and coworkers review the use of metal oxide nanowires to prepare gas sensors based on conductometric, FET and optical (photoluminescence) devices. T. Qiu, P. Chu, and coworkers review the applications of 1D nanostructures to plasmonics, including plasmonic waveguides, surface-enhanced Raman scattering/fluorescence, and photovoltaics. M. Costache, S. Valenzuela, and colleagues discuss the theory of spin transport of 1D systems and describe several fabrication techniques for lateral spin devices. T. Zhai, Y. Bando, and coworkers, systematically and in detail, investigate factors affecting field emission (FE) performance, including nanostructure morphology (tip geometry, alignment, density, diameter, length); phase structure; temperature; effects of light, gas, substrate, gap, and composition; and the presence of hetero- and branched structures. J. Knoch presents 1D FETs, including the fundamentals of FETs and advantages of 1D nanostructures as FETs, and suggests that 1D nanostructures are a premier choice for high-performance, ultimately scaled FETs. B. Tian reports his work on nanowire FETs (NWFETs) for electrical interfacing with cells and tissue, and notes that NWFETs exhibit exquisite sensitivity in chemical and biological detection and can form strongly coupled interfaces with cell membranes.

The editors hope that this book will be a valuable reference source for scientists, graduate students, engineers, industrial researchers, and other professionals working in the fields of nanomaterials, nanotechnology, materials science, chemistry, physics, polymer science, engineering, and bioscience. This book is intended as a must-have handbook for university libraries, research establishments, government libraries, and high-tech companies engaged in research and developments of nanotechnology.

Finally, we would like to express our gratitude to all the authors for contributing comprehensive chapters, colleagues who offered invaluable advice to ensure the quality of this book, and the editorial staff of John Wiley & Sons, Inc. We expect that this book will stimulate further interest in this important new field, and that the readers of this book will find it useful.

Tianyou Zhai

Jiannian Yao

Contributors

Nadav Amdursky,Department of Materials and Interfaces, Faculty of Chemistry, Weizmann Institute of Science, Rehovot 76100, Israel ([email protected])

Jin An, Department of Electronic Engineering, Materials Science and Technology Research Center, The Chinese University of Hong Kong, Shatin, N. T., Hong Kong SAR, China

Yoshio Bando, International Center for Materials Nanoarchitectonics (WPI-MANA), National Institute for Materials Science (NIMS), Namiki 1-1, Tsukuba, Ibaraki 305-0044, Japan

Yi-Chia Chou, Department of Materials Science and Engineering, Henry Samueli School of Engineering and Applied Science, University of California Los Angeles (UCLA), Los Angeles, California 90024

Paul K. Chu, Department of Physics and Materials Science, City University of Hong Kong, Tat Chee Avenue, Kowloon, Hong Kong, China ([email protected])

Marius V. Costache, Catalan Institute of Nanotechnology (ICN), Campus UAB Bellaterra, Barcelona E-08913, Spain ([email protected])

Guozhang Dai, Micro-nano Technology Center, Beijing Institute of Technology, Beijing 100081, China

Huanli Dong, Beijing National Laboratory for Molecular Sciences, Key Laboratory of Organic Solids, Institute of Chemistry, Chinese Academy of Sciences, Beijing 100190, China

Xiangfeng Duan, Department of Chemistry and Biochemistry and California Nanosystems Institute, University of California, Los Angeles, California 90024 ([email protected])

Guido Faglia, Department of Chemistry and Physics for Materials and Engineering, CNR-IDASC Sensor Laboratory and University of Brescia, Via Valotti 9, 25133 Brescia, Italy

Zhiyong Fan, Department of Electronic and Computer Engineering, Hong Kong University of Science and Technology, Clear Water Bay, Kowloon, Hong Kong SAR, China ([email protected])

Dmitri Golberg, International Center for Materials Nanoarchitectonics (WPI-MANA), National Institute for Materials Science (NIMS), Namiki 1-1, Tsukuba, Ibaraki 305-0044, Japan

A. Govindaraj, International Centre for Materials Science, Chemistry and Physics of Materials Unit, and CSIR Centre of Excellence in Chemistry, Jawaharlal Nehru Centre for Advanced Scientific Research, Jakkur P.O., Bangalore 560 064, India

Xuefeng Gu, Department of Physics, Southeast University, Nanjing 211189, China

Johnny C. Ho, Department of Physics and Materials Science, City University of Hong Kong, Tat Chee Avenue, Kowloon, Hong Kong SAR, China

Wenping Hu, Beijing National Laboratory for Molecular Sciences, Key Laboratory of Organic Solids, Institute of Chemistry, Chinese Academy of Sciences, Beijing 100190, China ([email protected])

Baoling Huang, Department of Mechanical Engineering, Hong Kong University of Science and Technology, Clear Water Bay, Kowloon, Hong Kong SAR, China

Lang Jiang, Beijing National Laboratory for Molecular Sciences, Key Laboratory of Organic Solids, Institute of Chemistry, Chinese Academy of Sciences, Beijing 100190, China

Joachim Knoch, RTWH Aachen University, 52074 Aachen, Germany ([email protected])

Brian A. Korgel, Department of Chemical Engineering, Texas Materials Institute, Center for Nano- and Molecular Science and Technology, The University of Texas at Austin, Austin, Texas 78712 ([email protected])

De Li, Energy Technology Research Institute, National Institute of Advanced Industrial Science and Technology (AIST), Umezono 1-1-1, 305–8568 Tsukuba, Japan

Huiqiao Li, Energy Technology Research Institute, National Institute of Advanced Industrial Science and Technology (AIST), Umezono 1-1-1, 305–8568 Tsukuba, Japan

Liang Li, International Center for Materials Nanoarchitectonics (WPI-MANA), National Institute for Materials Science (NIMS), Namiki 1-1, Tsukuba, Ibaraki 305-0044, Japan

Yan Li, Key Laboratory for the Physics and Chemistry of Nanodevices and College of Chemistry and Molecular Engineering, Peking University, Beijing 100871, China

Yat Li, Department of Chemistry and Biochemistry, University of California, 1156 High Street, Santa Cruz, California 95064 ([email protected])

Zhen Li, ARC Center of Excellence for Functional Nanomaterials, Australian Institute for Bioengineering and Nanotechnology, The University of Queensland, Queensland 4072, Australia ([email protected])

Lei Liao, Department of Chemistry and Biochemistry and California Nanosystems Institute, University of California, Los Angeles, California 900924

Yichuan Ling, Department of Chemistry and Biochemistry, University of California, 1156 High Street, Santa Cruz, California 95064

Ruibin Liu, Micro-nano Technology Center, Beijing Institute of Technology, Beijing 100081, China

Gaoqing (Max) Lu, ARC Center of Excellence for Functional Nanomaterials, Australian Institute for Bioengineering and Nanotechnology, The University of Queensland, Queensland 4072, Australia ([email protected])

Jun Luo, Beijing National Center for Electron Microscopy, Laboratory of Advanced Materials, State Key Laboratory of New Ceramics and Fine Processing, Department of Materials Science and Engineering, Tsinghua University, Beijing 100084, China

Rubén Mas-Ballesté, Departamento de Química Inorgánica, Universidad Autónoma de Madrid, 28049 Madrid, Spain ([email protected])

H. S. S. Ramakrishna Matte, International Centre for Materials Science, Chemistry and Physics of Materials Unit, and CSIR Centre of Excellence in Chemistry, Jawaharlal Nehru Centre for Advanced Scientific Research, Jakkur P.O., Bangalore 560 064, India

Binh-Minh Nguyen, Center for Quantum Devices, Northwestern University, Evanston, Illinois 60208

Lian-Mao Peng, Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing 100871, China ([email protected])

Andrea Ponzoni, Department of Chemistry and Physics for Materials and Engineering, CNR-IDASC Sensor Laboratory and University of Brescia, Via Valotti 9, 25133 Brescia, Italy ([email protected])

Teng Qiu, Department of Physics, Southeast University, Nanjing 211189, China ([email protected])

C. N. R. Rao, International Centre for Materials Science, Chemistry and Physics of Materials Unit, and CSIR Centre of Excellence in Chemistry, Jawaharlal Nehru Centre for Advanced Scientific Research, Jakkur P.O., Bangalore 560 064, India ([email protected])

Manijeh Razeghi, Center for Quantum Devices, Northwestern University, Evanston, Illinois 60208 ([email protected])

Gil Rosenman, School of Electrical Engineering, Iby and Aladar Fleischman Faculty of Engineering, Tel Aviv University, Tel Aviv 69978, Israel ([email protected])

Giorgio Sberveglieri, Department of Chemistry and Physics for Materials and Engineering, CNR-IDASC Sensor Laboratory and University of Brescia, Via Valotti 9, 25133 Brescia, Italy

Stephan Senz, Max Planck Institute of Microstructure Physics, Halle D-06120, Germany

Sean C. Smith, Centre for Computational Molecular Science, Australian Institute for Bioengineering and Nanotechnology, The University of Queensland, Queensland 4072, Australia

K. S. Subrahmanyam, International Centre for Materials Science, Chemistry and Physics of Materials Unit, and CSIR Centre of Excellence in Chemistry, Jawaharlal Nehru Centre for Advanced Scientific Research, Jakkur P.O., Bangalore 560 064, India

Qiao Sun, Centre for Computational Molecular Science, Australian Institute for Bioengineering and Nanotechnology, The University of Queensland, Queensland 4072, Australia

Bozhi Tian, Department of Chemistry, the James Franck Institute and the Institute for Biophysical Dynamics, the University of Chicago, Chicago, Illinois 60637 ([email protected])

King-Ning Tu, Department of Materials Science and Engineering, Henry Samueli School of Engineering and Applied Science, University of California Los Angeles (UCLA), Los Angeles, California 90024 ([email protected])

Sergio O. Valenzuela, Institució Catalana de Recerca i Estudis Avançats (ICREA), Barcelona E-08010, Spain; Catalan Institute of Nanotechnology (ICN) and Universitat Autónoma de Barcelona, Campus UAB Bellaterra, Barcelona E-08913, Spain.

Bart J. van Wees, Physics of Nanodevices, Zernike Institute for Advanced Materials, University of Groningen, Groningen, The Netherlands

Sheng Wang, Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing 100871, China

Xi Wang, International Center for Materials Nanoarchitectonics (WPI-MANA), National Institute for Materials Science (NIMS), Namiki 1-1, Tsukuba, Ibaraki 305-0044, Japan

Damon A. Wheeler, Department of Chemistry and Biochemistry, University of California, 1156 High Street, Santa Cruz, California 95064

Jian Wu, Department of Electrical Engineering, 121 Electrical Engineering East, The Pennsylvania State University, University Park, Pennsylvania 16802

Wei-Guang Xie, Department of Electronic Engineering, Materials Science and Technology Research Center, The Chinese University of Hong Kong, Shatin, N. T., Hong Kong SAR, China

Qihua Xiong, Division of Physics and Applied Physics, School of Physical and Mathematical Sciences, Nanyang Technological University, 637371; Division of Microelectronics, School of Electrical and Electronic Engineering, Nanyang Technological University, 639798, Singapore ([email protected])

Jian-Bin Xu, Department of Electronic Engineering, Materials Science and Technology Research Center, The Chinese University of Hong Kong, Shatin, N. T., Hong Kong SAR, China

Jiannian Yao, Beijing National Laboratory for Molecular Sciences, CAS Key Laboratory of Photochemistry, Institute of Chemistry, Chinese Academy of Sciences, Beijing 100190, China ([email protected])

Félix Zamora, Departamento de Química Inorgánica, Universidad Autónoma de Madrid, 28049 Madrid, Spain ([email protected])

Tianyou Zhai, Department of Materials Science and Engineering, Tsinghua University, Beijing 100084, P. R. China ([email protected])

Jin Zhong Zhang, Department of Chemistry and Biochemistry, University of California, 1156 High Street, Santa Cruz, California 95064 ([email protected])

Jun Zhang, Division of Physics and Applied Physics, School of Physical and Mathematical Sciences, Nanyang Technological University, 637371, Singapore

Zhang Zhang, The School of Physics & Telecommunication Engineering, South China Normal University, Guangzhou, China, 510631; Max Planck Institute of Microstructure Physics, Halle D-06120, Germany ([email protected])

Zhiyong Zhang, Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing 100871, China

Yong Sheng Zhao, Beijing National Laboratory for Molecular Sciences, CAS Key Laboratory of Photochemistry, Institute of Chemistry, Chinese Academy of Sciences, Beijing 100190, China ([email protected])

Haoshen Zhou, Energy Technology Research Institute, National Institute of Advanced Industrial Science and Technology (AIST), Umezono 1-1-1, 305–8568 Tsukuba, Japan ([email protected])

Jing Zhu, Beijing National Center for Electron Microscopy, Laboratory of Advanced Materials, State Key Laboratory of New Ceramics and Fine Processing, Department of Materials Science and Engineering, Tsinghua University, Beijing 100084, China ([email protected])

Zhonghua Zhu, School of Chemical Engineering, The University of Queensland, Queensland 4072, Australia

Bingsuo Zou, Micro-nano Technology Center, Beijing Institute of Technology, Beijing 100081, China ([email protected])

Chapter 1: One-Dimensional Semiconductor Nanostructure Growth with Templates

Zhang Zhang

The School of Physics Telecommunication Engineering, South China Normal University, Guangzhou, China and Max Planck Institute of Microstructure Physics, Halle, Germany

Stephan Senz

Max Planck Institute of Microstructure Physics, Halle, Germany

1.1 Introduction

In this introductory section, we will provide a brief background for the development of technology based on epitaxial growth of semiconductor nanowires. Since the 1950s, low-dimensional structures have dominated semiconductor technology. The rapid developments of their products drive the dramatic downscaling of electronics, a miniaturization that the industry expects to continue for at least another two decades. Since the 1970s, the field-effect transistor (FET) became the fundamental logic element in semiconductor chips.[1] Moore's law states that the number of transistors on a given chip area doubles roughly every 18 months. The design of most functional semiconductor nanostructures is based on the Si platform at present. Although group III–V compound semiconductors have been considered as building blocks for high-speed and high-frequency electronic devices,[2, 3] more recently, Si/Ge and Si/SiGe heteroepitaxial nanostructures have attracted much attention.[4, 5] One-dimensional (1D) nanostructures are promising as new emerging semiconductor devices. In this chapter, several aspects of the controlled growth of 1D semiconductor nanostructures with the assistance of several templates are illuminated.

A semiconductor nanowire is generally a solid rod with a diameter of <100 nm, which is composed of one or several semiconductor materials. A lower limit of a few nanometers (nm) in diameter was defined from a technological perspective.[6] Experimentally, many techniques for the control of composition, doping, and the interface definition along the 1D nanostructure have been developed, such as molecular beam epitaxy (MBE), chemical beam epitaxy (CBE), chemical vapor deposition (CVD), and vapor-phase epitaxy (VPE).[7] The term growth here means that the semiconductor nanowires are nucleated from precursors, regardless of whether it is in vapor or liquid phase. In particular, growth is catalyzed by a metal particle, which strongly accelerates the growth rate and determines the diameter. Wagner and Ellis presented a model on the growth of silicon whiskers, which is generally described as the vapor–liquid–solid (VLS) growth mechanism.[8] With several metal catalysts, most of the semiconductor nanowires (Si, Ge, group III–V compounds) have been synthesized via VLS growth.[9] The target semiconductor materials should exhibit a binary-phase eutectic alloy with the catalyst at the growth temperature. The related crystal growth rate, in one dimension confined by the catalytic particle, is greatly enhanced resulting in the one-dimensional (1D) structure. If the catalyst particle is a solid at growth temperature, the mechanism is then called (vapor–solid–solid) (VSS).[10] In general, there are two kinds of solid catalysts, compounds or metals. For Si this can be a silicide[11] or a metal with high eutectic temperature.[12] Otherwise, semiconductor nanowires can be grown catalyst-free, that is, without any metallic catalyst involved, such as the Si and Ge nanowire growth with the decomposition of the corresponding oxide,[13] or the selective III–V nanowire growth by masking a substrate.[14]

Semiconductor nanowires are explicitly mentioned as realistic additions to complementary metal oxide semiconductor (CMOS) devices. Among the potential feasibilities, researchers have focused on studies of nanowire-based vertical surround-gate field-effect transistors (VS-FET).[15] The generic process for fabrication of a wrap-gated VS-FET could also be based on epitaxially grown Si nanowires[16] and InAs nanowires.[17] The advancement of doping techniques and high-quality heterostructures, together with studies on the simulation of bandgap engineering to tuning the properties of FETs, are quite promising.[18, 19] Si nanowire-based solutions have been proposed for optoelectronic devices,[20] biosensors,[21] and energy sources,[22] as well as other functional semiconductor materials.

At the time of writing, devices based on semiconductor nanowires are, however, still in an embryonic stage from an industrial perspective. Their introduction as new technologies would require a long-term research-and-development (R&D) process in the electronics industry. Whether they will really have an impact on future post-CMOS technology, which requires nanostructures <10 nm, depends on other factors such as the intensive exploration of alternative materials, such as GaAs or InAs instead of Si. Controllable size and crystallographic orientation of semiconductor nanowires with high reproducibility are, therefore, two key issues in potential applications. In this chapter, the template-assisted growth of semiconductor nanowires will be demonstrated as one promising solution, which could provide size-controlled nanostructures while also enabling selective crystallization within limited space.

Epitaxial growth refers to a method of crystal formation on an underlying crystalline substrate. Semiconductor epitaxy can be realized from gaseous or liquid precursors. With the substrate surface intrinsically serving as a seed crystal, or by a surface modification, the deposited material crystallizes in a lattice structure and orientation identical to those of the substrate. Ideally, a two-dimensional 2D film epitaxial structure is formed after several atomic layer depositions onto a substrate. If the material is deposited on a substrate of the same composition, the process is called homoepitaxy. Otherwise, it is called heteroepitaxy.

Without introducing additional forces, the morphology at the initial stage of homoepitaxial growth is, based on the thermodynamic wetting model, determined by the minimum of interfacial free energies.[23] Briefly, the smaller one of the total free energy of epilayer/vacuum interface plus the epilayer/substrate interface (fe + fi) and the free energy of the substrate/vacuum interface (fs), determines the wetting behavior of the epilayers. The epilayers supposedly cover the substrate homogeneously with a decrease in free energy, when fe + fi < fs. In case of fe + fi > fs, a three-dimensional (3D) island morphology is formed preferentially. The partial uncovering of the substrate decreases the total free energy.

For a system with lattice mismatch, we should factor in the strain from the lattice mismatch in the growth model. The buildup of strain energy at the interface increases with the initial wetting growth of the epilayer, and the increased fi leads to 3D island formation. For different systems, a competition between different strain relaxation mechanisms was experimentally found, resulting in the formation of either 3D island without dislocations (coherent islands) or dislocations.[24] A significant amount of work has focused on fabrication of heteroepitaxial nanostructures that could restrict carriers to 1D quantum wires or to zero-dimensional (0D) quantum dots, following since the first observation of confinement in a quantum well.[25] Axial heterostructure nanowires were first demonstrated in 1994 for the GaAs-InAs system.[26] Further development of axial InAs/InP superlattices with atomically perfect interfaces was realized, and a conduction band offset of 0.6 eV was deduced from the electrical current measurement, due to thermal excitation of electrons over an InP barrier.[27] For a lateral heterostructure, spatial separation of subband energies leads to a carrier confinement and a reduced carrier scattering, due to confinement of carriers in the radial direction. For example, Lieber's group used bandstructure design and controlled epitaxial growth to create a 1D hole gas system in Ge/Si core/shell nanowire heterostructures, with ballistic transport through individual 1D subbands and long carrier mean free paths at room temperature.[28, 29] Furthermore, most of the interesting physical behaviors are only observed from true quantum heterostructures, whose lateral dimension should be on the scale of ≤10 nm, to be comparable to the de Broglie wavelength of charge carriers. Geyer et al. have demonstrated that, using a top–down method, the diameter of Si nanowire arrays containing Si/SiGe superlattices could be scaled down to <20 nm.[30]

The application of the 1D semiconductor nanomaterials necessitates, for convenient device integration and processing, large-scale control of position and orientation. Table 1.1 shows a collection of various methods that have been reported thus far to realize 1D semiconductor nanowires at defined locations, with the corresponding scaling range and the literature references. The most common process for position control is based on electron or ion lithographic processing. For semiconductor nanowire growth, catalyst lithography has proved to be the most popular technique for position control. The substrate is patterned by electron beam lithography, a processing with exposure of a resist layer, metal evaporation, and a lift off step. Thus far, large-area lithographic technologies have been limited to scales >22 nm. The growth direction of nanowire is influenced by many factors, and positioning of catalysts at well-defined locations will not effectively ensure control of nanowires position and direction. For these reasons, alternative means of down scaling to small diameters (≤10 nm) are utilized. The surface template method was derived from the selective-area growth on a lateral patterned surface. A quantum wire structure was produced on a GaAs(100) substrate with an etched pattern of parallel V-shaped grooves.[31] The epitaxial nanowires had a crescent shape, and with a core thickness in the 10 nm scale. Using the scanning tunneling microscopy (STM) approach with atomic resolution, ultrathin Cu3N nanowires with a width down to 1 nm were demonstrated to grow laterally on a single crystalline Cu(110) reconstructed surface.[32] To realize vertically aligned nanowire arrays, reactive-ion etching (RIE) and patterned metal-assisted etching methods were used, through a self-organized porous mask, decreasing the mean size of nanowire arrays down to the <10 nm scale.[33] However, some top–down techniques produce surfaces of nanowires with a high density of defects, via the high-energy ion bombardment at the bulk material. Although the crystallographic orientation could be confined vertically to the substrate, the nanowires were found to taper with increase in length/diameter ratio. The surface programed assembly method[34] does not impose stringent demands on the growth process; only proper selective alignment is crucial for well-controlled structures. Nanowires and nanotubes are initially, without position control, grown with a fixed growth direction and size. Afterward, they are collected by a liftoff process and placed on a prepatterned substrate. A precise single-unit alignment is, however, not easily achieved.

Table 1.1 Methods Used to Realize 1D Semiconductor Nanostructures at Defined Locations, with Corresponding Size Scale

The criteria periodicity, small diameter, and vertical alignment of the nanowires can be satisfied by the assistance of self-organized porous templates. Either a liquid or a gaseous precursor can be used for the growth. A supercritical fluid (SCF) inclusion technique combined with a mesoporous silica film was developed, which produced ordered semiconductor nanowire arrays with several nanometers in diameter.[41, 42] The high diffusivity of the fluid enables a rapid transport of the precursor into the mesopores of the silica film. However, rigorous safety precautions should be considered in these experiments, because of the high pressures and temperatures used to allow nucleation and growth.[43] The ideal growth of semiconductor nanowires is assumed to be bottom–up epitaxial growth. Selective bottom–up filling in the vertical 1D direction can be realized by a combination of VLS growth and porous template with catalysts at the nanowire tips. This means that no template sidewall deposition occurs or at least that slow the rate of parasitic growth on the sidewall is lower than that for the nanowire. Otherwise, cracks or voids affecting conductive properties of products would be inevitable. At this point, not only is high diffusivity of the source gas required at the growth temperature; the templates must also satisfy the following conditions: (1) ordered pores attaining the desired degree of nanowire growth, (2) chemical stability against source gas and by-products during CVD at the growth temperature, and (3) selective deposition of catalyst metal at the pore bottom to enable the epitaxy. Satisfying these conditions, the molecules of source gas can smoothly enter into the pore, being cracked only at the surface of the catalyst with direct contact with the substrate surface.

To realize the integration of Si-based 1D nanoelectronics, the most promising approach is the epitaxial growth of Si nanowires directly on Si substrate with desired crystallographic orientation and doping. Technically, the most widely used method for the high-quality epitaxy is based on a VLS growth mechanism.[44] In particular, with the CVD growth technique, the essential concept is a metal/silicon alloy in the liquid phase working as a medium to transform Si atoms from components of gaseous molecules into a solid crystal. The Si epitaxy is a continuous extension of Si lattice planes from the surface plane of a hydrogen-terminated single-crystal Si substrate.

A typical VLS growth model using gold as catalyst is shown in Figure 1.1a. Gaseous molecules with Si components (e.g., diluted SiH4, Si2H6, SiCl4) are introduced into a vacuum chamber, where an H-terminated Si substrate covered by a deposited thin Au film is heated above the Au-Si eutectic temperature of 363°C.[45] We should first mention that, during the dewetting process, bigger Au-Si droplets always grow at the expense of smaller ones in their neighborhood (Ostwald ripening) through a surface diffusion process. Meanwhile, traces of Au saturating the Si dangling bonds as a submonolayer film are distributed over the Si surface in between. Although studies of the wetting behavior observed a depression of Si surface where the droplets once stood,[46] we assume in the schematic that the liquid Au-Si alloy droplets are formed on a flat Si surface, namely, the initial positions of Si epitaxy. With SiH4 decomposed on both surfaces of the catalysts and the Si crystal, Si atoms can diffuse into the catalyst particle. At the same time, the byproduct H2 is removed by the gas flow. In order to provide sufficient Si atoms to freeze out at the solid–liquid interface from a supersaturated Au-Si alloy droplet, the precursor species must decompose to some extent at the growth temperature. The nucleation model suggests that Si atoms nucleate at the edge at the three-phase boundary with propagation toward the center by the Burton–Cabrera–Frank mechanism.[47] Experimentally confirmed,[48] the Si nanowire base during the initial phase of growth has an expanded shape as shown in Figure 1.1a. Surface thermodynamics was adopted to explain the interplay between droplet and nanowire in the VLS epitaxy.[49] They presented a model of stable growth that predicts a limited range of possible contacting angles. Depicted in the expanded view of Figure 1.1b, forces at the three-phase line have mainly three components corresponding to the vapor–solid, liquid–solid, and vapor–liquid interfacial tensions, namely, σvs, σls, and σvl, respectively. It was pointed out that an additional line tension contribution should be considered if the contact radius is on the order of a few nanometers.[50] In equilibrium, the lateral driving forces for a three-phase boundary movement are balanced. Si atoms are nucleated at the growth interface by bulk or surface diffusion. In a typical VLS growth, the liquid diffusion pathways in the droplet dominate the transportation. Surface diffusion along the nanowire and on the Si substrate should be considered as well, since nanowire growth was experimentally found to be in an unsteady state.[51] For example, faceting and tapering of Au-catalyzed Si nanowires were observed at elevated growth temperatures due to surface migration of Si and Au. The competition between these two Si transportation processes, surface diffusion and bulk diffusion in the liquid, leads to a characteristic profile of the supersaturation as a function of the radius. The supersaturation at the rim has the highest value, and thus the nucleation probability is highest at the three-phase line. If high supersaturations are used, nucleation will also occur with high probability at other positions at the interface of liquid and solid. This can result in a rough interface by polycentric nucleation. During the nanowire growth, depicted in the enlarged view of Figure 1.1c, the vapor–solid interface is inclined to the nanowire surface with an angle α, satisfying the force balance in the lateral direction as well.

Figure 1.1 (a) Schematic of VLS growth mechanism with AuSi droplet formation and Si nanowire epitaxy: (1) SiH4 decomposed on AuSi eutectic droplet; (2) Si atoms precipitate at liquid–solid interface or at edge of the three-phase line through bulk or surface diffusion, respectively; (3) Si atoms deposited from SiH4 directly onto the Si surface. Expanded views of selected three-phase line junction areas are presented for initial droplet (b) and nanowire (c) growth.

One issue that is intimately connected with the Si nanowire epitaxy is the question of the relation between diameter and growth directions. In free space, metal-catalyzed Si whiskers grown by CVD prefer to grow in <111> directions.[52] Additionally, other growth directions such as <110>,[53] <112>,[54] and <100>,[55] were also experimentally found. A transition between different preferred growth directions was observed for epitaxial Si nanowires.[56] The preferred growth directions were <111> for large-diameter (>40 nm) nanowires, a mixture including <112> for intermediate diameters, and <110> for small diameters (<20 nm). The influence of supersaturation on the growth direction using other conditions, such as plasma excitation[57] and pressure change,[58] were investigated to some extent. However, using the VLS growth mechanism, mainly three epitaxial growth directions on bare silicon substrates were obtained, which do not include the <100> growth directions.

1.2 Anodic Aluminum Oxide (AAO) As Templates

Considering that conventional Si micro/nanoelectronics is based on Si(100) wafers, it is meaningful to realize high-density epitaxial Si[100] nanowire arrays vertically grown on Si(100) wafers, especially for devices requiring vertical nanowire alignment. Compared with the growth in free space, it is possible to obtain controllable growth directions of embedded 1D nanostructures with the assistance of porous templates. Lew et al. demonstrated successfully the use of AAO membranes as template for Si nanowire growth.[59] The Si nanowires grown by this method had two gold tips at each ends, and the single-grain Si nanowires were found with two growth directions, parallel to <100> and <211>. Shimizu et al. anodized an AAO membrane directly on a Si(100) substrate in order to realize the homoepitaxy of Si.[60] After selective removal of the barrier layer and silicon dioxide, Au catalysts were electrolessly deposited on Si confined at the bottom of AAO pores, leading to an epitaxial growth of Si[100] nanowires perpendicular to the Si surface.

1.2.1 Synthesis of Self-Organized AAO Membrane

Porous AAO synthesized by electrochemical oxidization of aluminium has been studied and used in numerous fields for more than half a century.[61, 62] Based on a two-step anodization process, in 1995, a self-ordered porous AAO membrane with 100 nm interpore distance was first reported by Masuda and Fukuda.[63] The long-term first anodization results in an equilibrium morphology at the oxide/metal interface, which shows a textured aluminum surface after removal of the first oxide layer. The textured aluminum surface results in highly ordered hexagonal pore arrays in the second anodization step. Since this discovery, AAO can be used to provide ordered honeycomb nanopore arrays, perpendicular to the surface. Most importantly, the diameter of AAO pores can be controlled from a few nanometers to several hundreds of nanometers depending on the anodic voltage and acid species used for anodic oxidation. To date, the most popular model for the self-adjustment of ordering in AAO is based on the mechanical stress, which is associated with the expansion between neighboring pores during the oxidation process.[64] Under conventional mild anodization (MA) conditions, AAO formation is described by a 10% porosity rule, corresponding to a volume expansion ratio of 1.2 between aluminum and alumina.[65] Lee et al. reported that, using the hard anodization (HA) process, well-ordered hexagonal pore arrays in AAO can be produced with a growth rate 25–35 times larger than with MA but a smaller porosity rate of only 3%.[66]

Anodization can be carried out under constant-voltage mode (potentiostatic) or constant-current mode (galvanostatic). In general, a two-step constant voltage anodization is recommended. The experimental setup is quite simple, as shown on the illustration of Figure 1.2. In order to ensure homogeneous reactions, the electrolyte is stirred. The structure of pore arrangement after the second anodization is characterized as a close-packed hexagonal pore array (top-view SEM image), and columnar cells containing elongated cylindrical nanopores are normal to the Al surface. Each nanopore ends in a thin barrier oxide layer with approximately hemispherical shape (side-view SEM image, white insert). Typically, AAO films with different pore diameters and interpore distances ranging from 20 to 200 nm can be prepared, using three major inorganic acid electrolytes: H2SO4, H2C2O4, and H3PO4. The respective electrochemical parameters and dimensional measurements obtained by ex situ SEM characterization are shown in Table 1.2. We can conclude that, without further pore widening after the second anodization, the pore diameter after ordering in sulfuric acid is the smallest down to the 20 nm range. The pore density is increased with decreasing of constant voltage, similar to the reported approximately 2.5 nm/V linear relationship. On the other hand, the pore diameter and shape are influenced by the electrolyte temperature and the anodization time because of the chemical etching on the pore wall. For example, the sulfuric acid anodization at 25 V results in a minimum pore diameter of 20 nm at 1°C rather than the 25 nm at 8°C.

Figure 1.2 Simplified illustration of the experimental setup of a two-step constant-voltage anodization. The structure of the AAO film was characterized by top-view and side-view SEM images.

Table 1.2 Recommended Electrochemical Parameters for Ordered AAO Preparation

1.2.2 Synthesis of Polycrystalline Si Nanotubes

Using the confinement effects of the sidewalls, AAO template-assisted synthesis of polycrystalline Si nanotubes have been reported, such as the catalyst-assisted CVD method,[67] the molecular beam epitaxy (MBE) method,[68] and the chemical reductive deposition method.[69] Smaller diameters and controllable structures still remain challenges. An ultra-high-vacuum (UHV) CVD method combined with a transition metal as catalyst was used to fabricate Si nanotubes with cobalt silicide ends. The growth length, diameter, and thickness of tube walls can be well controlled by the high-quality AAO templates.[70]

1.2.2.1 Growth Mechanism

Figure 1.3 schematically illustrates the proposed growth mechanism by sketching three main procedures. In step 1, a gold film was sputtered onto one side of the AAO membrane as a contacting electrode. Cobalt nanowires with a defined length were electrodeposited into the pores. The overall cross-sectional structure is shown in the SEM image of Figure 1.3, step 4. The average pore diameter and thickness of the as-prepared AAO templates were 45 nm and 40 μm, respectively. The electrodeposition of cobalt was performed in a galvanostatic mode with a current density of 1.5 mA/cm² with an electrolyte consisting of 200 g/L CoSO4 · 7H2O and 20 g/L H2SO4. A thin gold film ∼300 nm in thickness covered one top surface of the AAO template as the cathode and a platinum mesh was employed as the anode. The different contrasts in the SEM image of Figure 1.3, step 4 correspond to the Co nanowires and the remaining pore spaces with Si nanotubes. Subsequently, in step 2, the AAO template with embedded Co nanowires was transferred into the UHV system. The annealing was performed at 600°C for 2 h, resulting in a homogeneous decoration of Co nanoclusters on the sidewalls and the other top surface of the AAO template. It is well known that the sidewalls of AAO templates contain electrolyte anions after anodization. These anions would attract the positively charged metallic ions on the sidewalls during the exposure to the Co sulfate solution. During the UHV annealing process, the linked OH− anions could reduce Co²+ to the metallic nanoclusters:

1.1 1.1

Simultaneously the byproducts (H2O and O2) are pumped away with a vacuum pressure under 1 × 10−9 mbar.

Figure 1.3 Schematic illustration of the growth mechanism of Si nanotubes by three main procedures: (1) electrodeposition of Co nanowires into AAO pores with a Au film as counterelectrode; (2) UHV annealing produces Co nanoclusters decorating AAO surface; (3) growth at 500°C with SiH4; (4) cross-sectional SEM image of a sample after CVD process; (5) TEM images of the Si nanotubes after removal of AAO template; (6) cross-sectional TEM image of as-prepared heterostructures within AAO and its selective-area diffraction patterns with indexing.

Reproduced from Nanotechnology 2010, 21, 055603 (6 pp), Copyright © 2010, IOP Publishing Ltd.[70]

An indirect proof of a homogeneous Co decoration on the surfaces of AAO is the homogeneous Si growth. A flow rate of 20 sccm (standard cubic centimeters per minute) of 5% SiH4 gas was fluxed into the UHV chamber with controlled partial pressures, from 0.1 to 0.75 Torr and a fixed growth temperature of 500°C, the growth lasted for 30 min. The transmission electron microscopic (TEM) image in Figure 1.3, step 5 was taken from a sample grown at 0.1 Torr partial pressure. It confirms the Si growth with a homogeneous thickness, even at the pore opening. The AAO was selectively etched by a 5% H3PO4 solution. The lower inset indicates that the nanotubes can grow up to several micrometers long with a homogeneous thickness inside the pore. This can be understood if Co nanoclusters formed with a high density/uniformity and then functioned as catalytic nuclei for the Si growth during step 3. The Si grains grown at each nucleus were progressively connected and thickened with the continuous SiH4 decomposition. Finally, a polycrystalline Si nanotube attached tightly to the sidewalls. Meanwhile, SiH4 reached the top surface of the Co nanowires, resulting in the formation of cobalt silicides connected to the end of the Si nanotubes. The silicides are shown in the cross-sectional TEM image (Figure 1.3, step 6) of the structures embedded in the AAO template. The selected-area energy dispersive (SAED) patterns that were taken from one tube body and the end of this tube were indexed as polycrystalline Si and CoSi, respectively.

1.2.2.2 Characterizations of Crystallographic Structure and Compositions

Selected-area energy-dispersive X-ray spectroscopy (EDS) was used to determine the compositions, at five different positions (spot 1–spot 5 in Figure 1.4), along one nanotube of 10 μm length, as shown in Figure 1.4a. Si, Co, and Au are all found in the EDS spectrum taken from these five spots (Figure 1.4b). An enlarged view near 6.93 keV shows the Co Ka1 peaks with higher sensitivity (Figure 1.4c). The histograms of the atomic ratio of Co and Si (Figure 1.4d) confirm that the tip consisted of Co and Si with a stoichiometric ratio of ∼1 : 1, whereas the Co concentration was almost constant in the tube body. It was also revealed that the observed Au was from background contamination, which is shown to be constant in Figure 1.4d, and spot 2 was interferred by the nearby silicide with a higher Co atomic ratio. The crystallographic structure at the end of the tube was further investigated by a high-resolution (HR) TEM image. Figure 1.4e reveals a crystalline cone at the end of the nanotube, the shoulder edge of which is connected with the Si nanotube (indicated by the black arrows). Insets are the enlarged views of the selected dashed squares: (1) the tip consists of a single-phase CoSi with CsCl structure (ICSD database, space group pm 3m with a lattice constant a = 2.816 Å), whose calculated interplanar spacing of 0.20 nm is very close to that of the CoSi(110) plane (1.99 Å); (2) the nanotube with a wall thickness of ∼6 nm consists of 1–2-nm-thick amorphous oxide layers and polycrystalline core, where the (220) lattice planes (d = 0.19 nm) of the crystallized silicon regions are still observed. As we know, several Co-Si alloy phases are expected to appear in sequence according to the thermal equilibrium phase diagram of Co-Si. In such a case, Co2Si, CoSi, and CoSi2 will be formed with increasing temperature.[71] It was reported that for a thin-film Co/Si couple, the phase appearing first at the Co/Si interface will be Co2Si when the annealing temperature is >350°C. With longer time and higher temperature, CoSi will form when additional Si is available. When the temperature is increased up to 500°C, the CoSi2 phase can be observed.[72] In our experiment, the CoSi phase should be the dominant compound since it is more stable in thin films than is Co2Si or CoSi2 at 500°C.

Figure 1.4 (a) TEM image of a single nanotube with one end sealed, characterized by compositional measurements (circled numbers highlight the areas on which the electron beam was focused); (b) EDS spectra taken from the five positions; (c) enlarged view of Co peak at ∼6.93 keV; (d) histograms of atomic ratios of Co, Si, and Au; (e) HRTEM image of solid end and tube wall with enlarged inserts from selected regions, respectively (dashed lines represent the Si tube wall).

Reproduced from Nanotechnology 2010, 21, 066503 (6 pp), Copyright © 2010, IOP Publishing Ltd.[70]

1.2.2.3 Control of Wall Thickness of Si Nanotube

Control of wall thickness of polycrystalline Si nanotubes was achieved experimentally in 45 nm pore diameter AAO by adjusting the partial pressure of SiH4 at a given temperature (500°C) and using a fixed growth period (30 min). Obviously, there is an increase in wall thickness with increasing pressure, shown as the measured curve and corresponding TEM images of each measured sample in Figure 1.5. With the other conditions unchanged, an increase of the SiH4 partial pressure increases the growth rate. With the highest partial pressure of 0.75 Torr, the thickness of the Si approached 10 nm. The growth might be explained analogically to the experiments by Kamins et al., who used a silicide forming metal as catalyst for nanowire growth.[11] Initially, the metal (Ti or Co) reacts to form a silicide. With the Si supply continued, the Co nanoparticles are consumed with a higher Si supersaturation required. It is possibly related to the limited diffusion rate of Co into the Si at a given temperature with the Co/Si system as well. No further Si could be catalyzed from the precursor when the wall of Si nanotube approached its maximum thickness. The wall thickness was found to be homogeneous, although the thickness of the self-catalyzed Si growth was confirmed to be a function of distance to the AAO surface.

Figure 1.5 Variation in wall thickness of SiNTs versus silane partial pressure at 500°C; TEM images of Si nanotubes grown at pressures from 0.1 to 0.75 Torr (scale bars = 50 nm).

1.2.3 AAO as Template for Si Nanowire Epitaxy

Thermal and chemical stabilities of AAO are high enough for VLS growth of Si nanowires (NWs), since the main component is a stable material. Early experiments using AAO as templates to grow semiconductor nanowires have been undertaken with freestanding membrane without epitaxy.[73, 74] Ordered vertical nanowires would allow a higher packing density than the presently used lateral structures. If nanowires are grown epitaxially on the substrate from defined catalyst locations, for integration convenience, the wires can be left in place, and the contacts can be postprocessed to the exposed top of the wires. One approach utilized a thin aluminum film on a conductive substrate:[75] the electrochemical formation of aluminum oxide stops as soon as all Al metal is consumed, and the thinner AAO barrier layer formed on the conductive material can be removed by chemical etching. In this case, the AAO membranes are fitting and connected to the substrate. If the thin Al film is deposited on the Si substrate and anodized, the ordering of AAO is difficult to achieve because of the complicated surface roughness and nonuniform crystallite size. The surface condition of the Al film will directly affect the ordering of the grown nanopore arrays. However, with pore formation guided by lithographic or imprinted surface patterns, controlled pore ordering and independently controlled pore spacing can be realized.[76] Another big advantage of a fixed AAO membrane on a substrate is that the AAO nanopores can be used as templates to control the epitaxial growth direction of semiconductor nanowires perpendicular to the substrate surface, even if the direction is not a preferred orientation of nanowire growth in free space.

1.2.3.1 AAO Anodization on Si Substrate

Figure 1.6a is a schematic illustration of Al anodization on Si substrate, the barrier layer formation, and the morphology of the AAO/Si interface after removal of the barriers. First, a thin Al layer (thickness < 1 μm) was sputtered onto the H-terminated n-type Si(100) substrate. A standard anodization for the fabrication of AAO with 40 nm pore diameter was performed. The pore formation process proceeds with a thick barrier layer underneath as shown in Figure 1.6b. Normal anodization ceases as soon as the Al below the center of the pore is oxidized. The anodization can be continued until it consumes all of the aluminum beneath the barriers. When this process is continued, the resulting oxide barrier layer structure at the bottom of the pores is, as shown in Figure 1.6c, quite different from the morphology in the bulk aluminum. A void structure is observed beneath a thin arch-shape barrier layer bended upward at the end of each pore. Forces on preexisting oxide by newly formed oxide combined with geometric conditions produce the upward bending. In conclusion, anodization of an Al film on a conducting Si substrate has two main peculiarities: (1) the void beneath the insulating arch-shape barrier alumina layer is easy to remove without obvious widening of the pore diameter and (2) the Si surface reacts electrochemically in a controllable manner, and its oxide thickness can be selected by monitoring the anodization current–time (I–t) curve after the anodization of Al is complete. In this process, proper switchoff time is crucial in order to avoid the detachment of the AAO from the Si substrate after removing the SiO2 layer. Inhomogeneities of Al metal film thickness and of current density during anodization result in different optimum anodization times required at different positions of the sample.

Figure 1.6 (a) Schematic illustration of AAO anodization on Si substrate, barrier layer formation, and pore opening by etching off the barriers; (b–d) side-view SEM images corresponding to each single process illustrated in (a), respectively (all scale bars = 100 nm).

1.2.3.2 Epitaxial Growth with Controllable Growth Direction

One specific target is the realization of epitaxial Si nanowire growth on Si substrate with controllable growth direction. Moreover, the diameter of the nanowires has to be as small as possible, in particular <25 nm. Generally, it is difficult to obtain epitaxial growth of embedded material in the AAO nanopores, since an amorphous layer called the barrier layer exists at each nanopore bottom. There are two basic approaches to removal of the AAO barrier layer:

1. Separating the AAO membrane from the Al bulk by selective chemical etching of Al. After this separation process, the end of the AAO membrane with the barrier layer is etched away, and continuous pores are prepared as shown in Figure 1.7a. Putting this AAO membrane on a substrate, it can be used as shadow mask for evaporation to form nanodot arrays directly on the substrate. Lombardi et al. prepared gold (Au) nanodot arrays on a Si(111) substrate by this method.[77] They utilized the Au dots as catalyst for VLS growth of Si after removal of the AAO membrane from the substrate. They succeeded in preparation of a vertically grown epitaxial Si[111] on a Si(111) substrate as illustrated in Figure 1.7b. AAO membrane grown by this method usually have micrometer-scale gradual roughness. Therefore, the membrane is not suitable for template growth of epitaxial nanowires, because only small areas are connected to the AAO membrane.

2. Using a thin aluminum film on a conductive substrate. The electrochemical formation of aluminum oxide ceases as soon as all Al metal is consumed. The thinner AAO barrier formed on the conductive material is removed by selective chemical etching. In this case, the AAO membranes are fitted and connected to the substrate. Shimizu et al. prepared AAO membrane directly on two types of substrate, in particular Si(100) and Au films as catalyst on Si(100).[60, 78]

Figure 1.7 Schematic drawings of (a) freestanding AAO as template for Au-catalyzed Si nanowire growth; (b) AAO membrane as shadow mask for Au evaporation to form nanodot arrays for nanowire growth; (c) AAO directly grown on Au/Si substrate for Si nanowire epitaxy; (d) Au electroless plating and Si nanowire epitaxial growth in an AAO template.

The processes are schematically shown in Figure 1.7c and 1.7d, respectively. In the electroless Au plating cases as illustrated in Figure 1.7d, catalyst Au for VLS growth was selectively deposited on Si surface at the bottom of the AAO pore, and formed Au particles directly on Si(100) substrate. Epitaxial growth of Si(100) nanowires were observed in both cases. The HF acid contained in the electroless Au plating solution facilitates direct contact between Au and Si. One problem that should be mentioned here is that, when this anodization process is done with a thin evaporated film of Al on p-type Si(100) wafer with a doping level of ≤ 0.001 Ω · cm, the pore formation process proceeds until it consumes all of the Al and stops at the Al-Si interface. Afterward, both oxalic and sulfuric acid solutions will react unfavorably with such p-type Si at any anodization voltage, and anodic silicon oxide is produced unless an intermediate layer was used to protect the substrate before the Al deposition. However, such a protective layer needs to be thin and homogeneous, which is technically difficult to achieve.

1.2.3.3 AAO Bonding

As mentioned previously, the approach of anodizing an Al layer on the Si substrate has two main drawbacks: (1) a good ordering of AAO pores requires a long-term etching and a thick and smooth Al film, which could not be obtained with available equipment; and (2) the undesired anodization of Si leads to a rough Si surface with dimples beneath each pore bottom. A new method was invented, based on the idea of processing a freestanding AAO membrane and bonding the thin membrane onto a Si wafer. Instead of filling the pores with an etching solution and simultaneously etching pore walls and the barrier at the pore bottom, a freestanding AAO membrane can be floated on an etching solution, and only the barrier layer contacts the chemicals.

In order to realize a freestanding continuously open AAO membrane bonded onto Si substrate, a polymer-assisted method was used as illustrated in Figure 1.8a. First, a thin AAO film was synthesized by the standard two-step anodization process as step 1. Here we show one sample as an example, because different electrochemical parameters correspond to different pore diameters and interpore distances. Following application of a constant voltage of 25 V in 0.3 M H2SO4 acid (3°C), the first anodization lasted for 24 h. Then, the oxide layer was completely removed by wet etching (a mixture of 1.8 wt% chromic acid and 6 wt% phosphoric acid) at 45°C to obtain a textured surface on Al. The second anodization was conducted with the same parameters as the first one, and lasted for only 180 s for an oxide thickness of ∼100 nm. A spin coating process (step 2) was used to fill into the pores a thin layer of polystyrene (PS), which attached homogeneously to AAO after spinning at 3000 rpm (rev/min) for 60 s using 1.5 wt% PS/CHCl3 solution, followed by a 90°C solidification heating. The protection layer of PS enhances the buoyancy of AAO, and its hydrophobic nature enables the remaining Al substrate to be etched completely by floating on a mixture of CuCl2 and HCl solutions. It should be pointed out that the thin PS film prevents the thin ceramic membrane from mechanical deformation. The integral structure can be retained during handling and transfer. After removal of Al, the barrier layer was selectively etched by changing the etching solution to 5% H3PO4 at 30°C for 15 min (step 3). Since the whole pores were filled by PS, the side effect of pore widening was avoided. The whole PS/AAO membrane still floating on the surface of deionized water was transferred to a desired substrate such as Si (step 4). One sample is shown in Figure 1.8b, a tilted side-view SEM image. The AAO has a thickness of around 100 nm with a homogeneous 30-nm-thick PS film covering the surface. The pores are sealed and attached to the Si surface. The exterior PS film can be removed by a CHCl3 washing, and the PS inside the pores can be further dissolved with an immersion into CHCl3 or vacuum pyrolysis. This process (step 5) not only eliminates the PS but also enables the conformal contact of the AAO bottom side with the flat Si surface (shown in Figure 1.8c). The pores are oriented along the normal of the substrate.

Figure 1.8 Thin AAO membrane bonded onto Si substrate: (a) Fabrication scheme: (1) thin AAO film on Al with high ordering, (2) spin coating of PS film, (3) selective etching of Al substrate and barrier layer, (4) transfer of AAO membrane onto Si substrate, (5) removal of PS; (b) tilted side-view SEM image of AAO/PS bonded on Si as in step 4 (scale bar = 100 nm.); (c) tilted side-view SEM image of sample; (b) after step 5, scale bar = 150 nm.

The van der Waals forces at the interface exhibit an excellent contact that can even survive evacuation. The thickness of an AAO film produced with sulfuric acid anodization should not exceed 250 nm, which corresponds to a pore length/diameter ratio of 10. The same ratio limitation was found in the case of oxalic acid, with a 40 nm pore diameter. Beyond this ratio, the PS always filled the pores only incompletely, and conformal contact was impossible because of surface roughness after selective etching. The analysis of pore morphologies of the two AAO/Si integration methods, as shown in Figure 1.9, demonstrates the advantages of the new method. Using the direct growth of Al on Si substrate method (Figure 1.9a) with a short first (initial) anodization, the self-ordering is quite limited, and the pore diameters have a distribution factor (i.e., the full-width at half-maximum (FWHM)/mean diameter ratio) of >40%. Partial pores are branched, and are not perpendicular to the substrate. The new method of thin AAO film bonded onto Si inherits the highly self-ordered pore arrangement caused by a long first anodization (Figure 1.9b). While keeping