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DIGITAL SYSTEM DESIGN DIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNvvvDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGN

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294 views2 pages

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DIGITAL SYSTEM DESIGN DIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNvvvDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGNDIGITAL SYSTEM DESIGN

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srikanthpatel132
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Fall 1999

EE 8223 Analog IC Design

Page 69

Beta Multiplier Referenced Self-Biasing The beta multiplier current reference circuit provides an alternate scheme for (possibly) obtaining a PTAT-like current without using bipolar transistors. The basic form of the beta multiplier current reference is shown in the schematic below (excluding startup circuit). Note that the overall width of M2 is K times larger than M1 and L1 = L2 to provide 2 = K 1.

Neglecting mismatch and effects, the current mirror M3, M4 provides ID1 = ID2. Applying KVL, we obtain
VGS1 = VGS 2 + IR

After substituting for VGS and neglecting body effect,


2I 2I = + IR + V + V THN THN 1 2 2I 2I + V = + V THN THN + IR K 1 1

Solving I provides the design equation for the beta multiplier current reference:
I= 1 2 R 1 2 1 K
2

Fall 1999

EE 8223 Analog IC Design

Page 70

Note the design variables that determine I ratioed gate widths (K) and the value of a single passive component (R). The temperature coefficient for this reference s output current is described by
TC I = 1 I 1 R 1 KP (T ) 1.5 = 2 = 2 TCR + I T R T KP (T ) T T

Obviously the resistor temperature coefficient (TCR) has significant impact on TCI. If fact, TCR will determine if the reference achieves PTAT performance. A practical example of a beta multiplier current reference is provided in example 21.4. The schematic for this example is included below. This circuit achieves a TCI of 1,000ppm/ C at room temperature using a resistor with TCR = 2000ppm/ C. Note also the use of cascode MOSFETs to minimize the influence of finite MOSFET ro.

Recognize that the absolute accuracy of R dramatically effects the absolute accuracy of I. Additional sources of error for this circuit include device mismatch and body effect. Again, however, this technique does not require bipolar transistors that would need thorough characterization.

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