RX MID CHANNELS

GSM: CH 62 -- 947,4 MHz TRK CLK ( 26MHz for RC tuning) 0-9, *, #, Send, Menu Keypad
Soft Left+Right Matrix
EGSM: CH 37 -- 942,4Mhz VolUp, VolDn
DCS: CH 700 -- 1842,8MHz 35
NEPTUNE Power
DIG_REG
IO_REG VA, Smart
U800
19
U150 ALGAE L&H Tracking RF_REG Nav Up
Band Control DSP Peripherals
20 LNA B5 Keypad KBR6, KBR7 Nav Left Center Nav Right
Tracking Osc. N accelerator, encryption
22 Timer, Interupts Port KBC0, KBC1 Nav Dwn S511 PWR_SW
100kHz
27 BB_I A8 PWR/END
23 LNA AGC RF Det.
BB
Out 28 BB_IX B8 SIM_VCC
16 Digital Channal DMA K2
Dual ADC DSP SIM SIM_DIO GND
LNA LP Filter PMA AAF 25 CM IN (decoupling analog GND) C9 Filters Direct DSP
17 IF Amp. 2 Pole Filter Analog / Digital Digital Memory Memory Interface K3 4 SIM 2
(Post Mixer Amplifier) UltraLite SIM_RST
13
100kHz 29 BB_Q A9 Converter If Mixer Access 104 MHz J4 6 Connector 3 NC
High Band 1800 MHz

BB and LO Controller SIM_CLK J800 1 SIM_VCC

Low Band 850 MHz

14 LNA AGC RF Det. 30 BB_QX B9 L1 5

Out
High Band 1900 MHz
Low Band 900 MHz

RF_REG
n 3.6 - 3.9 GHz D9
47 RXRX RX_CP D5 RX Synthesizer Shared Memory DATA BUS D0-15 U700
RX VCO Loop
Loop Charge
VM_REG C4 Pump Phase
1Mbit RAM FLASH
RX EN 9
5
42
Filter
SYNTH_FD_P B6 Detect ADDRESS BUS A1-24
W18 CS0B K1 B5,L4... DIG_REG
3.4 - 3.7 GHz Synth F/B 720 - 915 MHz SYNTH_FB_N External V17 CS1B D6
41 A6 Prescaler D4 VPP
1710 - 1785 MHz TX VCO 4 G17 EB1 F3
MCU Memory F4, K8 RESET OUT
2 TX_CP D4 MCU K16 EB0 C2
TX SPI Memory Interface (from Neptune)
CP ARM7
880 - 915 MHz TXTX 52 MHz J19 R_WB F5,D5
44 Loop GMSK Mod & T16 OEB J2,H1
D8 Mod DAC T19 BURSTCLK
4 Loop HP-Filter C6
Filter XTAL A4 (TX) L16 LBA E5 4MB Ram
36 26 MHz 3
EXC EN 26 MHz N18 ECBB G7 16 Flip
MB Flash
Super Filter Y805
Generator 32 EXTAL B4 Oscillator Clock Generator J902
RF_CS 1
2,45V SPI 33 RF_DATA N3 LCD_CS 39 4,10 IO_REG
W9, U8, V7
39 38 7, 8, 10, 11, 15, 18, 21, 37, 43, 48 31 34 RF_CLK 3 MQSPI P2
L3,L2, ...
LCD_RS 35 14,15
A10 Display LCD_DATA (0-5) 33-28
PA_REF D12 PA Control M4 LSC_CLK_DATA 13
IO_2,65V (PAC) 17 LED5
TX_IN_LB PA_DET B10 P1 LCD_SDATA_DATA 12 18 LED6 (from U400)

RF_REG
(VCC)
TX_IN_HB LOWB HIGH T6 M1 SIM_EN (to U900) 19 LED7
FL100 TX_EN U6 F4 LOW_BATT_B (from U900) 26 MOSIA
Quard Saw Filter 25 MISOA (from/ to U800)
and Matching EURO_US W7 L1 Timer C13 USB_DET
(to U600) 24 SPI_CLK
14 EXC_EN N9 B15 SOFTCON 23 CKO
1 EXC_EN MQSPI
15 High Band TX VCO FRQ. RANGE T7 TOUT9 (to U400) 22 VOUT_5V
1900MHz TX VCO MID CHANNELS (to Algae) V8 TOUT11 27 (from/ to U50 / Fun Light CCT)
850: 824 - 850Mhz 850: CH 190 - 836,6 GPIO 21 3RED
12 G12 SC0A (to U400)
3 GSM : 890 - 915 MHz 20 3BLUE
13 High Band GSM: CH 62 - 902,4MHz A13 SC1A (from J600) 19 3GREEN
1800MHz EGSM: 880 - 915MHz EGSM: CH 37 - 897,4Mhz D14 PC12 (to U900,U920)
8 18 B+
6 DCS: CH 700 - 1747,8MHz O11 PE10 40 14 SPI_CS6 (from U800)
9 Low Band
DCS: 1710 - 1785MHz Audio G10 PE11 16 4
USB Timer RESETB
900MHz PCS: 1850 - 1910MHz PCS: CH 661 - 1880 MHz Codec A14 PE12 (from Lightsensor) 2 SPK1 (from U900)
10 Interface Interface AD / DA Reset D19 INT5 15
4 1 SPK2
11 Low Band PA_B+ PA_B+ E3 E1 T12 T11 V12 C14 INT0
C16 C15 B17
850MHz D15
A17 B16 A16 P16 G8 D18 V11 W12 E1 W13 D7 D1 G9 D3 E4 C3 W5 V13 U13 5,9,11,17,37 GND
USB_TXENB
Flip Switch 3,34,36,38 NC

AUD_REG
STANDBY_TODAI

VAG_CODEC
ADC_SYNC

ADC_N

DAC_N
USB_VPIN

CLK_32K

DAC_P
ADC_P
ADC_DATA
SPI_CLK
PWR_SW S526

SPI_CS0
IO_REG

SPI_CS3
25

RESET_OUT
USB_VMIN
27
23

29

RESETB
WDOGB
MISOA
MOSIA
32 12 33 11 34 10 4 6 USB_XRXD
USB_VPOUT

Internal EAGLE USB_VMOUT

USB_SUSPEND
Antenna U50 Antenna CKO
Switch SPI_CS6
(from /to U900)
SPI_CLK

(to U700)
A11 (from / to J902, U50)
3 2 1 MISOA
MOSIA RESETB (to J902)
J100 2 AOC_DRIVE
High Band CMOS
21 17 LOWB_HIGH
PA Bias C3 D5 E3 D3 G3 H4 F5 F4 C1
LP Circuit 8,16 TX_EN D2 D4
Y900 A1 32kHz RTC
Low Band 4
3 2 1 Osc. Mux.
B1 Reset
LP 1
32,768 kHz T HEAD_INT
B2 i C4
EUROB_US WDOGB
19
m FL900 3 J923 EXT_B+
Switch EXC_EN A2 ALTN 2
18 F9 CHRG_ID
Control PWR_SW F2 e Alert
4
1 Alert
r ALTP 1 Charge
Circuit 14 PA_REF Amplifier E9 2 Vibrator
15 PA_DET Connector
13 RF_REG SPI U902 C1
U901
A1 SPKP A1
Matching and Power Detector VCC BL_SINK J8 1 SPK2
(VCC) GPIO Speaker SPKN A3 C3 R931
Combiner Network PACII IC NC C5 Amplifier J9 2 SPK1 Headset
Connector
CHG_DISABLE E2
IO_REG

HED_SPK
EXT_PWR_ON F1 Control
A2 Charger Logic Microphone
(from /to U920) LOW_BATT_B Internal
CHRG_DETB D1
Interface Amplifier J3
Mic
CHRG_STATE E1
HED_MIC J931
Photo Type ID

CHRG_SW G1
R990

Aux. H5
CHRG_TYP E6 Microphone
Amplifier
AD2 B6 AD2 Mux C8 SIM_EN
ADC_DATA E5
R991

(from /to U800) B+ Sense D8, E8, F8

ADC_SYNC F6 B+
(TEMP) 1,325 - 100uA
PC12 D6 VAG Regulator G6 VAG_CODEC
2,75V- 150mA
Audio Reg. J7 AUD_REG (Aud. analog funct. of Neptune & Seaweed)

V220
1,3V- 200mA
RT900 (RTC) Vibrator Reg. G8 MOTOR NC
1,85/ 2,85V- 20mA
SIM Regulator B9 SIM_VCC (SIM Card)
2,75V- 200mA (Synthes., SF reg., RF& AL funct.of Algae)
RF Regulator D9 RF_REG
1,575V- 100uA
Reference Reg. B7 COINCELL
Digital Reg. A9
1,875V- 200mA
DIG_REG_OUT J200
2,75V- 200mA Coincell
I/O Regulator A8 IO_REG (to VM, NeptuneI/O, Displ.) U933
GSM SERVICE SUPPORT GROUP 2004.04.02 U900 4,7V- 5mA (to Flash Memory
Revision Overview V. Multiplier A3 VM_REG (to Syn. Chargep., Switch control) for fast Flash)

LEVEL 3 Block Diagram Rev. 1.1 Rev. 1.0: initial Block Diagram SEAWEED A8 A5 A6 A4 DIG_REG
(VCC)
Rev. 1.1: change two R901 to R902 and R903/ change Q903to
Dual Band C220 Q904 C934 C907 C908 SWITCHER
Michael Hansen, Alexander Buehler Page 1of 2
 FUNLIGHT CCT Keypad Backlight (SOM) Keypad Backlights
Driver U400
B+ LED1
B+ C1 LED D6
NC LED_DRV_EN A7 Driver E5 LED2 DS505 DS506
L50 SC0A LED_GRPA_EN B6 LED3 DS503 DS504
(from U800) D4
TOUT9 LED_GRPB_EN E7 LED4 DS507 DS508
E3
U50 LED5 DS509 DS510
D50 C5
LED6
IO_REG 23 3 VOUT_5V (to J932) B4
LED7
C3
ISET
RESET_OUT 18 C7
VPOUT
SPI_CS0 19 26 3BLUE A3

R406
(from/to U800) MOSIA 21 27 3GREEN (from J932)
MISOA 20 C404
28 3RED
SPI_CLK 22 2,5,8,15,17,26,29 (to Display
Connector J932)

D60 D61 D62 Sign of live Circuit

SOL E C
2 Q904 EXT_B+
3
B 1
S 3
G
Q905 IO_REG
1
D 2

Charger (SOM) USB Light Sensor

U600 IO_2.65V
CHRG_SW (from U900 - If high current is set to 400mA limit. If low current is set to 900mA imit.)
R901
16 SOFTCON (from U800) DS70 1
CHRG_TYP (to U900 - Charger Type indication from pull down resisor in Charger) IO_REG 14
R902 7
USB_VCC
Light 2 U70
9 USB_DNEG (from/to J600) 5 4
(from U900)
R903 IO_REG (Bias) USB 10 USB_DPOS Sense 1
Interface 8 USB_DET (from U800) 3 PE12 (to U800)
1 IO_REG
CHRG_ID IC USB_TXENB
(from/ to J931) 3 USB_VPIN
(Charger ID and current setting) 4 USB_VMIN
R913 R914 U920 2 USB_XRXD (from/to U800)

DIAMONDHEAD 3 S
M4 24-26 B+
11
12
USB_VPOUT
USB_VMOUT
(Charge) (Charge and Protection)
F900 Pass Transistor D 5 USB_SUSPEND
1,2
(from J931) EXT_B+ Fuse
E PNP VIN 6,7,15,16 S M5 D G 20+21 B+
C M100
Q901 Current
Under-
3 J600
S Sense 22 CHG_DISABLE
Sense voltage (from U900) Battery Accesory
(EXT_B+_SOL) B VDETECT 13 Safety G &Short 28 PC12 (CHEMISTRY)
Conn. Connector
C Shunt G Circuit 3 NC
4 CNTRL 8 Charge M3 Protect. 1 USB_VCC
NPN 3 NPN B 4 GND
2
VPP Control I/O USB_DNEG (from/to U600)
TOUT12 Q904 Q903 (Drive)
D Logic 19 BATT_DETB 2 3 USB_DPOS
(from U800) (to U700 1
1 for fast FLash Process) E Charge 5 EXT_PWR_ON 4 SC1A (to U800)
Control 18 CHRG_STATE (to U900) 5-9 GND
9-12 17 CHRG_DETB
D904
DIG_REG
1,2 3

V220
GSM SERVICE SUPPORT GROUP 2004.04.02
Revision Overview
LEVEL 3 Block Diagram Rev. 1.1 Rev. 1.0: initial Block Diagram
Rev. 1.1: change two R901 to R902 and R903/ change Q903to
Dual Band C220 Q904

Michael Hansen, Alexander Buehler Page 2of 2