DM74123 Dual Retriggerable One-Shot With Clear and Complementary Outputs
DM74123 Dual Retriggerable One-Shot With Clear and Complementary Outputs
DM74123 Dual Retriggerable One-Shot With Clear and Complementary Outputs
Features
s DC triggered from active-HIGH transition or active-LOW transition inputs s Retriggerable to 100% duty cycle s Direct reset terminates output pulse s Compensated for VCC and temperature variations s DTL, TTL compatible s Input clamp diodes
Ordering Code:
Order Number DM74123N Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
X H L L
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
H H
H
Functional Description
The basic output pulse width is determined by selection of an external resistor (RX) and capacitor (CX). Once triggered, the basic pulse width may be extended by retriggering the gated active-LOW transition or active-HIGH transition inputs or be reduced by use of the active-LOW transition clear input. Retriggering to 100% duty cycle is possible by application of an input pulse train whose cycle time is shorter than the output cycle time such that a continuous HIGH logic state is maintained at the Q output.
DS006539
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DM74123
Operating Rules
An external resistor (RX) and external capacitor (CX) are required for proper operation. The value of CX may vary from 0 to any necessary value. For small time constants high-grade mica, glass, polypropylene, polycarbonate, or polystyrene material capacitors may be used. For large time constants use tantalum or special aluminum capacitors. If the timing capacitors have leakages approaching 100 nA or if stray capacitance from either terminal to ground is greater than 50 pF the timing equations may not represent the pulse width the device generates. 2. When an electrolytic capacitor is used for CX a switching diode is often required for standard TTL one-shots to prevent high inverse leakage current (Figure 1). However, its use in general is not recommended with retriggerable operation. 3. The output pulse width (TW) for CX > 1000 pF is defined as follows: TW = K RX CX(1 + 0.7/RX) 1. where: [RX is in Kilo-ohm] [CX is in pico Farad] [TW is in nano second] [K 0.28] 7. FIGURE 4. Under any operating condition CX and RX must be kept as close to the one-shot device pins as possible to minimize stray capacitance, to reduce noise pick-up, and to reduce I R and Ldi/dt voltage developed along their connecting paths. If the lead length from CX to pins (6) and (7) or pins (14) and (15) is greater than 3 cm, for example, the output pulse width might be quite different from values predicted from the appropriate equations. A non-inductive and low capacitive path is necessary to ensure complete discharge of CX in each cycle of its operation so that the output pulse width will be accurate. VCC and ground wiring should conform to good high-frequency standards and practices so that switching transients on the V CC and ground return leads do not cause interaction between one-shots. A 0.01 F to 0.10 F bypass capacitor (disk ceramic or monolithic type) from VCC to ground is necessary on each device. Furthermore, the bypass capacitor should be located as close to the VCC pin as space permits. 1. 5. To obtain variable pulse width by remote trimming, the following circuit is recommended:
FIGURE 3. 6. The retriggerable pulse width is calculated as shown below: T = TW + tPLH = K RX CX + tPLH The retriggered pulse width is equal to the pulse width plus a delay time period (Figure 4).
FIGURE 1. 4. For CX < 1000 pF see Figure 2 for TW vs. CX family curves with RX as a parameter: Pulse Width vs. RX and CX 8.
Note: For further detailed device characteristics and output performance please refer to the One-Shot Application Note, AN-366.
FIGURE 2.
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DM74123
Parameter
Min 4.75 2
Nom 5
Units V V V mA mA ns
40 40 40 65 5 No Restriction 50 70 50 ns k F pF C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL II IIH IIL IOS ICC Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage HIGH Level Input Current Low Level Input Current Short Circuit Output Current Supply Current VCC = Max (Note 4) VCC = Max (Note 5)(Note 6) Conditions VCC = Min, II = 12 mA VCC = Min, IOH = Max VIL = Max, VIH = Min VCC = Min, IOL = Max VIH = Min, VIL = Max VCC = Max VI = 2.4V VCC = Max, VI = 0.4V Data Clear Clear Data 10 46 2.5 3.4 0.2 0.4 1 40 80 3.2 1.6 40 66 Min Typ (Note 3) Max 1.5 Units V V V mA A mA mA mA
Note 3: All typicals are at VCC = 5V, TA = 25C. Note 4: Not more than one output should be shorted at a time. Note 5: Quiescent ICC is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded, all outputs OPEN, CEXT = 0.02 F, and REXT = 25 K. Note 6: ICC is measured in the triggered state with 2.4V applied to all clear and B inputs, A inputs grounded, all outputs OPEN, CEXT = 0.02 F, and REXT = 25 k.
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DM74123
Switching Characteristics
at VCC = 5V and TA = 25C CL = 15 pF, RL = 400 Symbol Parameter From (Input) To (Output) tPLH tPLH tPHL tPHL tPLH tPHL tW(out) Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Pulse Width (Note 7)
Note 7: CECT = 1000 pF, REXT = 10 k
Units
A to Q B to Q
ns ns
A to Q
40
ns
B to Q
36
ns
Clear to Q
40
ns
Clear to Q A or B to Q 3.08
27 3.76
ns s
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16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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