INTEGRATED CIRCUITS

DATA SHEET

TDA1543 Dual 16-bit DAC (economy version) (I2S input format)

Product specication File under Integrated Circuits, IC01 February 1991

Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

FEATURES Low distortion 16-bit dynamic range 4 oversampling possible Single 5 V power supply No external components required No requirement for external deglitcher circuitry due to fast settling output current Adjustable bias current Internal timing and control circuits I2S input format: time multiplexed, two's complement, TTL. ORDERING INFORMATION EXTENDED TYPE NUMBER TDA1543(1) TDA1543T(2) Notes 1. SOT97-1; 1996 August 13. 2. SOT162-1 1996 August 13. QUICK REFERENCE DATA SYMBOL VDD IDD IFS THD THD tcs BR fBCK S/N TCFS Tamb Ptot Ibias PARAMETER supply voltage supply current full scale output current total harmonic distortion total harmonic distortion current settling time to 1 LSB input bit rate at data input clock frequency at clock input signal-to-noise ratio at bipolar zero full scale temperature coefcient at analog outputs (AOL; AOR) operating ambient temperature range total power dissipation bias current (adjustable) 2 including noise at 0 dB including noise at 60 dB CONDITIONS 1.95 90 30 0.6 MIN. 3.0 5.0 50 2.30 75 0.018 30 3.2 0.5 96 500 106 250 TYP. 8 16 PACKAGE PINS DIL mini-pack PIN POSITION MATERIAL plastic plastic SOT97 GENERAL DESCRIPTION

TDA1543

The TDA1543 is a monolithic integrated dual 16-bit digital-to-analog converter (DAC) designed as an economy version for use in hi-fi digital audio equipment such as Compact Disc players, digital tape or cassette recorders, digital sound in TV sets and in digital amplifiers.

CODE SO16L;SOT162A

MAX. 8.0 60 2.65 70 0.032 23 7.9 9.2 9.2 +85 5.0 V

UNIT mA mA dB % dB % s Mbits/s MHz dB K1 C mW mA

February 1991

3.3 nF 1.2 k I BL 6 AOL (2) Vout left Vref 3.3 nF 1.2 k 8 AOR (2) Vout right Vref 11-BIT PASSIVE DIVIDER 11-BIT PASSIVE DIVIDER 5-BIT PASSIVE DIVIDER I AOR I AOL RIGHT OUTPUT LATCH

Product specication

TDA1543

Fig.1 Block diagram.

handbook, full pagewidth

February 1991
LE I BR RIGHT BIT SWITCHES LE

Philips Semiconductors

LEFT OUTPUT LATCH

LEFT BIT SWITCHES

Dual 16-bit DAC (economy version) (I2S input format)

5-BIT PASSIVE DIVIDER

CURRENT SOURCE I BL I BR

CURRENT SOURCE

3
LEFT INPUT LATCH REFERENCE SOURCE I ref RIGHT INPUT LATCH

7 Vref (1) R bias

BCK

WS

TDA1543

CONTROL & TIMING ADDRESS POINTER

5 VDD 100 nF 4 ground

5V

DATA

LE

(1) Optional. (2) 2 1/2 NE5532.

MEA110

Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

PINNING SYMBOL BCK WS DATA GND VDD AOL Vref AOR PINNING SYMBOL n.c. n.c. BCK WS DATA GND n.c. n.c. n.c. n.c. VDD AOL Vref AOR n.c. n.c. PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 DESCRIPTION not connected not connected bit clock input word select input data input ground not connected not connected not connected not connected +5 V supply voltage left channel output reference voltage output right channel output not connected not connected
handbook, halfpage

TDA1543

PIN 1 2 3 4 5 6 7 8

DESCRIPTION bit clock input word select input data input ground +5 V supply voltage left channel voltage output reference voltage output right channel output Fig.2 Pin configuration TDA1543.

n.c. 1 n.c. 2

16 n.c. 15 n.c. 14 AOR 13 Vref 12 AOL 11 VDD 10 9

MEA107

BCK 3 WS 4

TDA1543T
DATA GND n.c. n.c. 5 6 7 8

n.c. n.c.

Fig.3 Pin configuration TDA1543T.

February 1991

Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

TDA1543

VDD

BCK WS DATA (a) input pins BCK, WS and DATA.

TDA1543

VDD

V DD

Vref (b) output pin Vref.

TDA1543

V DD I bias AOL AOR I DAC (c) output pins AOL and AOR.

TDA1543
MEA109

Fig.4 Circuits at the input and output pins.

February 1991

Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

FUNCTIONAL DESCRIPTION

TDA1543

The TDA1543 accepts input serial data formats in two's complement with any bit length. Left and right data words are time multiplexed. The most significant bit (bit 1) must always be first. The format of data input is shown in Fig.5 and Fig.6. This flexible input data format (I2S) allows easy interfacing with signal processing chips such as interpolation filters, error correction circuits and audio signal processor circuits (ASP). The high maximum input bit-rate and fast settling current facilitates application in 4 oversampling systems. An adjustable current is added to the output currents to bias output operational amplifiers (OP1; OP2) for maximum dynamic range (see Fig.1). With a LOW level on the word select (WS) input data is placed in the left input register and with a HIGH level on the WS input data is placed in the right input register. The data in the input registers is simultaneously latched in the output registers which control the bit switches. The output current of the DAC is a sink current. The current Iref at the Vref output is adjusted by a resistor or a current source. The current Iref is amplified with gain AIbias to the bias currents (IBL; IBR) which are added to the output currents. LIMITING VALUES In accordance with the Absolute Maximum System (lEC 134) SYMBOL VDD TXTAL Tstg Tamb Ves PARAMETER supply voltage range crystal temperature storage temperature range operating ambient temperature range electrostatic handling* CONDITIONS 0 55 30 2000 MIN. 9 +150 +150 +85 +2000 MAX. V C C C V UNIT

THERMAL RESISTANCE SYMBOL Rth j-a from junction to ambient PARAMETER TYP. 100 UNIT K/W

* Equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor.

February 1991

Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

CHARACTERISTICS VDD = 5 V; Tamb = + 25 C; Iref = 0 mA; measured in the circuit of Fig.1; unless otherwise specied SYMBOL Supply VDD IDD RR Digital inputs input current pins (1, 2 and 3) IIL IIH fBCK BR fWS Res VOC(AC) VOC(DC) IFS TCFS Ioffset Ibias AIbias digital inputs LOW digital inputs HIGH input frequency/bit rate clock input pin 1 bit rate data input pin 3 word select input pin 2 1.8 1.95 Iref = 0 mA 0.1 0.6 1.9 25 2.30 500 106 0.0 2.0 9.2 9.2 192 Vl = 0.8 V Vl = 2.0 V 0.4 20 supply voltage range supply current ripple rejection note 1 note 2 3.0 5.0 50 50 8.0 60 PARAMETER CONDITIONS MIN. TYP.

TDA1543

MAX.

UNIT

V mA dB

mA A MHz Mbits/s kHz

Analog outputs (AOL; AOR) resolution output voltage compliance AC DC full scale current full scale temperature coefcient offset current bias current (adjustable) bias current gain VDD1.2 2.65 0.1 5.0 2.1 mV V mA K1 mA mA 16 bits

Analog outputs (Vref) Vref Iref THD reference voltage output reference current output total harmonic distortion including noise at 0 dB; note 3, Fig.7 THD total harmonic distortion including noise at 60 dB; note 3, Fig.7 tcs |dIO| |td| S/N settling time 1 LSB channel separation unbalance between outputs time delay between outputs signal-to-noise ratio at bipolar zero; note 5 7 note 4 85 90 3.2 0.5 90 < 0.2 < 0.2 96 7.9 0.3 % s dB dB s dB 0.018 30 0.032 23 % dB 2.10 0.3 2.20 75 2.30 2.5 70 V mA dB

February 1991

Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

SYMBOL Timing (Fig.5) tr tf tCY tHB tLB tSU;DAT tHD;DAT tHD;WS tSU;WS rise time fall time bit clock cycle time bit clock HIGH time bit clock LOW time data set-up time data hold time to bit clock word select hold time word select set-up time note 6 note 6 108 22 22 32 2 2 32 32 32 PARAMETER CONDITIONS MIN. TYP.

TDA1543

MAX.

UNIT

ns ns ns ns ns ns ns ns ns

Notes to the characteristics 1. Measured at IAOL = 0 mA and IAOR = 0 mA (code 8000H) and Ibias = 0 mA. 2. Vripple = 1% of supply voltage and fripple = 100 Hz. 3. Measured with 1 kHz sinewave generated at a sampling rate of 192 kHz. 4. Measured with 1 kHz full scale sinewave generated at a sampling rate of 192 kHz. 5. At code 0000H. 6. At this point tHD;DAT = 0 ns, this value has been fixed on 2 ns due to tolerances.

Fig.5 Format of input signals (I2S format).

February 1991

Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

TDA1543

DATA

LSB MSB

LSB MSB

BCK

WS

LEFT

RIGHT
MEA112

pagewidth

Fig.6 Format of input signals.

MEA111-1

handbook, full pagewidth

20 THD (dB) 30 (1)

10 THD (%)

40

50

60

(2)

0.1

70 (3) 80 0.01

90 10

10

10

10 frequency (Hz)

(1) Measured including all distortion plus noise over a 20 kHz bandwidth at a level of 60 dB. (2) Measured including all distortion plus noise over a 20 kHz bandwidth at a level of 24 dB. (3) Measured including all distortion plus noise over a 20 kHz bandwidth at a level of 0 dB.

Fig.7 Distortion as a function of frequency (4FS).

February 1991

Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

Notes to Fig.7 The sample frequency 4FS: 176.4 kHz. The supply voltage at the measurement = + 5 V (DC). Ref: 0 dB is the output level of a full scale digital sine wave stimulus.

TDA1543

The graphs are constructed from average values of a small amount of engineering samples therefore no guarantee for typical values is implied. The arrows indicate the specification limits for 0 dB and 60 dB level signals.

February 1991

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Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

PACKAGE OUTLINES DIP8: plastic dual in-line package; 8 leads (300 mil)

TDA1543

SOT97-1

D seating plane

ME

A2

A1

c Z e b1 w M (e 1) b2 5 MH

b 8

pin 1 index E

5 scale

10 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.14 0.068 0.045 b1 0.53 0.38 0.021 0.015 b2 1.07 0.89 0.042 0.035 c 0.36 0.23 0.014 0.009 D (1) 9.8 9.2 0.39 0.36 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 1.15 0.045

Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT97-1 REFERENCES IEC 050G01 JEDEC MO-001AN EIAJ EUROPEAN PROJECTION

ISSUE DATE 92-11-17 95-02-04

February 1991

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Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

SO16: plastic small outline package; 16 leads; body width 7.5 mm

TDA1543

SOT162-1

A X

c y HE v M A

Z 16 9

Q A2 A1 pin 1 index Lp L 1 e bp 8 w M detail X (A 3) A

5 scale

10 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 10.5 10.1 0.41 0.40 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.42 0.39 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 Z
(1)

0.9 0.4

0.012 0.096 0.004 0.089

0.019 0.013 0.014 0.009

0.043 0.055 0.016

0.035 0.004 0.016

8 0o

Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT162-1 REFERENCES IEC 075E03 JEDEC MS-013AA EIAJ EUROPEAN PROJECTION

ISSUE DATE 92-11-17 95-01-24

February 1991

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Philips Semiconductors

Product specication

Dual 16-bit DAC (economy version) (I2S input format)

SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our IC Package Databook (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. DEFINITIONS Data sheet status Objective specication Preliminary specication Product specication Limiting values

TDA1543
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.

This data sheet contains target or goal specications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains nal product specications.

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specication is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specication. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

February 1991

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