LT1144
LT1144
LT1144
FEATURES
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DESCRIPTIO
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Wide Operating Supply Voltage Range: 2V to 18V Boost Pin (Pin 1) for Higher Switching Frequency Simple Conversion of 15V to 15V Supply Low Output Resistance: 120 Maximum Power Shutdown to 8A with SHDN Pin Open Circuit Voltage Conversion Efficiency: 99.9% Typical Power Conversion Efficiency: 93% Typical Easy to Use
The LTC1144 is a monolithic CMOS switched-capacitor voltage converter. It performs supply voltage conversion from positive to negative from an input range of 2V to 18V, resulting in complementary output voltages of 2V to 18V. Only two noncritical external capacitors are needed for the charge pump and charge reservoir functions. The converter has an internal oscillator that can be overdriven by an external clock or slowed down when connected to a capacitor. The oscillator runs at a 10kHz frequency when unloaded. A higher frequency outside the audio band can also be obtained if the Boost Pin is tied to V +. The SHDN pin reduces supply current to 8A and can be used to save power when the converter is not in use. The LTC1144 contains an internal oscillator, divide-bytwo, voltage level shifter, and four power MOSFETs. A special logic circuit will prevent the power N-channel switch substrate from turning on.
APPLICATI
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Conversion of 15V to 15V Supplies Inexpensive Negative Supplies Data Acquisition Systems High Voltage Upgrade to LTC1044 or 7660 Voltage Division and Multiplications Automotive Applications Battery Systems with Wall Adapter/Charger
TYPICAL APPLICATI
LTC1144 1
15V INPUT
10F
13
12
11
UO
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LTC1144 ABSOLUTE
(Note 1)
AXI U
RATI GS
Supply Voltage (V +) (Transient) .............................. 20V Supply Voltage (V +) (Operating) ............................. 18V Input Voltage on Pins 1, 6, 7 (Note 2) ............................ 0.3V < VIN < (V +) + 0.3V Output Short-Circuit Duration V + 10V .................................................... Indefinite V + 15V ........................................................ 30 sec V + 20V ............................................. Not Protected Power Dissipation ............................................. 500mW Operating Temperature Range LTC1144C................................................ 0C to 70C LTC1144I ............................................ 40C to 85C Storage Temperature Range ................. 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ELECTRICAL CHARACTERISTICS
V + = 15V, COSC = 0pF, TA = 25C, Test Circuit Figure 1, unless otherwise noted.
SYMBOL PARAMETER Supply Voltage Range IS Supply Current CONDITIONS RL = 10k RL = , Pins 1, 6 No Connection, fOSC = 10kHz SHDN = 0V, RL = , Pins 1, 7 No Connection V + = 5V, RL = , Pins 1, 6 No Connection, fOSC = 4kHz V + = 5V, SHDN = 0V, RL = , Pins 1, 7 No Connection V + = 15V, IL = 20mA at 10kHz MIN 2 LTC1144C TYP MAX 18 1.1 1.3 0.008 0.03 0.10 0.13 0.015 100 120 250 MIN 2 LTC1144I TYP MAX 18 1.1 1.6 0.008 0.035 0.10 0.15 0.018 100 140 300 UNITS V mA mA mA mA mA mA kHz kHz % % A A
q q q
q q
0.002 56
ROUT
Output Resistance
fOSC
V + = 5V, IL = 3mA at 4kHz Oscillator Frequency V + = 15V (Note 3) V + = 5V Power Efficiency RL = 2k at 10kHz Voltage Conversion Efficiency RL = Oscillator Sink or Source Current V + = 5V (VOSC = 0V to 5V) V + = 15V (VOSC = 0V to 15V)
q q
90 97.0
90 10 4 93 99.9 0.5 4
90 97.0
The q denotes specifications which apply over the full operating temperature range; all other limits and typicals at TA = 25C. Note 1: Absolute maximum ratings are those values beyond which the life of a device may be impaired. Note 2: Connecting any input terminal to voltages greater than V + or less than ground may cause destructive latch-up. It is recommended that no
inputs from sources operating from external supplies be applied prior to power-up of the LTC1144. Note 3: fOSC is tested with COSC = 100pF to minimize the effects of test fixture capacitance loading. The 0pF frequency is correlated to this 100pF test point, and is intended to simulate the capacitance at pin 7 when the device is plugged into a test socket and no external capacitor is used.
W W
OUTPUT RESISTANCE ()
OUTPUT RESISTANCE ()
TA = 25C V + = 15V
100 BOOST = V + 10
100
0.01
3 ROUT = 90 4
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LTC1144 TPC01
100
V = 15V IL = 20mA
10
50 25 75 0 TEMPERATURE (C)
100
125
16
18
LTC1144 TPC02
LTC1144 TPC03
10 ROUT = 56
1 55 25
15
0 25 50 75 TEMPERATURE (C) 100 125
10
50
60
LTC1144 TPC05
LTC1144 TPC06
60
60
40
40 TA = 25C V+ = 15V 20 C1 = C2 = 10F BOOST = OPEN (SEE TEST CIRCUIT) 0 10 30 40 50 20 LOAD CURRENT (mA)
LTC1144 TPC09
20
25
30
1 0.01
0
1 10 0.1 OSCILLATOR FREQUENCY (kHz) 100
LTC1144 TPC07
LTC1144 TPC08
60
30
OUTPUT RESISTANCE ()
80
PEFF
40
IS
20
TA = 25C V + = 5V 10 C1 = C2 = 10F BOOST = OPEN (SEE TEST CIRCUIT) 0 12 16 20 8 LOAD CURRENT (mA)
LTC1144 TPC10
1000
500
0 0.01
PI FU CTIO S
Boost (Pin 1): This pin will raise the oscillator frequency by a factor of 10 if tied high. CAP+ (Pin 2): Positive Terminal for Pump Capacitor. GND (Pin 3): Ground Reference. CAP (Pin 4): Negative Terminal for Pump Capacitor. VOUT (Pin 5): Output of the Converter. SHDN (Pin 6): Shutdown Pin. Tie to V + pin or leave floating for normal operation. Tie to ground when in shutdown mode. OSC (Pin 7): Oscillator Input Pin. This pin can be overdriven with an external clock or can be slowed down by connecting an external capacitor between this pin and ground. V + (Pin 8): Input Voltage.
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1F 10F
LTC1144 TPC13
40
SUPPLY CURRENT (mA)
2000 10F 1F
20
1000
LTC1144 TPC11
LTC1144 TPC12
0.1F 10F 1F
1F 10F
0.1F 10 0.1F 1F 1F 10F 10F 0.01 10 0.1 1 LOAD CURRENT (mA) 100
100
5 0.001
0.01
100
15 0.001
LTC1144 G14
LTC1144 TPC15
3 4
IL VOUT
Figure 1.
APPLICATI
S I FOR ATIO
Theory of Operation To understand the theory of operation of the LTC1144, a review of a basic switched-capacitor building block is helpful. In Figure 2, when the switch is in the left position, capacitor C1 will charge to voltage V1. The total charge on C1 will be q1 = C1V1. The switch then moves to the right, discharging C1 to voltage V2. After this discharge time, the charge on C1 is q2 = C1V2. Note that charge has been transferred from the source V1 to the output V2. The amount of charge transferred is: q = q1 q2 = C1(V1 V2)
V1 f RL C1 C2
1144 F02
V1 C2 REQUIV = 1 f C1 RL
V2
Examination of Figure 4 shows that the LTC1144 has the same switching action as the basic switched-capacitor building block. With the addition of finite switch onresistance and output voltage ripple, the simple theory, although not exact, provides an intuitive feel for how the device works. For example, if you examine power conversion efficiency as a function of frequency (see Figure 5), this simple theory will explain how the LTC1144 behaves. The loss,
V+ (8) SW1 SW2
If the switch is cycled f times per second, the charge transfer per unit time (i.e., current) is: I = f q = f C1(V1 V2) Rewriting in terms of voltage and impedance equivalence,
BOOST 10X (1) OSC OSC (7)
I=
V1 V2 V1 V2 = 1 REQUIV f C1
SHDN (6)
A new variable REQUIV has been defined such that REQUIV = 1/(f C1). Thus, the equivalent circuit for the switchedcapacitor network is as shown in Figure 3.
COSC
C2 10F
1144 F01
U
REQUIV V2
1144 F03
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CAP + (2)
+
C1
CAP (4)
VOUT (5) C2
+
GND (3)
1144 F04
LTC1144
APPLICATI S I FOR ATIO
and hence the efficiency, is set by the output impedance. As frequency is decreased, the output impedance will eventually be dominated by the 1/(f C1) term and power efficiency will drop. Note also that power efficiency decreases as frequency goes up. This is caused by internal switching losses which occur due to some finite charge being lost on each switching cycle. This charge loss per unit cycle, when multiplied by the switching frequency, becomes a current loss. At high frequency this loss becomes significant and the power efficiency starts to decrease.
100
POWER CONVERSION EFFICIENCY (%)
95 90 85 80 75 70
600 500
OUTPUT RESISTANCE ()
OUTPUT RESISTANCE
100 0 100
0.1
1144 F05
Figure 7. External Clocking Figure 5. Power Conversion Efficiency and Output Resistance vs Oscillator Frequency
SHDN (Pin 6) The LTC1144 has a SHDN pin that will disable the internal oscillator when it is pulled low. The supply current will also drop to 8A. OSC (Pin 7) and Boost (Pin 1) The switching frequency can be raised, lowered or driven from an external source. Figure 6 shows a functional diagram of the oscillator circuit. By connecting the boost pin (pin 1) to V +, the charge and discharge current is increased, and hence the frequency is increased by approximately 10 times. Increasing the frequency will decrease output impedance and ripple for higher load currents. Loading pin 7 with more capacitance will lower the frequency. Using the boost (pin 1) in conjunction with exter-
nal capacitance on pin 7 allows user selection of the frequency over a wide range. Driving the LTC1144 from an external frequency source can be easily achieved by driving pin 7 and leaving the boost pin open as shown in Figure 7. The output current from pin 7 is small, typically 4A, so a logic gate is capable of driving this current. The choice of using a CMOS logic gate is best because it can operate over a wide supply voltage range (3V to 15V) and has enough voltage swing to drive the internal Schmitt trigger shown in Figure 6. For 5V applications, a TTL logic gate can be used by simply adding an external pull-up resistor (see Figure 7). Capacitor Selection External capacitors C1 and C2 are not critical. Matching is not required, nor do they have to be high quality or tight tolerance. Aluminum or tantalum electrolytics are excellent choices, with cost and size being the only consideration.
U
V+ 9I BOOST (1) I OSC (7) 20pF SCHMITT TRIGGER 9I GND (3) I
1144 F06
UO
Figure 6. Oscillator
REQUIRED FOR TTL LOGIC NC 1 2 LTC1144 8 7 6 5 (V +) C2
1144 F07
V+
+
C1
3 4
LTC1144
TYPICAL APPLICATI
Negative Voltage Converter
Figure 8 shows a typical connection which will provide a negative supply from an available positive supply. This circuit operates over full temperature and power supply ranges without the need of any external diodes. The output voltage (pin 5) characteristics of the circuit are those of a nearly ideal voltage source in series with a 56 resistor. The 56 output impedance is composed of two terms: 1) the equivalent switched capacitor resistance (see Theory of Operation), and 2) a term related to the onresistance of the MOS switches.
V+ 2V TO 18V 1 2 10F 8 7 LTC1144 6 5 10F
1144 F08
3 4
TMIN TA TMAX
At an oscillator frequency of 10kHz and C1 = 10F, the first term is: REQUIV =
(f
OSC / 2
) C1
5 103 10 106
Notice that the above equation for REQUIV is not a capacitive reactance equation (X C = 1/C) and does not contain a 2 term. The exact expression for output impedance is extremely complex, but the dominant effect of the capacitor is clearly shown in Figure 5. For C1 = C2 = 10F, the output impedance goes from 56 at fOSC = 10kHz to 250 at fOSC = 1kHz. As the 1/(f C) term becomes large compared to the switch on-resistance term, the output resistance is determined by 1/(f C) only. Voltage Doubling Figure 9 shows a two-diode capacitive voltage doubler. With a 15V input, the output is 29.45V with no load and 28.18V with a 10mA load.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
UO
+
S
V IN 2V TO 18V 1 2 3 4 LTC1144 8 7 6 5 Vd + 1N4148 Vd 1N4148
+ +
10F
Ultra-Precision Voltage Divider An ultra-precision voltage divider is shown in Figure 10. To achieve the 0.0002% accuracy indicated, the load current should be kept below 100nA. However, with a slight loss in accuracy, the load current can be increased.
V+ 4V TO 36V 1 8 7 LTC1144 6 5
VOUT = V +
C1 10F V+ 0.002% 2 TMIN TA TMAX IL 100nA
3 4
C2 10F
1144 F10
= 20
Battery Splitter A common need in many systems is to obtain (+) and () supplies from a single battery or single power supply system. Where current requirements are small, the circuit shown in Figure 11 is a simple solution. It provides symmetrical output voltages, both equal to one half the input voltage. The output voltages are both referenced to pin 3 (output common).
1 VB 18V 8 7 LTC1144 6 5 C2 10F VB /2 9V VB /2 9V
+
C1 10F
3 4
OUTPUT COMMON
1144 F11
LTC1144
TYPICAL APPLICATI
Regulated 5V Output Voltage Figure 12 shows a regulated 5V output with a 9V input. With a 0mA to 5mA load current, the ROUT is below 20. Paralleling for Lower Output Resistance Additional flexibility of the LTC1144 is shown in Figure 13. Two LTC1144s are connected in parallel to provide a lower effective output resistance. However, if the output resistance is dominated by 1/(f C1), increasing the capacitor size (C1) or increasing the frequency will be of more benefit than the paralleling circuit shown.
1 2 C1 10F 8 7 LTC1144 6 5 C1 10F 1 2 1F
8 7 LTC1144 6 5 VOUT = (V +)
3 4
3 4
+
1/4 CD4077*
C2 20F
PACKAGE DESCRIPTION
0.300 0.320 (7.620 8.128)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).
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S
9V 1 2 8 7 LTC1144 6 5 36k 2N2369
3 4
300k 5V 100F
1144 F12