TMT晤最Visual ATE
TMT晤最Visual ATE
TMT晤最Visual ATE
No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means electronic, mechanical, magnetic, optical, chemical, manual or otherwise without the prior written permission of Credence Systems Corporation, 215 Fourier Ave., Fremont, CA 94539. Credence Systems Corporation makes no representations or warranties with respect to the contents hereof and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. Furthermore, Credence Systems reserves the right to revise this publication and to make changes from time to time in the content hereof without obligation of Credence Systems to notify any person of such revision or changes. Restricted Rights Legend Use, duplication, or disclosure by the Government is subject to restrictions as set forth in Subparagraph (c)(1)(ii) of the rights in Technical Data and Computer Software Clause at DFARS 252.227-7013 or in subparagraph (c)(2) of the Commercial Computer Software Restricted Rights Clause at FAR 52.227-19, as applicable. Credence Systems Corporation, 215 Fourier Ave., Fremont, CA 94539.
Copyright 2002 Credence Systems Corporation All rights reserved, Printed in U.S.A.
Visual ATE Programming Reference Manual Part Number: 071-0146-00 March 2002
Notices: Credence, Credence Systems, ASL, ASL1000, ASL2000, ASL-DOS, RFx and Visual ATE are trademarks of Credence Systems Corporation.
Microsoft, ActiveX, DeveloperStudio, NT, Visual C++ Windows and Windows NT are either registered trademarks or trademarks of Microsoft, Inc.. All other brands, trademarks and registered trademarks are the sole property of their respective owners.
Table of Contents
Chapter 1 Platform Overview
Visual ATE System Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Test Programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Limit Sets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Program Creation Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 The Program Selection Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 Creating a New Test Program File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7 Directories for Test Program Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8 Editing Test Program Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9 Inserting and Enabling Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9 Creating Limit Sets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10 Updating Test Programs After Changing the Parent List . . . . . . . . . . . . 1-10 The ASL1000 Tester . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12 Instrument Cards for the ASL1000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12 The ASL2000 Tester . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15 Instrument Cards for the ASL2000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16 The RFx Tester . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-18 Instrument Cards for the RFx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-19
Chapter 2
ACM - AC Multiplexer
2-2 2-2 2-2 2-2 2-3 2-4 2-5 2-5 2-7 2-8
Function Calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . set_acm_relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . connect_instrument . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . set_dut_relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . set_comparator_mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . connect_source_instrument disconnect_source_instrument . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . set_threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ACM Programming Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3
AC Source
Basic Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Waveform Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 Additional Output Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
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Function Calls (Waveform Generator Commands) . . . . . . . . . . . . . . . . . . . . 3-6 init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6 set_level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 set_bw_ref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 set_path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 Function Calls (Waveform Memory and Clock Commands) . . . . . . . . . . . . . . 3-9 ldram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9 load_data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10 load_address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-11 start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12 card.clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12 stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13 Function Calls (AC Meter Commands) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14 set_meas_mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14 measure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15 close_relay open_relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16 ACS Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18 ACS Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19 Sinusoid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19 Trapezoid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
Chapter 4
Function Calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 select_channel_mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3 integrate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4 reset_integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5 hold_integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5 select_tmu_start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6 select_tmu_start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7 connect_dvi9_to_dut . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8 connect_dvi11_to_vref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9 connect_load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10 connect_decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11 connect_ddd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-12 ovi_to_tmu_start_stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13 set_s1_open clear_s1_open . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-14
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close_channel_relay open_channel_relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15 close_conn_tmu open_conn_tmu (System Use Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-16 ASB Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-17
Chapter 5
Function Calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 measure_average . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 select_adc_mux . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3 select_adc_range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4 select_iva_range select_ivb_range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5 set_high_level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-5 set_low_level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-6 set_prec_ref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-7 set_prec_ref_fine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8 set_current_force . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8 set_servo_hi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-9 set_servo_lo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10 set_servo_ref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10 set_servo_trig . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11 set_servo_code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11 drives_0_7_off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-12 close_switch open_switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13 close_relay open_relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15 clear_relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-16 DCC Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-17 TUE, INL, and DNL (8-bit ADC using the DCC) . . . . . . . . . . . . . . . . . . . 5-17 Contact . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19 Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-20
Chapter 6
Single Board Function Calls (Channel Commands) . . . . . . . . . . . . . . . . . . . . 6-2 init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 ddd_disconnect_drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
ddd_set_voltage_ref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3 ddd_set_hi_level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4 ddd_set_lo_level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4 Single Board Function Calls (Clock and Timing Commands) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5 ddd_set_clock_freq . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5 ddd_set_clock_period . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6 ddd_set_no_delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-6 ddd_set_delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7 Single Board Function Calls (Pattern Commands) . . . . . . . . . . . . . . . . . . . . . 6-8 ddd_load_pattern (non-loop mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-8 ddd_load_pattern (loop mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-9 ddd_end_pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-10 ddd_run_pattern (non-loop mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-11 ddd_run_pattern (loop mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-11 ddd_stop_pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-12 ddd_read_pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-13 ddd_compare_pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-13 Multiple Board Function Calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-14 Multiple Board Function Calls (Channel Commands) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15 init Master and Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-15 ddd_disconnect_drivers Master and Slave . . . . . . . . . . . . . . . . . . . . 6-15 ddd_set_compare_channels Master and Slave . . . . . . . . . . . . . . . . . 6-16 ddd_set_voltage_ref Master and Slave . . . . . . . . . . . . . . . . . . . . . . 6-17 ddd_set_hi_level Master and Slave . . . . . . . . . . . . . . . . . . . . . . . . . 6-17 ddd_set_lo_level Master and Slave . . . . . . . . . . . . . . . . . . . . . . . . . 6-18 Multiple Board Function Calls (Clock and Timing Commands) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-19 ddd_set_clock_freq Master and Slave . . . . . . . . . . . . . . . . . . . . . . . 6-19 ddd_set_clock_period Master and Slave . . . . . . . . . . . . . . . . . . . . . 6-19 ddd_disable_clocks Master and Slave . . . . . . . . . . . . . . . . . . . . . . . 6-20 ddd_set_no_delay Master and Slave . . . . . . . . . . . . . . . . . . . . . . . . 6-21 ddd_set_delay Master and Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-21 Multiple Board Function Calls (Pattern Commands) . . . . . . . . . . . . . . . . . . . 6-22 ddd_load_pattern - Master and Slave (non-loop mode) . . . . . . . . . . 6-22 ddd_load_pattern - Master and Slave (loop mode) . . . . . . . . . . . . . 6-23 ddd_end_pattern Master and Slave . . . . . . . . . . . . . . . . . . . . . . . . . 6-24 ddd_set_slave_pattern Slave . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-25 ddd_set_master_pattern Master . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-26 ddd_run_slave_pattern Slave (non-loop function) . . . . . . . . . . . . . . 6-26
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ddd_run_master_pattern Master (non-loop function) . . . . . . . . . . . . ddd_run_slave_pattern Slave (loop function) . . . . . . . . . . . . . . . . . . ddd_run_master_pattern Master (loop function) . . . . . . . . . . . . . . . . ddd_stop_pattern - Master and Slave . . . . . . . . . . . . . . . . . . . . . . . . ddd_read_pattern Master and Slave . . . . . . . . . . . . . . . . . . . . . . . . . ddd_compare_pattern Master and Slave . . . . . . . . . . . . . . . . . . . . . . DDD Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Vector Format Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . No Delays with 1- and 0-Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Delays with 1- and 0-Data and Zs (RT1) . . . . . . . . . . . . . . . . . . . . . . . . . Delays with 1- and 0-Data and Ts (RT0) . . . . . . . . . . . . . . . . . . . . . . . . . Delays with Zs (RT1) and Ts (RT0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Delays with Zs (RT1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Delays with Ts (RT0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6-27 6-28 6-28 6-29 6-30 6-30 6-32 6-33 6-33 6-34 6-35 6-36 6-37 6-38
Chapter 7
Theory of the DOAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2 Opamp Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2 Relay and Switch Action . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3 Channel Action . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4 Measurement Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4 Voltage Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5 Current Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5 Function Calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-7 init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-7 set_ia_offset_dac ch1_ia_offset_dac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-8 set_output_dac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-8 set_output_voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-9 dac_output_voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-10 set_gain_dac_ch0 set_gain_dac_ch1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-11 set_int_dac_ch0 set_int_dac_ch1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-12 convert_read_adc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-12 select_adc_mux . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-13 measure_average . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-14 close_relay open_relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-15 clear_relays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-16
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close_switch open_switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . clear_switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DOAL Simplified Diagrams: CH0 and CH1 . . . . . . . . . . . . . . . . . . . . . . . . . . Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Testing VOS on a Dual Opamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Testing Input Bias Current on a Dual Opamp . . . . . . . . . . . . . . . . . . . . .
Chapter 8
DVI Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2 Function Calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-4 init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-4 set_voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-4 set_diff_range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-6 set_current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-7 set_current_range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-9 set_meas_mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-10 measure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-11 measure_average . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-12 set_compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-12 close_relay open_relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-13 DVI Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-15 DVI Programming Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17 Supply Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-17
Chapter 9
Function Calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2 init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2 set_voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2 set_current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3 set_meas_mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4 measure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4 measure_average . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5 supply_off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-6 close_relay open_relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-7 HVS Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-9 HVS Programming Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-10
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current_normal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . voltage_fast voltage_normal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . kelvin_on kelvin_off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . drive_on drive_off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . drive_meas_off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PVI Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PVI100 Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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setup_skew . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . std_dev_freq . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . std_dev_time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . average . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . average_skew . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . convert_samples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . convert_freq_samples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . convert_skew_samples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . read_data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . read_skew . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Setup Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . done_setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . channel_enabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . clock_source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . threshold_volts_percent . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Global Variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a_count b_count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . *chan_a_result *chan_b_result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . conversion_done[channel] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . max_limit_active min_limit_active . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . max_val min_val . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TIA Calibration and Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Board Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TIA Cal File Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Frequency Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Skew Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19-13 19-14 19-14 19-15 19-16 19-17 19-18 19-18 19-19 19-20 19-21 19-21 19-21 19-22 19-23 19-24 19-25 19-25 19-26 19-26 19-27 19-27 19-28 19-29 19-30 19-30 19-30 19-30 19-32
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Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-9 Measuring Rise Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-9 Measuring Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-10 Measuring Propagation Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-10 Measuring a Periodic Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-11 Function Calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-12 init . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-12 reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-12 start_trigger_setup stop_trigger_setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-13 arm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-14 read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-16 read_now . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-16 get_status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-17 set_control clear_control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-18 close_relay open_relay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-19 TMU Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-21
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RFD.start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFD.read (single channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFD.read (dual channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFD Miscellaneous Function Calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFD.connect_tmu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFD.disconnect_tmu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFD.connect_vm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFD.disconnect_vm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFx Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Declaring an RFx Instrument . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Source and Measure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Time and Frequency Domain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFD Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF Digitizer Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFD Time and Frequency Domain . . . . . . . . . . . . . . . . . . . . . . . . . . . . RFD Dual Channel MAG/PHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC Bias Programming Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RF DC Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21-17 21-18 21-19 21-20 21-20 21-21 21-21 21-22 21-23 21-23 21-23 21-26 21-26 21-26 21-27 21-28 21-28 21-28
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RFx Digitizer Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-25 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-25 Bus Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-25 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-25 Glossary of Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-1 A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-1 B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-1 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-2 D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-2 E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-3 F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-3 H . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-4 I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-4 L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-5 M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-5 O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-6 P . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-6 R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-7 S . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-7 T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-8 U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-8 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-9
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List of Figures
Chapter 1 Platform Overview
Figure1-1 List File, DLL, and Test Program Limit Sets . . . . . . . . . . . . . . . . . . 1-5 Figure 1-2. Program Selection window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 Figure 1-3. Save As New Program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8 Figure 1-4. ASL1000 hardware architecture . . . . . . . . . . . . . . . . . . . . . . . . . 1-12 Figure 1-5. ASL2000 hardware architecture . . . . . . . . . . . . . . . . . . . . . . . . . 1-15 Figure 1-6. RFx hardware architecture. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-18
Chapter 2 Chapter 3
Figure 3-1. Basic Digital-to-Analog Action . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 Figure 3-2. Waveform Memory Bit Description . . . . . . . . . . . . . . . . . . . . . . . . 3-3 Figure 3-3. ACS Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 Figure 3-4. Waveform Data to Waveform Output Relationships . . . . . . . . . . . 3-5 Figure 3-5. ACS SImplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18
Chapter 4
Chapter 5
Chapter 6
Figure 6-1. DDD Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 6-2. Using no delay with 1s and 0s . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 6-3. Using Delays with 1s, 0s, and Zs (RT1). . . . . . . . . . . . . . . . . . . . Figure 6-4. Using Delays with 1s, 0s and Ts (RT0) . . . . . . . . . . . . . . . . . . . . Figure 6-5. Using Delays with Zs (RT1) and Ts (RT0) . . . . . . . . . . . . . . . . . . Figure 6-6. Using Delays with Zs (RT1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figure 6-7. Using Delays with Ts (RT0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Chapter 7
Figure 7-1. DOAL Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-20 Figure 7-2. DOAL Channel 0 Simplified Diagram . . . . . . . . . . . . . . . . . . . . . 7-21 Figure 7-3. DOAL Channel 1 Simplified Diagram . . . . . . . . . . . . . . . . . . . . . 7-22
Chapter 8
Figure 8-1. Current Mode Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2 Figure 8-2. Voltage Mode Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-3 Figure 8-3. DVI Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-15 Figure 8-4. DVI Relay Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-16
Chapter 9
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Chapter 19 TIA - Time Interval Analyzer Chapter 20 TMU - Time Measurement Unit
Figure 20-1. TMU Conceptual Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-2 Figure 20-2. Types of TMU Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . 20-3 Figure 20-3. TMU Conceptual Diagram with Arm and Slope . . . . . . . . . . . . . 20-4 Figure 20-4. TMU Interpolation Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-5 Figure 20-5. TMU Input Channel Mux . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-7 Figure 20-6. TMU Simplified Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-21
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List of Tables
List of Tables
Table 0-1: Font Treatments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i-xxi Table 0-2. Operation Safety Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i-xxvi Table 0-3. Service Safety Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i-xxviii Table 1-1: Directory for Test Program Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9 Table 1-2: ASL1000 Instruments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-13 Table 1-3: ASL2000 Instruments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16 Table 1-4: RFx Instruments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-19 Table 7-1: DOAL - Relays and Switches Closed on init . . . . . . . . . . . . . . . . . . . 7-3 Table 7-2: DOAL - Independent Relays and Switches. . . . . . . . . . . . . . . . . . . . 7-3 Table 7-3: Programmable Range Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5 Table 7-4: I-V Converter Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-5 Table 17-1: PVI Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17-22 Table 20-1: Read Statement Returns. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-6 Table 20-2: Start and Stop Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20-8 Table 21-1: RFx and RFD Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21-2
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List of Tables
Table A-18: ASL1000 Interconnects: Slot 18 . . . . . . . . . . . . . . . . . . . . . . . . .A-19 Table A-19: ASL1000 Interconnects: Slot 19 . . . . . . . . . . . . . . . . . . . . . . . . .A-20 Table A-20: ASL1000 Interconnects: Slot 20 . . . . . . . . . . . . . . . . . . . . . . . . .A-21 Table A-21: ASL1000 Interconnects: Slot 21 . . . . . . . . . . . . . . . . . . . . . . . . .A-22 Table A-22: ASL1000 Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-23 Table A-23: ASL1000 Grounds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-25 Table A-24: ASL1000 Config Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A-26
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List of Tables
Table B-29: ASL2000 Pinouts: Slot - 29 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-33 Table B-30: ASL2000 Pinouts: Slot - 30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-34 Table B-31: ASL2000 Pinouts: Slot - 31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-35 Table B-32: ASL2000 Control Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-37 Table B-33: ASL2000 Power Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-38 Table B-34: ASL2000 Ground Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-38 Table B-35: ASL2000 Sense Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-39 Table B-36: ASL2000 Sync Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-39 Table B-37: ASL2000 Test Head External Signals . . . . . . . . . . . . . . . . . . . . .B-40
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List of Tables
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This introductory section gives an overview of the Programming Reference manual for the Visual ATE system software. This section includes: Scope of manual Notation conventions Programming reference usages Related publication Operator Safety summary Electromagnetic Compatibility (EMC) System Requirements.
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Scope of Manual
This Visual ATE Programming Reference assembles a suite of programming references for the Visual ATE operating system. This software has been designed to run the following automated tester platforms: ASL1000, ASL2000, and RFx.
Audience
The information in this manual is for test engineers and programmers who work with ASL1000, ASL2000, and RFx automated test systems running under the Visual ATE system software from Credence Systems Corporation. For this audience, manual chapters are designed to give a one-stop point of reference the Table of Contents is where to find the chapter titled for the test instrument to program. For a quick look at the programming reference features, see the Programming Reference Sample later in this section.
Prerequisites
Visual ATE software includes Microsoft Visual C++, and this manual assumes the user to have a basic familiarity with C programming. For an overview of how Credence Systems incorporates this environment in its product, see the Visual ATE User s Guide manual.
Organization
The contents of this manual are organized as follows: Chapter 1 ASL Platform Overview showing available test instruments. Programming references by instrument. Programming references that are specific to RFx. Shows ASL1000 system interconnects.
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Notation Conventions
Shows ASL2000 system interconnects. Shows RFx system interconnects. A list of definitions for frequently used terms.
Notation Conventions
Throughout this manual, font treatments are used to highlight special terms and actions. The table below describes these styles and their meaning.
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Where needed, simplified diagrams of the instrument or its components are included.
Syntax Format
This section shows the syntax format for Visual ATE programming functions. Example: All voltage range arguments read as follows: RANGE_ X_UV RANGE_X_MV RANGE_X_V RANGE_X_KV where X represents the number of volts (i.e., RANGE_5_V for five volts). All current range arguments read as follows: RANGE_ X_PA RANGE_X_NA RANGE_X_UA RANGE_X_MA RANGE_X_A where X represents the number of amperes (i.e., RANGE_1_A for one amp).
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All items that appear in capital letters under a heading in bold must be typed exactly as shown. Optional statements include a default setting; this default is used unless the programmer enters another value for the statement.
connect_vi_force This is the programming statement Description This function initially sets the voltage to 0 V. Next, the current and voltage ranges are programmed, before the source output relay is connected. Finally, the voltage source is programmed to the stated value. The default value for the correction factor (corr_factor) is 0 to 1000 pF (no argument entered). Format: Shows statement with arguments void connect_vi_force(double voltage_value, char vrange, double current_value, char irange, char corr_factor); Valid Arguments: Mandatory arguments voltage_value voltage output range as integer, decimal or scientific notation (-45.0 V to +45.0 V) vrange RANGE_1_V RANGE_2_V RANGE_5_V RANGE_10_V Arguments must be typed as shown
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RANGE_20_V RANGE_45_V current_value current output range in decimal or scientific notation (0.001 A to 1.0 A) irange RANGE_10_UA RANGE_100_UA RANGE_1_MA RANGE_10_MA RANGE_100_MA RANGE_1_A corr_factor Optional arguments in italics, type as shown no argument entered (default) CORR0 CORR0 & CORR1 CORR0 & CORR1 & CORR2 (0 to 1000 pF) (0 to 0.1 F) (0 to 10 F) (0 to 50 F)
Usage:
Instrument and slot always come first pmu_21->connect_vi_force(5.0, RANGE_10_V, 10e-6, RANGE_100_UA); //no correction factor (default) Conventions Uppercase terms must be entered exactly as written Open and close parentheses () that follow a statement contain the statements arguments
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Related Publications
Bold terms within parentheses are mandatory arguments Italicized Bold terms within parentheses are optional arguments
Related Publications
System Manuals
For information on features, operation, and maintenance of ASL- and RFxbased testers running under Visual ATE, see the following manuals: Visual ATE User s Guide 071-0147-00
ASL2000 Site Preparation Handbook 071-0123-00 Visual ATE Quick Reference Guide ASL Service Manual 071-0148-00 071-0145-00
On-Line Documentation
On-line versions of all ASL platform-based system manuals are provided in PDF format on a CD-ROM. This disk accompanies the system software disk and can be viewed on the PC platform of the tester using Adobe Acrobat Reader. See the list above for the manual titles that make up the documentation set for ASL platform-based testers.
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The general safety information in this summary is for both operating and servicing personnel. Specific warnings and cautions will be found throughout the manual where they apply, but may not appear in this summary.
Terms in this manual CAUTION statements identify conditions or practices that could result in damage to the equipment or other property. WARNING statements identify conditions or practices that could result in personal injury or loss of life. Terms as Marked on Equipment CAUTION indicates a personal injury hazard not immediately accessible as one reads the marking or a hazard to property including the equipment itself. DANGER indicates a personal injury hazard immediately accessible as one reads the marking. Symbols as Marked on Equipment DANGER HIGH VOLTAGE INSIDE THIS UNIT. SERIOUS INJURY OR DEATH COULD RESULT FROM CONTACT. REFER SERVICING TO QUALIFIED PERSONNEL ONLY. ATTENTIONRefer to manual
Pinch Point.
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To avoid explosion, do not operate this equipment in an explosive atmosphere unless it has been specifically certified for such operation.
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For Qualified Service Personnel Only. Table 0-3. Service Safety Summary
Items Do Not Service Alone Description
Do not service or adjust this product internally unless another person capable of rendering first aid and resuscitation is present.
Dangerous voltages and currents may exist at several points in this product or in the equipment with which this product is used. To avoid personal injury, do not touch exposed connections and components while power is on. Disconnect power before removing protective covers and making internal changes. Remove jewelry prior to servicing. Rings, necklaces, watchbands, and other metallic objects could come into contact with dangerous voltages or currents. ASL2000 product is intended to operate from a single phase power 208 V/230 V source that will not apply more than 228 volts rms between phases and not more than 132 volts rms between any phase and neutral. Refer to the installation instructions before attempting to connect the product to the power source. The product is grounded through the protective grounding conductor of the power cord (or service wiring in lieu of a power cord). To avoid electrical shock, the grounding conductor must be connected to a properly wired receptacle or junction box. To avoid injury to other personnel, replace covers before leaving the equipment unattended. Two or more persons may be needed to lift and maneuver equipment such as test head and rack-mounted units because of their physical size, shape, weight or location. To avoid injury, dont attempt to handle this type of equipment alone.
Power Source
Replace Covers
Lifting
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his product has been tested and found to produce emissions in excess of that allowed by the European Community EMC Directive. As a result, the user of this equipment may be required to take extraordinary measures to prevent interference with licensed communications. Following are actions which may be required of the user of this equipment. Testing may be required at the time of installation by a European Competent Body. This testing is to be performed at the boundary of the installed facility. Measurements will be made to ensure that product emissions are within established limits at the installed site. Per the Annex of EN55022, a building will generally provide an attenuation of 10 dB to an interference source. The customer may be required to take extraordinary additional measures to limit the interference potential of the product, such as the addition of shielding material around the product or placing the product in a shielded room.
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CHAPTER 1
Platform Overview
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Platform Overview
Test Programs
A test program is a sequence of calls to the test functions within a DLL or List. As only one DLL can be linked at a time, the test functions in a test program must come from the same DLL. Not all test functions in a list need be included in the program; they may be enabled or disabled within the test program. Enabled functions execute when the test program is run, while disabled functions are skipped. Saving a test program creates a file that contains: One or more sets of parameter values (limit sets) for each of the included functions A list of included functions that are executed in sequence when the program is run
Limit Sets
A single test program can contain multiple variations on the structures (parameters, limits, and enabled/disabled status) that determine how the test functions behave. These variations are called limit sets. When functions are inserted into a test program, the existing structures for all the included functions become the default limit set for the program. Except for adding or removing test functions from the program, any editing actually alters the limit set, and not the functions themselves.
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Test Programs
The default limit set can be edited as desired, saved under a new name, or saved as the new default set for the program. Additional limit sets can be created and edited as desired. When multiple limit sets are created for a single program, the same program can be run with the various limit sets, designed for different test purposes. Each limit set contains not only the altered parameters and test limits for each function, but also the functions enabled or disabled status. Therefore, a test function may be enabled in one limit set and disabled in another set. Note: Editing limits in a test program file does not alter the original limits contained in the list. Functions display with their default values when inserted from the parent list, even if the same function was inserted earlier, and the values were altered within the test program.
These processes are reviewed in this chapter. Figure1-1 on the following page illustrates the relationship between list files, test programs and limits. Note: Engineering users can also create list files from test programs, and use the new list to create additional programs. A list file must exist before any
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Platform Overview
programs can be built however, additional list files may be created from the test program once the program is written.
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Test Programs
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1-5
Platform Overview
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Test Programs
Note:
In a new install, there are no test program files shown in the window. To use the Engineering editor, test programs must be created or inserted The programs that appear in this window are available for both development and production. Access to programs, however, is set by the user s privileges. Engineering users can double-click on any test program name in the window to open the program in the Engineering editor. Production users may be able to open programs in the window or may have to enter a program name manually, depending on the System Properties set. Production users cannot create new programs or insert programs into the window. Selecting Remove takes a program file off the window, but does not delete the file from the directory. A removed file remains available and can be reinserted later. Insert adds an existing file to the window. This brings up a browser. The inserted file is visible in Program Selection immediately. New brings up a dialog where the user chooses a list file from which to generate a program. Once programs have been identified, they will appear in this window whenever Engineering is entered. If production user access has been set to display a menu of available programs, this window will also appear when Operator is opened. However, the New and Insert tools will be disabled.
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Platform Overview
The new program opens in the Engineering editor. No functions are displayed.
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Test Programs
or its associated list every time the program is opened. Table 1-1 shows the basic directory structure.
While new test programs are generated and saved in the Program Selection dialog, existing programs can be opened from within Engineering, whether or not they have been inserted into the Program Selection list. Engineering opens all Visual ATE file types. Multiple test programs, their associated run screens, lists and report files can all be open at the same time.
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Platform Overview
Functions are inserted above the active function window. The function window is the area between the upper and lower gridlines. Placing the cursor anywhere in this space makes the function active. If the cursor is active in an existing function window, the new function is inserted above the active function and takes that function number. The original active function moves down the screen and is assigned the next number.
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Test Programs
executes selected functions, it does not change the structure of the list. A structural change is anything that can be done in Create but not in Engineering (parameter names and types, number of tests, etc.). Test program structure shows in the Select Function dialog. To see a test programs structure follow these steps:
1. Open the test program 2. Go to Edit -> Insert Function
A dialog opens titled Select Function. All of the functions that are available to the test program are displayed. The contents of this dialog match the list elements shown when the list is opened in Create. When a list is structurally changed (functions, parameters or tests are added or removed), the new structure no longer matches the structure associated with existing test programs created from the list. When running a test program whose parent list has changed, Test.exe automatically updates the test program structure to match the parent list structure. When the test program is opened, a message is displayed, along with a report file that shows what has changed: the set of available functions are revised to match the updated parent list, and structurally changed functions are removed from the program. This report can be printed. Follow these steps to run the program after changing the parent list: 1. 2. 3. 4. In Select Function (above), highlight the updated function and click OK. Repeat for each function to be inserted. Save the revised test program. Run the test program.
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Platform Overview
Backplane Instruments
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mounted in the backplane. Many of the instrument cards have user-accessible test points located along one edge for debugging.
DVI
8 9 10 11 12 13
High Voltage Source Link/Zener Blower Medium Voltage Source Resource Multiplexer Octal Floating Source Octal Voltage/Current
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Platform Overview
15 16
PRO PVI
17
RCS
18
TIA
19
TMU
Minimum instrument configuration requires one DVI Dual Voltage/Current card in slot 9, and one MUX Multiplex Relay card in slot 20. Other instrument cards are added to expand the system as required. For definitions and programming instructions for each instrument, see similarly titled individual chapters in this manual.
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30 slot Backplane
Analog Slots PC Digital Slots DUT board Interconnect board Test Head Interface card
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Platform Overview
DVI
6 7 8 9 10 11
High Voltage Source Link/Zener Blower Medium Voltage Source Resource Multiplexer Octal Floating Source Octal Voltage/Current
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13 14
PRO PVI
15
RCS
16
TIA
17
TMU
For definitions and programming instructions for each instrument, see similarly titled individual chapters in this manual.
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Platform Overview
RF Ports
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DVI
8 9 10 11 12 13
High Voltage Source Link/Zener Blower Medium Voltage Source Resource Multiplexer Octal Floating Source Octal Voltage/Current
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Platform Overview
15 16
PRO PVI
17
RCS
18
TIA
19
TMU
For definitions and programming instructions for each instrument, see similarly titled individual chapters in this manual.
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CHAPTER 2
ACM - AC Multiplexer
The ACM AC Multiplexer provides a high-speed site for testing digital clock devices. The ACM does not perform measurements on its own; it operates in conjunction with a separate Time Interval Analyzer instrument (TIA), which performs the timing measurements. A high-speed multiplexer (mux) output on the ACM drives the TIA (see "TIA - Time Interval Analyzer" chapter in this manual for more information). The ACM offers 64 signal channels that may be individually connected to either an Octal V/I (OVI) channel or to the input of the high-speed multiplexer (mux) section of the ACM. An on-board emittercoupled logic (ECL) comparator may be selected to buffer the high-speed mux output.
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ACM - AC Multiplexer
Function Calls
init
Description This function initializes the ACM board. All 64 OVI/MUX relays switch to OVI s. ACM_DUT_1 connects to ACM_INSTRUMENT 1; ACM_DUT_2 connects to ACM_INSTRUMENT 2; COMPARATOR_MODE disables all (comparators are bypassed), and the comparator threshold DACs set to uncalibrated 0 V. Format void init (void); Valid Arguments none
Usage
acm_22->init ();
set_acm_relay
Description This function switches the OVI/MUX relays on each of the 64 ACM channels to either an OVI or the high-speed mux section of the ACM. Format void set_acm_relay(unsigned char channel, unsigned char state);
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connect_instrument
Description This function connects the path through the high-speed mux section of the ACM from the specified DUT pin (pogo pin) to the specified instrument (SMA output). The ACM OVI/MUX relay must also be set to ACM_RELAY_MUX for a complete connection. See set_acm_relay, above. The connect_instrument function is not used when the output is connected to an OVI channel. Format short connect_instrument(unsigned char source, unsigned char instrument) Valid Arguments source ACM_DUT_xx (1 to 64)
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ACM - AC Multiplexer
set_dut_relay
Description This function operates relay control lines for user-installed relays on the DUT board. Format void set_dut_relay(unsigned char channel, unsigned char state); Valid Arguments: channel ACM_DUT_RELAY_x state ACM_DUT_RELAY_ON ACM_DUT_RELAY_OFF (1 to 8)
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set_comparator_mode
Description This function sets comparator functionality. The DUT signal connected to ACM_INSTRUMENT_x by connect_instrument above automatically drives one or both comparators. When the comparators are disabled, the DUT signal bypasses the comparator and drives the output cable directly. When the comparators are enabled, the DUT signal drives the comparator input(s). Format void set_comparator_mode(unsigned char comparator_mode, unsigned char enable_state); Valid Arguments comparator_mode ACM_COMPARATOR_A ACM_COMPARATOR_B ACM_COMPARATOR_DUAL enable_state ACM_COMPARATOR_DISABLE ACM_COMPARATOR_ENABLE
connect_source_instrument
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ACM - AC Multiplexer
disconnect_source_instrument
Description The ACM has two coaxial cables available to route external signal source instruments to the DUT. This function connects or disconnects the path from the specified source instrument SMA connector to specified FOUT pin (pogo pin). Note that with ACM_SOURCE_INSTRUMENT_1 only pins 1 to 4 are valid. With ACM_SOURCE_INSTRUMENT_2, only pins 5 to 8 are valid. Format short connect_source_instrument(unsigned char source_instrument, unsigned char fout); Valid Arguments source_instrument ACM_SOURCE_INSTRUMENT_1 ACM_SOURCE_INSTRUMENT_2 fout For ACM_SOURCE_INSTRUMENT_1: (1 to 4) For ACM_SOURCE_INSTRUMENT_2: (5 to 8) Usage acm_22->connect_source_instrument(ACM_SOURCE_INSTRUMENT_1, FOUT_2); acm_22->disconnect_source_instrument(ACM_SOURCE_INSTRUMENT_1, FOUT_2);
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set_threshold
Description This function sets the comparator switching threshold. Format void set_threshold(unsigned char channel, float voltage); Valid Arguments channel ACM_COMPARATOR_A ACM_COMPARATOR_B voltage -3.0 to +8.0 (threshold voltage) Usage acm_22->set_threshold(ACM_COMPARATOR_A, 2.5);
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ACM - AC Multiplexer
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CHAPTER 3
AC Source
The AC Source (ACS) is a programmable waveform generator featuring both fixed and programmable filters, along with four AC-to-RMS measurement channels. The ACS output channel consists of a 32K deep Waveform memory, a programmable clock, and a high-speed digital-to-analog converter (DAC) with programmable high and low reference levels. Output undergoes a signalconditioning phase through an all-pass filter, a tank filter, or an attenuator, followed by a single-pole or 4-pole programmable low-pass filter (LPF). The ACS also provides three separate CMOS level output signals synchronized with the output Waveform.
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AC Source
Basic Theory
The ACS produces waveforms by reconstructing binary data that is stored in a 32K-by-16-bit waveform memory. This stored data is presented to a 12-bit DAC at a selected clock frequency. The DAC produces a discreet DC voltage level for every binary code presented at its input. The DAC resolution is related to the number of its data bit inputs. A 12-bit DAC can support 4096 binary numbers or codes (0 to 4095). As an example, if the DAC has a fullscale output voltage of 10 V, then the resolution of its discreet DC output voltage levels (or steps) is as follows: 10 V/4096 = 2.4414 mV
DAC
2.44 mV
Clock
0 1 2
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frequencies, ranging from 64 MHz to 1.953125 kHz, from which the user may select. The user must program all waveform types except for the sinusoid form. The ldram() statement will generate the required DAC codes to produce a sinusoid wave based on the input given to the command.
Waveform Memory
15
14
13
12
11
10
9 (5)
4 (0)
(7) (6)
(4) (3)
(2) (1)
Waveform
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AC Source
The main waveform DAC output is directly affected by two variables: the value of the binary code (amplitude) being input the rate (sampling frequency) at which the DAC is instructed to convert the binary code to a DC voltage
The sync bit outputs are also affected by the Waveform memory codes and sampling frequency. A CMOS-level pulse is present on the output of every sync bit Waveform memory location that is programmed to a 1 (one). The pulse duration is the same as the sampling frequency. For longer pulse widths, program consecutive Waveform memory locations high. The difference between the main waveform output and the sync bit outputs is that the main waveform output can be programmed to create a wide variety of wave shapes, while the sync bit outputs are restricted to pulse streams. See Figures 3-3 and 3-4 below and on the next page.
Main DAC
Sync 1
Sync 2
Sync 3
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Address Pattern Data 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 000000000000 000000000001 000000000010 000000000011 000000000100 000000000101 000000000110 000000000111 000000000111 000000000111 000000000111 000000000110 000000000101 000000000100 000000000011 000000000010 000000000001 000000000000 000000000000
S3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
S2 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0
S1 LB 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Address 0 to 18
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3-5
AC Source
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set_level
Description This function sets the amplitude and offset of the output waveform. The maximum amplitude is 9.8 Vpp and maximum offset is dependent on the amplitude programmed. The scale argument selects RMS volts or peak volts, with default values of zero for both amplitude and offset. Offset is always in DC volts. The voltages entered must lie in the selected voltage range or clamping may occur (for example, clamping may result at levels above 0.7 Vrms or 0.99 Vpeak on the ACS_1_VOLT_RANGE). Format void set_level(float amplitude, float offset, short scale); Valid Arguments amplitude output voltage level in decimal of scientific notation (Default is 0) offset offset DC voltage level in decimal or scientific notation (Default is 0) scale ACS_RMS_LEVEL ACS_PEAK_LEVEL (Default)
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AC Source
set_bw_ref
Description This function sets the cutoff frequency for the programmable LPF (10kHz to 200kHz). code1 and code2 are 12-bit (0-4095) codes and are programmed with the same values. Format void set_bw_ref(unsigned short code1, unsigned short code2); Valid Arguments code1 0 to 4095 code2 0 to 4095
set_path
Description This function defines the path for the output signal. The programmable LPF (ACS_MAIN_FILTER) clips with signals greater than 2.5 Vpp. When the programmable LPF is selected, the single-pole LPF is automatically set to the 500 kHz cutoff.
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Format void set_path(short filter, short attenuation); Valid Arguments filter ACS_NO_FILTER ACS_LC_FILTER ACS_MAIN_FILTER ACS_BASE_FILTER ACS_100K_FILTER attenuation ACS_1_VOLT_RANGE ACS_10_VOLT_RANGE (Default, divide by 10) (Divide by 1) (Default) (196 kHz Fo with 1 kHz bandpass. Available on 10 V range only.) (Programmable LPF) (Single pole cutoff @ 500 kHz) (Single pole cutoff @ 100 kHz)
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AC Source
Format void ldram(float freq, float sampling freq, unsigned short cycles); Valid Arguments freq frequency (F0) in decimal or scientific notation sample freq sampling frequency (Fs) in decimal or scientific notation (default is approx. 16xF0) cycles Number of cycles to be loaded into memory (default is 1)
load_data
Description This function loads data at a specific address in Waveform memory. The data is obtained by multiplying the waveform data code (0 to 4095) by 16. Multiplying by 16 shifts the data to the upper 12 bits of waveform memory (see Figure 3-2). Format void load_data(unsigned short address, unsigned short data);
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data 0 to 65535
load_address
Description This function sets the address pointer to a specific Waveform memory location for the static command. The pointer will return to address zero (0) after reaching the end of waveform memory on an address that has the Loop Back bit set to 1. Format void load_address(unsigned short address); Valid Arguments address 0 to 32767 (default is 0)
Usage acs_5->load_address(12476);
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AC Source
start
Description This function starts Waveform output at the rate of the specified clock. The default setting is the internal clock, ACS_INT_CLK. Waveform memory execution continues to the end of Waveform memory, unless a Loop Back (bit 0) is programmed. In both cases, addressing is returned to address zero (0) and the waveform repeats until an init() or stop() command is encountered. Format void start(short clock source); Valid Arguments clock source ACS_INT_CLK ACS_EXT_CLK (Internal clock, default) (External clock)
Usage acs_5->start(ACS_EXT_CLK);
card.clock
Description This function sets the internal clock frequency (Fs) by dividing the 64 MHz master clock by the selected divisor. The clock frequency range is 1.953125 kHz to 64 MHz.
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Format void card.clock = divisor; Valid Arguments divisor CLK_MAIN CLK_BY_2 CLK_BY_4 CLK_BY_8 CLK_BY_16 CLK_BY_32 CLK_BY_64 CLK_BY_128 CLK_BY_256 CLK_BY_512 CLK_BY_1024 CLK_BY_2048 CLK_BY_4096 CLK_BY_8192 CLK_BY_16384 CLK_BY_32768 (64 MHz) (32 MHz) (16 MHz) (8 MHz) (4 MHz) (2 MHz) (1 MHz) (500 kHz) (250 kHz) (125 kHz) (62.5 kHz) (31.25 kHz) (15.625 kHz) (7.8125 kHz) (3.90625 kHz) (1.953125 kHz)
stop
Description This function halts Waveform memory output.
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AC Source
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vrange ACS_1V_RMS_RANGE ACS_2V_RMS_RANGE ACS_5V_RMS_RANGE ACS_10V_RMS_RANGE ACS_20V_RMS_RANGE ACS_50V_RMS_RANGE ACS_100V_RMS_RANGE coupling ACS_AC_COUPLING ACS_DC_COUPLING (Default) (Default)
measure
Description This function performs an RMS measurement based upon the setup defined with set_meas_mode(). The function returns the average of the stated number of samples. The default is 10 samples. The sample rate is approximately 33 s, computer controlled. Format float measure(short samples); Valid Arguments samples
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AC Source
0 to 32767
(Default is 10)
close_relay open_relay
Description These functions close and open the stated on-board relays. Format void close_relay(unsigned short relay); void open_relay(unsigned short relay); Valid Arguments relay D_RMS_CH1 D_RMS_CH2 D_RMS_CH3 D_RMS_CH4 D_SIG_OUT D_R_BIT1 D_R_BIT2 D_R_BIT3 D_CLK (meter channel 1 input-connect-relay) (meter channel 2 input-connect-relay) (meter channel 3 input-connect-relay) (meter channel 4 input-connect-relay) (signal output-connect-relay) (sync signal 1 connect-relay) (sync signal 2 connect-relay) (sync signal 3 connect-relay) (external clock input-connect-relay)
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AC Source
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Trapezoid
The following code generates a trapezoidal waveform:
acs_5->init(); // loading of the pattern... // LOW for 2048, RAMP UP for 4096, HIGH for 2048, RAMP DOWN for //4096 short j=0; // j=0 - Low for 2048 samples for(j=0; j<2048; j++) { acs_5->load_data(j, 0); } // j=2048 - Ramp up for 4096 samples for(j=2048; j<(2048+4096); j++) { acs_5->load_data(j,(j-2048)*16); }
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AC Source
//j=6144 - High for 2048 samples for(j=6144; j<(6144+2048); j++) { acs_5->load_data(j, 4095*16); } //j=8192 - Ramp down for 4096 samples for(j=8192; j<8192+4096; j++) { acs_5->load_data(j, (4095-(j-8192))*16); } acs_5->load_data(j, 1); // loop back bit loaded acs_5->card.clock = CLK_BY_16; // fsampling = 4 MHz //set up ACS... acs_5->set_path(ACS_NO_FILTER,ACS_10_VOLT_RANGE); acs_5->set_ref(ours->amplitude,ours->offset); //pass in amplitude //and offset acs_5->close_relay(D_SIG_OUT); //close output connect relay burst //pattern... acs_5->start(); //start pattern burst at internal clock rate //stop pattern burst acs_5->load_option(1);
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CHAPTER 4
The ASB Analog Switch Board is a twenty-channel instrument specifically designed to test analog switches. Each channel performs two basic functions: For generic device testing, each channel provides the necessary connectivity to the instruments installed in the test head. Each channel has the specific circuitry required to test device leakage.
NOTICE
Analog Switch Board (ASB) is only used by ASL1000
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Function Calls
init
Description This is the board initialization routine. All relays and switches are set to their default states, all DACs are programmed to zero, and all drives are set to tristate. Format void init(void); Valid Arguments none Usage asb_22->init();
setup
Description Running this routine determines the instrument ID and revision. Format void setup(void);
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select_channel_mode
Description This function sets the selected channel to one of three measurement modes: Input timing/output timing Leakage high/leakage low Parametric
Format short select_channel_mode(unsigned char channel, unsigned char ode); Valid Arguments channel ASB_CHANNEL_1 ASB_CHANNEL_2 ASB_CHANNEL_3 ASB_CHANNEL_4 ASB_CHANNEL_5 ASB_CHANNEL_6 ASB_CHANNEL_7 ASB_CHANNEL_8 ASB_CHANNEL_9 ASB_CHANNEL_10 ASB_CHANNEL_11 ASB_CHANNEL_12 ASB_CHANNEL_13 ASB_CHANNEL_14 ASB_CHANNEL_15 ASB_CHANNEL_16 ASB_CHANNEL_17 ASB_CHANNEL_18 ASB_CHANNEL_19 ASB_CHANNEL_20
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integrate
Description Note: This command operates in leakage measurement mode. select_channel_mode must be set to ASB_LEAKAGE_HIGH or ASB_LEAKAGE_LOW. The function sets the current-to-voltage (I-V) converters to integration mode, converting input currents to a voltage level. Executing this command affects all ASB channels: All channels are programmed to this mode when this command is executed. Format void integrate(void); Valid Arguments none Usage asb_22->integrate();
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reset_integrator
Description Note: This command operates in leakage measurement mode. select_channel_mode must be set to ASB_LEAKAGE_HIGH or ASB_LEAKAGE_LOW. The function sets the I-V converters in all ASB channels to the reset condition. All channels are reset when this command is executed. Format void reset_integrator(void); Valid Arguments none Usage asb_22->reset_integrator();
hold_integrator
Description Note: This command operates in leakage measurement mode. select_channel_mode must be set to ASB_LEAKAGE_HIGH or ASB_LEAKAGE_LOW. The function holds the integrator output at the final value. Executing this command sets all ASB channels to this mode.
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select_tmu_start
Description Note: This command operates in timing measurement mode. select_channel_mode must be set to ASB_INPUT_TIME or ASB_OUTPUT_TIME. The function connects the selected channel to the TMU start input for timing measurements. Format short select_tmu_start(unsigned char channel); Valid Arguments channel ASB_CHANNEL_1 ASB_CHANNEL_2 ASB_CHANNEL_3 ASB_CHANNEL_4 ASB_CHANNEL_5 ASB_CHANNEL_6 ASB_CHANNEL_11 ASB_CHANNEL_12 ASB_CHANNEL_13 ASB_CHANNEL_14 ASB_CHANNEL_15 ASB_CHANNEL_16
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Usage asb_22->select_tmu_start(ASB_CHANNEL_1);
select_tmu_start
Description Note: This command operates in timing measurement mode. select_channel_mode must be set to ASB_INPUT_TIME or ASB_OUTPUT_TIME. The function connects the selected channel to the TMU stop input for timing measurements. Format short select_tmu_stop(unsigned char channel); Valid Arguments channel ASB_CHANNEL_1 ASB_CHANNEL_2 ASB_CHANNEL_3 ASB_CHANNEL_4 ASB_CHANNEL_5 ASB_CHANNEL_6 ASB_CHANNEL_7 ASB_CHANNEL_8 ASB_CHANNEL_9 ASB_CHANNEL_11 ASB_CHANNEL_12 ASB_CHANNEL_13 ASB_CHANNEL_14 ASB_CHANNEL_15 ASB_CHANNEL_16 ASB_CHANNEL_17 ASB_CHANNEL_18 ASB_CHANNEL_19
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ASB_CHANNEL_10
ASB_CHANNEL_20
Usage asb_22->select_tmu_stop(ASB_CHANNEL_1);
connect_dvi9_to_dut
Description This function connects DVI9 to the selected channel for testing and measurements in the following two categories: Tests that require a voltage range greater than 15 V Differential measurements
Format unsigned char connect_dvi9_to_dut(unsigned char channel unsigned char dvi_channel); Valid Arguments channel ASB_CHANNEL_1 ASB_CHANNEL_2 ASB_CHANNEL_3 ASB_CHANNEL_4 ASB_CHANNEL_5 ASB_CHANNEL_6 ASB_CHANNEL_7 ASB_CHANNEL_8 ASB_CHANNEL_9 ASB_CHANNEL_10 ASB_CHANNEL_11 ASB_CHANNEL_12 ASB_CHANNEL_13 ASB_CHANNEL_14 ASB_CHANNEL_15 ASB_CHANNEL_16 ASB_CHANNEL_17 ASB_CHANNEL_18 ASB_CHANNEL_19 ASB_CHANNEL_20
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connect_dvi11_to_vref
Description This function connects DVI11 to the selected channel in order to drive the reference voltage used for leakage measurements. Format unsigned char connect_dvi11_to_vref(unsigned char channel unsigned char dvi_channel); Valid Arguments channel ASB_CHANNEL_1 ASB_CHANNEL_2 ASB_CHANNEL_3 ASB_CHANNEL_4 ASB_CHANNEL_5 ASB_CHANNEL_6 ASB_CHANNEL_7 ASB_CHANNEL_8 ASB_CHANNEL_9 ASB_CHANNEL_10 ASB_CHANNEL_11 ASB_CHANNEL_12 ASB_CHANNEL_13 ASB_CHANNEL_14 ASB_CHANNEL_15 ASB_CHANNEL_16 ASB_CHANNEL_17 ASB_CHANNEL_18 ASB_CHANNEL_19 ASB_CHANNEL_20
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connect_load
Description This function connects a load to the selected channel. Format unsigned char connect_load (unsigned char channel unsigned char load); Valid Arguments channel ASB_CHANNEL_1 ASB_CHANNEL_2 ASB_CHANNEL_3 ASB_CHANNEL_4 ASB_CHANNEL_5 ASB_CHANNEL_6 ASB_CHANNEL_7 ASB_CHANNEL_8 ASB_CHANNEL_9 ASB_CHANNEL_10 load ASB_CHANNEL_11 ASB_CHANNEL_12 ASB_CHANNEL_13 ASB_CHANNEL_14 ASB_CHANNEL_15 ASB_CHANNEL_16 ASB_CHANNEL_17 ASB_CHANNEL_18 ASB_CHANNEL_19 ASB_CHANNEL_20
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connect_decoupling
Description This function connects a decoupling capacitor to the selected channel. Format unsigned char connect_decoupling (unsigned char channel unsigned char couple); Valid Arguments channel ASB_CHANNEL_1 ASB_CHANNEL_2 ASB_CHANNEL_3 ASB_CHANNEL_4 ASB_CHANNEL_5 ASB_CHANNEL_6 ASB_CHANNEL_7 ASB_CHANNEL_8 ASB_CHANNEL_9 ASB_CHANNEL_10 couple ASB_CHANNEL_11 ASB_CHANNEL_12 ASB_CHANNEL_13 ASB_CHANNEL_14 ASB_CHANNEL_15 ASB_CHANNEL_16 ASB_CHANNEL_17 ASB_CHANNEL_18 ASB_CHANNEL_19 ASB_CHANNEL_20
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TRUE FALSE
connect_ddd
Description This function connects a selected DDD to the selected ASB channel. Format unsigned char connect_ddd (unsigned char channel, unsigned char ddd_channel, unsigned char add_unique = ASB_DDD_ADD); Valid Arguments channel ASB_CHANNEL_1 ASB_CHANNEL_2 ASB_CHANNEL_3 ASB_CHANNEL_4 ASB_CHANNEL_5 ASB_CHANNEL_6 ASB_CHANNEL_7 ASB_CHANNEL_8 ASB_CHANNEL_9 ASB_CHANNEL_10 ddd_channel DDD_CH1 ASB_CHANNEL_11 ASB_CHANNEL_12 ASB_CHANNEL_13 ASB_CHANNEL_14 ASB_CHANNEL_15 ASB_CHANNEL_16 ASB_CHANNEL_17 ASB_CHANNEL_18 ASB_CHANNEL_19 ASB_CHANNEL_20
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ovi_to_tmu_start_stop
Description Connects an OVI to the TMU to measure the start or stop input signal for the selected channel. Format unsigned char ovi_to_tmu_start_stop(unsigned char tmu_start unsigned char tmu_stop); Valid Arguments tmu_start TRUE FALSE tmu_stop TRUE FALSE //connect to stop //do not connect to stop //connect to start //do not connect to start
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set_s1_open clear_s1_open
Description Note: This command operates in leakage measurement mode. select_channel_mode must be set to ASB_LEAKAGE_HIGH or ASB_LEAKAGE_LOW. This command connects the integration opamp to the DUT. All channels are connected and disconnected together. Format void set_s2_open(void); void clear_s2_open(void); Valid Arguments none Usage asb_22->set_s2_open();
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close_channel_relay open_channel_relay
Description This command closes or opens the selected channel relays. Format short select_tmu_start(unsigned char channel, unsigned char relay); Valid Arguments channel ASB_CHANNEL_1 ASB_CHANNEL_2 ASB_CHANNEL_3 ASB_CHANNEL_4 ASB_CHANNEL_5 ASB_CHANNEL_6 ASB_CHANNEL_7 ASB_CHANNEL_8 ASB_CHANNEL_9 ASB_CHANNEL_10 relay ASB_CONN_DDD ASB_CONN_VREF0 ASB_CONN_VOUT ASB_CONN_DVI9_CH0 ASB_CONN_SENSE ASB_CONN_INT ASB_CONN_300LOAD ASB_CONN_DUTLOAD ASB_CONN_BYPASS ASB_CONN_VREF1 ASB_CONN_START_STOP ASB_CONN_DVI9_CH1 ASB_CONN_FORCE ASB_CONN_IRANGE ASB_CONN_1KLOAD ASB_CHANNEL_11 ASB_CHANNEL_12 ASB_CHANNEL_13 ASB_CHANNEL_14 ASB_CHANNEL_15 ASB_CHANNEL_16 ASB_CHANNEL_17 ASB_CHANNEL_18 ASB_CHANNEL_19 ASB_CHANNEL_20
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DDD CH1
DVI 9 CH0 F 1 DVI 9 CH1 F NO OVI FORCE 3 OVI SENSE 14 DVI 9 CH0 S 2 DVI 9 CH1 S 4 7 9 13 DUT SENSE NC 11 15 DUT FORCE
12 8 DVI 11 CH0 F DVI 11 CH0 S DVI 11 CH1 F DVI 11 CH1 S TMU START TMU STOP NC NO 6 5 10 + DUT LOAD
Item 1 1-2 3 4 5 6 7 8
Function Connect D VI 9 Force to DUT Connect D VI 9 differential voltmeter Connect measurement system Connect lowleakage measurement system Connect Vref Select TMUstart or stop input Select integration range Connect source to integrating op amp
Notes Force voltages on any channel to 45V / 200mA Connect either a dedicated OVI or D VI 9 to each channel Vref driven by DVI 11 channel 0 or 1 Connect any channel to the TM U Start or Stop input
Item 9 10 11 12 13 14 15
Function Zero integrating op am p Connect op amp output to measurement system Connect DDD Connect load Connect TMU Connect bypass capacitor Disconnect DUT force
Notes
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CHAPTER 5
The DCC Data Converter Card is designed to test two types of converters: analog-to-digital (ADC), and digital-to-analog (DAC) converter. The DCC features a 16-bit measurement system with a 10 s conversion time and three voltage ranges. The 16 data-pin drivers may be used to take measurements on DUT input pins: voltage in (Vin), current in (Iin) and contact.
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Function Calls
init
Description This is the board initialization routine. All relays and analog switches set to default states, all DACs are programmed to zero (0), and all drives are set to tri-state. Format void init(void); Valid Arguments none Usage dcc_12->init();
measure_average
Description This function returns the average of the measured voltage or current as selected by the select_adc_mux function. The voltage range can be set by select_adc_range. The current range can be set by the select_iva_range or select_ivb_range. Format float measure_average(unsigned short samples);
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Valid Arguments samples integer number of samples to be taken and averaged Usage result=dcc_12->measure_average(10);
select_adc_mux
Description This function selects the ADC input for subsequent measurements. Format void select_adc_mux(unsigned short input); Valid Arguments input EXT_ADC_IN1 EXT_ADC_IN2 SERVO_OUT PREC_REF_BUF FILTER_OUT DRIVE_COM_A DRIVE_COM_B DRIVE_COM_C VDAC_OUT1 VDAC_OUT2 IDAC_OUT1 IDAC_OUT2
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Usage dcc_12->select_adc_mux(I_IN_LO);
select_adc_range
Description This function sets the voltage range for ADC voltage measurements. The default mode is autorange. Format void select_adc_range(unsigned short vrange); Valid Arguments vrange (optional, default is autorange)
Usage dcc_12->select_adc_range(VOLT_10_RANGE);
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select_iva_range select_ivb_range
Description This function selects the current measurement range for I/V converters. Format void select_iva_range(unsigned short irange); void select_ivb_range(unsigned short irange); Valid Arguments irange MICRO_1_AMP MICRO_10_AMP MICRO_100_AMP
set_high_level
Description This function sets the calibrated HIGH_REF voltage used by drive_com_a and iv_conva.
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Format void set_high_level(float voltage, char vrange); Valid Arguments voltage -10 V to +20 V reference voltage in decimal or scientific notation
set_low_level
Description This function sets the calibrated LOW_REF voltage used by drive_com_b and iv_convb. Format void set_low_level(float voltage, char vrange); Valid Arguments voltage -10 V to +20 V reference voltage in decimal or scientific notation
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Usage dcc_12->set_low_level(800e-3);
set_prec_ref
Description This function programs a calibrated 12-bit DAC to provide a precision output voltage that is summed with the "fine reference" (see next function) to produce a final output voltage. This output calibration is only valid if the "fine reference" is set to 0 V. Format void set_prec_ref(float voltage); Valid Arguments voltage -10.2 V to +10.2 V reference voltage in decimal or scientific notation Usage dcc_12->set_prec_ref(5.3);
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set_prec_ref_fine
Description This function programs an un-calibrated 12 DAC to provide the fine reference for the final output voltage. Format void set_prec_ref_fine(float voltage); Valid Arguments voltage 0 V to +10.2 mV reference voltage in decimal or scientific notation Usage dcc_12->set_prec_ref_fine(3.2e-3);
set_current_force
Description This function sets the I/V converter to current force mode. The default irange is autorange. Format void set_current_force(float current, char irange);
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Valid Arguments current current value in decimal or scientific notation irange MICRO_100_AMP MILLI_1_AMP MILLI_10_AMP Usage dcc_12->set_current_force(500e-6, MILLI_1_AMP);
set_servo_hi
Description This function sets the servo ramp-up rate. Format void set_servo_hi(unsigned short code); Valid Arguments code HEX or binary DAC code Usage dcc_12->set_servo_hi(256);
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set_servo_lo
Description This function sets the servo ramp-down rate. Format void set_servo_lo(unsigned short code); Valid Arguments code HEX or binary DAC code Usage dcc_12->set_servo_lo(128);
set_servo_ref
Description This function sets the nominal level for the servo. Format void set_servo_ref(unsigned short code); Valid Arguments code HEX or binary DAC code
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Usage dcc_12->set_servo_ref(756);
set_servo_trig
Description This function selects the condition for servo result comparison. Format void select_servo_trig(unsigned short condition); Valid Arguments condition CODE_LESS CODE_GREATER CODE_LESS_LATCHED CODE_GREATER_LATCHED CODE_EQUAL_LATCHED PLUS_5_VOLT
Usage dcc_12->select_servo_trig(CODE_GREATER);
set_servo_code
Description This function loads servo register code bits. For a revision A board, bits 0 through 7 are loaded. For a revision B board, bits 0 through 6 are loaded.
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Format void set_servo_code(unsigned short code); Valid Arguments code HEX or binary, 8 bits (16 bits) Usage
drives_0_7_off
Description This function disconnects all 16 of the DRV lines, opens the switch MODE_DUAL and closes the relay DRIVES_0_7_OFF. Format void drives_0_7_off(void); Valid Arguments none Usage dcc_12->drives_0_7_off();
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close_switch open_switch
Description This function closes/opens the analog switches. Format void close_switch(unsigned short switch); void open_switch(unsigned short switch); Valid Arguments switch CON_SUMM1 CON_SUMM2 DIFF_25MV DIFF_250MV VIN_LO_20V VIN_LO_NEG VIN_HI_20V VIN_HI_NEG POS_COARSE_REF POS_I_REF SW_IV_CON_A SW_IV_CON_B SW_REF_CON_A POS_VIN_HI POS_VIN_LO MODE_DUAL CON_DAMP_GND DAMP_SHORT IVA_RNG_10UA
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IVA_REF_GND IVA_RNG_100UA IVA_REF_CON SW_IF_1MA SW_IF_100UA IVB_REF_EXT SW_IV_CON_C IVB_RNG_10UA IVB_REF_GND IVB_REF_CON SW_IF_10MA SW_REF_CON_B SERVO_CODE_D0 SERVO_CODE_D1 SERVO_CODE_D2 SERVO_CODE_D3 SERVO_CODE_D4 SERVO_CODE_D5 SERVO_CODE_D6 SERVO_CODE_D7 SERVO_MUX_SEL0 SERVO_MUX_SEL1 SERVO_MUX_SEL2 SW_SERVO_REF ZERO_SERVO SERVO_REF_POS SLOW_SERVO RAMP_OUT CONN_C_LO CON_C_HI ADC_IN_20V ADC_IN_5V ADC_MUX_HI CONV_READ CON_SERVO_C
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close_relay open_relay
Description This function closes/opens the stated relays. Format void close_relay(unsigned short relay); void open_relay(unsigned short relay); Valid Arguments relay CON_EXT1 CON_EXT2 CON_EXT_GND CON_FBACK1 DRIVES_0_7_OFF CON_DAMP_POS CON_DAMP_NEG CON_FBACK2 EXT_DRV1 EXT_DRV2 SW_BUS_CON_A SW_BUS_CON_B CON_PREC_REF
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CON_SERVO CON_IN_DATA
clear_relays
Description This function opens all board relays. Format void clear_relays(void); Valid Arguments none Usage dcc_12->clear_relays();
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float zero_error, fs_error, meas_vref_neg, meas_vref_pos; //load DIO pattern loop = 3.5 s load _pattern(1); dcc_12->close_relay(CON_SERVO); //these 6 lines set up servo //conditions dcc_12->open_switch(SERVO_REF_POS); dcc_12->select_servo_trig(CODE_LESS_LATCHED); dcc_12->set_servo_hi(0xffff); dcc_12->set_servo_lo(0xffff); dcc_12->open_switch(MODE_DUAL); dcc_12->close_switch(SW_REF_CON_A);//these 5 lines set up high/low dcc_12->set_high_level(our->vdd); //input pin voltages dcc_12->close_switch(SW_REF_CON_B); dcc_12->set_low_level(0.0); delay(1); //power up dvi_9->set_voltage(DVI_CHANNEL_1, ours->vss, -1 ,SLOW_VOLTAGE_MODE); dvi_9->set_voltage(DVI_CHANNEL_0, ours->vdd); dvi_11->set_voltage(DVI_CHANNEL_1, ours->vref_pos); dvi_13->set_voltage(DVI_CHANNEL_0, ours->vref_neg, -1, SLOW_VOLTAGE_MODE); dcc_12->close_switch(CON_IN_DATA); dcc_12->drive_com_a(PWRDN); //high inputs dcc_12->drive_com_b(0); //low inputs dcc_12->select_adc_mux(SERVO_OUT); dio_7->connect_drivers(); dio_7->run_pattern(); dcc_12->set_servo_code(1); expected_inp_voltage = lsb_value / 2.0; ref_dac_code = expected_inp_voltage * 6553.5; //65535 = 10 V dcc_12->set_servo_ref((unsigned short) ref_dac_code); dcc_12->open_switch(ZERO_SERVO); //start servo delay(10); //initial delay for(code=0; code<255, code++) //tests all codes { dcc_12->set_servo_code(code + 1); expected_inp_voltage = (code * lsb_value) + (lsb_value / 2.0); ref_dac_code =expected_inp_voltage * 6553.5; //65535 = 10 V dcc_12->set_servo_ref((unsigned short) ref_dac_code); delay(1);
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ave_inp_voltage = dcc_12->measure_average(ours->samples); ave_inp_voltage - = meas_vref_neg; code_values[code] = ave_inp_voltage; if(code == 00) prev_value = ave_inp_voltage - lsb_value; dnl_value = ave_inp_voltage - prev_value - lsb_value; if(dnl_value > max_dnl) { max_dnl = dnl_value; max_dnl_code = code } else if(dnl_value < min_dnl) { min_dnl = dnl_value; min_dnl_code = code; } prev_value = ave_inp_voltage; } power_down(); calculate_values(); display_results(); }
Contact
void contact(test_function& func) { //the two lines below must be the first in the function contact_params *ours; ours = (contact_params *)func.params; float cont[3]; unsigned short i; system_init(); dvi_9->set_voltage(DVI_CHANNEL_0, 0.0, VOLT_10_RANGE);//gnd vdd dvi_9->current(DVI_CHANNEL_0, 0.1);//gnd vdd dcc_12->open_switch(MODE_DUAL);//sets up ADC measure on COM A dcc_12->select_adc_mux(DRIVE_COM_A); dcc_12->set_current_force(ours->i_force);//sets up current //force module on COM B
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//Contact Pin 2 dcc_12->drive_com_a(0x1); //connect COM A to Pin 2 (measure) dcc_12->drive_com_b(0x1); //connect COM B to Pin 2 (force current) delay(5); cont[0] = dcc_12->measure(); //measures contact on Pin 2 //Contact Pin 3 dcc_12->drive_com_a(0x2); //connect COM A to Pin 3 (measure) dcc_12->drive_com_b(0x2);//connect COM B to Pin 3 (force current) delay(1); cont[1] = dcc_12->measure(); //measures contact on Pin 3 //Contact Pin 4 dcc_12->drive_com_a(0x4); //connect COM A to Pin 4 (measure) dcc_12->drive_com_b(0x4); //connect COM B to Pin 4 (force current) delay(1); cont[2] = dcc_12->measure(); //measures contact on Pin 4 power_down(); display_results(); }
Input Current
void logic_in(test_function& func) { //the two lines below must be the first two in the function logic_in_params *ours; ours = (contact_params *)func.params; float iinlo[3]; short i; system_init(); //power up dvi_9->set_voltage(DVI_CHANNEL_1, ours->vss); dvi_9->set_voltage(DVI_CHANNEL_0, ours->vdd); dvi_11->set_voltage(DVI_CHANNEL_1, ours->vref_pos); dvi_13->set_voltage(DVI_CHANNEL_0, ours->vref_neg); dcc_12->open_switch(MODE_DUAL); dcc_12->close_switch(SW_REF_CON_A);//connects ref voltage to CON A dcc_12->close_switch(SW_REF_CON_B);//connects ref voltage to CON B dcc_12->close_switch(IVA_REF_CON); dcc_12->close_switch(SW_IV_CON_C);//connects I/V converter to //CON C
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dcc_12->select_adc_mux(I_IN_HI);//connects ADC dcc_12->select_iva_range(MICRO_10_AMP); dcc_12->set_ref_a(ours->vin_lo);//sets low level for input pins dcc_12->set_ref_b(ours->vin_hi);//sets high level for input //pins //Pin *CS dcc_12->drive_com_a(0); //drives off dcc_12->drive_com_b(0); //drives off cc_12->drive_com_a(RD WR PWRDN); //other pins low dcc_12->drive_com_c(XCS); //Pin 13 delay(2); iinlo[0] = dcc_12->measure_average(10);//measures input low //current on /Pin 13 Chip Select //Pin *RD dcc_12->drive_com_a(0); //drives off dcc_12->drive_com_b(0); //drives off dcc_12->drive_com_a(WR PWRDN); //other pins low dcc_12->drive_com_b(XCS); //other pins high dcc_12->drive_com_c(RD); //Pin 8 delay(2); iinlo[i] = dcc_12->measure_average(10); //Pin *RD dcc_12->drive_com_a(0); //drives off dcc_12->drive_com_b(0); //drives off dcc_12->drive_com_b(XCS); //other pins high dcc_12->drive_com_a(RD PWRDN); //other pins low dcc_12->drive_com_c(WR); //Pin 6 delay(2); iinlo[i] = dcc_12->measure_average(10); power_down(); display_results(); }
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Visual ATE Programming Reference Manual February 2002 Copyright 2002 Credence Systems Corporation
CHAPTER 6
The DDD Digital Driver and Detector is a general purpose digital instrument, designed to test a variety of digital and mixed-signal devices. The DDD has eight high-speed drive channels (14 MHz max). This section presents programming information organized in two parts: single-board configuration multi-board configuration Each section is complete with function references, including a description, format, argument code and usage guidelines.
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ddd_disconnect_drivers
Description This routine disconnects and floats all eight channels and stops a running pattern at an indeterminate vector. The function does not set the channel reference voltages to 0 V. Format short ddd_disconnect_drivers(void);
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ddd_set_voltage_ref
Description This function sets the threshold voltage level for the receive comparators. Only one voltage reference can be programmed for all eight channels. When the receive data voltage is greater than the comparator voltage reference, a logic high (1) is strobed into receive memory. The range is from -2 V to +8 V. Format short ddd_set_voltage_ref(float level); Valid Arguments level voltage level in decimal or scientific notation Usage ddd_7->ddd_set_voltage_ref(6.5);
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ddd_set_hi_level
Description This function sets the high level of the drive logic for all eight channels. The range is -5 V to +15 V. There is no check for the ddd_set_hi_level() being programmed lower than the ddd_set_lo_ level() is programmed indeterminate data results if levels are programmed in this way. Format short ddd_set_hi_level(float level); Valid Arguments level voltage level in decimal or scientific notation Usage ddd_7->ddd_set_hi_level(10.0);
ddd_set_lo_level
Description This function sets the low level of the drive logic for all eight channels. The range is -5 V to +5 V. There is no check for ddd_set_lo_ level() being programmed higher than the ddd_set_hi_ level() is programmed indeterminate data results if levels are programmed in this way. Format short ddd_set_lo_level(float level);
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Valid Arguments level voltage value in decimal or scientific notation Usage ddd_7->ddd_set_lo_level(0.8);
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ddd_set_clock_period
Description This function sets the clock period for the generated patterns. The period limits are 3.125 s to 71.4287 ns. This function is the inverse of ddd_set_clock_freq. Format short ddd_set_clock_period(float period); Valid Arguments period 3.12 s to 71.4287 ns in decimal or scientific notation Usage ddd_7->ddd_set_clock_period(125e-9); //125 ns
ddd_set_no_delay
Description This function sets a zero delay on all eight channels. Timing Generator 2 (TG2) is ignored. Format short ddd_set_no_delay( void);
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ddd_set_delay
Description This function sets the delay from the beginning of the vector on the selected channel edges. The leading edge is set by Timing Generator 1 (TG1), and the trailing edge is set by Timing Generator 2 (TG2). If one or more channels are programmed with delay, then all channels must be programmed with set_delay(), in ascending order: setting a delay on Channel 8 loads the delay information. If 1s and 0s are used in the pattern, then the trailing edge (TG2) setting is ignored for that channel. However, the trailing edge should always be programmed at least 5 ns after the leading edge to satisfy statement syntax. This command is also used to define when TG1 clocks data into receive memory on the stated channel. Format short ddd_set_delay(short channel, float lead, float trail); Valid Arguments channel 1 to 8
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lead leading edge delay in decimal or scientific notation (must be within vector period) trail trailing edge delay (lead edge + 5 ns) in decimal or scientific notation (must be within vector period) Usage ddd_7->ddd_set_delay(1, 15e-9, 50e-9);
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pattern a character string representing all eight channels in descending order from Channel 8 to Channel 1 (left to right, within double quotes), composed of the following possible characters: X- driver connect switch open, receive connect switch closed 1- drive high at TG1, TG2 is ignored 0- drive low at TG1, TG2 is ignored T- drive high at TG1, return low at TG2 Z- drive low at TG1, return high at TG2 Usage ddd_7->ddd_load_pattern(1, XXXX0101);
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stop_address start_address + 2 pattern1 composed the same way as ddd_load_pattern (non-loop mode) on the previous page; associated with start_address pattern2 composed the same way as ddd_load_pattern (non-loop mode); associated with start_address + 1 Usage ddd_7->ddd_load_pattern(0, 25, XXXX0101, XXXX1010);
ddd_end_pattern
Description This function forces a continuously looping pattern to jump to vector address 0 after completing the execution of the number of vectors stated. This must be set before a looping pattern is burst. Format short ddd_end_pattern(unsigned short vector count); Valid Arguments vector count 0 to 32767
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Usage ddd_7->ddd_end_pattern(25);
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is used, all 32K of pattern memory is executed and address control is returned to vector address 0. Format short ddd_run_pattern(); Valid Arguments none Usage ddd_7->ddd_run_pattern();
ddd_stop_pattern
Description This function stops the execution of a continuously looping pattern. Address control is returned to vector 0, and the channel levels are held at the vector 0 state. Format short ddd_stop_pattern(); Valid Arguments none Usage ddd_7->ddd_stop_pattern();
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ddd_read_pattern
Description This function reads the comparator results for the specified address from the receive memory. The return value contains the states of all eight channels and is in Hex format (a 2-digit number where each digit represents 4 channel). This function does not account for the 2-cycle pipeline. This command would be used to determine which channels fail. Format short ddd_read_pattern(short address); Valid Arguments address 0 to 32767 Usage ddd_7->ddd_read_pattern(5);
ddd_compare_pattern
Description This function reads the logical vector from receive memory and compares it with the provided pattern. The command returns a TRUE (1) if the input matches the provided pattern, or a FALSE (0) if there is no match. With this command, two dummy vectors must be executed after the last vector. The dummy vectors account for the 2-cycle pipeline. This command would be used to determine which vector(s) fail.
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Format short ddd_compare_pattern(char *pattern, unsigned short vector number); Valid Arguments pattern a character string representing all eight channels in descending order from Channel 8 to Channel 1 (left to right, within double quotes) composed of the following possible characters: X- dont care 1- detect high 0- detect low vector number 0 to 32765 Usage ddd_7->ddd_compare_pattern(1010XXXX, 25);
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Valid Arguments high_level voltage level in decimal or scientific notation Usage ddd_7->ddd_set_hi_level(10.0); //7 = Master; Slave = 10, 15 or 17
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Format short ddd_set_clock_period(float period); Valid Arguments period 71.4287 ns to 3.125 s in decimal or scientific notation Usage ddd_7->ddd_set_clock_period(125e-9); //125 ns
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Format short ddd_set_delay(short channel, float lead, float trail); Valid Arguments channel 1 to 8 lead leading edge delay in decimal or scientific notation (must be within vector period) trail trailing edge delay (leading edge + 5 ns) in decimal or scientific notation (must be within vector period) Usage ddd_7->ddd_set_delay(1, 15e-9, 72e-9); //7 = Master; Slave = 10, 15 or 17
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Valid Arguments address 0 to 32767 pattern a character string representing all eight channels in descending order from Channel 8 to Channel 1 (left to right, within double quotes), composed of the following possible characters: X- driver connect switch open, comparator connec switch closed 1- drive high at TG2 is ignored 0- drive low at TG1, TG2 is ignored T- drive high at TG1, drive lo at TG2 Z- drive low at TG1, drive hi at TG2 Usage ddd_7->ddd_load_pattern(1, XXXX0101);//7 = Master; Slave = 10, 15 or 17
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Format short ddd_load_pattern(unsigned short start_address, unsigned short stop_address, char *pattern1, char *pattern2); Valid Arguments start_address 0 to 32764 stop_address start address + 2 pattern1 composed the same way as ddd_load_pattern (non-loop mode) on the previous page; associated with start_address pattern2 composed the same way as ddd_load_pattern (non-loop mode) on the previous page; associated with start_address + 1 Usage ddd_7->ddd_load_pattern(0, 25, XXXX0101, XXXX1010);
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Format short ddd_end_pattern(unsigned short number_of_vectors); Valid Arguments number_of_vectors 0 to 32767 Usage ddd_7->ddd_end_pattern(25); //7 = Master; Slave = 10, 15 or 17
ddd_set_slave_pattern Slave
Description This function initializes the board before running the pattern. The board must be set before each pattern run. Format short ddd_set_slave_pattern(void); Valid Arguments none Usage ddd_7->ddd_set_slave_pattern(void); //Slave = 10, 15 or 17
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ddd_set_master_pattern Master
Description This routine initializes the board before running the pattern. Slave boards must be set before the master board is set. Format short ddd_set_master_pattern(void); Valid Arguments none Usage ddd_7->ddd_set_master_pattern(void);
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0 to 32765 stop_address (start_address + 3) to 32767 Usage ddd_15->ddd_run_slave_pattern(2, 10); //Begins polling for master board //Slave = 10, 15 or 17
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Format short ddd_compare_pattern(char *pattern, unsigned short address); Valid Arguments pattern a character string representing all 8 channels in descending order from Channel 8 to Channel 1, comprised of the following possible characters: X- dont care 1- expect high 0- expect low address 0 to 32765 Usage ddd_7->ddd_compare_pattern(1010XXXX, 25);//7 = Master; Slave = 10, 15 or 17
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V1 CH1
V2
V3
V4
100 ns
100 ns
100 ns
100 ns
CH2
TG1
TG1
TG1
TG1
In using no delays, the vector data will change states on TG1 for both channels. In this case, the change occurs at 100 ns. In this example, the TG1 markers are for Channel 2 (CH2) only. Timing Generator 2 (TG2) is ignored.
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V1 CH1
V2
V3
V4
100 ns
100 ns
100 ns
100 ns
CH2
TG1
TG2
TG1
TG2
TG1
TG2
TG1
TG2
The action of Z vector data depends on the preceding vector, with Z data going low on TG1 and returning high (RT1) on TG2. In this example, the TG1 and TG2 markers are shown for CH2 only. In the first vector, CH2 is set high (1). Because TG2 is ignored with the use of 1- and 0-data, CH2 remains high into the second vector, where it is set low (0) at TG1. At TG2, the return-to-one action occurs and CH2 is set high. At TG1 in
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the third vector, CH2 is set low. Again, because TG2 is ignored with the use of 1- and 0-data, CH2 remains low into the fourth vector. At TG1 in the fourth vector, the Z data sets CH2 low. Already low, CH2 remains low until TG2, where it is set high.
V1 CH1
V2
V3
V4
100 ns
100 ns
100 ns
100 ns
The action of T vector data depends on the preceding vector, with T data going high on TG1 and returning low (RT0) on TG2. In this example, the TG1 and TG2 markers are for CH2 only.
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In the first vector, CH2 is set high. Since TG2 is ignored with the use of 1- and 0-data, CH2 remains high into the second vector. At TG1 in the second vector, the T data sets CH2 high. Already high, CH2 remains high until TG2, where it is set low. At TG1 in the third vector, CH2 is set low. Again, because TG2 is ignored with the use of 1- and 0-data, CH2 remains low into the fourth vector, where it is set high at TG1. At TG2, the return-to-zero action occurs, and CH2 is set low.
V1 CH1
V2
V3
V4
100 ns
100 ns
100 ns
100 ns
CH2
TG1
TG2
TG1
TG2
TG1
TG2
TG1
TG2
In this example, the TG1 and TG2 markers are shown for CH2 only.
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The action of Z data at TG1 in the first vector depends on the preceding vector. If CH2 is low coming into the first vector, it remains low at TG1. If CH2 is high coming into the first vector, it is set low at TG1. In either case, CH2 is set high through the first vector at TG2. With T data in the second vector, CH2 remains high at TG1. At TG2, the return-to-zero action occurs, and CH2 is set low. CH2 remains low through the second vector and into the third. At TG2 in the third vector, CH2 is set high because of Z data. CH2 remains high through the third vector and into the fourth because of T data. At TG2 in the fourth vector, CH2 is set low.
V1 CH1
V2
V3
V4
100 ns
100 ns
100 ns
100 ns
CH2
TG1
TG2
TG1
TG2
TG1
TG2
TG1
TG2
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In this example, the TG1 and TG2 markers are shown for CH2 only. The action of Z data at TG1 in the first vector depends on the preceding vector. If CH2 is low entering the first vector, it remains low at TG1. If CH2 is high entering the first vector, it is set low at TG1. Either way, CH2 is set high through the first vector at TG2. With Z data in the second vector, CH2 remains high until TG1, when it is set low. At TG2, the return-to-one action occurs; CH2 is set high, and remains high through the second vector and into the third. At TG1, CH2 is again set low because of Z data. At TG2, CH2 is set high. This action repeats through the third and fourth vectors. Using Z data in every vector can create a DUT clock at greater than 10 MHz. In this case, the format is the inverse of the following T-format example.
100 ns
100 ns
100 ns
100 ns
CH2
TG1
TG2
TG1
TG2
TG1
TG2
TG1
TG2
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In this example, the TG1 and TG2 markers are shown for CH2 only. The action of T data at TG1 in the first vector depends on the preceding vector. If CH2 is low coming into the first vector, it is set high at TG1. If CH2 is high coming into the first vector, it remains high at TG1. In either case, CH2 is set low through the first vector at TG2. With T data in the second vector, CH2 remains low until TG1, when it is set high. At TG2, the return-to-zero action occurs; CH2 is set low. CH2 remains low through the second vector and into the third. At TG1, CH2 is again set high because of T data. At TG2, CH2 is set low. This action repeats through the third and fourth vectors. Using T data in every vector will create a DUT clock at greater than 10 MHz. In this case, this format is the inverse of the Z-format example on the previous page.
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CHAPTER 7
The DOAL Dual Op Amp Loop is an application specific instrument designed to test operational amplifiers and comparators.
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Opamp Loop
The DOAL circuitry allows you to program the desired DUT output voltage. The opamp loop then provides the required stimulus to the inverting input of the DUT until the output reaches the programmed value. The DOAL instrument has two loops. In general, the loops are independent of each other, and each channel has its own unique commands. However, there are a few common components, such as the output DAC and the measurement ADC. For simplicity, this section focuses on CH0 only. CH1 operates in the same way, and is referenced throughout the function calls as shown in section "Function Calls." A DOAL opamp loop typically starts with the DUT output, which is sent to a high-voltage buffer through the HV_BUF_CONN relay. The buffer is connected to a summing amplifier through a 100 k resistor. The summing amp is also connected (through another 100 k resistor) to a 12-bit DAC, generally referred to as the output DAC. Initiate loop action by issuing the set_output_voltage command. The summing amp detects the difference between the DUT output and the output DAC, and generates an error signal. The error signal is then applied to a compensation circuit that consists of two 12-bit DACs in parallel. These parallel DACs are called the int DAC and the gain DAC. The int DAC is responsible for setting the pole for the compensation. The gain DAC sets the zero. You program these DACs with the set_int_dac_ch0 and set_gain_dac_ch0. To continue the loop, the compensation network is then fed back to the inverting input terminal of the DUT. The compensation passes through a buffer first, and then through either the CLOSE_LOOP or CLS_LOOP_IV relays, and finally through the DUT_NEG_ISOL relay.
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To complete the loop, the non-inverting input of the DUT is held at ground potential by closing a combination of two relays: the DUT_POS_ISOL relay, and either the MLG_CON_POS or the LLG_CON_POS relay. The DOAL also provides DUT output loading through a series of resistors in varying sizes, which you select as desired. The load can be ground referenced, or you can apply a bias.
Most switches and relays are also grouped together so that a single command performs an open or close on both channels (CH0 and CH1). The switches and relays that are not grouped (that is, independent) must be programmed separately. These relays and switches are listed below:
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Channel Action
CH0 and CH1 share the same output DAC and use the single measurement ADC. Therefore, to test dual opamps measurements must be taken sequentially. For example, to measure the output of the IA amp for both channels, follow these steps: 1. 2. 3. 4. Close the IA_AMP mux switch Take the measurement Close the CH1_IA_AMP mux switch Measure again
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Voltage Measurement
The IA has four programmable gain ranges, set by three switches as shown below:
If all three switches are open the IA defaults to the 100 A range, resulting in an amplifier gain of 100,000. The IA can be nulled; the IA offset DAC (or null DAC) provides a means of programming the IA reference pin with a bipolar signal. Programming a bipolar signal on the pin increases measurement accuracy by nulling out errors in the measurement circuit itself. The IA_OFF_POL switch sets the null DAC polarity. The amount of attenuation at the null DAC output is also programmable. The IA_OFF_100_MV switch programs the attenuation.
Current Measurement
The DOAL has two types of I-V converters: medium leakage (MLG) and low leakage (LLG). Each converter is labeled according to its range capacity. Each converter also has a gain-setting relay associated with it, which increases the range capability. The I-V converters are specified as follows:
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An I-V converter is associated with each of the inverting and non-inverting inputs to the DUT. The MLG associated with the inverting terminal is called MLG_POS; the LLG converters are set up the same way. The I-V converter associated with the non-inverting input is referenced to ground and keeps the non-inverting input of the DUT at ground potential through its opamp action. The NEG converter is referenced to the feedback path of the opamp loop, and actually becomes part of the loop itself through its opamp action. This reference point is diode clamped; using the NEG converter as a stand-alone IV converter yields valid results only for signals that are less than 100 mV from ground. The voltage generated by the I-V converters is passed on to the ADC Mux.
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Visual ATE Programming Reference Manual February 2002 Copyright 2002 Credence Systems Corporation
Function Calls
Note: Board pointers are limited to three letters, so the DOAL board pointer is actually "oal."
init
Description This is the board initialization routine. These relays will be closed after an init: LOAD_REF_GND HV_BUF_CONN CONNECT_LOADS These analog switches will be closed after an init: INT_CONN INT_RESET 1A_100MV
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set_ia_offset_dac ch1_ia_offset_dac
Description These functions program the instrumentation amplifier (IA) offset DACs. These commands are used to null the IA to improve accuracy for ranges lower than 100 mV. DAC addressing is left justified so that full scale is 65535 and zero scale is 0 to 15. Depending on the status of the IA_OFF_POL and CH1_OFF_POL switches, output is either a positive voltage (switches off) or a negative voltage (switches on). Format void set_ia_offset_dac(unsigned short value); void ch1_ia_offset_dac(unsigned short value); Valid Arguments value integer number from 0 to 65535 (0 to 15 are zero scale; there is no action) Usage oal_8->set_ia_offset_dac(32768); oal_8->ch1_ia_offset_dac(32768);
set_output_dac
Description This function programs the output DAC to the stated voltage (value). DAC addressing is left justified so that full scale is 65535 and zero scale is 0 to 15.
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The status of the OUT_POL switch determines the output. Output is a positive voltage when the switch is off, and a negative voltage when the switch is on. Format void set_output_dac(unsigned short value); Valid Arguments value integer number from 0 to 65535 (0 to 15 are zero scale; there is no action) Usage oal_8->set_output_dac(32768);
set_output_voltage
Description This function programs the opamp loop so that the programmed voltage appears at the DUT output. If the loop is properly closed, the DOAL circuitry attempts to deliver the necessary voltage to the inverting input of the DUT. The programmed voltage then appears at the DUT output. The default value for range is autorange. Format void set_output_voltage(float value, char range = -1);
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Valid Arguments value output voltage value in decimal or scientific notation range OUT_RNG_X4
Usage oal_8->set_output_voltage(1.0);
dac_output_voltage
Description This function programs the output DAC to the specified voltage. The voltage must be within the range of 0 V to +10 V. Format void dac_output_voltage(float value); Valid Arguments value output voltage value in decimal or scientific notation (0 V to +10 V) Usage oal_8->dac_output_voltage(1.0);
set_gain_dac_ch0
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set_gain_dac_ch1
Description These functions program the DACs that are used to set the zero value that stabilizes the opamp loop on a per-channel basis. DAC addressing is left justified; full scale is 65535 and zero scale is 0 to 15. Format void set_gain_dac_ch0(unsigned short value); void set_gain_dac_ch1(unsigned short value); Valid Arguments value integer number from 0 to 65535 (0 to 15 are zero scale; there is no action) Usage oal_8->set_gain_dac_ch0(500); oal_8->set_gain_dac_ch1(500);
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set_int_dac_ch0 set_int_dac_ch1
Description These functions program the DACs that are used to set the pole value that stabilizes the opamp loop on a per-channel basis. DAC addressing is left justified; full scale is 65535 and zero scale is 0 to 15. Format void set_int_dac_ch0(unsigned short value); void set_int_dac_ch1(unsigned short value); Valid Arguments value integer number from 0 to 65535 (0 to 15 are zero scale; there is no action) Usage oal_8->set_int_dac_ch0(3000); oal_8->set_int_dac_ch1(3000);
convert_read_adc
Description This function issues a read strobe to the measurement system ADC. The result is a left-justified 12-bit decimal value (16-bit bus) that you convert to a voltage or current.
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Format unsigned short convert_read_adc( void); Valid Arguments none Usage result=oal_8->convert_read_adc
select_adc_mux
Description This function sets the source of the signal that presents to the measurement system ADC. Format void select_adc_mux(unsigned short function); Valid Arguments function IA_AMP(ADC mux ch0 values) HV_BUF LLG_POS LLG_NEG MLG_POS MLG_NEG EXT_PICO_POS EXT_PICO_NEG
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CH1_IA_AMP (ADC mux ch1 values) CH1_HV_BUF CH1_LLG_POS CH1_LLG_NEG CH1_MLG_POS CH1_MLG_NEG CH1_EXT_PICO_POS CH1_EXT_PICO_NEG
Usage oal_8->select_adc_mux(MLG_NEG);
measure_average
Description This function performs a specified number of measurements on the highvoltage buffer. The voltage detected by the ADC is actually divided down by 4. The division is accounted for in the returned value. Format float measure_average(unsigned short samples); Valid Arguments samples Usage result=oal_8->measure_average(10)
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close_relay open_relay
Description These functions set the status of the specified relays. Format void close_relay(unsigned short relay); void open_relay(unsigned short relay); Valid Arguments relay LOAD_SHORT DUT_INP_SHORT OUT_TO_RMS SHORT_FEEDBACK_RES FEEDBACK_TO_OUT DUT_POS_ISOL DUT_NEG_ISOL DUT_POS_OUT DUT_NEG_OUT DUT_OUT_JMPRS DUT_OUT_OUT POS_IN_JMPRS LOAD_600 LOAD_1K LOAD_2K LOAD_4K7 LOAD_10K LOAD_100K
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CONNECT_LOADS LOAD_REF_EXT LOAD_REF_GND EXT_RLY_DRV EXT_LOAD_CONN HV_BUF_CONN SPARE_BIT CH1_EXT_DRV CH1_IN_JMPRS CH1_NEG_OUT CH1_POS_OUT CH1_OUT_JMPRS CH1_RMS_METER CH1_OUT_OUT
Usage oal_8->close_relay(DUT_POS_OUT);
clear_relays
Description This function resets all relays to the open state. Format void clear_relays(void); Valid Arguments none
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Usage oal_8->clear_relays();
close_switch open_switch
Description These functions set the status of the stated switches. Format void close_switch(unsigned short switch); void open_switch(unsigned short switch); Valid Arguments switch DAC_OUT CLOSE_LOOP CLS_LOOP_IV LLG_CON_POS LLG_CON_NEG MLG_CON_POS MLG_CON_NEG IA_OFF_100_MV POS_LKG_X10 NEG_LKG_X10 IA_POS_IN IA_NEG_IN IA_1MV//Sets IA gain = 10000 IA_10MV//Sets IA gain = 1000 IA_100MV//Sets IA gain = 100
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INT_CONN INT_RESET INT_SLOW OUT_POL IA_OFF_POL CH1_OFF_POL OUT_RNG_X4 BUS_2_MEAS BUS_8_MEAS ADC_ENABLE STROBE MOD_CON_10 DC_GAIN CH0_MEAS CH1_MEAS DRV_1* DRV_2 SWITCH_NULL_14 * On systems equipped with an LCB, this switch connects to the input of the measurement I-V converter and is programmed with reverse polarity: open_switch(DRV-1) closes the connection. EE_WP
EE_CLK EE_DATA
clear_switches
Description This function resets all switches to the open state.
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DAC_OUT EXT_LOAD_CONN INT_CONN TP16 MLG_POS_CH1 TO ADC MUX LLG_POS_CH1 INT_RESET SUM AMP OUT_POL TP4 100K BUFFER 100K FEEDBACK_TO_OUT 75K 100K HV_BUF TO ADC MUX TP11 25K LLG_NEG TO ADC MUX CONNECT_LOADS LLG_CON_NEG TP14 CLOSE_LOOP DUT_NEG_IN 10K SHORT_FEEDBACK_RES IA_AMP TO ADC MUX CLS_LOOP_IV IA_1MV IA_10MV IA_100MV INST AMP SET_GAIN_DAC
POS_LKG_X10
MLG_CON_POS
**
BUS_x
**
RMS_METER OUT_TO_RMS TP13 POS INPUT I/V CONVERTERS DUT_OUT_2 DUT_POS_ISOL CH1_POS_IN CH1_IN_JMPRS
BUS_9 MOD_CON_9
IA_POS_IN
CH1_POS_OUT CH1_POS_OUT
HV_BUF_CONN
**
BUS_10 MOD_CON_10
DUT_IN_SHORT IA_NEG_IN
DUT_OUT
MLG_NEG
TP8 NEG_LKG_X10
*
DUT_OUT_OUT DUT_OUT_OUT LOAD_SHORT
MLG_CON_NEG DUT_NEG_ISOL
DUT_NEG_OUT CH1_NEG_OUT DUT_NEG_OUT 1k 90K CH1_IA_OFF_DAC IA_NEG_IN DUT_IN_SHORT DUT_NEG_IN INST AMP DUT_POS_OUT IA_POS_IN DUT_POS_OUT IA_OFF_100_MV CH1_OFF_POL 10K SHORT_FEEDBACK_RES 10K 1K DUT_NEG_ISOL CH1_NEG_OUT
NEG INPUT I/V CONVERTERS 600 LEGEND: RELAY ANALOG SWITCH 1K LOAD_1K IA_AMP TO ADC MUX LOAD_600 TP9 IA_1MV IA_10MV IA_100MV
**
2K IA_AMP_CH0 TP12 LLG_POS_CH0 MLG_POS_CH0 TP2 ADC ADC MUX CH0 LLG_NEG_CH0 MLG_NEG_CH0 CH0_PICO_POS CH0_PICO_NEG *CONVERT HV_BUF_CH0 1M 10K 4.7K
LOAD_2K
LOAD_10K LOAD_100K
FEEDBACK_TO_OUT
100K
CH1_OUT_2 IA_OFF_100_MV IA_OFF_POL LLG_POS LLG_CON_POS TO ADC MUX EXT_LOAD_CONN MLG_POS MLG_CON_POS TP6 POS INPUT I/V CONVERTERS BUS_8 EXT_LOAD_CONN TO ADC MUX LLG_NEG TP5 CLS_LOOP_IV EXT_REF DAC_OUT OUT_RNG_X4 CLOSE_LOOP LLG_CON_NEG TP7 POS_IN_JMPRS POS_LKG_X10 NEG_LKG_X10 CH1_RMS_MTR TP15 WIRE LINK MLG_NEG MLG_CON_NEG CH1_OUT_JMPRS WIRE_LINKS CH1_RMS_MTR
LOAD_REF_GND
*
LOAD_REF_EXT EXT_LOAD_CONN LOAD_SHORT CH1_LOAD_CONN
IA_AMP_CH1 LLG_POS_CH1 MLG_POS_CH1 MUX OUT LLG_NEG_CH1 ADC MUX CH1 600 MLG_NEG_CH1 CH1_PICO_POS CH1_PICO_NEG 2K HV_BUF_CH1 4.7K 10K LOAD_4K7 LOAD_2K 1K LOAD_1K LOAD_600
SET_INT_DAC
INT_CON
**
TP10
BUFFER
OUT_SET_DAC
25K
**
TP1
BUS_9 MOD_CON_9 100K BUS_10 MOD_CON_10 LOAD_10K LOAD_100K BUFFER 1M 75K SET_GAIN_DAC
* **
CH1_DUT_OUT
TP3 100K
CONNECT_LOADS CH1_OUT_OUT
HV_BUF_CONN 25K
CH1_OUT_OUT
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BUFFER DAC_OUT CLS_LOOP_IV CLOSE_LOOP 12-BIT SET_INT_DAC POLE 25 K TP8 INT_RESET TO ADC MUX MLG_NEG NEG_LKG_X10 TP11 TO ADC MUX LLG_NEG LLG LLG_CON_NEG INT_SLOW MLG MLG_CON_NEG SUM AMP 100 K 100 K MOD_CON_10 OUT_RNG_X4 OUT_POL
INT_CONN
TP4
75 K DC_GAIN 25 K 1K SHORT_FEEDBACK_RES DUT_NEG_ISOL DUT_NEG_OUT IA_NEG_IN TP9 TO ADC MUX 12-BIT IA_OFFSET_DAC IA_POS_IN IA_OFF_POL IA_OFF_100_MV LOAD_SHORT IA_AMP 90 K 10 K DUT_POS_OUT DUT_POS_IN CONNECT_LOADS IA IA_100MV IA_10MV IA_1MV DUT_NEG_IN DUT_INP_SHORT 10 K FEEDBACK_TO_OUT HV_BUF_CONN
DUT CH0
DUT_OUT_2
DUT_NEG_OUT
DUT_OUT
LOAD_REF_GND
LOAD_600 DUT_POS_OUT LOAD_1K TP6 TO ADC MUX MLG_POS LOAD_4K7 POS_LKG_X10 TP7 TO ADC MUX LLG_POS LLG LLG_CON_POS RELAY LOAD_100K ANALOG SWITCH MLG MLG_CON_POS DUT_POS_ISOL LOAD_2K
600 K
1K LOAD_REF_EXT 2K
EXT_REF
4.7 K
LOAD_10K
10 K
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BUFFER
CLS_LOOP_IV
CLOSE_LOOP
INT_CONN TP15
75 K SET_OUTPUT_DAC
INT_RESET TO ADC MUX CH1_MLG_NEG NEG_LKG_X10 TP5 TO ADC MUX CH1_LLG_NEG LLG LLG_CON_NEG INT_SLOW MLG MLG_CON_NEG
TP3
75 K
25 K 1K SHORT_FEEDBACK_RES DUT_NEG_ISOL CH1_NEG_OUT IA_NEG_IN TP14 TO ADC MUX CH1_IA_AMP 12-BIT 90 K IA_OFFSET_DAC IA_POS_IN CH1_OFF_POL IA_OFF_100_MV LOAD_SHORT LOAD_REF_GND 10 K CH1_POS_OUT CONNECT_LOADS IA IA_100MV IA_10MV IA_1MV CH1_NEG_IN DUT_INP_SHORT CH1_POS_IN CH1_OUT_OUT CH1_OUT_OUT CH1_RMS_METER 10 K FEEDBACK_TO_OUT HV_BUF_CONN
DUT CH1
CH1_OUT_2 CH1_DUT_OUT
CH1_NEG_OUT
LOAD_600 CH1_POS_OUT LOAD_1K TP16 TO ADC MUX CH1_MLG_POS LOAD_4K7 POS_LKG_X10 TP13 TO ADC MUX CH1_LLG_POS LLG LLG_CON_POS RELAY LOAD_100K ANALOG SWITCH MLG MLG_CON_POS DUT_POS_ISOL LOAD_2K
600 K 1K LOAD_REF_EXT 2K
EXT_REF
4.7 K 10 K
LOAD_10K
Programming Examples
Testing VOS on a Dual Opamp
void Input_Offset_Volts(test_function& func) {
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// The two lines below must be the first two in the function. Input_Offset_Volts_params *ours; ours = (Input_Offset_Volts_params *)func.params; short i, tests, samples = 10; unsigned long temp; long adc_val[4]; float vos_a, vos_b; // Initialize cards system_init(); // located in user.cpp // Set up load at DUT outputs oal_8->close_relay(LOAD_REF_GND); oal_8->close_relay(LOAD_2K); oal_8->set_output_voltage(ours->output);// set DUT output voltage // Set up for 10 mV measure range oal_8->open_switch(IA_100MV);// 100 mV switch is closed after init oal_8->close_switch(IA_10MV); // Do cal with inputs shorted oal_8->close_relay(DUT_POS_ISOL); oal_8->close_relay(DUT_NEG_ISOL); oal_8->close_relay(DUT_INP_SHORT); oal_8->close_switch(IA_POS_IN); oal_8->close_switch(IA_NEG_IN); //Power up DUT dvi_9->set_voltage(DVI_CHANNEL_0, ours->v_plus); dvi_9->set_voltage(DVI_CHANNEL_1, ours->v_minus); oal_8->close_switch(CLOSE_LOOP); // Set up pole and zero in compensation network oal_8->set_int_dac_ch0(ours->pole_dac); oal_8->set_gain_dac_ch0(ours->zero_dac); oal_8->set_int_dac_ch1(ours->pole_dac); oal_8->set_gain_dac_ch1(ours->zero_dac); // Activate compensation oal_8->open_switch(INT_RESET); // Set up measurement oal_8->select_adc_mux(IA_AMP); // CH0 to ADC
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// Null Instrumentation amp (ia) delay(2); ia_dly = 1; ia_null(0); // ia null located in User.cpp // Measure ia amp after null temp = 0L; for(i=0; i<samples; i++) { temp += oal_8->convert_read_adc(); } adc_val[0] = temp / samples; // Remove short at inputs oal_8->open_switch(DUT_INPUT_SHORT); // Measure VOS delay(ours->meas_dly); temp = 0L; for(i=0; i<samples; i++) { temp += oal_8->convert_read_adc(); } adc_val[1] = temp / samples; // Set up CH1 oal_8->close_relay(DUT_INP_SHORT); // Set up measurement oal_8->select_adc_mux(CH1_IA_AMP); // Ch1 to ADC // Null Instrumentation amp (ia) delay(2); ia_dly = 1; ia_null(1); // ia null located in User.cpp // Measure ia amp after null temp = 0L; for(i=0; i<samples; i++) { temp += oal_8->convert_read_adc(); } adc_val[2] = temp / samples;
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// Remove short at inputs oal_8->open_switch(DUT_INPUT_SHORT); // Measure vos delay(ours->meas_dly); temp = 0L; for(i=0; i<samples; i++) { temp += oal_8->convert_read_adc(); } adc_val[3] = temp / samples; // power down power_down(); // Evaluate results by converting ADC output to a voltage. // The ADC input range is 10 V. An input voltage of 0.0 V results in // an output code of 32768. The 10 mV range for the IA amp = gain of // 1000. This presents 10 V to the ADC input. Therefore, to convert // the ADC reading to the proper range, the ADC reading is divided by // 32768.0 (number of codes per half-scale range). // The result is then multiplied by 10 (ADC full-scale range), then // divided by 1000 (IA amp gain) to obtain the actual voltage at / //the DUT. // Example: If the IA amp was nulled perfectly, and the null // voltage was zero (0 V), //the first ADC reading would be 32768 (adc_val[0] = 32768). //Now suppose the second reading was 36768 (adc_val[1] = 36768). //The difference between these readings is 4000. Dividing this //number by 32768, then multiplying by 10 then dividing by 1000 //results in a VOS value of 1.2207 mV. Dividing by 3276800.0 gives //the same result, as shown in the following lines. vos_a = (adc_val[1] - adc_val[0]) / 3276800.0; func.dlog->set_test_no(1); func.dlog->power = POWER_MILLI; func.dlog->test_val(vos_a); if(func.dlog->tests[func.dlog->current_test].passed_fail == FAILED_TEST) func.dlog->set_bin(5); if(func.dlog->tests[func.dlog->current_test].display_results) func.dlog->display_results(); vos_b = (adc_val[3] - adc_val[2]) / 3276800.0;
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delay(ours->meas_dly); temp_val[0] = temp_val[1] = temp_val[2] = temp_val[3] = 0L; oal_8->select_adc_mux(MLG_POS); wait.delay_10_us(4); // measure MLG for (i=0; i<samples; i++) { temp_val[0] += oal_8->convert_read_adc(); } oal_8->select_adc_mux(CH1_MLG_POS); wait.delay_10_us(4); for (i=0; i<samples; i++) { temp_val[1] += oal_8->convert_read_adc(); } oal_8->select_adc_mux(MLG_NEG); wait.delay_10_us(4); for (i=0; i<samples; i++) { temp_val[2] += oal_8->convert_read_adc(); oal_8->select_adc_mux(CH1_MLG_NEG); wait.delay_10_us(4); for (i=0; i<samples; i++) { temp_val[3] += oal_8->convert_read_adc(); } adc_val[0] adc_val[1] adc_val[2] adc_val[3] = = = = temp_val[0] temp_val[1] temp_val[2] temp_val[3] / / / / samples; samples; samples; samples;
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power_down(); //corr_limit = 0.0; // calculate and datalog ib values func.dlog->power = POWER_NANO; ib_pos = (short) adc_val[0]; ib_pos *= -(1.0e-6 / 32768.0); // value in A (1 A range) do_dlog(func, 0, ib_pos, ours->fbin_ib); ib_neg = (short) adc_val[1]; ib_neg *= -(1.0e-6 / 32768.0); // value in A (1 A range) do_dlog(func, 2, ib_neg, ours->fbin_ib); // calculate Ib Avg //corr_limit = 15e-9; do_dlog(func, 4, ((ib_pos + ib_neg)/2), ours->fbin_ib); do_dlog(func, 5, ((ib_pos[1] + ib_neg[1])/2), ours->fbin_ib); // calculate Ios //corr_limit = 3e-9; do_dlog(func, 6, (ib_pos[0] - ib_neg[0]), ours->fbin_ib); do_dlog(func, 7, (ib_pos[1] - ib_neg[1]), ours->fbin_ib); // calculate and datalog Vicr values func.dlog->power = POWER_MICRO; for(i = 0; i < 2; i++) { ib_pos[i] = (short) adc_val[i][1]; ib_pos[i] *= (10.0e-6 / 32768.0); range) if (ib_pos[i] > 9.9e-6) ib_pos[i] = 999.9999; if (ib_pos[i] < -9.9e-6) ib_pos[i] = -999.9999; }
// value in A (10 A
//corr_limit = 10e-6; do_dlog(func, 8, max(fabs(ib_neg[0]), ib_pos[0]), ours>fbin_vicr); do_dlog(func, 9, max(fabs(ib_neg[1]), ib_pos[1]), ours>fbin_vicr); }
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CHAPTER 8
The DVI Dual Voltage/Current Source is a dual channel voltage/current, source. Each channel can be independently programmed, or two channels can be used together for differential measurements. The two current version available are: 300 mA and 2000 mA (DVI-2k) Forcing resolution is 12 bits, while measurement resolution is 16 bits. There are three versions of DVI in the field: 200 mA, 300 mA (discontinued), and 2A current ranges, each with +45 V range.
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DVI Theory
The DVI functions as a programmable voltage source with a programmable current limit. The DVI never exceeds this current limit. The DVI operates in one of two modes: voltage mode (force V) or current mode (force I). The operating mode depends on the relationship between the programmed voltage and current values and the load: The DVI has no force or clamp commands to control the DVIs operational mode. Voltage and current conditions are set with the set_voltage() and set_current() statements; the operational mode is determined by the relationship between the load and these settings.
1 mA V = 1.2 V
2V
1.2 k
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1 mA V = 1.0 V
1V
1.2 k
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Function Calls
init
Description This is the board initialization routine. The routine opens all relays except CONN_SENSE0, CONN_FORCE0, CONN_SENSE1 and CONN_FORCE1; these relays are closed. It also sets voltage to a non-calibrated 0 V on a 10 V range, and sets current to a non-calibrated 100 A on a 200 A range, or 150 A on a 300 A range. Format void init(void); Valid Arguments none Usage dvi_9->init();
set_voltage
Description This function programs the voltage limit and closes the channel relays CONN_FORCE and CONN_SENSE on the stated channels, in this order. The default for vrange is autorange. The default for compensation is FAST_VOLTAGE_MODE. If the voltage value is programmed greater than 55, then the output voltage will be set to 0 V and a run time error will be displayed.
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Format short set_voltage(unsigned char channel, float value, char vrange, char compensation); Valid Arguments channel DVI_CHANNEL_0 DVI_CHANNEL_1 value voltage limit in decimal or scientific notation vrange RANGE_1_VOLT RANGE_2_VOLT RANGE_5_VOLT RANGE_10_VOLT RANGE_20_VOLT RANGE_50_VOLT (Default is autorange)
compensation
(Default is FAST_VOLTAGE_MODE)
FAST_VOLTAGE_MODE (approx. 100 s to 99% of programmed voltage) SLOW_VOLTAGE_MODE(approx. 300 s to 99% of programmed voltage)
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set_diff_range
Description This function programs the range for differential voltage measurements. Format void set_diff_range(unsigned short vrange); Valid Arguments vrange (200 mA DVI)
RANGE_20_MV RANGE_50_MV RANGE_100_MV RANGE_200_MV RANGE_1_V RANGE_2_V RANGE_5_V RANGE_10_V vrange (300 mA DVI)
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Usage dvi_9->set_diff_range(RANGE_20);
set_current
Description This function programs the current limit. The default for irange is autorange. Changing between extreme ranges requires 300 s settling time. If the current range is programmed greater than 200 mA (300 mA), then the output current will be set to 0 A and a run-time error will be displayed. Programming ihalf to TRUE extends the current ranging down one factor (for example, RANGE_20_UA becomes RANGE_10_UA) when irange is specifically programmed. Format short set_current(unsigned char channel, float value, char irange, char ihalf); Valid Arguments channel DVI_CHANNEL_0 DVI_CHANNEL_1 value current limit value in decimal or scientific notation
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irange (200 mA DVI) RANGE_20_UA RANGE_200_UA RANGE_2_MA RANGE_20_MA RANGE_200_MA irange (300 mA DVI) RANGE_30_UA RANGE_300_UA RANGE_3_MA RANGE_30_MA RANGE_300_MA irange (2A DVI) RANGE_2_UA RANGE_20_UA RANGE_200_UA RANGE_2_MA RANGE_20_MA RANGE_200_MA RANGE_2_AMP ihalf TRUE FALSE
(Default is autorange)
(Default is autorange)
(Default is autorange)
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Visual ATE Programming Reference Manual February 2002 Copyright 2002 Credence Systems Corporation
set_current_range
Description This function programs the current force/measure range. Programming ihalf to TRUE extends the current ranging down one factor (for example, RANGE_20_UA becomes RANGE_10_UA). Format void set_current_range(unsigned char channel, unsigned short irange, char ihalf); Valid Arguments channel DVI_CHANNEL_0 DVI_CHANNEL_1 irange (200 mA DVI) RANGE_20_UA RANGE_200_UA RANGE_2_MA RANGE_20_MA RANGE_200_MA irange (300 mA DVI) RANGE_30_UA RANGE_300_UA RANGE_3_MA RANGE_30_MA RANGE_300_MA
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
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irange (2A DVI) RANGE_2_UA RANGE_20_UA RANGE_200_UA RANGE_2_MA RANGE_20_MA RANGE_200_MA RANGE_2_AMP ihalf (default is FALSE) TRUE FALSE
set_meas_mode
Description This function determines the mode for subsequent measurement(s). The default is no connection. Consult a Credence Systems Applications Engineer if you must configure the board beyond the default. Format void set_meas_mode(unsigned char channel, unsigned char mode); Valid Arguments channel DVI_CHANNEL_0 DVI_CHANNEL_1
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mode DVI_MEASURE_VOLTAGE DVI_MEASURE_CURRENT DVI_MEASURE_BUS(requires installation of wire jumper to specified bus) DVI_MEASURE_DIFF
measure
Description This function performs a single measurement. The strobe rate is approximately 20 s, self-timed by the ADC. Format float measure( void); Valid Arguments none Usage result = dvi_9->measure();
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measure_average
Description This function performs the stated number of measurements and returns the average. The strobe rate is approximately 20 s per sample, self-timed by the ADC. Format float measure_average(unsigned short samples); Valid Arguments samples integer number of samples Usage result = dvi_9->measure_average(12);
set_compensation
Description This function controls the response of the internal voltage control loop. If SLOW_VOLTAGE_MODE is specifically programmed, the voltage control is out of control. In this case, the resulting response in the DVI is an initial fast change in voltage before the control loop responds, slowing the rate of change of the voltage. If FAST_VOLTAGE_MODE is specifically programmed, the voltage control loop is in control immediately, and the initial change in voltage much less than it is with SLOW_VOLTAGE_MODE. However, the remaining change in voltage is faster.
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Format void set_compensation(unsigned char channel, unsigned char compensation); Valid Arguments channel DVI_CHANNEL_0 DVI_CHANNEL_1 compensation FAST_VOLTAGE_MODE (approx. 100 s to 99% of programmed voltage) SLOW_VOLTAGE_MODE (approx. 300 s to 99% of programmed voltage)
close_relay open_relay
Description These functions close and open the stated on-board relays. Format void close_relay(unsigned short relay); void open_relay(unsigned short relay);
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Valid Arguments relay CONN_FORCE0 CONN_FORCE1 CONN_SENSE0 CONN_SENSE1 BUS_FORCE0 BUS_FORCE1 BUS_SENSE0 BUS_SENSE1 MOD_CHAN0 MOD_CHAN1 DVI_EXT_DRV1 DVI_EXT_DRV2 CHANNEL_SHORT CONN_BUS_MEAS (Channel 0 force connect relay) (Channel 1 force connect relay) (Channel 0 sense connect relay) (Channel 1 sense connect relay) (Channel 0 force-to-bus 2 connect relay) (Channel 1 force-to-bus 3 connect relay) (Channel 0 sense-to-bus 2 connect relay) (Channel 1 sense-to-bus 3 connect relay) (Channel 0 modulation input from bus connect relay) (Channel 1 modulation input from bus connect relay) (user programmable open collector output #1) (user programmable open collector output #2) (Channel 0 sense to Channel 1 sense connect relay) (ADC input-to-bus connect relay)
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10V REF
COMPENSATION NETWORK HIGH VOLTAGE BUFFER Current Ranges 10uA, 20uA, 100uA, 200uA, 1mA, 2mA, 10mA, 20mA, 100mA, 200mA. INTEGRATOR COMPARATOR Differential Amplifier TP5
POLARITY TP14 SENSE CH0 Hi Voltage Hi Impedance Buffer VOLTAGE RANGE SWITCHING VOLTAGE RANGES 1,2,5,10,20 AND 50V SLOW_MODE
TP15
CHANNEL_SHORT
16 Bit ADC
COMPENSATION NETWORK HIGH VOLTAGE BUFFER Current Ranges 10uA, 20uA, 100uA, 200uA, 1mA, 2mA, 10mA, 20mA, 100mA, 200mA. INTEGRATOR COMPARATOR Differential Amplifier
POLARITY TP13 SENSE CH1 Hi Voltage Hi Impedance Buffer VOLTAGE RANGE SWITCHING VOLTAGE RANGES 1,2,5,10,20 AND 50V SLOW_MODE
TP7
10V REF
FORCE CH1
DVI_EXT_DRV1
*
* CONTROLLED BY open/close_relay(); DVI_EXT_DRV2
LEGEND:
*
RELAY ANALOG SWITCH
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
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void supply_i(test-function &func) { //The two lines below must be the first two in the function supply_i_params *ours; ours = (supply_i_params *)func.params; float icc; system_init(); dvi_9->set_current(DVI_CHANNEL_0, 0.1);//sets Channel 0 of the DVI //(slot 9) to 0.1 A dvi_9->set_voltage(DVI_CHANNEL_0, ours->vcc); //sets Channel 0 of //the DVI (slot 9) to //Vcc voltage for Pin 16 dvi_9->set_meas_mode(DVI_CHANNEL_0, DVI_MEASURE_CURRENT); //sets DVI to measure current delay(ours->meas_delay);
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
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icc = dvi_9->measure_average(ours->samples);//measures current and //takes the average over a //number of samples power_down(); //user written power-off function display_results(); //user written power-off function }
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CHAPTER 9
The HVS High Voltage Source is a high-voltage, low-current floating source instrument. Output voltage and current are programable.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
9-1
Function Calls
init
Description This is the board initialization routine. This routine turns off the high-voltage supply and programs the current and voltage DAC to 100 A and 0 V. Format void init(void); Valid Arguments none Usage hvs_15->init();
set_voltage
Description This function programs the voltage limit and sets the voltage range. The default value for vrange is autorange. Format void set_voltage(float value, char vrange);
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Valid Arguments value voltage limit in decimal or scientific notation vrange RANGE_100_V RANGE_200_V RANGE_500_V RANGE_1_KV
set_current
Description This function programs the current limit and current range; the default value for irange is autorange. Format void set_current(float value, char irange); Valid Arguments value current limit in decimal or scientific notation irange RANGE_10_UA RANGE_100_UA
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set_meas_mode
Description This function sets the measurement mode and range and turns on the highvoltage power stage. Format void set_meas_mode(unsigned short mode); Valid Arguments mode HVS_MEASURE_VOLTAGE HVS_MEASURE_CURRENT Usage hvs_15->set_meas_mode(HVS_MEASURE_VOLTAGE);
measure
Description This function performs a single floating-point measurement with the on-board ADC.
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Format float measure( void); Valid Arguments none Usage result = hvs_15->measure();
measure_average
Description This function performs the stated number of measurements and returns the average. Format float measure_average(unsigned short samples);
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
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supply_off
Description This function turns off the high-voltage power supply.
Use this call at the end of a test function to ensure operator safety.
WARNING
Format void supply_off(void); Valid Arguments none Usage hvs_15->supply_off(); Note: Turn the inverter off when testing is not taking place to avoid noise. The 650 V power rail powers up in approximately 2 ms.
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Visual ATE Programming Reference Manual February 2002 Copyright 2002 Credence Systems Corporation
close_relay open_relay
Description These functions close and open the stated relays. Format void close_relay(unsigned short relay); void open_relay(unsigned short relay);
Valid Arguments relay HVS_FORCE_POS HVS_SHORT_POS_FS HVS_SENSE_POS_REF_COM HVS_SENSE_POS_OUT_COM HVS_GND_POS_SENSE HVS_NEG_FORCE HVS_SHORT_NEG_FS HVS_SENSE_NEG_REF_COM HVS_SENSE_NEG_OUT_COM HVS_GND_NEG_SENSE HVS_SHORT_10K_FS HVS_REF_1 HVS_REF_2 HVS_OUT_1 HVS_OUT_2 HVS_OUT_3 HVS_OUT_4 HVS_OUT_5 HVS_OUT_6
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HVS_OUT_7 HVS_OUT_8
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TP8
TP7 HVS_FORCE_POS
POS_FORCE
HVS_SHORT_10K_FS HVS_OUT_1 HVS_SHORT_POS_FS 10K HVS_OUT_2 FLOATING +650V HVS_SENSE_POS_OUT_COM 100kHz ISOLATED POWER INVERTER FLOATING +15V FLOATING COM HVS_GND_POS_SENSE FLOATING -15V TP6 TP2 HVS_GND_NEG_SENSE HVS_SENSE_NEG_OUT_COM HVS_SENSE_POS_REF_COM HVS_OUT_5 HVS_OUT_6 HVS_OUT_7 HVS_OUT_3 HVS_OUT_4
HVS_OUT_8 HVS_SENSE_NEG_REF_COM
OUT_COM REF_COM
HVS_REF_1
REF_1
HVS_SHORT_NEG_FS TP5 HVS_REF_2
REF_2
NEG_FORCE
HVS_NEG_FORCE TP4 (V MEAS) ** (I MEAS) ** ** CONTROLLED BY set_meas_mode VRANGE CONTROL 100V 200V 500 1000V IRANGE CONTROL 10uA 100uA 1mA 10mA TP1
12 BIT A/D
DATA BUS
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
9-9
void diode_test() { float measurement; hvs_15->set_current(2e-6); //DUT leakage clamp hvs_15->set_voltage(0); //no voltage during relay switch hvs_15->close_relay(HVS_SHORT_POS_FS); hvs_15->close_relay(HVS_SHORT_NEG_FS); //shorting the force and sense lines allows for a one wire //connection to the DUT,eliminating unneeded leakage paths hvs_15->close_relay(HVS_SENSE_NEG_REF_COM); //short the negative output to the DUT ground hvs_15->close_relay(HVS_FORCE_POS); //enable the positive out put to connect to the DUT through one //line delay(2); //make sure all relays are settled hvs_15->set_meas_mode(CURRENT);//this also turns on the high //voltage delay(5); //gives the high voltage time to //come up
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hvs_15->set_voltage(600); delay(5); measurement = hvs_15->measure();//measure_average also possible //here power_down(); //user written power-off function display_results(); //user written power-off function }
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
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CHAPTER 10
The LZB Link/Zener Blower is a single-quadrant V/I source. The loading conditions determine whether the supply operates in voltage or current mode. The supply forces voltage until it reaches the programmed current. At that time, the supply becomes a current source. The output connects to the DUT via a 2-by-28 relay multiplexer. The mux can be disconnected from the source and used as a high-power matrix.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
10-1
Function Calls
init
Description This is the board initialization routine. The function opens all relays and resets the voltage and current DACs to non-calibrated zero status. Format void init(void); Valid Arguments none Usage lzb_18->init();
set_voltage
Description This function programs the voltage limit. Format short set_voltage(float value); Valid Arguments value
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set_clamp
Description This function programs the post-link-blow clamp voltage and helps control the voltage spikes that are created when links are opened and the load is suddenly removed. Use this function with close_relay(LZB_CON_CLAMP). Format short set_clamp(float value); Valid Arguments value 0 V to 14 V clamp voltage in decimal or scientific notation Usage lzb_18->close_relay(LZB_CONN_CLAMP); lzb_18->set_clamp(5.0);
set_current
Description This function programs the current limit; the default for irange is autorange.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
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Format short set_current(float value, unsigned short irange); Valid Arguments value 0 A to 4A current limit in decimal or scientific notation irange (Default is autorange)
Usage lzb_18->set_current(1.0);
set_meas_mode
Description This function programs the measurement mode for subsequent measurements. It can be used to monitor capacitor bank voltage with LZB_ CAP_VOLTAGE. Format short set_meas_mode(unsigned short mode); Valid Arguments mode LZB_OUTPUT_CURRENT
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LZB_CAP_VOLTAGE LZB_OUTPUT_VOLTAGE
Usage LZB_18->set_meas_mode(LZB_OUTPUT_VOLTAGE);
measure
Description This function performs a single measurement Format float measure( void); Valid Arguments none Usage result = lzb_18->measure();
convert_read_adc
Description This function instructs the on-board ADC to perform a single conversion. The returned value requires conversion to floating point.
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Format unsigned short convert_read_adc( void); Valid Arguments none Usage result = lzb_18-> convert_read_adc ();
close_relay open_relay
Description This function closes and opens the stated relays. Format void close_relay(unsigned short relay); void open_relay(unsigned short relay); Valid Arguments relay LZB_MUX_OUT_1 LZB_MUX_OUT_2 LZB_MUX_OUT_3 LZB_MUX_OUT_4 LZB_MUX_OUT_5 LZB_MUX_OUT_6
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LZB_MUX_OUT_7 LZB_MUX_OUT_8 LZB_MUX_OUT_9 LZB_MUX_OUT_10 LZB_MUX_OUT_11 LZB_MUX_OUT_12 LZB_MUX_OUT_13 LZB_MUX_OUT_14 LZB_MUX_OUT_15 LZB_MUX_OUT_16 LZB_MUX_OUT_17 LZB_MUX_OUT_18 LZB_MUX_OUT_19 LZB_MUX_OUT_20 LZB_MUX_OUT_21 LZB_MUX_OUT_22 LZB_MUX_OUT_23 LZB_MUX_OUT_24 LZB_MUX_OUT_25 LZB_MUX_OUT_26 LZB_MUX_OUT_27 LZB_MUX_OUT_28 LZB_MUX_GND_1 LZB_MUX_GND_2 LZB_MUX_GND_3 LZB_MUX_GND_4 LZB_MUX_GND_5 LZB_MUX_GND_6 LZB_MUX_GND_7 LZB_MUX_GND_8 LZB_MUX_GND_9 LZB_MUX_GND_10 LZB_MUX_GND_11 LZB_MUX_GND_12 LZB_MUX_GND_13
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LZB_MUX_GND_14 LZB_MUX_GND_15 LZB_MUX_GND_16 LZB_MUX_GND_17 LZB_MUX_GND_18 LZB_MUX_GND_19 LZB_MUX_GND_20 LZB_MUX_GND_21 LZB_MUX_GND_22 LZB_MUX_GND_23 LZB_MUX_GND_24 LZB_MUX_GND_25 LZB_MUX_GND_26 LZB_MUX_GND_27 LZB_MUX_GND_28 LZB_CONN_OUT LZB_CONN_GND LZB_RANGE_2 LZB_RANGE_1 LZB_CONN_CLAMP
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Visual ATE Programming Reference Manual February 2002 Copyright 2002 Credence Systems Corporation
TP7
TP4
CLAMP DAC
VCLAMP CONTROL
LZB_CONN_CLAMP
OUT 1
LZB_MUX_GND_1 LZB_MUX_GND_15 LZB_MUX_OUT_2
OUT 15
LZB_MUX_OUT_16
OUT 2
LZB_MUX_GND_2 LZB_MUX_GND_16 LZB_MUX_OUT_3
OUT 16
LZB_MUX_OUT_17
OUT 3
LZB_MUX_GND_3 LZB_MUX_GND_17 LZB_MUX_OUT_4
OUT 17
LZB_MUX_OUT_18
OUT 4
TP2 TP1 LZB_MUX_GND_4 LZB_MUX_GND_18 LZB_MUX_OUT_5
OUT 18
LZB_MUX_OUT_19
OUT 5
LZB_MUX_GND_5 LZB_MUX_GND_19 LZB_MUX_OUT_6
OUT 19
LZB_MUX_OUT_20
VOLTAGE DAC
TP5
CURRENT DAC
LOOP CONTROL
700 mA CHARGER
OUT 6
LZB_MUX_GND_6 LZB_MUX_GND_20 LZB_MUX_OUT_7
OUT 20
LZB_MUX_OUT_21
OUT 7
LZB_MUX_GND_7 LZB_MUX_GND_21 LZB_MUX_OUT_8
OUT 21
LZB_MUX_OUT_22
OUT 8
LZB_MUX_GND_8 LZB_MUX_GND_22 LZB_MUX_OUT_9
OUT 22
LZB_MUX_OUT_23
OUT 9
LZB_MUX_GND_9 (2.5 mF Nominal) LZB_MUX_GND_10 LZB_MUX_GND_23 LZB_MUX_OUT_10
OUT 23
LZB_MUX_OUT_24
OUT 10
LZB_MUX_GND_24 LZB_MUX_OUT_11
OUT 24
LZB_MUX_OUT_25
OUT 11
LZB_MUX_GND_11 LZB_MUX_GND_25 LZB_MUX_OUT_12
OUT 25
LZB_MUX_OUT_26
OUT 12
LZB_MUX_GND_12 LZB_MUX_GND_26 LZB_MUX_OUT_13
OUT 26
LZB_MUX_OUT_27
OUT 13
IRANGE CONTROL 40 mA 400 mA 4A LZB_MUX_GND_13 TP6 (CV MEAS) ** ** (I MEAS) (V MEAS) ** TP3 LZB_MUX_GND_14 LZB_MUX_GND_27 LZB_MUX_OUT_14
OUT 27
LZB_MUX_OUT_28
OUT 14
LZB_MUX_GND_28
OUT 28
TP8
12 BIT A/D
LZB_CONN_GND
** CONTROLLED BY set_meas_mode
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
10-9
Programming Example
The following example shows an LZB installed in Slot 18 blowing a link.
float cap_voltage, output_voltage; system_inti(); //should include lzb_18->init(); to open all //relays and program to 0 V to measure cap bank //voltage, this should be close to 50 V lzb_18->set_meas_mode(LZB_CAP_VOLTAGE);//closes ADC mux for cap //measure delay(1); cap_voltage=lzb_18->measure(); //measures cap voltage if(cap_voltage < 40.0) //checks, aborts test if less than 40 V goto end: //LZB is set up, now connect to DUT lzb_18->close_relay(LZB_CONN_OUT);//closes output relay to mux lzb_18->close_relay(LZB_CONN_GND);//closes ground relay to mux lzb_18->close_relay(LZB_MUX_OUT_1);//closes mux relay to DUT pin //note: this is +ve connection //set current now; it also uses the high-power relays that need //time to close lzb_18->set_current(1.0); //current is programmed, but not //yet flowing; no voltage is applied in //blowing links, the clamp can help //revent overshoot when the link goes lzb_18->close_relay(LZB_CONN_CLAMP);//connects clamp circuit to //output lzb_18->set_clamp(5.0); //clamps at 5 V //to check for blown link; set up to measure output voltage here lzb_18->set_meas_mode(LZB_OUTPUT_VOLTAGE); //ADC mux closed delay(5); //5 ms delay to let relays close //apply pulse to the DUT for a period of 1 ms lzb_18->set_votlage(5.0); //applies power to link, current flows wait.delay_10_us(ours->pulse_width/10); //passed param pulse width //= 1000 s for 1 ms delay output_voltage = lzb_18->measure(); //measures output voltage lzb_18->set_voltage(0.0); //end of power pulse //if the link is blown, measured output voltage will be close to //the clamp voltage of 5 V. //if not blown, the voltage will be lower; the supply will have //been in current mode //may be preferable to measure output current and check for a low //current
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//if the link is not blown, the test program can take action (apply //the pulse again, etc.) //may be required at this point to blow another link //al that is required is to open the mux relays and connect to //another link, set a delay //and pulse the supply again lzb_18->open_relay(LZB_MUX_OUT_1); lzb_18->open_relay(LZB_MUX_GND_2); lzb_18->close_relay(LZB_MUX_OUT_3); lzb_18->close_relay(LZB_MUX_GND_4); delay(5); lazb_18->set_voltage(5.0); //applies power to link, //current flows wait.delay_10_us(ours->pulse_width/10);//passed param //pulse_width = //1000 s for 1 ms delay output_voltage = lzb_18->(0.0); //end of power pulse //after blowing the required links, power down the LZB end: power_down();
//includes lzb_18->init();
Note:
For zener zapping, the mux can be used to simulate the zapped effect by shorting out the required zeners before starting the zap routine.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
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CHAPTER 11
The MUX Resource Multiplexer has eight banks of four relays each. Each bank can be connected to the preceding and following banks, creating a 32point relay matrix. Several banks contain relays that can be connected to system ground and user busses. The MUX can extend the functionality of other instruments by allowing resource sharing.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
11-1
Function Calls
init
Description This is the board initialization routine, which opens all relays. Format void init(void); Valid Arguments none Usage mux_14->init();
close_relay open_relay
Description These functions close and open the stated relays. The remaining relays are not affected. Relay grouping within these functions is not allowed. No built-in wait time. Appropriate wait may be programmed with the delay() or wait.delay _10_us() statement. Format void close_relay(unsigned short relay);
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void open_relay(unsigned short relay); Valid Arguments relay MUX_1_1 MUX_1_2 MUX_1_3 MUX_1_4 MUX_1_BUS9 MUX_BANK_1_2 MUX_2_1 MUX_2_2 MUX_2_3 MUX_2_4 MUX_2_BUS2 MUX_BANK_2_3 MUX_2_GND MUX_3_1 MUX_3_2 MUX_3_3 MUX_3_4 MUX_3_BUS3 MUX_3_BANK_3_4 MUX_4_1 MUX_4_2 MUX_4_3 MUX_4_4 MUX_4_BUS4 MUX_BANK_4_5 MUX_4_GND MUX_5_1 MUX_5_2 MUX_5_3 MUX_5_4
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MUX_5_BUS5 MUX_BANK_5_6 MUX_5_BUS10 MUX_6_1 MUX_6_2 MUX_6_3 MUX_6_4 MUX_6_BUS6 MUX_BANK_6_7 MUX_6_GND MUX_7_1 MUX_7_2 MUX_7_3 MUX_7_4 MUX_7_BUS7 MUX_BANK_7_8 MUX_7_GND MUX_8_1 MUX_8_2 MUX_8_3 MUX_8_4 MUX_8_BUS8 MUX_BANK_8-1 MUX_8_GND
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MUX_BANK_8_1
MUX_1_1 MUX_1_2
MUX_1_BUS9
BUS_9 BUS_8
MUX_8_BUS8
MUX_8_1 MUX_8_2
BANK 1
MUX_1_3 MUX_1_4 MUX_8_GND MUX_BANK_7_8 MUX_7_BUS7
BUS_7
BANK 8
MUX_8_3 MUX_8_4
MUX_7_1 MUX_7_2
BANK 2
MUX_2_3 MUX_2_4 MUX_2_GND MUX_7_GND MUX_BANK_6_7 MUX_6_BUS6
BUS_6
BANK 7
MUX_7_3 MUX_7_4
MUX_6_1 MUX_6_2
BANK 3
MUX_3_3 MUX_3_4 MUX_BANK_3_4 MUX_4_1 MUX_4_2 MUX_6_GND MUX_BANK_5_6 MUX_5_BUS5
BUS4 BUS_5 BUS_10
BANK 6
MUX_6_3 MUX_6_4
MUX_4_BUS4
MUX_5_1 MUX_5_2
BANK 4
MUX_4_3 MUX_4_4 MUX_4_GND MUX_BANK_4_5 MUX_5_3 MUX_5_4 MUX_5_BUS10
BANK 5
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
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CHAPTER 12
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
12-1
Function Calls
init
Description This is the board initialization routine, which turns off the high-voltage supply and programs the current and voltage DACs to 100 A and 0 V respectively. Format void init(void); Valid Arguments none Usage mvs_15->init();
set_voltage
Description This function programs voltage limit and voltage range. The default value for vrange is autorange. Format void set_voltage(float value, char vrange);
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Valid Arguments value voltage limit in decimal or scientific notation. vrange RANGE_10_V RANGE_20_V RANGE_50_V RANGE_100_V
set_current
Description This function programs the current limit and current range. The default value for irange is autorange. Format void set_current(float value, char irange); Valid Arguments value current limit in decimal or scientific notation. irange RANGE_100_UA RANGE_1_MA
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RANGE_10_MA RANGE_100_MA
set_meas_mode
Description This function sets the measurement mode and range, and turns on the highvoltage power stage. Format void set_meas_mode(unsigned short mode); Valid Arguments mode MVS_MEASURE_VOLTAGE MVS_MEASURE_CURRENT
Usage mvs_15->set_meas_mode(MVS_MEASURE_VOLTAGE,);
measure
Description This function performs a single floating-point measurement with the on-board ADC.
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Format float measure( void); Valid Arguments none Usage result = mvs_15->measure();
measure_average
Description This function performs the stated number of measurements and returns the average. Format float measure_average(unsigned short samples); Valid Arguments samples integer number of samples Usage result = mvs_15->measure_average(12);
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supply_off
Description This function turns off the high-voltage power supply. For operator safety, use this function at the end of a test function. Format void supply_off(void); Valid Arguments none Usage mvs_15->supply_off(); Note: Turn the inverter off when testing is not taking place. The 130 V power rail powers up in approximately 2 ms.
close_relay open_relay
Description These functions close and open the stated relays. Format void close_relay(unsigned short relay); void open_relay(unsigned short relay);
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Valid Arguments relay MVS_FORCE_POS MVS_SHORT_POS_FS MVS_SENSE_POS_REF_COM MVS_SENSE_POS_OUT_COM MVS_GND_POS_SENSE MVS_NEG_FORCE MVS_SHORT_NEG_FS MVS_SENSE_NEG_REF_COM MVS_SENSE_NEG_OUT_COM MVS_GND_NEG_SENSE MVS_SHORT_10K_FS MVS_REF_1 MVS_REF_2 MVS_OUT_1 MVS_OUT_2 MVS_OUT_3 MVS_OUT_4 MVS_OUT_5 MVS_OUT_6 MVS_OUT_7 MVS_OUT_8
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TP8
TP7 MVS_FORCE_POS
POS_FORCE
MVS_SHORT_10K_FS MVS_OUT_1 MVS_SHORT_POS_FS 10K MVS_OUT_2 FLOATING +130V MVS_SENSE_POS_OUT_COM 100 kHz ISOLATED POWER INVERTER FLOATING +15V FLOATING COM MVS_GND_POS_SENSE FLOATING -15V MVS_SENSE_POS_REF_COM MVS_OUT_5 MVS_OUT_6 TP2 MVS_GND_NEG_SENSE MVS_SENSE_NEG_OUT_COM MVS_OUT_7 MVS_OUT_3 MVS_OUT_4
MVS_OUT_8 MVS_SENSE_NEG_REF_COM
OUT_COM REF_COM
MVS_REF_1
REF_1
MVS_SHORT_NEG_FS TP6 TP5 MVS_REF_2
REF_2
NEG_FORCE
MVS_NEG_FORCE TP4 (V MEAS) ** (I MEAS) ** ** CONTROLLED BY set_meas_mode VRANGE CONTROL 10 V 20 V 50 V 100 V IRANGE CONTROL 100 A 1 mA 10 mA 100 mA TP1
12 BIT A/D
DATA BUS
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CHAPTER 13
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
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Function Calls
init
Description This is the board initialization routine, which turns off the floating voltage supply. Format void init(void); Valid Arguments none Usage ofs_17->init();
set_voltage
Description This function programs the voltage limit and range. The default value for vrange is autorange. Format void set_voltage(float value, char vrange);
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Valid Arguments value voltage limit in decimal or scientific notation vrange RANGE_5_V RANGE_10_V RANGE_20_V RANGE_50_V (Default is autorange)
set_current
Description This function programs the current limit and range. The default value for irange is auto-range. Format void set_current(float value, char irange); Valid Arguments value current limit in decimal or scientific notation
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irange
(Default is autorange)
set_meas_mode
Description This function sets the measurement mode and range and turns on the floating power. supply. Format void set_meas_mode(unsigned short mode); Valid Arguments mode OFS_MEASURE_VOLTAGE OFS_MEASURE_CURRENT
Usage ofs_17->set_meas_mode(OFS_MEASURE_VOLTAGE);
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measure
Description This function performs a single floating-point conversion with the on-board ADC. Format float measure( void); Valid Arguments none Usage result = ofs_17->measure();
measure_average
Description This function performs the stated number of measurements and returns the average. Format float measure_average(unsigned short samples); Valid Arguments samples
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supply_off
Description This function turns off the floating power supply. For user safety, use this command at the end of a test function. Format void supply_off(void); Valid Arguments none Usage ofs_17->supply_off(); Note: Turn the inverter off when testing is not taking place. The 65 V power rail powers up in approximately 2 ms.
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close_relay open_relay
Description This function closes and opens the stated on-board relays. Format void close_relay(unsigned short relay); void open_relay(unsigned short relay); Valid Arguments relay OFS_FORCE_POS OFS_SHORT_POS_FS OFS_SENSE_POS_REF_COM OFS_SENSE_POS_OUT_COM OFS_GND_POS_SENSE OFS_NEG_FORCE OFS_SHORT_NEG_FS OFS_SENSE_NEG_REF_COM OFS_SENSE_NEG_OUT_COM OFS_GND_NEG_SENSE OFS_SHORT_10K_FS OFS_REF_1 OFS_REF_2 OFS_OUT_1 OFS_OUT_2 OFS_OUT_3 OFS_OUT_4 OFS_OUT_5
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TP8
TP7 OFS_FORCE_POS
POS_FORCE
OFS_SHORT_10K_FS OFS_OUT_1 OFS_SHORT_POS_FS 10K OFS_OUT_2 FLOATING +65V OFS_SENSE_POS_OUT_COM 100 kHz ISOLATED POWER INVERTER FLOATING +15V FLOATING COM OFS_GND_POS_SENSE FLOATING -15V OFS_SENSE_POS_REF_COM OFS_OUT_5 OFS_OUT_6 TP2 OFS_GND_NEG_SENSE OFS_SENSE_NEG_OUT_COM OFS_OUT_7 OFS_OUT_3 OFS_OUT_4
OFS_OUT_8 OFS_SENSE_NEG_REF_COM
OUT_COM REF_COM
OFS_REF_1
REF_1
OFS_SHORT_NEG_FS TP6 TP5 OFS_REF_2
REF_2
NEG_FORCE
OFS_NEG_FORCE TP4 (V MEAS) ** (I MEAS) ** ** CONTROLLED BY set_meas_mode VRANGE CONTROL 5V 10 V 20 V 50 V IRANGE CONTROL 200 A 2 mA 20 mA 200 mA TP1
12 BIT A/D
DATA BUS
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CHAPTER 14
The OVI Octal Voltage/Current source provides eight independent V/I supplies on one instrument. All supplies have 12-bit forcing and 16-bit measuring resolution. The OVI itself is a system-ground-referenced instrument.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
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Function Calls
init
Description This routine initializes the board. The routine closes all channel output connect relays, sets voltage to a non-calibrated 0 V on a 10 V range, and sets current to a non-calibrated 100 A on a 200 A range. Format void init(void); Valid Arguments none Usage ovi_2->init();
set_voltage
Description This function programs the voltage limit and range. The default value for vrange is autorange. Note: Switching between extreme ranges (1 V range to 20 V range) requires 300 s settling time. Format void set_voltage(unsigned char channel, float value, char vrange);
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Valid Arguments channel OVI_CHANNEL_0 OVI_CHANNEL_1 OVI_CHANNEL_2 OVI_CHANNEL_3 OVI_CHANNEL_4 OVI_CHANNEL_5 OVI_CHANNEL_6 OVI_CHANNEL_7 value voltage limit in decimal or scientific notation. vrange RANGE_1_V RANGE_2_V RANGE_5_V RANGE_10_V RANGE_20_V
set_current
Description This function programs the current limit and range. The default value for irange is autorange. Switching between extreme ranges (20 A range to 20 mA range)
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Format void set_current(unsigned char channel, float value, char irange); Valid Arguments channel OVI_CHANNEL_0 OVI_CHANNEL_1 OVI_CHANNEL_2 OVI_CHANNEL_3 OVI_CHANNEL_4 OVI_CHANNEL_5 OVI_CHANNEL_6 OVI_CHANNEL_7 value current limit value in decimal or scientific notation irange RANGE (20 mA OVI) RANGE_20_UA RANGE_200_UA RANGE_2_MA RANGE_20_MA RANGE (30 mA OVI) RANGE_30_UA RANGE_300_UA RANGE_3_MA RANGE_30_MA
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set_meas_mode
Description This function determines the mode for subsequent measurements. set_voltage vrange sets the default range for voltage measurements. To measure current, irange is used and the set_meas_mode vrange argument is ignored. Format void set_meas_mode (unsigned short channel, unsigned char mode, char vrange); Valid Arguments channel OVI_CHANNEL_0 OVI_CHANNEL_1 OVI_CHANNEL_2 OVI_CHANNEL_3 OVI_CHANNEL_4 OVI_CHANNEL_5 OVI_CHANNEL_6 OVI_CHANNEL_7 mode OVI_MEASURE_VOLTAGE OVI_MEASURE_CURRENT vrange
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measure
Description This function performs a single measurement. set_voltage vrange sets the default for voltage measurements. To measure current, the set_current irange is used, and the measure vrange argument is ignored. Format float measure (char vrange); Valid Arguments vrange RANGE_1_V RANGE_2_V RANGE_5_V RANGE_10_V RANGE_20_V
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measure_average
Description This function performs the stated number of measurements and returns the average. set_voltage vrange sets the default for voltage measurements. To measure current, the set_current irange is used, and the measure vrange argument is ignored. Format float measure_average (unsigned short samples, char vrange); Valid Arguments samples integer number of samples vrange RANGE_1_V RANGE_2_V RANGE_5_V RANGE_10_V RANGE_20_V
Usage
result = ovi_2->measure_average(10);
connect
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disconnect
Description These functions closes and open the channel-force and sense-connect relays.
Format void connect(unsigned short channel); void disconnect(unsigned short channel); Valid Arguments channel OVI_CHANNEL_0 OVI_CHANNEL_1 OVI_CHANNEL_2 OVI_CHANNEL_3 OVI_CHANNEL_4 OVI_CHANNEL_5 OVI_CHANNEL_6 OVI_CHANNEL_7
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V DAC (1 of 8)
CURRENT ** RANGING 100 10 K 10 K SUMMING & INT I CLAMP 100 I SENSE 10 K 10 K ** TP2 ** TP1
FORCE 1
SENSE 1
I DAC (1 of 8)
**
FORCE 2
SENSE 2 FORCE 3
TP3
V DAC (2 of 8) I DAC (2 of 8)
**
**
SENSE 3 FORCE 4
TP4
V DAC (3 of 8) I DAC (3 of 8) (CH2 A) (CH3 A) (CH4 A) (CH5 A) (CH6 A) (CH7 A) (CH8 A) (CH2 V) (CH3 V) (CH4 V) (CH5 V) (CH6 V) (CH7 V) (CH8 V)
** 100 10 K 10 K **
SENSE 4 FORCE 5
TP5
V DAC (4 of 8) I DAC (4 of 8)
** 100 10 K 10 K **
V DAC (5 of 8) I DAC (5 of 8)
* CURRENT MUX
* VOLTAGE MUX
100 10 K
SENSE 5 FORCE 6
TP6
**
V DAC (6 of 8) I DAC (6 of 8)
10 K
**
SENSE 6 FORCE 7
TP7
GAIN
100 10 K 10 K
**
V DAC (7 of 8) I DAC (7 of 8)
**
SENSE 7 FORCE 8
TP8
16-BIT A/D
DATA BUS
** 100 10 K
V DAC (8 of 8) I DAC (8 of 8)
**
SENSE 8
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CHAPTER 15
The Precision Measurement Unit (PMU) is used to make accurate DC measurements. The PMU is a four quadrant DC source, capable of forcing voltage and measuring current or forcing current and measuring voltage up to 45 V voltage or 1A of current.
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Introduction
The PMU Precision Measurement Unit allows sourcing voltage or current in one range, while measuring in another range on other DUT pins. The forcing resolution is 15 bits plus sign. The PMU works in three measurement modes: Single pass voltage or current measurement resolution is 15 bits plus sign Dual pass extended resolution voltage the first pass is done with normal gain and is used to select a small portion of the input range in which a second high gain measurement is taken. High gain extended resolution voltage this mode does not take a measurement at normal gain and therefore can be faster than a dual pass measurement. This mode makes a measurement in a portion of the input range that is software selectable.
The PMU is equipped with two built-in temperature sensors. The first sensor protects the board and shuts down the power buffer if the heat sink temperature exceeds the preset level. The second sensor measures the temperature of the ADC reference to ensure the PMU is within the temperature calibration range. The ADC can measure either temperature condition. The PMU ranges are as follows: Force voltage and measure voltage ranges are each 1 V, 2 V, 5 V, 10 V, 20 V, 45 V Current ranges are 10 A, 100 A, 1000 A, 10 mA, 100 mA, 1000 mA
Calibration
The PMU is calibrated using an external HP 3458A Multimeter with an extended precision option. To get the best accuracy from the dual pass or high gain voltage measurement modes, the meter is used for a focused calibration of the measurement range under program control. This allows the PMU to be used as a transfer standard, capable of making multiple measurements faster than the HP 3458A.
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Function Calls
init
Description This is the board initialization routine; it opens all relays and sets these conditions:
Voltage source: 0V, and range to 1 V Current source: 10 mA, and range to 10 mA The measure range to 45 V
source_heat_sink_temp
Description This function returns the source heat sink temperature in degrees Celsius (C). Format void source_heat_sink_temp(void);
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adc_ref_temp
Description This function returns the ADC reference temperature in degrees C. Format double adc_ref_temp(void); Valid Arguments none Usage temp = pmu_21->adc_ref_temp();
connect_vi_force
Description This function accomplishes the following: Sets the voltage range Sets the current range Programs current source and then closes the source output relay Sets the voltage source to the stated value
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Use function after a board init to close the source output relay. Format void connect_vi_force(double voltage_value, char vrange, double current_value, char irange, char corr_factor); Valid Arguments voltage_value Vout in decimal or scientific notation (-45.0 V to +45.0 V) vrange RANGE_1_V RANGE_2_V RANGE_5_V RANGE_10_V RANGE_20_V RANGE_45_V current_value Iout in decimal or scientific notation (-1.0 +0 +1.0) irange RANGE_10_UA RANGE_100_UA RANGE_1_MA RANGE_10_MA RANGE_100_MA RANGE_1_A
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//Programs the voltage source to 5.0 V on the 10 V range and the current source to 10 microA on the 100 microA range.
set_voltage
Description This function sets the voltage source as follows: If the newly selected range is greater than the old range, the value will be set before the range is selected. If the newly selected range is less than the old range, then the range will be changed before the value is set. If no range is specified this function will select one.
Format short set_voltage(double value, char force_range); Valid Arguments value voltage output in decimal or scientific notation (-45.0 V to +45.0 V) force_range RANGE_1_V RANGE_2_V RANGE_5_V RANGE_10_V RANGE_20_V RANGE_45_V
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set_current
Description This function sets the current source as follows: If the newly selected range is greater than the old range, the value will be set before the range is selected. If the newly selected range is less than the old range then the range will be changed before the value is set. If no range is specified this function will select one.
Format short set_current(double value, char force_range); Valid Arguments value current output in decimal or scientific notation (-1.0 to +1.0) force_range RANGE_10_UA RANGE_100_UA RANGE_1_MA RANGE_10_MA RANGE_100_MA RANGE_1_A
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set_meas_mode
Description This function sets the measure mode options to either current or voltage. The function must be set before taking measurements with the PMU. Current mode selection: this function will select the internal current sense inputs of the PMUs measurement unit. The current range in which the measurement will be made must be selected with the CONNECT_VI_FORCE or SET_CURRENT functions prior to taking the measurement. Voltage mode selection: this function will connect the PMUs measurement unit to the external voltage sense inputs. The voltage range in which the measurement will be taken is specified with this function. The three single pass voltage modes are differentiated by how the differential inputs of the PMUs meas. are used. POS should be used when the negative input is tied to the DUT board ground. NEG should be used when the positive input is tied to ground. DIFF is for when there is a common mode voltage present. Dual pass or high gain modes are differentiated by calibration types. Normal occurs off line during board calibration. Focus calibration is run in line under program control. Dual pass and high gain modes are calibrated with the negative input tied to DUT board ground and should be used as such. Format short set_meas_mode(unsigned char mode, char passed_range); Valid Arguments mode PMU_CURR_SINGLE_PASS PMU_POS_SINGLE_PASS PMU_NEG_SINGLE_PASS
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PMU_DIFF_SINGLE_PASS PMU_DUAL_PASS_NORMAL PMU_DUAL_PASS_FOCUS PMU_HIGH_GAIN_NORMAL PMU_HIGH_GAIN_FOCUS passed_range Dual pass and High gain modes only support 5V and 10V ranges RANGE_1_V RANGE_2_V RANGE_5_V RANGE_10_V RANGE_20_V RANGE_45_V
measure
Description This function performs the type of measurement that was selected with the SET_MEAS_MODE function. Single pass or high gain measurement measurements: function returns the average value of the specified single pass samples. Dual pass measurements: the specified number of single pass samples are used to select the high gain segment for the second pass. The return value from the second pass will be the average of the specified dual pass samples. The function will return a 999x.0 reading if an ADC overflow occurs during a dual pass or high gain measurement.
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Format short measure(short single_pass_samples, short dual_pass_samples); Valid Arguments single_pass_samples integer number of samples (0 to 32768) dual_pass_samples integer number of samples (0 to 32768) Usage pmu_21->measure(20); pmu_21->measure(1,1); //for single pass or high gain meas. modes //takes one measurement with normal gain and then one measurement at high gain; reports the results of the second measurement.
select_hg_segment
Description This function selects the portion of an input voltage range in which a high gain measurement is taken. Use SET_MEAS_MODE before using this function to select the high gain mode and voltage range. Format short select_hg_segment(float voltage_estimate);
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Valid Arguments voltage_estimate voltage value in decimal or scientific notation Usage pmu_21->select_hg_segment(5.0);
ref_temp_diff
Description This function returns a value that is the difference of reference temperatures between the time the calibration was done and the time this function is called. Format float ref_temp_diff(unsigned char measure_mode, char passed_range); Valid Arguments measure_mode PMU_DUAL_PASS_NORMAL PMU_HIGH_GAIN_NORMAL PMU_DUAL_PASS_FOCUS PMU_HIGH_GAIN_FOCUS passed_range RANGE_5_V RANGE_10_V
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source_temp_diff
Description This function returns a value that is the difference of source temperatures between the time the calibration was done and the time this function is called. Format float source_temp_diff(unsigned char measure_mode, char passed_range); Valid Arguments measure_mode PMU_DUAL_PASS_NORMAL PMU_HIGH_GAIN_NORMAL PMU_DUAL_PASS_FOCUS PMU_HIGH_GAIN_FOCUS passed_range RANGE_5_V RANGE_10_V
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focus_calibration
Description This function performs a focus calibration that is run under program control. The function records the reference and source temperatures before performing the calibration. The function will return a False if a problem occurs during the calibration routine. Relays are required on the DUT card to connect the PMU cards source and measure units to the HP3458A external meter (a connection diagram follows). If the number of power line cycles used by the HP3458A meter during calibration is not specified the default value is 1. Format short focus_calibration(char passed_range, unsigned short nplc); Valid Arguments passed_range RANGE_5_V RANGE_10_V nplc (number of power line cycle used by HP3458A meter during calibration) 1 2 5 10
Usage pmu_21->focus_calibration(RANGE_10_V);
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NC
NO
SENSE_HIGH
NC
To DUT
NO
MEAS_POS
NC
MEAS_NEG
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CHAPTER 16
The PRO Prototyping Card instrument is used to build custom DUT circuitry when standard TMT tester resources are not available, serving as a system resource available to any DUT. This is a four-layer board with power and ground planes, and with 16-pin access to the DUT board interface. The board provides full access to the buffered 16-bit system bus and all shared bus lines (BUS_2 to BUS_10). The PRO has a high-speed buffer and high-speed comparators.
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Function Calls
init
Description This is the board initialization routine. It resets the state of all board registers as follows:
Registers ADC_MUX DACs Switches Relays All other registers Registers State All 4 mux inputs open; all other register bits are cleared to logic low All 4 DACs reset to 0 code PRO_REG_4 and the upper 8 bits of PRO_REG_C: all switches open (logic high) Lower 8 bits of PRO_REG_C: all open (all bits are cleared to logic low) Addresses 0x08, 0x10 through 0x1E, and 0x400 through 0x41E: all are cleared to logic low
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select_adc_mux
Description This function selects one of the defined inputs to the ADC and opens the other inputs. Format void select_adc_mux(unsigned short mux); Valid Arguments mux PRO_ADC_IN0 PRO_ADC_IN1 PRO_ADC_IN2 PRO_ADC_IN3 PRO_ADC_OFF
Usage pro_15->select_adc_mux(PRO_ADC_IN2);
convert_read_adc
Description This function directs the on-board ADC to measure the signal at its input (through select_adc_mux above), and return a twos complement result per the table below. The ADC resolution is 12 bits, but its result is left-shifted to appear in bits D15..D4. The least significant bits in D3..D0 are all set to 1.
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Input Voltage >= +9.995V +9.990V +0.005V 0.0V -0.005V -9.995V <=-10.000V Format
short convert_read_adc(void); Valid Arguments none Usage result = pro_15->convert_read_adc(); Or, to convert a floating point result: float measurement; short adc_code; adc_code = pro_15->convert_read_adc(); adc_code &= 0xFFF0; // remove insignificant bits
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write_dac
Description This function writes the programmed value into the selected DAC to generate an analog voltage out of this DAC. The voltage magnitude is set by value; the sign is set by the close_switch command on the next page. (After init, all voltages will be positive 0.0.) All PRO DACs12-bit resolution, but they are connected to the upper order data bits D15..D4, with D3..D0 unconnected. Nominal full-scale voltage is 10.0 V (less 1 LSB). The magnitude of the voltage with an input value is 10.0 * value / 65536 as follows:
void write_dac(char dac_no, unsigned short value); Valid Arguments dac_no PRO_DAC0 PRO_DAC1 PRO_DAC2
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To calculate a value for a floating point input (assumed to be in the variable float voltage): unsigned short value = fabs( voltage / 10.0 * 65536.0); pro_15->write_dac(PRO_DAC2, value);
close_switch open_switch
Description These functions open or close the named switch without changing the state of any other switches. close_switch clears the register bit to a logic low; open_switch to a high. The switches refer to various bits on registers Uww, Uxx, Uyy and Uzz. Some switches have specific functions, as listed below(POL_DACn etc.), while the switches labelled as PRO_SWn are not assigned specific functions. Remaining register bits (PRO_NULLn) are not tied to any switches in the layout, and are available as required. Format void close_switch(unsigned short switch); void open_switch(unsigned short switch);
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Valid Arguments switch POL_DAC0 POL_DAC1 POL_DAC2 POL_DAC3 PRO_SW1 PRO_SW2 PRO_SW3 PRO_SW4 PRO_NULL0 PRO_NULL1 PRO_NULL2 PRO_NULL3 PRO_NULL4 PRO_NULL5 PRO_NULL6 PRO_NULL7 PRO_NULL10 PRO_NULL11 PRO_NULL12 PRO_NULL14 PRO_NULL26 PRO_NULL27 PRO_NULL28 PRO_NULL30 // open switch for positive voltages from DAC0 // close switch for negative voltages from DAC1
// connects to U6 pin 5 - switch U26A // connects to U6 pin 2 - switch U26D // connects to U5 pin 5 - switch U27A // connects to U5 pin 2 - switch U27D // reg4 data bit 0 // reg4 data bit 1 // reg4 data bit 2 // reg4 data bit 3 // reg4 data bit 4 // reg4 data bit 5 // reg4 data bit 6 // reg4 data bit 7 // connects to U5 pin 15 - TP19 // connects to U5 pin 6 - TP18 // connects to U5 pin 16 - TP20 // connects to U5 pin 19 - TP21 // connects to U6 pin 15 - TP23 // connects to U6 pin 6 - TP22 // connects to U6 pin 16 - TP24 // connects to U6 pin 19 - TP25
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close_relay open_relay
Description These functions open or close the stated relay, without changing the state of any of the other relays. The functions can also be used to set or clear any bit in any stated register, without affecting any other register on the card. Relays are either named or assigned a number, depending on whether the optional addr is used. addr selects which register to write. The default value is 0x0C, which selects the relay drive. Format void close_relay(unsigned short relay, unsigned short addr); void open_relay(unsigned short relay, unsigned short addr); Valid Arguments relay (if no addr is used) PRO_RLY1 PRO_RLY2 PRO_RLY3 PRO_RLY4 PRO_RLY5 PRO_RLY6 PRO_RLY_NULL4 PRO_RLY_NULL5 // K1 // K2 // K3 // K4 // K5 // K6 // U14 pin 19 // U14 pin 2 - driven through U15 pin 16
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relay (if addr is used) integer number 0 to 15, corresponding to the bits location in the register addr 0x0C (default) 0x00 // ADC mux and ADC control register 0x02 // DAC 0 0x04 // switches 0x06 // DAC 1 0x08 // undefined register - not in board layout 0x0A // DAC 2 0x0C // default value - relay controls and switches 0x0E // DAC 3 0x10 though 0x1E // undefined registers - not in board layout 0x400 though 0x41E // undefined registers - not in board layout
Usage pro_15->close_relay(PRO_RLY1); pro_15->open_relay(PRO_RLY6); pro_15->close_relay(14,0x04); // sets the output of U5 (reg4) corresponding to data bit 14 (i.e. U5 pin 19)
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CHAPTER 17
The PVI Pulsed Voltage/Current instrument is available in two versions: PVI-10 and PVI-100, to generate up to 10 A and 100 A pulses, respectively. This chapter presents programming information for the two hardware versions in separate sections, both including function calls and programming examples.
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init
Description This is the board initialization routine. The function opens all output connect switches, resets voltage and current DACs, and turns on the capacitor bank charger. Format void init(void); Valid Arguments none Usage pvi_4->init();
set_voltage
Description This function programs the voltage limit and range. The default for vrange is autorange. Format void set_voltage(float value, char vrange);
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Valid Arguments
value
voltage limit in decimal or scientific notation
vrange
(Default is autorange)
set_current
Description This function programs the current limit and range, and requires a 15 ms delay. The default for irange is autorange. Format void set_current(float value, char irange); Valid Arguments
value
current limit in decimal or scientific notation
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irange
(Default is autorange)
set_meas_mode
Description This function sets the measurement mode for subsequent measurements. Format void set_meas_mode(unsigned short mode); Valid Arguments
mode
PVI_MEASURE_VOLTAGE PVI_MEASURE_CURRENT
Usage pvi_4->set_meas_mode(PVI_MEASURE_CURRENT);
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measure
Description This function performs a single measurement. Format float measure( void); Valid Arguments none Usage result = pvi_4->measure();
measure_average
Description This function performs the stated number of measurements and returns the average. Format float measure_average(unsigned short samples); Valid Arguments
samples
integer number of samples
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charge_on
Description This function allows charging of the storage cap. The function requires a 15 ms delay. Format void charge_on(void); Valid Arguments none Usage pvi_4->charge_on(); delay(15);
charge_off
Description This function stops the charging of the capacitor bank and allows the supply to be used in floating mode. The function requires a 15 ms delay. Format void charge_off(void);
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supply_off
Description This function sets the voltage and current DACs to zero, sets both the voltage and current ranges to their lowest values, and opens all output switches. Format void charge_off(void); Valid Arguments none Usage pvi_4->supply_off();
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close_switch open_switch
Description This function closes and opens the stated on-board switches. Format void close_switch(unsigned short switch); void open_switch(unsigned short switch); Valid Arguments switch PVI_HIGH_FORCE_1 PVI_HIGH_FORCE_2 PVI_HIGH_FORCE_3 PVI_HIGH_FORCE_4 PVI_HIGH_SENSE_1 PVI_HIGH_SENSE_2 PVI_HIGH_SENSE_3 PVI_HIGH_SENSE_4 PVI_LOW_FORCE_2 PVI_LOW_FORCE_3 PVI_LOW_FORCE_4 PVI_LOW_FORCE_5 PVI_LOW_SENSE_2 PVI_LOW_SENSE_3 PVI_LOW_SENSE_4 PVI_LOW_SENSE_5
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T = C*(V/i)
Inserting the PVI and user values, the formula becomes: T = 3.3 mF*((Cap Initial V - (user V + 5 V))/user I) The extra 5 V is required for PVI circuitry usage. The sample calculation below illustrates the formula. In the example, 30 V is required at 1.3 A. To figure out how long 1.3 A will be available at the required voltage, plug in the numbers as shown:
T = 3.3 mF*((50 V - (30 V + 5 V)) / 1.3 A) T = 3.3e-3 F*((50 V - 35 V) / 1.3 A) T = 3.3e-3 F*(15 V / 1.3 A) T = 3.3e-3*(11.54)
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T = 38.1 ms The answer of 38.1 ms means that 1.3 A will be available for 38.1 ms at a constant voltage of 30 V.
init
Description This is the board initialization routine. The function opens all force and sense switches, resets voltage and current DACs, and initiates capacitor bank charging. Format void init(void); Valid Arguments none Usage pv3_4->init();
set_voltage
Description This function programs the voltage limit and range. The default for vrange is autorange.
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Format void set_voltage(float voltage_value, char vrange); Valid Arguments voltage_value voltage limit in decimal or scientific notation vrange (Default is autorange)
set_current
Description This function programs the current limit and range. The default for irange is autorange. Format void set_current(float current value, char irange); Valid Arguments current value
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set_meas_mode
Description This function sets the measurement mode for subsequent measurements. Format void set_meas_mode(unsigned short mode); Valid Arguments mode PV3_MEASURE_VOLTAGE PV3_MEASURE_CURRENT PV3_CHARGE_S PV3_MEASURE_TEMP
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Usage pv3_4->set_meas_mode(PV3_MEASURE_CURRENT);
measure
Description This function performs a single measurement. Format float measure( void); Valid Arguments none Usage result = pv3_4->measure();
measure_average
Description This function performs the stated number of measurements and returns the average. Format float measure_average(unsigned short samples);
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charge_on
Description This function monitors the temperature of the PVIs output driver and initiates capacitor bank charging if the temperature is below a set limit. If the temperature is above the limit, charging is delayed and the driver temperature is displayed on screen. Format void charge_on(void); Valid Arguments none Usage pv3_4->charge_on();
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charge_off
Description This function stops the charging of the capacitor bank and allows the PVI to be used in floating mode. Format void charge_off(void); Valid Arguments none Usage pv3_4->charge_off();
close_switch open_switch
Description This function closes and opens the stated force and sense switches. Format void close_switch(unsigned short switch); void open_switch(unsigned short switch);
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Valid Arguments switch PV3_HIGH_FORCE_1 PV3_HIGH_FORCE_2 PV3_HIGH_FORCE_3 PV3_HIGH_FORCE_4 PV3_HIGH_FORCE_5 PV3_HIGH_SENSE_1 PV3_HIGH_SENSE_2 PV3_HIGH_SENSE_3 PV3_HIGH_SENSE_4 PV3_HIGH_SENSE_5 PV3_LOW_FORCE_1 PV3_LOW_FORCE_2 PV3_LOW_FORCE_3 PV3_LOW_FORCE_4 PV3_LOW_FORCE_5 PV3_LOW_SENSE_1 PV3_LOW_SENSE_2 PV3_LOW_SENSE_3 PV3_LOW_SENSE_4 PV3_LOW_SENSE_5
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volt_meas_range
Description This function allows the voltage measurement range to be set independently of the forcing range. To be effective, this function must be programmed after set_voltage. The function should not be used with forcing voltages greater than 10 V. Format void volt_meas_range(char meas_range); Valid Arguments meas_range RANGE_1_V RANGE_3_V
normal_comp fast_comp
Description These functions change the compensation of the control loop. slow_comp can be used for loads that might not be stable at the faster settings. fast_comp can be used to maintain settling times for loads that effectively attenuate the control loops bandwidth. The board initialization routine (init) sets the control loop to normal_comp.
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Format void slow_comp(void); void normal_comp( void); void fast_comp(void); Valid Arguments none Usage pv3_4->slow_comp(); pv3_4->normal_comp(); pv3_4->fast_comp();
current_fast current_normal
Description These functions set the gain in the current section of the control loop. current_fast can be used to increase control loop bandwidth to maintain settling times, as well as to achieve faster slew rates for large voltage swings. The board initialization routine (init) sets the function to current_normal. Format void current_fast(void); void current_normal(void);
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voltage_fast voltage_normal
Description These functions set the gain in the voltage section of the control loop. voltage_fast can be used to maintain the slew rate when the forcing voltage is set to 2 V or less and the PVI is driving very low impedance loads in the current compliant mode. The board initialization routine (init) sets the function to voltage_normal. Format void voltage_fast(void); void voltage_normal(void); Valid Arguments none Usage pv3_4->voltage_fast(); pv3_4->voltage_normal();
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kelvin_on kelvin_off
Description These functions allow the PVI to do limited kelvin-contact testing without using another VI instrument. The board initialization routine (init) sets the function to kelvin_off. Format void kelvin_on(void); void kelvin_off(void); Valid Arguments none Usage pv3_4->kelvin_on(); pv3_4->kelvin_off();
drive_on drive_off
Description These functions control the period of time that the PVI drives the load. drive_on initiates the drive; drive_off terminates it. With the PVI 100, the functions set_voltage and set_current can no longer be used to initiate the drive. However, set_voltage and set_current can be used to change the drive
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parameters after the drive has been initiated with drive_on. The drive period is limited to 300 s on the 100 A current range. Format void drive_on(void); void drive_off(void); Valid Arguments none Usage pv3_4->drive_on(); pv3_4->drive_off();
drive_meas_off
Description This function initiates a drive, waits for the programmed number of delay periods to pass, makes a single measurement, and then terminates the drive. Each delay period is 10 s long. The drive period is limited to 300 s on the 100 A current range. Format void drive_meas_off(unsigned short meas_delay); Valid Arguments meas_delay
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1F 2F 3F 4F 5F FGND
Do not connect test points TP7, TP8, or TP17 to the oscilloscope or other grounds. Use only a differential probe at these test points.
CAUTION
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FLOATING GROUND-REFERENCED CIRCUITRY 0.5 A CURRENT LIMITER 7000 F CAPACITOR BANK FORCE SWITCHES SENSE SWITCHES
+65 V
+ +
LATCHES SYSTEM WITH BUS OPTICALLY COUPLED SWITCH, RANGE, AND COMPENSATION CONTROLS
DRIVE ON/OFF
LOAD
+ -
CHARGE MEAS
OUT
IN
TEMP MEAS
V MEAS
OUT
+ DIFF -
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CHAPTER 18
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Function Calls
init
Description Board initialization routine. Sets voltage to 0V, sets current to 0A, opens all relays, sets control bits to zero. Format void init(void); Valid Arguments none Usage rcs_16->init();
write_dac
Description Writes a value directly to the DC current control DAC (0), or the ramp control DAC (1). Format void write_dac(char (dac_no), unsigned short (value));
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Valid Arguments dac_no 0 = DC current control DAC 1 = Ramp current control DAC value Usage rcs_16->write_dac(0, 4095); //DAC value 0 to Full Scale = 4095
load_count
Description Loads ramp output count down counter. Format void load_count(unsigned short (count)); Valid Arguments count Usage rcs_16->load_count(10); //2 to 255 Ramp current pulses.
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set_ramp_current
Description Sets the value of the DC fixed current, the Ramped current rate, and returns the current range. Format unsigned short set_ramp_current(float (ramp_rate), float (min_current), short (forced_range); Valid Arguments returned range 0 = Low range: RCS_RANGE_0, max values Ramp 200e3A/S DC 300mA 1 = mid range: RCS_RANGE_1, max values Ramp 700e3A/S DC 1A 2 = high range: RCS_RANGE_2, max values Ramp 3500e3A/S DC 5A ramp_rate min_current forced_range //Current ramp rate in Amps/Second 50e3 to 3500e3A/S. //DC current value in Amps 0 to 5A. (optional, default is RCS_AUTO_RANGE)
RCS_RANGE_0, max values Ramp 200e3A/S DC 300mA RCS_RANGE_1, max values Ramp 700e3A/S DC 1A RCS_RANGE_2, max values Ramp 3500e3A/S DC 5A RCS_AUTO_RANGE,
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set_ramp_delay
Description Sets delay from trigger to start of ramp, (200 to 1300nS delay) and from trigger to end of ramp (0.5 to 21uS duration). Format void set_ramp_delay_duration(float ( delay), float ( duration)); Valid Arguments delay //200 to 1300nS.
set_bit
Description Low level command to set a bit TRUE in one of the RCS registers. Format void set_bit(unsigned char (reg), unsigned short (element)); Valid Arguments
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reg
element
RCS_SDA_NVRAM, RCS_WP_NVRAM, RCS_SCL_NVRAM, RCS_ENABLE, RCS_START, RCS_EN_COUNT, RCS_CAL, RCS_INH_RAMP, RCS_LATCH, RCS_RAMP_R1, RCS_RAMP_R2, RCS_DELAY_R1, RCS_DELAY_R2, RCS_COUNT_CLEAR,
clear_bit
Description Low level command to set a bit FALSE in one of the RCS registers. Format void clear_bit(unsigned char (reg), unsigned short (element);
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Valid Arguments reg //Register of bit to be cleared. RCS_WR_CONTROL RCS_DELAY_LATCH RCS_WR_COUNT_DATA element //Bit to be set FALSE
RCS_SDA_NVRAM, RCS_WP_NVRAM, RCS_SCL_NVRAM, RCS_ENABLE, RCS_START, RCS_EN_COUNT, RCS_CAL, RCS_INH_RAMP, RCS_LATCH, RCS_RAMP_R1, RCS_RAMP_R2, RCS_DELAY_R1, RCS_DELAY_R2, RCS_COUNT_CLEAR,
open_relay close_relay
Description Opens one of the RCS board relays. Closes one of the RCS board relays.
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Format void open_relay(unsigned short ( element)); void close_relay(unsigned short ( element)); Valid Arguments element RCS Relays RCS_CLAMP_VOLTAGE RCS_HIGH_RANGE RCS_VSOURCE RCS_STROBE RCS_OUTPUT RCS_EXT_DRV1 RCS_LOW_RANGE RCS_MID_RANGE RCS_SDA_NVRAM
write_register
Description Low level programming of a complete RCS Board register. Format void write_register(unsigned char (reg), unsigned short (val));
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Valid Arguments reg //Register to be programmed. RCS_WR_CONTROL RCS_DELAY_LATCH RCS_WR_COUNT_DATA value //16bit value to be programmed into (reg)
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+50V
Current Range
Output to DUT
Clamp Voltage
Counter No. Pulses
Ramp Trigger
Ramp Duration
SYNC
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CHAPTER 19
The TIA Time Interval Analyzer allows for real-time measurements of bit patterns and dynamic measurements of clock signals. This instrument acquires its measurements continuously into on-board memory -- it can thus be viewed as a timing acquisition instrument that compares to traditional time measurement instruments in the same way that digitizers compare to voltmeters.Physically, the TIA instrument is installed in the CPU case. Specific functions (GT65X-xxxxxxxxx) may be called directly from the user test program required. For formats, valid arguments and usage, see Guide Technology s GT650 Series Time Interval Analyzers - Operating Manual in your Visual ATE documentation package.
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Function Calls
init
Description This function loads the TIA calibration file. Loading takes approximately 1 second. The user should call at program load time. Format void init(char doing_init); Valid Arguments doing_init TRUE FALSE (Default) Usage tia_card->init();
arm
Description This function sets the TIA arm mode. Format short arm(short source, short polarity);
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Valid Arguments source TIA_INTERNAL_ARM TIA_EXTERNAL_ARM TIA_SW_ARM TIA_ARM_OFF polarity TIA_POSITIVE_POLARITY TIA_NEGATIVE_POLARITY
do_general_setup
Description This function initializes the TIA setup using setup variables. The user should call before using the TIA. If force_setup is true, initialization will be done on both channels even if previously setup Format short do_general_setup(char force_setup);
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measure
Description This function begins the measurement. The action depends on the arming mode: Internal arm begins measuring immediately External arm begins measuring on external arm signal Software arm begins measuring on software arm signal
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measure_freq
Description This function measures the frequency on the selected channel. The number of measurements averaged is one less than the number of time measurement (time tags) set in the set_measure command. For example, setting three time tags gives two measurements averaged. The minimum setting is two time tags; this setting gives a single frequency measurement. If an error is detected, a frequency of 0 is returned (for example, if there are no samples, or no samples within the specified maximum and minimum limits). Format short measure_freq(double& freq); Valid Arguments freq Averaged measured frequency is returned in the freq variable Returned Argument 0 = error
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Usage tia_card->measure_freq();
measure_skew
Description This high-level function measures skew between the Channel A and Channel B time tags. The number of measurements averaged is equal to the number of time measurements (time tags) set in the set_measure command. The minimum number of time tags that can be set in set_measure is one. This single time tag gives a single skew measurement. Format short measure_skew(double& skew); Valid Arguments skew Averaged measured skew is returned in the skew variable Returned Argument 0 = error Usage tia_card->measure_skew();
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read_single_pulse
Description This function calculates width of first pulse from previously gathered data. Format doubleread_single_pulse(void); Valid Arguments none Returned Argument measured pulse width Usage tia_card->read_single_pulse();
set_measure
Description This function sets the number of time measurements (time tags) to be taken for each channel. The function allocates memory based on the number of time measurements set. Format short set_measure(unsigned long channel_a_count, unsigned long channel_b_count);
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Valid arguments channel_a_count Channel A measurement count channel_b_count Channel B measurement count Returned Argument 0 = error Usage tia_card->set_measure(CHANNEL_A_COUNT,CHANNEL_B_COUNT);
set_sampling_mux
Description This function provides a user-controlled setup of the TIA sampling mux. It is not needed if setup_frequency, setup_skew or setup_single_pulse are used; these routines automatically set the sampling mux. Format short set_sampling_mux(short source, short mux_chan); Valid Arguments source TIA_CHANNEL_A TIA_CHANNEL_B
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mux_chan TIA_CHANNEL_SAMP_MUX_A_POS_EDGE TIA_CHANNEL_SAMP_MUX_B_POS_EDGE TIA_CHANNEL_SAMP_MUX_A_NEG_EDGE TIA_CHANNEL_SAMP_MUX_B_NEG_EDGE TIA_CHANNEL_SAMP_MUX_DIV_2 TIA_CHANNEL_SAMP_MUX_DIV_4 TIA_CHANNEL_SAMP_MUX_DIV_16 TIA_CHANNEL_SAMP_MUX_DIV_32 TIA_CHANNEL_SAMP_MUX_DIV_64 TIA_CHANNEL_SAMP_MUX_DIV_256
set_threshold
Description This function sets the voltage thresholds for TIA measurements. Format short set_threshold(char channel,double value); Valid Arguments channel TIA_CHANNEL_A
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TIA_CHANNEL_B value voltage to be set (in volts) Returned Argument 0 = error Usage tia_card->set_threshold(CHANNEL_A); tia_card->set_threshold(CHANNEL_B);
set_timeout
Description This function sets the timeout limit for measuring samples. Format short set_timeout(double timeout); Valid Arguments timeout time in seconds Returned Argument 0 = error
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Usage tia_card->set_timeout(nn);
setup_frequency
Description This function sets the TIA sampling mux for single-channel frequency measurements. It also sets TIA divider according to max_freq. If max_freq goes above 3.5 MHz, the TIA divider is set to divide by 2, 4, 16, 32, 64, or 256 as required to bring the measured frequency below 3.5 MHz. trigger_edge has no meaning when the divider is enabled. Format short setup_frequency(char channel,double max_freq, char trigger_edge = -1); Valid Arguments channel TIA_CHANNEL_A TIA_CHANNEL_B max_freq Maximum frequency to be measured trigger_edge TIA_POSITIVE_POLARITY TIA_NEGATIVE_POLARITY
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setup_single_pulse
Description This function sets up the TIA sampling mux, arm mode, and set_measure for single pulse width measurement of the specified input channel. The polarity argument refers to the leading edge of the input pulse. Format short setup_single_pulse(char channel,char polarity); Valid Arguments channel TIA_CHANNEL_A TIA_CHANNEL_B polarity TIA_POSITIVE_POLARITY TIA_NEGATIVE_POLARITY
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setup_skew
Description This function sets up the TIA sampling mux for skew measurement. Input Channel A is measured with respect to Input Channel B. Format short setup_skew(char trigger_edge_a,char trigger_edge_b); Valid Arguments trigger_edge TIA_POSITIVE_POLARITY TIA_NEGATIVE_POLARITY
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std_dev_freq
Description This function calculates the standard deviation of frequency data from a previous measurement. Format double std_dev_freq(char channel, unsigned longlen=0); Valid Arguments channel TIA_CHANNEL_A TIA_CHANNEL_B longlen Optional, length of data Returned Argument Calculated standard deviation Usage tia_card->std_dev_freq(TIA_CHANNEL_A);
std_dev_time
Description This function calculates the standard deviation of time or skew data from a previous measurement. Use TIA_CHANNEL_A for skew measurement data.
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Format double std_dev_time(char channel, unsigned longlen=0); Valid Arguments channel TIA_CHANNEL_A TIA_CHANNEL_B longlen Optional, length of data Returned Argument Calculated standard deviation Usage tia_card->std_dev_time(TIA_CHANNEL_A);
average
Description This function returns averaged time data for the selected channel. Format doubleaverage(char channel, unsigned longlen=0); Valid Arguments channel
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TIA_CHANNEL_A TIA_CHANNEL_B longlen Optional, length of data Returned Argument Measured frequency (averaged) Usage tia_card->doubleaverage(TIA_CHANNEL_A);
average_skew
Description This function returns the average of measured skew data. Format short average_skew(double& average_skew, unsigned longlen); Valid Arguments skew Averaged measured skew is returned in the skew variable longlen Optional, length of data
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convert_samples
Description This function converts time tags to time data. If the max_limit_active or min_limit_active global variables are set TRUE, then time data outside of the max_val and/or min_val limits is discarded. In this case, the global variables a_count and/or b_count are updated with the new number of valid data samples. The global variable conversion_done[channel] is set TRUE if the conversion is successfully completed. Format void convert_samples(char channel); Valid Arguments channel TIA_CHANNEL_A TIA_CHANNEL_B
Usage tia_card->convert_sample(CHANNEL_A);
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convert_freq_samples
Description This function converts time tags to frequency data. If the global variables max_limit_active or min_limit_active are set TRUE, then frequency data outside of the max_val and/or min_val limits is discarded. In this case, the global variables a_count and/or b_count are updated with the new number of valid frequency samples. The global variable conversion_done[channel] is set TRUE if the conversion is successful. Format void convert_freq_samples(char channel); Valid Arguments channel TIA_CHANNEL_A TIA_CHANNEL_B
Usage tia_card->convert_frequency(TIA_CHANNEL_A);
convert_skew_samples
Description This function converts time tags to skew data. If the global values max_limit_active or min_limit_active are set TRUE, then skew data outside of the max_val and/or min_val limits is discarded. In this case, the global variables a_count and/or b_count are updated with the new number of valid skew samples. The global variable conversion_done[channel] is set TRUE if the conversion is successful.
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Format short convert_skew_samples(); Valid Arguments none Returned Argument 0 = error Usage tia_card->convert_skew_sample();
frequency
Description This function calculates the average frequency using the time measurements from one channel. convert_samples (see previous page) must be run before this routine. Format double frequency(char channel); Valid Arguments channel TIA_CHANNEL_A TIA_CHANNEL_B
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read_data
Description This function reads raw time tag data from the TIA into memory. Format short read_data(); Valid Arguments none Returned Argument 0 = error Usage tia_card->read_data();
read_skew
Description This routine calculates the average skew from previously collected data.
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Format short read_skew(double& skew, unsigned long len); Valid Arguments skew len Averaged measured skew is returned in the skew variable Optional, length of data
Setup Variables
done_setup
Description This routine sets a flag indicating that the setup had been done. Format tia_card->m_setup[char channel].done_setup= char Values TRUE
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Usage tia_card->m_setup[TIA_CHANNEL_A].done_setup;
channel_enabled
Description This routine sets a flag to enable the channel. Use the do_general_setup routine to execute enable. Format tia_card->m_setup[char channel].channel_enabled= char Values TRUE FALSE (default) Index channel TIA_CHANNEL_A TIA_CHANNEL_B
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Usage tia_card->m_setup[TIA_CHANNEL_A].channel_enabled;
clock_source
Description This routine sets a flag to select the clock source. Use the do_general_setup routine to execute the selection. Format tia_card->m_setup[char channel].clock_source= char Values TIA_INTERNAL_CLOCK (default) TIA_EXTERNAL_CLOCK
Usage tia_card-m_>setup[TIA_CHANNEL_A].clock_source;
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impedance
Description This routine sets a flag to select channel impedance. Use the do_general_setup routine to execute the selection. Format tia_card->m_setup[char channel].impedance= char Values TIA_50_IMPEDANCE (default) TIA_1MEG_IMPEDANCE Index channel TIA_CHANNEL_A TIA_CHANNEL_B
Usage tia_card->m_setup[TIA_CHANNEL_A].TIA_50_IMPEDANCE;
coupling
Description This routine sets a flag to select channel coupling. Use the do_general_setup routine to execute the selection.
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Format tia_card->m_setup[char channel].coupling= char Values TIA_AC_COUPLING (default) TIA_DC_COUPLING Index channel TIA_CHANNEL_A TIA_CHANNEL_B
Usage tia_card->m_setup[TIA_CHANNEL_A].TIA_AC_COUPLING;
threshold_volts_percent
Description This routine sets a flag to select channel threshold mode. Use the do_general_setup routine to execute the selection. Format tia_card->m_setup[char channel].threshold_volts_percent= char Values TIA_THRESHOLD_VOLTS (default)
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Usage tia_card->m_setup[TIA_CHANNEL_A].TIA_THRESHOLD_VOLTS;
Global Variables
a_count b_count
Description These are system variables that report the number of samples taken for each channel. Format unsigned long a_count,b_count Values number of samples available for Channel A and for Channel B Usage tia_card->a_count,b_count
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*chan_a_result *chan_b_result
Description This routine consists of system variables that point to the memory location of the samples taken for each channel. Format double *chan_a_result,*chan_b_result Value pointer to samples available for Channel A and for Channel B Usage tia_card->chan_a_result;
conversion_done[channel]
Description This system array indicates that time tag to real-time conversion has been completed successfully (without error). Format char conversion_done[channel] Values TRUE
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Usage tia_card->conversion_done[TIA_CHANNEL_A];
max_limit_active min_limit_active
Description This is a user-set flag to activate the maximum/minimim limit feature. Samples outside of the maximum or minimum limits are ignored if this flag is set. Format char max_limit_active char min_limit_active Values TRUE FALSE Usage tia_card->min_limit_active;
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max_val min_val
Description This is a user-set limit for the maximum or minimum values. Samples are compared against these values with the max/min limit feature. Format double max_val double min_val Value User-set to desired limit value Usage tia_card->doublemax_val;
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// !!!! User initialization code above this comment (do not remove // comment) }
Frequency Measurement
/******************************************** Setup TIA *********************************************/ // tia_card->display_errors = FALSE;//no error boxes from tia // function tia_card->display_errors = TRUE;//error boxes from tia function tia_card->m_setup[TIA_CHANNEL_A].channel_enabled= TRUE; tia_card->m_setup[TIA_CHANNEL_A].clock_source= TIA_INTERNAL_CLOCK; tia_card->m_setup[TIA_CHANNEL_A].impedance= TIA_50_IMPEDANCE; tia_card->m_setup[TIA_CHANNEL_A].coupling= TIA_DC_COUPLING; tia_card->m_setup[TIA_CHANNEL_A].threshold_volts_percent = TIA_THRESHOLD_VOLTS; if(!tia_card->do_general_setup()) box.error(TIA general_setup error); tia_card->m_setup[TIA_CHANNEL_A].done_setup= TRUE; if(!tia_card->set_threshold(TIA_CHANNEL_A,ours->tia_thrsh)) box.error(TIA set_threshold);
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*********************************************/ //setup measurement mode //set TIA timeout tia_card->set_timeout(ours->timeout); // TIA timeout //set number of time samples to be taken if(!tia_card->set_measure(ours->tia_a_sampls,0)) box.error(TIA set_measure error); //set arm mode if(!tia_card->arm(TIA_INTERNAL_ARM,TIA_POSITIVE_POLARITY)) box.error(TIA arm error); /******************************************** Measure Channel A Frequency *********************************************/ //setup //set TIA sampling mux divider for maximum frequency tia_card->setup_frequency(TIA_CHANNEL_A,ours->max_freq_1); //set min/max measurement limits if (ours->max_lim_flg) tia_card->max_limit_active = TRUE; else tia_card->max_limit_active = FALSE; if (ours->min_lim_flg) tia_card->min_limit_active = TRUE; else tia_card->min_limit_active = FALSE; tia_card->max_val = ours->max_limit; tia_card->min_val = ours->min_limit; //measure tia_card->measure_freq(mfreq); //check for timeout if(!tia_card->read_options.timeout) { //check standard deviation of freq measurements std_dev = tia_card->std_dev_freq(TIA_CHANNEL_A);
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//check number of freq samples (one less than the number of time samples taken) good_smpl_cnt = tia_card->a_count ; } else { //timeout occurred std_dev = (double)0.0; good_smpl_cnt = 0; }
Skew Measurement
/******************************************** Setup TIA *********************************************/ // tia_card->display_errors = FALSE;//no error boxes from tia //function tia_card->display_errors = TRUE;//error boxes from tia function tia_card->m_setup[TIA_CHANNEL_A].channel_enabled= TRUE; tia_card->m_setup[TIA_CHANNEL_A].clock_source= TIA_INTERNAL_CLOCK; tia_card->m_setup[TIA_CHANNEL_A].impedance= TIA_1MEG_IMPEDANCE; tia_card->m_setup[TIA_CHANNEL_A].coupling= TIA_DC_COUPLING; tia_card->m_setup[TIA_CHANNEL_A].threshold_volts_percent = TIA_THRESHOLD_VOLTS; tia_card->m_setup[TIA_CHANNEL_B].channel_enabled= TRUE; tia_card->m_setup[TIA_CHANNEL_B].clock_source= TIA_INTERNAL_CLOCK; tia_card->m_setup[TIA_CHANNEL_B].impedance= TIA_1MEG_IMPEDANCE; tia_card->m_setup[TIA_CHANNEL_B].coupling= TIA_DC_COUPLING; tia_card->m_setup[TIA_CHANNEL_B].threshold_volts_percent = TIA_THRESHOLD_VOLTS; tia_card->set_timeout(10e-3); // TIA times out after 10 ms if(!tia_card->do_general_m_setup()) box.error(TIA general_m_setup error); tia_card->setup[TIA_CHANNEL_A].done_setup= TRUE; tia_card->setup[TIA_CHANNEL_B].done_setup= TRUE;
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/******************************************** Measure set up *********************************************/ //setup measurement mode //set number of time samples to be taken if(!tia_card->set_measure(ours->tia_sampls,ours->tia_sampls)) box.error(TIA set_measure error); //set arm mode //external arm required for > 3.5 MHz edge rates if (ours->ext_arm_flg) { if(!tia_card->arm(TIA_EXTERNAL_ARM,TIA_POSITIVE_POLARITY)) box.error(TIA arm error); } else { if(!tia_card->arm(TIA_INTERNAL_ARM,TIA_POSITIVE_POLARITY)) box.error(TIA arm error); } /******************************************** Measure Chan A vs Chan B skew *********************************************/ //setup //set up TIA sampling mux for positive edge skew tia_card->setup_skew
(TIA_CHANNEL_SAMP_MUX_A_POS_EDGE,TIA_CHANNEL_SAMP_MUX_B_POS_EDGE);
//setup thresholds if(!tia_card->set_threshold(TIA_CHANNEL_A,ours->tia_thrsh_a)) box.error(TIA set_threshold); if(!tia_card->set_threshold(TIA_CHANNEL_B,ours->tia_thrsh_b)) box.error(TIA set_threshold); //set max/min skew limits (max limit required for > 3.5MHz edge //rates) if (ours->max_lim_flg) tia_card->max_limit_active = TRUE; else tia_card->max_limit_active = FALSE;
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if (ours->min_lim_flg) tia_card->min_limit_active = TRUE; else tia_card->min_limit_active = FALSE; tia_card->max_val = ours->max_limit; tia_card->min_val = ours->min_limit; //measure tia_card->measure_skew(skew); // Function returns FALSE above if all not ok. //check for timeout if(!tia_card->read_options.timeout) { //check standard deviation of the time measurements std_dev = tia_card->std_dev_time(TIA_CHANNEL_A); //check number of samples used good_smpl_cnt = tia_card->a_count; } else { //timeout occurred std_dev = (double)0.0; good_smpl_cnt = 0; }
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CHAPTER 20
The TMU Time Measurement Unit is a precise timer with the start and stop counting conditions controlled by programmable voltage threshold. comparators.
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TMU Theory
The figure below shows the TMU conceptual diagram .
Start Voltage Reference
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Tr
Tf Device Input
Device Output Tp
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Slope
Arm
T = C*(V/I)
where C and I are known and V is measured. The TMU uses two sets of interpolation circuitry: one for the start adjust and one for the stop adjust. The capacitor discharge is initiated by the TMU start and stop trigger events and stopped by the next available 10 ns clock, as shown in Figure 20-4 on the next page. If the start and stop measurement events fall exactly on the 10 ns clock boundaries, there is no discharge of the
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capacitor. In this case, the calculated time offset is zero; therefore, the basic time measurement is not adjusted. The TMU interpolation is automatic when the read() command is used. Using this command, the user does not need to do any special programming. The read_now() command returns the non-interpolated measurement with 10 ns resolution.
100 MHz Main Clock Counting Start Trigger Stop Trigger Start Pulse Stop Pulse Start +10 V Ref V for START Stop +10 V Ref V for STOP Base Resolution Measurement
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The return of Display Error is the timeout indication. By default, the TMU will wait 10ms for a valid stop event. If the stop event does not occur within 10 ms, the TMU stops counting and returns the value of Display Error. This timeout return prevents the TMU from waiting a long time when a stop condition does not occur (for example, when a failing device is under test). The timeout value is engaged when the read() statement executes. The default timeout value is 10 ms; this value can be adjusted when the stop condition event is expected to be outside the default 10 ms period. To adjust the value, type the desired timeout value within the open/close parenthesis of the command, as follows: read (20 e-3) Alternatively, a delay can be programmed between the time the start condition is asserted and when the read() statement is issued. Either method shifts the timeout window into the area of the expected stop condition.
Input Channels
The TMU supports three input channels, each with multiple connect relays. Two channels, CHA and CHB, are low impedance inputs (nominal 2 K). The third channel, the HIZ, is a high impedance input (nominal 2 Meg). The three channels can be used in a variety of start and stop configurations: The TMU
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has an analog switch mux (located between the input channels and trigger comparators) for this purpose. See Figure20-5 and Table 20-1 on the next page. Any input channel can be used for the start and stop conditions for rise and fall measurements. Two separate channels must be used for propagation delay measurements. Do not exceed the analog mux switch maximum voltage rating of 15 V. Exceeding this rating will damage the switches.
CAUTION
Signal Inputs
CHA Start HIZ Stop CHB Arm Stop Voltage Reference POS/NEG Timer Enable
Time
Output
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wait.delay_10_us(50);//wait 500 S
Some of the commands are low-level in nature, but may be included as high-level commands in future revisions of Visual ATE software. The open_switch(ARM_REF_POSITIVE) command programs the voltage polarity of the reference to positive. A close_switch(ARM_REF_POSITIVE) would program the polarity negative. The low-level command, write_register, programs the external arm, threshold comparator voltage reference. This reference is derived from a 12bit DAC that has its 12 data inputs positioned on the upper 12 bits of the TMU 16-bit address bus. The full-scale range of this DAC is 10 V. With 4096 possible DAC codes, the voltage per code is 2.44 mV. The following methods are useful for calculating the threshold value for the above example:
INT(1.25 V/2.44 mV)= 512(derives the integer number of DAC codes required) 512*16 = 8192 (multiplying by 16 shifts the DAC data to the upper 12 bits)
The example uses a value of 2000, obtained by performing a hex conversion on 8192. The value of 8192 is also acceptable, because the command accepts short values. A hex value of 2000 sets the voltage reference to 1.25 V. The low-level command, wait.delay, allows microsecond delay times in 10 s intervals.
Programming Examples
The following examples demonstrate how to set up for the named measurement: rise time, fall time, propagation delay, and periodic waveforms. The rise and fall time examples use CHA as both the start and stop input, with threshold levels shown as passed parameters. The propagation time example uses CHA as the start input and CHB as the stop input, with the start and stop threshold levels shown as passed parameters.
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tmu_6->close_relay(TMU_CHAN_A_DUT1); tmu_6->start_trigger_setup(ours->startv,POS_SLOPE,TMU_CHAN_A); tmu_6->stop_trigger_setup(ours->stopv,POS_SLOPE,TMU_CHAN_A); delay(1); //wait for trigger setup and input relays to settle tmu_6->arm(); //a wait may be required here to allow the DUT to respond result=tmu_6->read();
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Set the start trigger level with the desired voltage and positive slope. Set the stop trigger level with the desired voltage that represents onehalf cycle and negative slope. Measure the period of the half cycle. Calculate the full cycle frequency by: Freq = 1/(T*2)
Time measured being zero will result in a divide-by-zero error. A way to protect against this would be as follows:
meas_time=tmu_6->read();//acquire time if (meas_time<=0)//if time measured is less than or equals zero, meas_time=1;//set variable meas_time equal to one. freq=1/(meas_time*2);//calculate full-cycle frequency
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Function Calls
init
Description This is the board initialization routine. This function clears counters, resets trigger circuitry, resets the trigger comparator reference DACs to 0 V, and opens all on-board relays. Format void init(void); Valid Arguments none Usage tmu_6->init();
reset
Description This function clears counters and resets the trigger logic. If a timeout occurs, then this function can be used to reset the logic to accept a new arm statement. It does not reset the trigger comparator reference DACs to 0V nor does it open all on-board relays. Format void reset(void);
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start_trigger_setup stop_trigger_setup
Description These functions program the start and stop trigger comparator threshold voltage levels. If vrange is not specified, the TMU autoranges so that the threshold level programmed is no greater than 80% of range. The comparator analog switch mux has a maximum voltage rating of 15 V. The statement requires a 100 s delay. Format void start_trigger_setup(float level, char slope, char channel, char vrange); void stop_trigger_setup(float level, char slope, char channel, char vrange); Valid Arguments level threshold voltage level in decimal or scientific notation slope POS_SLOPE NEG_SLOPE
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channel TMU_CHAN_A TMU_CHAN_B TMU_HIZ vrange (Default is autorange) (CHA, CHB, HIZ) (HIZ) (CHA, CHB, HIZ) (HIZ) (HIZ) (HIZ) (HIZ) (HIZ) (HIZ) (2_5V is 2.5V)
Usage tmu_6->start_trigger_setup(3.0, POS_SLOPE, TMU_CHAN_A, TMU_IN_10V); tmu_6->stop_trigger_setup(3.0, NEG_SLOPE, TMU_CHAN_B, TMU_IN_10V); wait.delay_10_us(10); //100 s wait time
arm
Description This function enables the counters to begin after a valid start condition is recognized. With no arguments, the arm statement is known as a program arm as the counters are enabled upon execution of this statement. The TMU
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accepts an external arm signal. A 40 s delay should be used after executing a program arm. Format void arm(unsigned char ext_en, unsigned char ext_slope, unsigned char counter_reset ); Valid Arguments ext_en TRUE FALSE ext_slope TRUE FALSE counter_reset TRUE FALSE Usage tmu_6->arm(); tmu_6->arm(TRUE, FALSE, TRUE); Note: // program arm // external arm (default) (defines external trigger slope) (positive slope, default) (negative slope) (resets time counter to zero prior to start trigger) (default) (enables external arming)
See the "Arming the TMU" section earlier in this chapter for more information on how to externally arm the TMU.
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read
Description This function returns the interpolated measured time and defines the timeout value. With no arguments, the default timeout is 10 ms. See the "Read Statement Returns" section earlier in this chapter for more details on this function. Format float read(float timeout); Valid Arguments timeout (default is 10 ms)
time in seconds to wait for valid stop trigger condition Usage meas_time = tmu_6->read(); meas_time = tmu_6->read(20e-3); //with default 10 ms timeout //with programmed 20 ms timeout
read_now
Description This function obtains the current counter value with no interpolation. The resolution is 10 ns. Format float read_now(void);
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get_status
Description This function gets the status of the control register bits and returns it in hex format. Format unsigned short get_status(void); Valid Returns 0x0010 = TMU_IO2 0x0020 = TMU_IO1 0x0040 = TMU_HIZ_STAT 0x0080 = TMU_ARM_STAT 0x0100 = TMU_HOLD_END 0x0200 = TMU_STOP 0x0400 = TMU_START 0x0800 = TMU_TTL_COUNT (start condition recognized) (stop condition recognized) (bidirectional port #2) (bidirectional port #1) (HIZ on 10 V range, buffer at unity gain)
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0x1000 = TMU_COUNTING no stop condition) 0x2000 = TMU_READY 0x4000 = TMU_END_CNT 0x8000 = TMU_ARMED
set_control clear_control
Description This function sets or clears the control register bits. Format void set_control(unsigned short bit); void clear_control(unsigned short bit); Valid Arguments bit TMU_OUT_IO(asserting this with set_control enables IO1 & IO2 as outputs, resetting with clear_control enables them as inputs)
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TMU_SET_IO1(user programmable I/O bit 1, can be read with get_status. When enabled as output, high state set with set_control, low state set with clear_control) TMU_SET_IO2(user programmable I/O bit 2, can be read with get_status. When enabled as output, the high state is set with set_control, the low state is set with clear_control) Usage tmu_6->set_control(TMU_OUT_IO); tmu_6->set_control(TMU_SET_IO1); tmu_6->clear_control(TMU_SET_IO1); // enable IO1 & IO2 as outputs // drive IO1 high // drive IO1 low
close_relay open_relay
Description This function closes or opens stated on-board relays. Format void close_relay(unsigned short relay); void open_relay(unsigned short relay); Valid Arguments relay Preferred Statements TMU_CHAN_A_DUT1 TMU_CHAN_A_DUT2 Alternatives TMU_CHAN_A_DUT or TMU_START_DUT TMU_START_DUT2
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TMU_CHAN_A_BUS TMU_CHAN_B_DUT1 TMU_CHAN_B_DUT2 TMU_HIZ_DUT1 TMU_HIZ_DUT2 TMU_HIZ_DUT3 TMU_HIZ_DUT4 TMU_EXT_DRV1 TMU_EXT_DRV2 TMU_EXT_DRV3 TMU_MEAS_BUS
(user programmable open collector output #1) (user programmable open collector output #2) (user programmable open collector output #3) (ADC input-to-bus connect relay)
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CHAPTER 21
RFx Programming
RFx function calls and programming references are organized in sections addressing RF Measurement and RF Digitizer topics -- RFx and RFD, respectively. A further differentiation appears by type of syntax. When using this chapter, always check the data types that are used in the programming statements, as shown in the table on the following page.
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RFx Programming
RFX_Port RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT4 RFX_PORT5 RFX_PORT6 RFX_PORT7 RFX_PORT8 RFX_Bandwidth RFX_NoFilter RFX_25KLPF RFX_125KLPF RFX_250KLPF RFX_455KBPF RFX_MeasType RFX_SCALAR RFX_TIME RFX_FREQ RFX_DVI_CONN DVI9_CHAN0F DVI9_CHAN0S DVI9_CHAN0FS DVI9_CHAN1F DVI9_CHAN1S DVI9_CHAN1FS RFX_TMU_CONN RFX_TMU_START_2 RFX_TMU_STOP_2
RFD_Chan RFD_CHAN1 RFD_CHAN2 RFD_CHAN3 RFD_CHAN4 RFD_DualChan RFD_Bandwidth RFD_NoFilter RFD_25KLPF RFD_125KLPF RFD_250KLPF RFD_455KBPF RFD_Float RFD_LocalGS RFD_MUX20_1_4_GS RFD_MUX20_2_4_GS RFD_Freq_Res RFD_Manual RFD_1KHZ RFD_5KHZ RFD_MeasType RFD_MAG RFD_TIME RFD_FREQ RFD_MAG_PHASE RFD_TMU_CONN RFD_TMU_START_2 RFD_TMU_STOP_2
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RFX_SCALAR returns the scalar measurement in dBm. RFX_TIME returns the digitized IF signal time domain data. RFX_FREQ returns the digitized IF signal frequency domain data. Format void measure_setup(RFX_Port port, double max_level, double freq, RFX_Bandwidth bandwidth, RFX_MeasType meas_type); Valid Arguments port RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT4 RFX_PORT5 RFX_PORT6 RFX_PORT7 RFX_PORT8
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RFx Programming
max_level max +15 dBm freq 300KHZ to 3 GHZ bandwidth RFX_NoFilter RFX_25KLPF RFX_125KLPF RFX_250KLPF RFX_455KBPF meas_type RFX_SCALAR RFX_TIME RFX_FREQ
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port
RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT4 RFX_PORT5 RFX_PORT6 RFX_PORT7 RFX_PORT8
Usage rfx->measure(RFX_PORT1);
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RFx Programming
Valid Arguments
port
RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT4 RFX_PORT5 RFX_PORT6 RFX_PORT7 RFX_PORT8
*meas_array
legal float pointer Usage rfx->measure(RFX_PORT1, meas_array);
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Valid Arguments
port
RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT4 RFX_PORT5 RFX_PORT6 RFX_PORT7 RFX_PORT8 level max +6.0 dBm freq 1MHz to 3GHz
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RFx Programming
Format void connect_dvi9(RFX_Port port, RFX_DVI_CONN dvi_chan); Valid Arguments port RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT4 RFX_PORT5 RFX_PORT6 RFX_PORT7 RFX_PORT8 dvi_chan DVI9_CHAN0F DVI9_CHAN0S DVI9_CHAN0FS DVI9_CHAN1F DVI9_CHAN1S DVI9_CHAN1FS
disconnect_dvi9
Description This function disconnects the programmed RFx Port DC bias connection from the DVI in Slot 9.
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Format void disconnect_dvi9(RFX_Port port); Valid Arguments port RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT4 RFX_PORT5 RFX_PORT6 RFX_PORT7 RFX_PORT8
Usage rfx->disconnect_dvi9(RFX_PORT4);
connect_tmu
Description This function connects the RFx Module Support Board output (which contains the programmed RFx Port) to the TMU in Slot 6. Format void connect_tmu(RFX_Port port, RFX_TMU_CONN tmu);
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RFx Programming
Valid Arguments port RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT4 RFX_PORT5 RFX_PORT6 RFX_PORT7 RFX_PORT8
disconnect_tmu
Description This function disconnects the RFx Module Support Board output (which contains the programmed RFx_Port) from the TMU in slot 6. Format void disconnect_tmu(RFX_Port port);
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Valid Arguments port RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT4 RFX_PORT5 RFX_PORT6 RFX_PORT7 RFX_PORT8
Usage rfx->disconnect_tmu(RFX_PORT2);
connect_vm
Description This function connects the RFx Module Support Board output (which contains the programmed RFx Port) to the programmed channel sense line of the DVI in slot 9. Format void connect_vm(RFX_Port port, RFX_DVI_CONN dvi); Valid Arguments port RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT5 RFX_PORT6 RFX_PORT7
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RFX_PORT8
disconnect_vm
Description This function disconnects the RFx Module Support Board output (which contains the programmed RFx Port) from the programmed channel sense line of the DVI in slot 9. Format void disconnect_vm(RFX_Port port); Valid Arguments port RFX_PORT1 RFX_PORT2 RFX_PORT3 RFX_PORT4 RFX_PORT5 RFX_PORT6 RFX_PORT7 RFX_PORT8
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reset
Description This function initializes the RFx RF Subsystem: All port modules set to the measure mode, and all connections from the module support boards to the installed instruments (DVI in Slot 9, MUX in Slot 20, TMU in Slot 6) are opened. Format void reset(); Valid Arguments none Usage rfx ->reset();
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RFx Programming
RFD_DIRECT, then the direct input to the digitizer is used (the Filters and Gain sections are bypassed). Format void RFD.connect (RFD_Chan chan, float max_level, RFD_Bandwidth bandwidth, RFD_Float float_type, RFD_Freq_Res freq_res); Valid Arguments chan RFD_CHAN1 RFD_CHAN2 RFD_CHAN3 RFD_CHAN4 max_level max 2.0 volts RFD_DIRECT bandwidth RFD_NoFilter RFD_25KLPF RFD_125KLPF RFD_250KLPF RFD_455KBPF float_type RFD_LocalGS RFD_MUX20_1_4_GS RFD_MUX20_2_4_GS RFD_Manual RFD_1KHZ
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RFD_5KHZ
RFD.measure_setup
Description This function sets up the RFx Digitizer to take the specified measurement, and specifies the number of points to digitize. The bin argument tells the measure system where to send the signal to be measured. Format void RFD.measure_setup(RFD_MeasType meas_type, short bin, short points); Valid Arguments meas_type RFD_MAG RFD_TIME RFD_FREQ RFD_MAG_PHASE bin FFT frequency bin points max 4096
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RFx Programming
RFD.set_clock
Description This function sets the RFx Digitizer clock to the programmed frequency: Use this routine if the programmed frequency resolution is set to RFD_Manual in the RFD.connect function. Both digitizer channels are connected to the same clock. The system automatically sets the clock rate for RFX_SCALAR measurements to a 1 kHz DFT resolution. This routine should be called before the RFD.measure_setup routine. Format void RFD.set_clock(double freq); Valid Arguments freq 0MHz to 5MHz Usage rfx ->RFD.set_clock(4.0MHz);
RFD.disconnect
Description This function disconnects the specified RFD channel from the RFx Digitizer.
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Format void RFD.disconnect(RFD_Chan chan); Valid Arguments chan RFD_CHAN1 RFD_CHAN2 RFD_CHAN3 RFD_CHAN4
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RFD.disconnect_tmu
Description This function disconnects the RFx Module Support Board (which contains the programmed RFD channel) output to the TMU in slot 6. Format void RFD.disconnect_tmu(RFD_Chan chan); Valid Arguments chan RFD_CHAN1 RFD_CHAN2 RFD_CHAN3 RFD_CHAN4
RFD.connect_vm
Description Connects the RFx Module Support Board (which contains the programmed RFD channel) output to the sense line of the programmed DVI channel.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
21-21
RFx Programming
Format void RFD.connect_vm(RFD_Chan chan, RFX_DVI_CONN dvi); Valid Arguments chan RFD_CHAN1 RFD_CHAN2 RFD_CHAN3 RFD_CHAN4 dvi DVI9_CHAN0S DVI9_CHAN1S
RFD.disconnect_vm
Description This function disconnects the RFx Module Support Board (which contains the programmed RFD channel) output from the sense lines of the programmed DVI channel. Format void RFD.disconnect_vm(RFD_Chan chan);
21-22
Visual ATE Programming Reference Manual February 2002 Copyright 2002 Credence Systems Corporation
Figure 21-1 shows how the RFx Subsystem is programmed in this example
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
21-23
RFx Programming
Source Generator
Source Mux set to RFx Port 1 Source Generator set to 1GHz @ -10.0 dBm + calFactor
The above syntax also programs the Port 1 generator to the desired frequency (1 GHz) and sets the generator to a level that will obtain the desired calibrated level at the test head (-10 dBm).
21-24
Visual ATE Programming Reference Manual February 2002 Copyright 2002 Credence Systems Corporation
LO Generator LO Generator set to 1.2GHz + 19KHz Module Support Board set to measure IF Signal from RFx Port 2
PGA Digitizer
The above syntax also programs the LO synthesizer to the desired measurement frequency and the desired LO offset frequency. In this example, the values are 1.2 GHz and 19 kHz, respectively. The Module Support Board is programmed to pass the IF signal from the RFx Port 2 Module to the RFx Digitizer with the ranging set for the expected level. The following statement takes the RF measurement:
result = rfx ->measure(RFX_PORT2);
The returned result is the dBm level of the 1.2 GHz signal.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
21-25
RFx Programming
The hardware is setup the same as in the preceding Source and Measure examples, except that the RFx measurement type is set to RFX_TIME. The digitized IF signal time domain data is returned in the measure array. To obtain frequency domain information, set the RF measurement type to RFX_FREQ as shown in the following code:
rfx->measure_setup(RFX_PORT2, 0.0, 1.2e9, RFX_25KLPF, RFX_FREQ);
The code below connects the The RFD Channel 1 differential input amplifier to the RFD Digitizer without a filter, with an expected maximum input level of 1.2 V. The code also specifies local ground sense and sets the FFT frequency resolution to 1 kHz (Clock Rate = 1024 kHz).
rfx ->RFD.connect(RFD_CHAN1, 1.2,RFD_NoFilter, RFD_LocalGS, RFD_1KHZ);
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Visual ATE Programming Reference Manual February 2002 Copyright 2002 Credence Systems Corporation
Differential Amplifiers RFD Chan 1 (+) RFD Chan 1 (-) MUX20_1_4 MUX20_2_4
Selectable Filters 25KHz LPF 125KHZ LPF 250KHz LPF 455KHz BPF
Local GS
PGA 1 to 256
Digitizer
The hardware setup is the same as in the preceding RF Digitizer Measurement example, except that the RFD measurement type is set to RFD_TIME. The meas1_array data returns from an odd-numbered RFD channel and the meas2_array data returns from an even-numbered RFD channel. To obtain frequency domain information, set the meas_type to RFD_FREQ as shown in the following code:
rfx ->RFD.measure_setup(RFD_FREQ, 201, 1024);
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
21-27
RFx Programming
The code on the preceding page sets the measurement type to RFD_MAG_PHASE and starts both digitizer channels by using RFD_DualChan in the RFD.start syntax. The magnitude returns in the 1st array location (meas1_array), and the phase returns in the 2nd array location (meas2_array). The meas1_array is associated with the odd-numbered RFD channels (RFD Channel 1 or 3) and the meas2_array is associated with the even-numbered channels (Channel 2 or 4). Dual channel measurements can be taken with any RFD measurement type.
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Visual ATE Programming Reference Manual February 2002 Copyright 2002 Credence Systems Corporation
Source Generator Source Generator set to 100MHz @ -0.0 dBm 10.0 + calFactor DVI 9 CH1 FS connected to RFx Port 1
DVI_9 CH1 Sense
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
21-29
RFx Programming
21-30
Visual ATE Programming Reference Manual February 2002 Copyright 2002 Credence Systems Corporation
Appendix A
ASL1000 Interconnects
The tables on the following pages describe the connections and pins configured in the 21-slot ASL1000 test card cage. Each table lists the connections for one slot; tables are arranged in numerical order, from Slot 1 to Slot 21.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
A-1
Conn.
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J2 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B17
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J2
B19
CH2 FORCE
J2
B21
CH1 FORCE
J2
B23
CH0 FORCE
J2
B25
CH7 FORCE
J2
B27
CH6 FORCE
J2
B29
CH5 FORCE
J2
B31
CH4 FORCE
J2 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 DRV_0 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
B18
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J2
B20
CH2 SENSE
J2
B22
CH1 SENSE
A-2 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J2
B24
CH0 SENSE
J2
B26
CH7 SENSE
J2
B28
CH6 SENSE
J2
B30
CH5 SENSE
J2
B32
CH4 SENSE
February 2002
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J2 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
C17
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J2
C18
CH2 FORCE
J2
C19
CH1 FORCE
J2
C20
CH0 FORCE
J2
C21
CH7 FORCE
J2
C22
CH6 FORCE
J2
C23
CH5 FORCE
J2
C24
CH4 FORCE
J2
C25
J2
C26
J2
C27
J2
C28
J2
C29
J2
C30
J2
C31
J2
C32
J2 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 4 FORCE EXT CLK IN 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
A17
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J2
A18
CH2 SENSE
J2
A19
CH1 SENSE
J2
A20
CH0 SENSE
J2
A21
CH7 SENSE
J2
A22
CH6 SENSE
J2
A23
CH5 SENSE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J2
A24
CH4 SENSE
J2
A25
J2
A26
J2
A27
J2
A28
J2
A29
J2
A30
J2
A31
A-3
J2
A32
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J3 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B32
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J3
B30
J3
B28
J3
B26
J3
B24
J3
B22
J3
B20
J3
B18
J3 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT CLOCK 4 FORCE EXT CLK IN EXT_DRV_1 EXT GND SENS 4 FORCE EXT_DRV_2 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
B31
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J3
B29
J3
B27
A-4 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J3
B25
J3
B23
J3
B21
J3
B19
J3
B17
February 2002
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
PRO-DIG
J3 GND CH1-1 CH1-2 GND CH1-3 CH1-4 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 GND EXT_CLK GND CH1-5 CH1-6 GND CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM OFS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OUT_20 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
A32
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J3
A31
CH2 FORCE
J3
A30
CH1 FORCE
J3
A29
CH0 FORCE
J3
A28
CH7 FORCE
J3
A27
CH6 FORCE
J3
A26
CH5 FORCE
J3
A25
CH4 FORCE
J3
A24
J3
A23
J3
A22
J3
A21
J3
A20
J3
A19
J3
A18
J3
A17
J3 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
C32
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
GND CH2-1 CH2-2 GND CH2-3 CH2-4 GND EXT_TRIG GND CH2-5 CH2-6 GND
J3
C31
CH2 SENSE
J3
C30
CH1 SENSE
J3
C29
CH0 SENSE
J3
C28
CH7 SENSE
J3
C27
CH6 SENSE
J3
C26
CH5 SENSE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J3
C25
CH4 SENSE
J3
C24
J3
C23
J3
C22
J3
C21
J3
C20
J3
C19
J3
C18
A-5
J3
C17
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J5 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B17
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J5
B19
J5
B21
J5
B23
J5
B25
J5
B27
J5
B29
J5
B31
J5 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT CLOCK 4 FORCE EXT CLK IN EXT_DRV_1 EXT GND SENS 4 FORCE EXT_DRV_2 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
B18
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J5
B20
J5
B22
A-6 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J5
B24
J5
B26
J5
B28
J5
B30
J5
B32
February 2002
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J5 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
C1
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J5
C2
J5
C3
J5
C4
J5
C5
J5
C6
J5
C7
J5
C8
J5
C9
J5
C10
J5
C11
J5
C12
J5
C13
J5
C14
J5
C15
J5
C16
J5 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
A1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J5
A2
J5
A3
J5
A4
J5
A5
J5
A6
J5
A7
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J5
A8
J5
A9
J5
A10
J5
A11
J5
A12
J5
A13
J5
A14
J5
A15
A-7
J5
A16
Conn
Pin
OVI
DVI
ACS
TMU
DDD(M)
DCC
MUX
HVS
MVS
PRO
OFS
J5 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 CHANNEL 8 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 CHANNEL 7 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE CHANNEL 6 DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 CHANNEL 5 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 CHANNEL 4 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 CHANNEL 3 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 CHANNEL 2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE
B2
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
CHANNEL 1
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
J5
B4
J5
B6
J5
B8
J5
B10
J5
B12
J5
B14
J5
B16
J5 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
B1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
J5
B3
J5
B5
A-8 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J5
B7
J5
B9
J5
B11
J5
B13
J5
B15
February 2002
Conn
Pin
DVI
ACS
TMU
DOAL
LCB
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J1 SYNC 1 SYNC 3 RMS IN 2 RMS IN 4 EXT DRV 1 TMU HIZ DUT1 TMU HIZ DUT2 TMU HIZ DUT3 TMU HIZ DUT4 CH1 NEG OUT CH1 PICO NEG CH1 NEG IN DRV_13 CH1 POS IN DRV_14 MUX_5_1 CH2 DUT POS DRV_15 MUX_5_2 MUX_5_3 CH2 DUT NEG DRV_12 MUX_5_4 CH2 PICO POS DRV_10 MUX_6_1 DRV_11 MUX_6_2 CH1 PICO POS CH2 PICO POS DRV_9 MUX_6_3 CH1 POS OUT DRV_8 MUX_6_4 EXT DRV 2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM DUT POS IN CH3 DUT POS EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH2 3 CONNECT DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM TMU CHAN A DUT1 DUT NEG IN CH3 DUT NEG EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE TMU CHAN A DUT2 EXT PICO NEG CH3 PICO NEG DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) TMU CHAN B DUT1 DUT NEG OUT PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 TMU CHAN B DUT2 EXT PICO POS CH3 PICO POS DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
A1 CH0 FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J1
A2 CH0 GUARD
J1
A3 CH0 SENSE
J1
A4
J1
A5 CH1 FORCE
J1
A6 CH1 GUARD
J1
A7 CH1 SENSE
J1
A8 EXT DATA
J1
A9
J1
A10
J1
A11
J1
A12
J1
A13
J1
A14
J1
A15
J1
A16
J1 SYNC 2 RMS IN 1 RMS IN 3 RMS METER DUT OUT EXT REF EXT CLK IN CH1 OUT 2 CH1 LOAD CONN CH1 EXT DRV CH1 FEEDBACK CH1 RMS MTR CH1 DUT OUT TMU EXT DRV3 CH1 OUT OUT CH2 FEEDBACK DUT OUT OUT EXT_ADC_IN2 EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT_ADC_IN1 IO1 CH0 FEEDBACK CH3 FEEDBACK PREC_REF_SENSE IO2 EXT RLY DRV CH2 3 BYPASS EXT_IN_2 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 TMU EXT DRV2 EXT LOAD CONN SERVO_TRIGGER MUX_4_3
C1 EXT DRV1
DUT OUT 2
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J1
C2 EXT IN3
J1
C3 EXT DRV2
J1
C4 EXT IN2
J1
C5 EXT IN1
J1
J1
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J1
C8 EXT CLOCK
J1
C9
J1
C10
J1
C11
J1
C12
J1
C13
J1
C14
J1
C15
A-9
J1
C16
Connector
Pin
DVI
J1 B19 B18 B17 B16 B15 B14 B13 EXT DATA CH1 SENSE CH1 GUARD CH1 FORCE CH0 SENSE CH0 GUARD
B20
CH0 FORCE
J1
J1
J1
J1
J1
J1
J1
J1 B11 B10 B5 B6 B7 B8 B9 EXT CLOCK EXT GND SENS EXT ADC STB EXT IN1 EXT IN2 EXT DRV2 EXT IN3
B12
EXT DRV1
J1
J1
A-10 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J1
J1
J1
J1
J1
February 2002
Conn
Pin
DVI
ACS
TMU
DDD(S)
DOAL
LCB
DCC
MUX
HVS
MVS
PRO
J1 SYNC 1 CH1 PICO POS PREC_REF_FORCE CH1 PICO NEG CH1 DUT NEG CH1 4 CONNECT CH1 DUT POS DIFF_IN_REF DRV_8 CH4 PICO POS DRV_11 CH4 PICO POS CH4 DUT NEG DRV_13 CH1 POS IN CH4 DUT POS DRV_14 DRV_15 MUX_5_2 MUX_5_1 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 MUX_6_2 DRV_9 MUX_6_3 MUX_6_4 MUX_7_1 HVS_OUT_COM MVS_OUT_COM EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DIFF_IN_POS MUX_7_3 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 DUT 11 (RLY DRV) DUT 10 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 SYNC 3 RMS IN 2 RMS IN 4 CHANNEL 6 TMU HIZ DUT1 TMU HIZ DUT2 TMU HIZ DUT3 TMU HIZ DUT4 CH1 NEG OUT CH1 PICO NEG CH1 NEG IN CH1 PICO POS CH1 POS OUT CHANNEL 8 EXT DRV 2 CHANNEL 7 DUT POS IN EXT DRV 1 TMU CHAN A DUT1 CHANNEL 5 DUT NEG IN TMU CHAN A DUT2 CHANNEL 4 EXT PICO NEG TMU CHAN B DUT1 CHANNEL 3 DUT NEG OUT TMU CHAN B DUT2 CHANNEL 2 EXT PICO POS DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE
ACS OUT
EXT ARM IN
CHANNEL 1
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
J1
J1
J1
A20
J1
J1
J1
J1
J1
A25
J1
A26
J1
A27
J1
A28
J1
A29
J1
A30
J1
A31
J1
A32
J1 SYNC 2 RMS IN 1 CH1 4 BYPASS CH1 FEEDBACK RMS IN 3 RMS METER DUT OUT EXT REF EXT CLK IN CH1 OUT 2 CH1 LOAD CONN CH1 EXT DRV CH1 FEEDBACK CH1 RMS MTR CH1 DUT OUT TMU EXT DRV3 CH1 OUT OUT CH4 FEEDBACK DUT OUT OUT IO1 CH0 FEEDBACK IO2 EXT RLY DRV TMU EXT DRV2 EXT LOAD CONN
DUT OUT 2
EXT_FBACK_1 SERVO_TRIGGER EXT_IN_2 PREC_REF_SENSE EXT_ADC_IN1 EXT_ADC_IN2 EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6
MUX_4_4 MUX_4_3 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1
DUT 8
J1
J1
J1
J1
J1
J1
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J1
J1
C25
J1
C26
J1
C27
J1
C28
J1
C29
J1
C30
J1
C31
A-11
J1
C32
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J4 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B21
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J4
B22
CH2 FORCE
J4
B23
CH1 FORCE
J4
B24
CH0 FORCE
J4
B25
CH7 FORCE
J4
B26
CH6 FORCE
J4
B27
CH5 FORCE
J4
B28
CH4 FORCE
J1 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 DRV_0 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
B21
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J1
B22
CH2 SENSE
J1
B23
CH1 SENSE
A-12 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J1
B24
CH0 SENSE
J1
B25
CH7 SENSE
J1
B26
CH6 SENSE
J1
B27
CH5 SENSE
J1
B28
CH4 SENSE
February 2002
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
PRO-DIG
J4 GND CH1-1 CH1-2 GND CH1-3 CH1-4 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 GND EXT_CLK GND CH1-5 CH1-6 GND CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM OFS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
A1
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J4
A2
CH2 FORCE
J4
A3
CH1 FORCE
J4
A4
CH0 FORCE
J4
A5
CH7 FORCE
J4
A6
CH6 FORCE
J4
A7
CH5 FORCE
J4
A8
CH4 FORCE
J4
A9
J4
A10
J4
A11
J4
A12
J4
A13
J4
A14
J4
A15
J4
A16
J4 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
C1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
GND CH2-1 CH2-2 GND CH2-3 CH2-4 GND EXT_TRIG GND CH2-5 CH2-6 GND
J4
C2
CH2 SENSE
J4
C3
CH1 SENSE
J4
C4
CH0 SENSE
J4
C5
CH7 SENSE
J4
C6
CH6 SENSE
J4
C7
CH5 SENSE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J4
C8
CH4 SENSE
J4
C9
J4
C10
J4
C11
J4
C12
J4
C13
J4
C14
J4
C15
A-13
J4
C16
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J4 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM OFS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B20
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J4
B19
J4
B18
J4
B17
J4
B16
J4
B15
J4
B14
J4
B13
J4 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT CLOCK 4 FORCE EXT CLK IN EXT_DRV_1 EXT GND SENS 4 FORCE EXT_DRV_2 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
B12
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J4
B11
J4
B10
A-14 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J4
B5
J4
B6
J4
B7
J4
B8
J4
B9
February 2002
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J4 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
A17
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J4
A18
J4
A19
J4
A20
J4
A21
J4
A22
J4
A23
J4
A24
J4
A25
J4
A26
J4
A27
J4
A28
J4
A29
J4
A30
J4
A31
J4
A32
J4 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
C17
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J4
C18
J4
C19
J4
C20
J4
C21
J4
C22
J4
C23
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J4
C24
J4
C25
J4
C26
J4
C27
J4
C28
J4
C29
J4
C30
J4
C31
A-15
J4
C32
Conn
Pin
OVI
DVI
ACS
TMU
DDD(S)
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J6 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 CHANNEL 8 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 CHANNEL 7 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM 5 SENSE CHANNEL 6 DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) 4 SENSE RMS IN 4 TMU CHAN A DUT1 CHANNEL 5 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 RMS IN 2 TMU CHAN A DUT2 CHANNEL 4 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 CHANNEL 3 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 CHANNEL 2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B1 CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
CHANNEL 1
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J6
B3
CH2 FORCE
J6
B5 CH1 FORCE
J6
B7
CH0 FORCE
J6
B9 CH7 FORCE
J6
J6
J6
J6 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 4 FORCE EXT CLK IN 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
B2
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J6
B4 CH2 SENSE
J6
B6
CH1 SENSE
A-16 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J6
B8 CH0 SENSE
J6
J6
J6
J6
February 2002
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J6 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
C1
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J6
C2
J6
C3
J6
C4
J6
C5
J6
C6
J6
C7
J6
C8
J6
C9
J6
C10
J6
C11
J6
C12
J6
C13
J6
C14
J6
C15
J6
C16
J6 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
A1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J6
A2
J6
A3
J6
A4
J6
A5
J6
A6
J6
A7
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J6
A8
J6
A9
J6
A10
J6
A11
J6
A12
J6
A13
J6
A14
J6
A15
A-17
J6
A16
Conn
Pin
OVI
DVI
ACS
TMU
DDD(S)
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J6 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 CHANNEL 8 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 CHANNEL 7 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM CH1 GUARD 5 SENSE CHANNEL 6 DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 CHANNEL 5 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 3 SENSE RMS IN 2 TMU CHAN A DUT2 CHANNEL 4 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 CHANNEL 3 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 CHANNEL 2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B18
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
CHANNEL 1
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J6
B20
J6
B22
J6
B24
J6
B26
J6
B28
J6
B30
J6
B32
J6 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT GND SENS 4 FORCE EXT_DRV_2 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
B17
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J6
B19
J6
B21
A-18 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J6
B23
J6
B25
J6
B27
J6
B29
J6
B31
February 2002
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J3 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
C1
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J3
C2
J3
C3
J3
C4
J3
C5
J3
C6
J3
C7
J3
C8
J3
C9
J3
C10
J3
C11
J3
C12
J3
C13
J3
C14
J3
C15
J3
C16
J3 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
A1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J3
A2
J3
A3
J3
A4
J3
A5
J3
A6
J3
A7
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J3
A8
J3
A9
J3
A10
J3
A11
J3
A12
J3
A13
J3
A14
J3
A15
A-19
J3
A16
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J3 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B2
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J3
B4
J3
B6
J3
B8
J3
B10
J3
B12
J3
B14
J3
B16
J3 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT CLOCK 4 FORCE EXT CLK IN EXT_DRV_1 EXT GND SENS 4 FORCE EXT_DRV_2 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
B1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J3
B3
J3
B5
A-20 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J3
B7
J3
B9
J3
B11
J3
B13
J3
B15
February 2002
Connector
Pin
MUX
J2 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 MUX_5_1 MUX_5_2 MUX_5_3 MUX_5_4 MUX_6_1 MUX_6_2 MUX_6_3 MUX_6_4 MUX_7_1 MUX_7_2 MUX_7_3 MUX_7_4 MUX_8_1 MUX_8_2 MUX_8_3
A16
MUX_8_4
J2
J2
J2
J2
J2
J2
J2
J2
J2
J2
J2
J2
J2
J2
J2
J2 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1 MUX_1_1 MUX_1_2 MUX_1_3 MUX_1_4 MUX_2_1 MUX_2_2 MUX_2_3 MUX_2_4 MUX_3_1 MUX_3_2 MUX_3_3 MUX_3_4 MUX_4_1 MUX_4_2 MUX_4_3
C16
MUX_4_4
J2
J2
J2
J2
J2
J2
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J2
J2
J2
J2
J2
J2
J2
J2
A-21
J2
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
PRO-DIG
J2 GND CH1-1 CH1-2 GND CH1-3 CH1-4 GND EXT_CLK OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 GND CH1-5 CH1-6 GND B13 CH2 FORCE B11 CH1 FORCE B9 B7 B5 B3 B1 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 CH4 FORCE EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM OFS_OUT_COM CH5 FORCE CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OUT_21 OUT_22 CH6 FORCE CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OUT_20 CH7 FORCE CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 CH0 FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J2
J2
J2
J2
J2
J2
J2
J2 B14 CH2 SENSE B12 CH1 SENSE B10 CH0 SENSE B8 B6 B4 B2 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 DRV_0 CH4 SENSE EXT CLOCK 4 FORCE EXT CLK IN EXT_DRV_1 CH5 SENSE EXT GND SENS 4 FORCE EXT_DRV_2 CH6 SENSE EXT ADC STB 3 FORCE EXT_ADC_IN2 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 CH7 SENSE EXT IN1 3 FORCE EXT_ADC_IN1 MUX_3_4 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
GND CH2-1 CH2-2 GND CH2-3 CH2-4 GND EXT_TRIG GND CH2-5 CH2-6 GND
J2
J2
A-22 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J2
J2
J2
J2
J2
February 2002
Supplies
Supplies
Table A-22: ASL1000 Supply Pins
Connectors J5 J5 J4 Pin C32, A32 C20, A20 B31 +5V +5V +5V DCV Comments
J5
C30, A30
+24V
J5
C29, A29
+65V
J5
C28, A28
+50V
J5 J4
+16V +16V
J5
C26, A26
J5
C25, A25
-5V
J5 J1
-16V -16V
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
A-23
J5
C22, A22
-65V
J5
C19, A19
-24V
J5 J1
+12V +12V
A-24 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Grounds
Grounds
Table A-23: ASL1000 Grounds
Connector
J5 J5 J5 J1 J4 J6 J6 J6 J6 J6 J6 J6 J6
Pin
C31, A31 C21, A21 C17, A17 B2, B4 B2, B4 C32, A32 C30, A30 C28, A28 C26, A26 C24, A24 C22, A22 C20, A20 C18, A18 GND GND GND GND GND GND GND GND GND GND GND GND GND
GND
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
A-25
Config
Table A-24: ASL1000 Config Pins
Conn. J1 J1 J1 J1 J4 J4 J4 J4 J6 J6 J6 J6 J6 J6 J6 J6 J6 J6 J6 J6 J6 J6 J6 J6 B1 B3 B30 B32 B1 B3 B30 B32 C31 A31 C29 A29 C27 A27 C25 A25 C23 A23 C21 A21 C19 A19 C17 A17 MCB_CHB_IN MCB_CHB_OUT MCB_CHA_IN MCB_CHA_OUT CH4_POS_GAIN CH4_NEG_GAIN CH1_POS_GAIN MCB_CHA_SW CH1_NEG_GAIN MCB_CHA_OFF MCB_CHB_SW CH2_POS_GAIN MCB_CHB_ON MCB_CHA_GAIN MCB_CHA_ON MCB_CHB_GAIN MCB_CHB_OFF CH2_NEG_GAIN CH3_POS_GAIN CH3_NEG_GAIN Pin MCB LCB CH3_NEG_IN CH3_POS_IN CH4_POS_IN CH4_NEG_IN CH2_NEG_IN CH2_POS_IN CH1_POS_IN CH1_NEG_IN
A-26 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Appendix B
ASL2000 Interconnects
The tables in this appendix describe the connections and pins configured in the ASL2000 test head cage. Slot numbers are listed sequentially in this appendix, and pin assignments appear in tables. Pinout tables appear in two parts for each slot, with the exception of slots 9 and 20, which require a single table section.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix B-1
Appendix B-2 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
ASL2000 Slot
Backplane Connections
Front view
Rear view
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix B-3
Dut connections
See the next pages
Appendix B-4 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Conn.
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J2 J2 J2 J2 J2 J2 J2 J2 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 B31 CH4 FORCE EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM B29 CH5 FORCE CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 B27 CH6 FORCE CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM B25 CH7 FORCE CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 B23 CH0 FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OFS_POS_FORCE B21 CH1 FORCE CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 B19 CH2 FORCE CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28
B17
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J2 J2 J2 J2 J2 J2 J2 J2 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 B32 CH4 SENSE EXT CLOCK 4 FORCE EXT CLK IN B30 CH5 SENSE EXT GND SENS 4 FORCE B28 CH6 SENSE EXT ADC STB 3 FORCE B26 CH7 SENSE EXT IN1 3 FORCE EXT_ADC_IN1 EXT_ADC_IN2 EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 B24 CH0 SENSE EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE B22 CH1 SENSE EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 B20 CH2 SENSE EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1
B18
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Dut connections
Appendix B-5
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J2 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
C17
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J2
C18
CH2 FORCE
J2
C19
CH1 FORCE
J2
C20
CH0 FORCE
J2
C21
CH7 FORCE
J2
C22
CH6 FORCE
J2
C23
CH5 FORCE
J2
C24
CH4 FORCE
J2
C25
J2
C26
J2
C27
J2
C28
J2
C29
J2
C30
J2
C31
J2
C32
J2 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
A17
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J2
A18
CH2 SENSE
J2
A19
CH1 SENSE
J2
A20
CH0 SENSE
J2
A21
CH7 SENSE
Appendix B-6 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J2
A22
CH6 SENSE
J2
A23
CH5 SENSE
J2
A24
CH4 SENSE
J2
A25
J2
A26
J2
A27
J2
A28
J2
A29
J2
A30
J2
A31
February 2002
J2
A32
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J3 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B32
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J3
B30
J3
B28
J3
B26
J3
B24
J3
B22
J3
B20
J3
B18
J3 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
B31
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J3
B29
J3
B27
J3
B25
J3
B23
J3
B21
J3
B19
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J3
B17
Dut connections
Appendix B-7
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
PRO-DIG
J3 GND CH1-1 CH1-2 GND CH1-3 CH1-4 GND EXT_CLK OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 GND CH1-5 CH1-6 GND CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM OFS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OUT_21 OUT_22 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OUT_20 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
A32
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J3
A31
CH2 FORCE
J3
A30
CH1 FORCE
J3
A29
CH0 FORCE
J3
A28
CH7 FORCE
J3
A27
CH6 FORCE
J3
A26
CH5 FORCE
J3
A25
CH4 FORCE
J3
A24
J3
A23
J3
A22
J3
A21
J3
A20
J3
A19
J3
A18
J3
A17
J3 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 DRV_0 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 3 FORCE EXT_ADC_IN1 MUX_3_4 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7
C32
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
GND CH2-1 CH2-2 GND CH2-3 CH2-4 GND EXT_TRIG GND CH2-5 CH2-6 GND
J3
C31
CH2 SENSE
J3
C30
CH1 SENSE
J3
C29
CH0 SENSE
J3
C28
CH7 SENSE
Appendix B-8 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J3
C27
CH6 SENSE
J3
C26
CH5 SENSE
J3
C25
CH4 SENSE
J3
C24
J3
C23
J3
C22
J3
C21
J3
C20
J3
C19
J3
C18
February 2002
J3
C17
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J5 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B17
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J5
B19
J5
B21
J5
B23
J5
B25
J5
B27
J5
B29
J5
B31
J5 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
B18
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J5
B20
J5
B22
J5
B24
J5
B26
J5
B28
J5
B30
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J5
B32
Dut connections
Appendix B-9
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J5 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
C1
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J5
C2
J5
C3
J5
C4
J5
C5
J5
C6
J5
C7
J5
C8
J5
C9
J5
C10
J5
C11
J5
C12
J5
C13
J5
C14
J5
C15
J5
C16
J5 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT CLOCK 4 FORCE EXT CLK IN EXT_DRV_1 EXT GND SENS 4 FORCE EXT_DRV_2 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
A1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J5
A2
J5
A3
J5
A4
J5
A5
Appendix B-10 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J5
A6
J5
A7
J5
A8
J5
A9
J5
A10
J5
A11
J5
A12
J5
A13
J5
A14
J5
A15
February 2002
J5
A16
Conn
Pin
OVI
DVI
ACS
TMU
DDD(M)
DCC
MUX
HVS
MVS
PRO
OFS
J5 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 CHANNEL 8 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 CHANNEL 7 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE CHANNEL 6 DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 CHANNEL 5 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 3 SENSE RMS IN 2 TMU CHAN A DUT2 CHANNEL 4 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OFS_POS_FORCE CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 CHANNEL 3 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 CHANNEL 2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE
B2
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
CHANNEL 1
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
J5
B4
J5
B6
J5
B8
J5
B10
J5
B12
J5
B14
J5
B16
J5 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT ADC STB 3 FORCE EXT IN1 3 FORCE EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE EXT_ADC_IN1 EXT_ADC_IN2 EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER
B1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4 MUX_4_3 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
J5
B3
J5
B5
J5
B7
J5
B9
J5
B11
J5
B13
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J5
B15
Dut connections
Appendix B-11
Conn
Pin
DVI
ACS
TMU
DOAL
LCB
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J1 SYNC 1 SYNC 3 RMS IN 2 RMS IN 4 EXT DRV 1 TMU HIZ DUT1 TMU HIZ DUT2 TMU HIZ DUT3 TMU HIZ DUT4 CH1 NEG OUT CH1 PICO NEG CH1 NEG IN DRV_13 CH1 POS IN DRV_14 MUX_5_1 CH2 DUT POS DRV_15 MUX_5_2 MUX_5_3 CH2 DUT NEG DRV_12 MUX_5_4 CH2 PICO POS DRV_10 MUX_6_1 DRV_11 MUX_6_2 CH1 PICO POS CH2 PICO POS DRV_9 MUX_6_3 CH1 POS OUT DRV_8 MUX_6_4 EXT DRV 2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM DUT POS IN CH3 DUT POS EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM CH2 3 CONNECT DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) TMU CHAN A DUT1 DUT NEG IN CH3 DUT NEG EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 TMU CHAN A DUT2 EXT PICO NEG CH3 PICO NEG DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 TMU CHAN B DUT1 DUT NEG OUT PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 TMU CHAN B DUT2 EXT PICO POS CH3 PICO POS DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
A1 CH0 FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J1
A2 CH0 GUARD
J1
A3 CH0 SENSE
J1
A4
J1
A5 CH1 FORCE
J1
A6 CH1 GUARD
J1
A7 CH1 SENSE
J1
A8 EXT DATA
J1
A9
J1
A10
J1
A11
J1
A12
J1
A13
J1
A14
J1
A15
J1
A16
J1 SYNC 2 RMS IN 1 RMS IN 3 RMS METER DUT OUT EXT REF EXT CLK IN CH1 OUT 2 CH1 LOAD CONN CH1 EXT DRV CH1 FEEDBACK CH1 RMS MTR CH1 DUT OUT TMU EXT DRV3 CH1 OUT OUT CH2 FEEDBACK DUT OUT OUT EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT_DRV_2 EXT_ADC_IN2 EXT_ADC_IN1 IO1 CH0 FEEDBACK CH3 FEEDBACK PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 IO2 EXT RLY DRV CH2 3 BYPASS EXT_IN_2 MUX_4_2 TMU EXT DRV2 EXT LOAD CONN SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
C1 EXT DRV1
DUT OUT 2
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J1
C2 EXT IN3
J1
C3 EXT DRV2
J1
C4 EXT IN2
J1
C5 EXT IN1
Appendix B-12 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J1
J1
J1
C8 EXT CLOCK
J1
C9
J1
C10
J1
C11
J1
C12
J1
C13
J1
C14
J1
C15
February 2002
J1
C16
Connector
Pin
DVI
J1 B19 B18 B17 B16 B15 B14 B13 EXT DATA CH1 SENSE CH1 GUARD CH1 FORCE CH0 SENSE CH0 GUARD
B20
CH0 FORCE
J1
J1
J1
J1
J1
J1
J1
J1 B11 B10 B5 B6 B7 B8 B9 EXT CLOCK EXT GND SENS EXT ADC STB EXT IN1 EXT IN2 EXT DRV2 EXT IN3
B12
EXT DRV1
J1
J1
J1
J1
J1
J1
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J1
Dut connections
Appendix B-13
Conn
Pin
DVI
ACS
TMU
DDD(S)
DOAL
LCB
DCC
MUX
HVS
MVS
PRO
J1 SYNC 1 CH1 PICO POS PREC_REF_FORCE CH1 PICO NEG CH1 DUT NEG CH1 4 CONNECT CH1 DUT POS DIFF_IN_REF DRV_8 CH4 PICO POS DRV_11 CH4 PICO POS CH4 DUT NEG DRV_13 CH1 POS IN CH4 DUT POS DRV_14 MUX_5_1 DRV_15 MUX_5_2 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 MUX_6_2 DRV_9 MUX_6_3 MUX_6_4 MUX_7_1 HVS_OUT_COM MVS_OUT_COM EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 DIFF_IN_POS MUX_7_3 EXT_IN_1 DUT 11 (RLY DRV) MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 SYNC 3 RMS IN 2 RMS IN 4 CHANNEL 6 TMU HIZ DUT1 TMU HIZ DUT2 TMU HIZ DUT3 TMU HIZ DUT4 CH1 NEG OUT CH1 PICO NEG CH1 NEG IN CH1 PICO POS CH1 POS OUT CHANNEL 8 EXT DRV 2 CHANNEL 7 DUT POS IN EXT DRV 1 TMU CHAN A DUT1 CHANNEL 5 DUT NEG IN TMU CHAN A DUT2 CHANNEL 4 EXT PICO NEG TMU CHAN B DUT1 CHANNEL 3 DUT NEG OUT TMU CHAN B DUT2 CHANNEL 2 EXT PICO POS DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE
ACS OUT
EXT ARM IN
CHANNEL 1
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
J1
J1
J1
A20
J1
J1
J1
J1
J1
A25
J1
A26
J1
A27
J1
A28
J1
A29
J1
A30
J1
A31
J1
A32
J1 SYNC 2 RMS IN 1 CH1 4 BYPASS CH1 FEEDBACK RMS IN 3 RMS METER DUT OUT EXT REF EXT CLK IN CH1 OUT 2 CH1 LOAD CONN CH1 EXT DRV CH1 FEEDBACK CH1 RMS MTR CH1 DUT OUT TMU EXT DRV3 CH1 OUT OUT CH4 FEEDBACK DUT OUT OUT IO1 CH0 FEEDBACK IO2 EXT RLY DRV EXT_IN_2 PREC_REF_SENSE EXT_ADC_IN1 EXT_ADC_IN2 EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 TMU EXT DRV2 EXT LOAD CONN SERVO_TRIGGER
DUT OUT 2
EXT_FBACK_1
MUX_4_4 MUX_4_3 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1
DUT 8
J1
J1
J1
J1
Appendix B-14 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V)
J1
J1
J1
J1
C25
J1
C26
J1
C27
J1
C28
J1
C29
J1
C30
J1
C31
February 2002
J1
C32
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J4 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B21
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J4
B22
CH2 FORCE
J4
B23
CH1 FORCE
J4
B24
CH0 FORCE
J4
B25
CH7 FORCE
J4
B26
CH6 FORCE
J4
B27
CH5 FORCE
J4
B28
CH4 FORCE
J1 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 4 FORCE EXT CLK IN 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
B21
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J1
B22
CH2 SENSE
J1
B23
CH1 SENSE
J1
B24
CH0 SENSE
J1
B25
CH7 SENSE
J1
B26
CH6 SENSE
J1
B27
CH5 SENSE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J1
B28
CH4 SENSE
Dut connections
Appendix B-15
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
PRO-DIG
J4 GND CH1-1 CH1-2 GND CH1-3 CH1-4 GND EXT_CLK OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 GND CH1-5 CH1-6 GND CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM OFS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OUT_21 OUT_22 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OUT_20 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
A1
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J4
A2
CH2 FORCE
J4
A3
CH1 FORCE
J4
A4
CH0 FORCE
J4
A5
CH7 FORCE
J4
A6
CH6 FORCE
J4
A7
CH5 FORCE
J4
A8
CH4 FORCE
J4
A9
J4
A10
J4
A11
J4
A12
J4
A13
J4
A14
J4
A15
J4
A16
J4 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 DRV_0 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 3 FORCE EXT_ADC_IN1 MUX_3_4 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7
C1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
GND CH2-1 CH2-2 GND CH2-3 CH2-4 GND EXT_TRIG GND CH2-5 CH2-6 GND
J4
C2
CH2 SENSE
J4
C3
CH1 SENSE
J4
C4
CH0 SENSE
J4
C5
CH7 SENSE
Appendix B-16 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J4
C6
CH6 SENSE
J4
C7
CH5 SENSE
J4
C8
CH4 SENSE
J4
C9
J4
C10
J4
C11
J4
C12
J4
C13
J4
C14
J4
C15
February 2002
J4
C16
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J4 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B20
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J4
B19
J4
B18
J4
B17
J4
B16
J4
B15
J4
B14
J4
B13
J4 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
B12
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J4
B11
J4
B10
J4
B5
J4
B6
J4
B7
J4
B8
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J4
B9
Dut connections
Appendix B-17
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J4 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
A17
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J4
A18
J4
A19
J4
A20
J4
A21
J4
A22
J4
A23
J4
A24
J4
A25
J4
A26
J4
A27
J4
A28
J4
A29
J4
A30
J4
A31
J4
A32
J4 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT CLOCK 4 FORCE EXT CLK IN EXT_DRV_1 EXT GND SENS 4 FORCE EXT_DRV_2 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
C17
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J4
C18
J4
C19
J4
C20
J4
C21
Appendix B-18 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J4
C22
J4
C23
J4
C24
J4
C25
J4
C26
J4
C27
J4
C28
J4
C29
J4
C30
J4
C31
February 2002
J4
C32
Conn
Pin
OVI
DVI
ACS
TMU
DDD(S)
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J6 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 CHANNEL 8 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 CHANNEL 7 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 5 SENSE CHANNEL 6 DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM 4 SENSE RMS IN 4 TMU CHAN A DUT1 CHANNEL 5 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE RMS IN 2 TMU CHAN A DUT2 CHANNEL 4 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) 2 SENSE SYNC 3 TMU CHAN B DUT1 CHANNEL 3 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 1 SENSE SYNC 1 TMU CHAN B DUT2 CHANNEL 2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B1 CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
CHANNEL 1
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J6
B3
CH2 FORCE
J6
B5 CH1 FORCE
J6
B7
CH0 FORCE
J6
B9 CH7 FORCE
J6
J6
J6
J6 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 4 FORCE EXT CLK IN 4 FORCE 3 FORCE 3 FORCE EXT_ADC_IN1 EXT_ADC_IN2 EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE 2 FORCE RMS IN 1 IO2 EXT_IN_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1
B2
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J6
B4 CH2 SENSE
J6
B6
CH1 SENSE
J6
B8 CH0 SENSE
J6
J6
J6
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J6
Dut connections
Appendix B-19
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J6 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
C1
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J6
C2
J6
C3
J6
C4
J6
C5
J6
C6
J6
C7
J6
C8
J6
C9
J6
C10
J6
C11
J6
C12
J6
C13
J6
C14
J6
C15
J6
C16
J6 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT CLOCK 4 FORCE EXT CLK IN EXT_DRV_1 EXT GND SENS 4 FORCE EXT_DRV_2 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
A1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J6
A2
J6
A3
J6
A4
J6
A5
Appendix B-20 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J6
A6
J6
A7
J6
A8
J6
A9
J6
A10
J6
A11
J6
A12
J6
A13
J6
A14
J6
A15
February 2002
J6
A16
Conn
Pin
OVI
DVI
ACS
TMU
DDD(S)
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J6 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 CHANNEL 8 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 CHANNEL 7 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE CHANNEL 6 DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 CHANNEL 5 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 CHANNEL 4 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 CHANNEL 3 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 CHANNEL 2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B18
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
CHANNEL 1
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J6
B20
J6
B22
J6
B24
J6
B26
J6
B28
J6
B30
J6
B32
J6 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
B17
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J6
B19
J6
B21
J6
B23
J6
B25
J6
B27
J6
B29
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J6
B31
Dut connections
Appendix B-21
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J3 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
C1
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J3
C2
J3
C3
J3
C4
J3
C5
J3
C6
J3
C7
J3
C8
J3
C9
J3
C10
J3
C11
J3
C12
J3
C13
J3
C14
J3
C15
J3
C16
J3 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT CLOCK 4 FORCE EXT CLK IN EXT_DRV_1 EXT GND SENS 4 FORCE EXT_DRV_2 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
A1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J3
A2
J3
A3
J3
A4
J3
A5
Appendix B-22 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J3
A6
J3
A7
J3
A8
J3
A9
J3
A10
J3
A11
J3
A12
J3
A13
J3
A14
J3
A15
February 2002
J3
A16
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J3 CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
B2
CH3 FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J3
B4
J3
B6
J3
B8
J3
B10
J3
B12
J3
B14
J3
B16
J3 CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 EXT CLOCK 4 FORCE EXT CLK IN EXT GND SENS 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 EXT ADC STB 3 FORCE EXT_ADC_IN2 EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
B1
CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J3
B3
J3
B5
J3
B7
J3
B9
J3
B11
J3
B13
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J3
B15
Dut connections
Appendix B-23
Connector
Pin
MUX
J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 A1 MUX_5_1 A2 MUX_5_2 A3 MUX_5_3 A4 MUX_5_4 A5 MUX_6_1 A6 MUX_6_2 A7 MUX_6_3 A8 MUX_6_4 A9 MUX_7_1 A10 MUX_7_2 A11 MUX_7_3 A12 MUX_7_4 A13 MUX_8_1 A14 MUX_8_2 A15 MUX_8_3
A16
MUX_8_4
J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 J2 C1 MUX_1_1 C2 MUX_1_2 C3 MUX_1_3 C4 MUX_1_4 C5 MUX_2_1 C6 MUX_2_2 C7 MUX_2_3 C8 MUX_2_4 C9 MUX_3_1 C10 MUX_3_2 C11 MUX_3_3 C12 MUX_3_4 C13 MUX_4_1 C14 MUX_4_2 C15 MUX_4_3
Appendix B-24 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
C16 MUX_4_4
February 2002
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
PRO-DIG
J2 GND CH1-1 CH1-2 GND CH1-3 CH1-4 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 GND EXT_CLK GND CH1-5 CH1-6 GND B13 CH2 FORCE B11 CH1 FORCE B9 B7 B5 B3 B1 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 CH4 FORCE EXT DATA 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM OFS_OUT_COM CH5 FORCE CH1 SENSE 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM CH6 FORCE CH1 GUARD 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OUT_20 CH7 FORCE CH1 FORCE 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 CH0 FORCE 3 SENSE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 CH0 SENSE 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 CH0 GUARD 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J2
J2
J2
J2
J2
J2
J2
J2 B14 CH2 SENSE B12 CH1 SENSE B10 CH0 SENSE B8 B6 B4 B2 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 CH4 SENSE EXT CLOCK 4 FORCE EXT CLK IN CH5 SENSE EXT GND SENS 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 CH6 SENSE EXT ADC STB 3 FORCE EXT_ADC_IN2 CH7 SENSE EXT IN1 3 FORCE EXT_ADC_IN1 EXT IN2 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 EXT DRV2 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 EXT IN3 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
GND CH2-1 CH2-2 GND CH2-3 CH2-4 GND EXT_TRIG GND CH2-5 CH2-6 GND
J2
J2
J2
J2
J2
J2
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J2
Dut connections
Appendix B-25
Appendix B-26 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
J9 OUT_15 OUT_16 OUT_17 OUT_18 OFS_POS_FORCE OUT_19 OUT_20 OFS_REF_COM OFS_OUT_COM OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 IO_13 IO_13_RTN IO_11 IO_11_RTN IO_9 IO_9_RTN IO_7 IO_7_RTN IO_5 IO_5_RTN IO_3 IO_3_RTN IO_1 IO_1_RTN IO_15_RTN IO_15 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
J9
J9
J9
J9
J9
J9
A9 CH5 FORCE
J9
J9
A7
J9
A8
J9
A5
J9
A6
J9
A3
J9
A4
J9
A1
J9
A2
J7 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
C2 CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
IO_14 IO_14_RTN IO_12 IO_12_RTN IO_10 IO_10_RTN IO_8 IO_8_RTN IO_6 IO_6_RTN IO_4 IO_4_RTN IO_2 IO_2_RTN IO_0 IO_0_RTN
J7
C1 CH2 SENSE
J7
C4 CH1 SENSE
J7
C3 CH0 SENSE
J7
C6 CH7 SENSE
J7
C5 CH6 SENSE
J7
C8 CH5 SENSE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J7
C7 CH4 SENSE
J7
C10
J7
C9
J7
C12
J7
C11
J7
C14
J7
C13
J7
C16
Dut connections
Appendix B-27
J7
C15
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
MDI
J9 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM OFS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 IO_11 OUT_20 IO_11_RTN OUT_21 IO_9 OUT_22 IO_9_RTN OUT_23 IO_7 OUT_24 IO_7_RTN OUT_25 IO_5 OUT_26 IO_5_RTN OUT_27 IO_3 OUT_28 IO_3_RTN IO_1 IO_1_RTN RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 IO_13_RTN 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 IO_13 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16 IO_15_RTN
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15 IO_15
J9
J9
J9
J9
J9
J9
J9
C9 CH4 FORCE
J9
C8
J9
C7
J9
C6
J9
C5
J9
C4
J9
C3
J9
C2
J9
C1
J7 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 DRV_0 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 3 FORCE EXT_ADC_IN1 MUX_3_4 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7
A1 CH3 SENSE
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
IO_14 IO_14_RTN IO_12 IO_12_RTN IO_10 IO_10_RTN IO_8 IO_8_RTN IO_6 OUT_10 IO_6_RTN OUT_11 IO_4 OUT_12 IO_4_RTN OUT_13 IO_2 OUT_14 IO_2_RTN IO_0 IO_0_RTN
J7
A2 CH2 SENSE
J7
A3 CH1 SENSE
J7
A4 CH0 SENSE
J7
A5 CH7 SENSE
Appendix B-28 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J7
A6 CH6 SENSE
J7
A7 CH5 SENSE
J7
A8 CH4 SENSE
J7
A9
J7
A10
J7
A11
J7
A12
J7
A13
J7
A14
J7
A15
February 2002
J7
A16
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
MDI
J8 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 IO_13 IO_13_RTN IO_11 IO_11_RTN IO_9 IO_9_RTN IO_7 IO_7_RTN IO_5 IO_5_RTN IO_3 IO_3_RTN IO_1 IO_1_RTN 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16 IO_15_RTN
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
IO_15
J8
J8
J8
J8
J8
J8
A9 CH5 FORCE
J8
J8
A7
J8
A8
J8
A5
J8
A6
J8
A3
J8
A4
J8
A1
J8
A2
J10 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
IO_14 IO_14_RTN IO_12 IO_12_RTN IO_10 IO_10_RTN IO_8 IO_8_RTN IO_6 IO_6_RTN IO_4 IO_4_RTN IO_2 IO_2_RTN IO_0 IO_0_RTN
J10
J10
J10
J10
J10
J10
A9 CH5 SENSE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J10
J10
A7
J10
A8
J10
A5
J10
A6
J10
A3
J10
A4
Dut connections
J10
A1
Appendix B-29
J10
A2
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
MDI
J8 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM OFS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OUT_20 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 IO_11 IO_11_RTN IO_9 IO_9_RTN IO_7 IO_7_RTN IO_5 IO_5_RTN IO_3 IO_3_RTN IO_1 IO_1_RTN RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 IO_13_RTN 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 IO_13 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16 IO_15_RTN
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
IO_15
J8
J8
J8
J8
J8
J8
J8
C9 CH4 FORCE
J8
C8
J8
C7
J8
C6
J8
C5
J8
C4
J8
C3
J8
C2
J8
C1
J10 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 DRV_0 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 3 FORCE EXT_ADC_IN1 MUX_3_4 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
IO_14 IO_14_RTN IO_12 IO_12_RTN IO_10 IO_10_RTN IO_8 IO_8_RTN IO_6 IO_6_RTN IO_4 IO_4_RTN IO_2 IO_2_RTN IO_0 IO_0_RTN
J10
J10
J10
J10
Appendix B-30 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J10
J10
J10
C9 CH4 SENSE
J10
C8
J10
C7
J10
C6
J10
C5
J10
C4
J10
C3
J10
C2
February 2002
J10
C1
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J8 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J8
J8
J8
J8
J8
J8
B9 CH5 FORCE
J8
J8
B7
J8
B8
J8
B5
J8
B6
J8
B3
J8
B4
J8
B1
J8
B2
J10 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS 4 FORCE EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 4 FORCE EXT CLK IN EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J10
J10
J10
J10
J10
J10
B9 CH5 SENSE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J10
J10
B7
J10
B8
J10
B5
J10
B6
J10
B3
J10
B4
J10
B1
Dut connections
Appendix B-31
J10
B2
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J10 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J10
J10
J10
J10
J10
J10
J10
J10
A23
J10
A24
J10
A21
J10
A22
J10
A19
J10
A20
J10
A17
J10
A18
J8 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS 4 FORCE EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 4 FORCE EXT CLK IN EXT_DRV_1 EXT_DRV_2 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J8
J8
J8
J8
Appendix B-32 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J8
J8
J8
J8
A23
J8
A24
J8
A21
J8
A22
J8
A19
J8
A20
J8
A17
February 2002
J8
A18
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J10 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J10
J10
J10
J10
J10
J10
J10
J10
C24
J10
C23
J10
C22
J10
C21
J10
C20
J10
C19
J10
C18
J10
C17
J8 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 4 FORCE EXT CLK IN 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J8
J8
J8
J8
J8
J8
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J8
J8
C24
J8
C23
J8
C22
J8
C21
J8
C20
J8
C19
J8
C18
Dut connections
Appendix B-33
J8
C17
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J9 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 OFS_REF_COM OFS_OUT_COM 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) OUT_18 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
CH0 FORCE
-FORCE
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J9
J9
J9
J9
J9
J9
J9
J9
A25
J9
A26
J9
A27
J9
A28
J9
A29
J9
A30
J9
A31
J9
A32
J7 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 4 FORCE EXT CLK IN EXT_DRV_1 4 FORCE EXT_DRV_2 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE MUX_4_1 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
HVS_OUT_8
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J7
J7
J7
J7
Appendix B-34 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J7
J7
J7
J7
C24
J7
C23
J7
C22
J7
C21
J7
C20
J7
C19
J7
C18
February 2002
J7
C17
Conn
Pin
OVI
DVI
ACS
TMU
DCC
MUX
HVS
MVS
PRO
OFS
LZB
J9 CH0 GUARD CH0 SENSE 3 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE DRV_14 MUX_5_1 DRV_15 MUX_5_2 DRV_13 MUX_5_3 DRV_12 MUX_5_4 DRV_10 MUX_6_1 DRV_11 MUX_6_2 TMU HIZ DUT4 DRV_9 MUX_6_3 TMU HIZ DUT3 DRV_8 MUX_6_4 5 FORCE TMU HIZ DUT2 DIFF_IN_REF MUX_7_1 HVS_OUT_COM MVS_OUT_COM 5 FORCE TMU HIZ DUT1 EXT_FBACK_2 MUX_7_2 HVS_REF_COM MVS_REF_COM DUT 10 5 SENSE DIFF_IN_POS MUX_7_3 DUT 11 (RLY DRV) OFS_REF_COM OFS_OUT_COM 4 SENSE RMS IN 4 TMU CHAN A DUT1 EXT_IN_1 MUX_7_4 HVS_POS_FORCE MVS_POS_FORCE DUT 12 OFS_POS_FORCE RMS IN 2 TMU CHAN A DUT2 DIFF_IN_NEG MUX_8_1 DUT 13 (RLY DRV) 2 SENSE SYNC 3 TMU CHAN B DUT1 PREC_REF_FORCE MUX_8_2 HVS_REF1 MVS_REF1 DUT 14 OFS_REF1 OUT_17 OUT_18 OUT_19 OUT_20 OUT_21 OUT_22 OUT_23 OUT_24 OUT_25 OUT_26 OUT_27 OUT_28 1 SENSE SYNC 1 TMU CHAN B DUT2 DAC_AGND MUX_8_3 HVS_NEG_FORCE MVS_NEG_FORCE OFS_NEG_FORCE OUT_16
CH0 FORCE
-FORCE
ACS OUT
EXT ARM IN
EXT_GND_REF
MUX_8_4
HVS_REF2
MVS_REF2
DUT16
OFS_REF2
OUT_15
J9
J9
J9
J9
J9
J9
J9
J9
C26
J9
C25
J9
C28
J9
C27
J9
C30
J9
C29
J9
C32
J9
C31
J7 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE TMU EXT DRV3 4 FORCE EXT CLK IN 4 FORCE EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6 3 FORCE EXT_ADC_IN2 3 FORCE EXT_ADC_IN1 2 FORCE RMS IN 3 IO1 PREC_REF_SENSE 2 FORCE RMS IN 1 IO2 EXT_IN_2 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1 1 FORCE SYNC 2 TMU EXT DRV2 SERVO_TRIGGER MUX_4_3
EXT DRV1
1 FORCE
EXT_FBACK_1
MUX_4_4
DUT 8
OFS_OUT_8 OFS_OUT_7 DUT 6 DUT 5 (GND) OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 DUT 3 (+15V) DUT 2 (RLY DRV) DUT 1 (-15V) OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
OUT_1 OUT_2 OUT_3 OUT_4 OUT_5 OUT_6 OUT_7 OUT_8 OUT_9 OUT_10 OUT_11 OUT_12 OUT_13 OUT_14
J7
J7
J7
J7
J7
J7
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
J7
J7
A23
J7
A24
J7
A21
J7
A22
J7
A19
J7
A20
Dut connections
J7
A17
Appendix B-35
J7
A18
J11 J10 J8 J7 J2
J6
J4
J1
J5
C1B1 A1 C1B1 A1 C1 B1 A1 C1 B1 A1
C1B1 A1 C1B1 A1
J3 J9
Appendix B-36 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Control Bits
The following control bits (CBits) are open collector drivers intended for driving relays on the DUT Card. They may also be used for other digital applications. Readback capability is available when driven with TTL levels.
Control Bits
Table B-32: ASL2000 Control Bits
CBit1 CBit2 CBit3 CBit4 CBit5 CBit6 CBit7 CBit8 CBit9 CBit10 CBit11 CBit12 CBit13 CBit14 CBit15 CBit16 J11-A1 J11-A2 J11-A3 J11-A4 J11-A5 J11-A6 J11-A7 J11-A8 J11-A9 J11-A10 J11-A11 J11-A12 J11-A13 J11-A14 J11-A15 J11-A16 CBit17 CBit18 CBit19 CBit20 CBit21 CBit22 CBit23 CBit24 CBit25 CBit26 CBit27 CBit28 CBit29 CBit30 CBit31 CBit32 J11-A17 J11-A18 J11-A19 J11-A20 J11-A21 J11-A22 J11-A23 J11-A24 J11-A25 J11-A26 J11-A27 J11-A28 J11-A29 J11-A30 J11-A31 J11-A32 CBit33 CBit34 CBit35 CBit36 CBit37 CBit38 CBit39 CBit40 CBit41 CBit42 CBit43 CBit44 CBit45 CBit46 CBit47 CBit48 J11-C1 J11-C2 J11-C3 J11-C4 J11-C5 J11-C6 J11-C7 J11-C8 J11-C9 J11-C10 J11-C11 J11-C12 J11-C13 J11-C14 J11-C15 J11-C16 CBit49 CBit50 CBit51 CBit52 CBit53 CBit54 CBit55 CBit56 CBit57 CBit58 CBit59 CBit60 CBit61 CBit62 CBit63 CBit64 J11-C17 J11-C18 J11-C19 J11-C20 J11-C21 J11-C22 J11-C23 J11-C24 J11-C25 J11-C26 J11-C27 J11-C28 J11-C29 J11-C30 J11-C31 J11-C32
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix B-37
Power Pins
Table B-33: ASL2000 Power Pins
Voltages
+65V +50V +24V +16V +12V +5V +3.3V -5V -16V -24V -50V -65V J5-A29 J5-A28 J5-A30 J4-B29 J1-B31 J4-B31 J11-B30 J5-A25 J1-B29 J5-A19 J5-A23 J5-A22 J5-C29 J5-C28 J5-C30 J5-C27 J5-C18 J5-C20 J11-B31 J5-C25 J5-C24 J5-C19 J5-C23 J5-C22
Pins
J11-B19 J5-C32
J11-B21 J11-B29
J5-A32
J11-B27
J11-B25
Ground Pins
Table B-34: ASL2000 Ground Pins
J1-B2 J1-B4 J4-B2 J4-B4 J5A17 J5A21 J5A31 J5C17 J5C21 J5C31 J6A18 J6A20 J6A22 J6A24 J6A26 J6A28 J6A30 J6A32 J6C18 J6C20 J6C22 J6C24 J6C26 J6C28 J6- J7-B7 C30 J6- J7-B8 C32 J7-B1 J7-B9 J7-B2 J7-B3 J7-B4 J7-B5 J7-B6 J7B10 J7B11 J7B12 J7B13 J7B14 J7B15 J7B16 J7B17 J7B18 J7B19 J7B20 J7B21 J7B22 J7B24 J7B26 J7B28 J7B29 J7B30 J7B31 J7B32 J8B17 J8B18 J8B19 J8B20 J8B21 J8B22 J8B23 J8B24 J8B25 J8B26 J8B27 J8B28 J8B29 J8B30 J8B31 J8B32 J9-B1 J9B2 J9B3 J9B4 J9B5 J9B6 J9B7 J9B8 J9B9 J9B10 J9B11 J9B12 J9B13 J9B14 J9B15 J9B16 J9B17 J9B18 J9B19 J9B20 J9B21 J9B22 J9B23 J9B24 J9B25 J9-B26 J9-B27 J9-B28 J9-B29 J9-B30 J9-B31 J9-B32 J10B17 J10B19 J10B21 J10B23 J10B25 J10B27 J10B29 J10B31 J10B32 J11-B3 J11-B6 J11-B9 J11B12 J11B15 J11B18 J11B22 J11B24 J11B26
Appendix B-38 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Sense Pins
Sense Pins
Table B-35: ASL2000 Sense Pins
Signal
Ana Gnd Sense J5-A26
Pins
J5-C26
Sync Pins
Table B-36: ASL2000 Sync Pins
Sync Signal
ASYNC0_in ASYNC1_in ASYNC2_in ASYNC3_in ASYNC4_in ASYNC0_out ASYNC1_out ASYNC2_out ASYNC3_out ASYNC4_out J10-B22 J10-B24 J7-B23 J7-B25 J7-B27 J10-B18 J10-B20 J10-B26 J10-B28 J10-B30
Pin
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix B-39
Pin
Appendix B-40 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Appendix C
RFx Interconnects
The tables on the following pages describe the connections and pins configured in the RFx test head cage. Each table lists the connections for one slot; tables are arranged in numerical order, from Slot 1 to Slot 21.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-1
Slot 1
Table C-1: RFx Pinouts: Slot 1
RFx DUT BD (connector.pin)
J2.B17 J2.B19 J2.B21 J2.B23 J2.B25 J2.B27 J2.B29 J2.B31 J2.B18 J2.B20 J2.B22 J2.B24 J2.B26 J2.B28 J2.B30 J2.B32
OVI(1)
CH3 FORCE CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE CH3 SENSE CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE EXT IN1
DVI(8)
CH0 FORCE CH0 GUARD CH0 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA EXT DRV1 EXT IN3
Appendix C-2 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Slot 2
Table C-2: RFx Pinouts: Slot 2
RFx DUT BD (connector.pin)
J2.C17 J2.C18 J2.C19 J2.C20 J2.C21 J2.C22 J2.C23 J2.C24 J2.C25 J2.C26 J2.C27 J2.C28 J2.C29 J2.C30 J2.C31 J2.C32 J2.A17 J2.A18 J2.A19 J2.A20 J2.A21 J2.A22 J2.A23 J2.A24 J2.A25 J2.A26 J2.A27 J2.A28 J2.A29 J2.A30 J2.A31 J2.A31 -FORCE 1 SENSE 2 SENSE 3 SENSE 4 SENSE 5 FORCE 5 FORCE 5 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE 1 FORCE 1 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE 4 FORCE 4 FORCE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE - SENSE CH3 SENSE CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE
PVI(2)
OVI(X)
CH3 FORCE CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-3
Slot 3
Table C-3: RFx Pinouts: Slot 3
Back Panel Connection
J2-3.C32 J2-3.C31 J2-3.C30 J2-3.C29 J2-3.C28 J2-3.C27 J2-3.C26 J2-3.C25 J2-3.A32 J2-3.A31 J2-3.A30 J2-3.A29 J2-3.A28 J2-3.A27 J2-3.A26 J2-3.A25
OVI(2)
CH3 FORCE CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE CH3 SENSE CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE
DVI(7)
CH0 FORCE CH0 GUARD CH0 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA EXT DRV1 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENSE EXT CLOCK
Appendix C-4 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Slot 4
Table C-4: RFx Pinouts: Slot 4
Back Panel Connection
J2-4.C32 J2-4.C31 J2-4.C30 J2-4.C29 J2-4.C28 J2-4.C27 J2-4.C26 J2-4.C25 J2-4.C24 J2-4.C23 J2-4.C22 J2-4.C21 J2-4.C20 J2-4.C19 J2-4.C18 J2-4.C17 J2-4.A32 J2-4.A31 J2-4.A30 J2-4.A29 J2-4.A28 J2-4.A27 J2-4.A26 J2-4.A25 J2-4.A24 J2-4.A23 J2-4.A22 J2-4.A21 J2-4.A20 J2-4.A19 J2-4.A18 J2-4.A17
PVI(1)
-FORCE 1 SENSE 2 SENSE 3 SENSE 4 SENSE 5 SENSE 5 FORCE 5 FORCE 5 FORCE 5 FORCE 5 FORCE 2 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE 1 FORCE 1 FORCE 2 FORCE 2 FORCE 3 FORCE 3 FORCE 4 FORCE 4 FORCE 4 FORCE 4 FORCE 4 FORCE 1 FORCE 1 FORCE 1 FORCE 3 FORCE -SENSE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-5
Slot 5
Table C-5: RFx Pinouts: Slot 5
Back Panel Connection
J2-5.C32 J2-5.C31 J2-5.C30 J2-5.C29 J2-5.C28 J2-5.C27 J2-5.C26 J2-5.C25 J2-5.A32 J2-5.A31 J2-5.A30 J2-5.A29 J2-5.A28 J2-5.A27 J2-5.A26 J2-5.A25
ACS
ACS OUT STROBE 1 STROBE 3 ACS IN 2 ACS IN 4
EXT CLK IN
Appendix C-6 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Slot 6
Table C-6: RFx Pinouts: Slot 6
Back Panel Connection
J2-6.C32 J2-6.C31 J2-6.C30 J2-6.C29 J2-6.C28 J2-6.C27 J2-6.C26 J2-6.C25 J2-6.C24 J2-6.C23 J2-6.C22 J2-6.C21 J2-6.C20 J2-6.C19 J2-6.C18 J2-6.C17 J2-6.A32 J2-6.A31 J2-6.A30 J2-6.A29 J2-6.A28 J2-6.A27 J2-6.A26 J2-6.A25 J2-6.A24 J2-6.A23 J2-6.A22 J2-6.A21 J2-6.A20 J2-6.A19 J2-6.A18 J2-6.A17
TMU
EXT_ARM_DUT TMU_CHAN_B_DUT2 TMU_CHAN_B_DUT1 TMU_CHAN_A_DUT2 TMU_CHAN_A_DUT1 TMU_HIZ_DUT1 TMU_HIZ_DUT2 TMU_HIZ_DUT3 TMU_HIZ_DUT4
TMU_EXT_DRV3
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-7
Slot 7
Table C-7: RFx Pinouts: Slot 7
Back Panel Connection
J2-7.C32 J2-7.C31 J2-7.C30 J2-7.C29 J2-7.C28 J2-7.C27 J2-7.C26 J2-7.C25 J2-7.A32 J2-7.A31 J2-7.A30 J2-7.A29 J2-7.A28 J2-7.A27 J2-7.A26 J2-7.A25 J5.B31 J5.B29 J5.B27 J5.B25 J5.B23 J5.B21 J5.B19 J5.B17 J5.B32 J5.B30 J5.B28 J5.B26 J5.B24 J5.B22 J5.B20 J5.B18
DDD
DRIVE 1 DRIVE 2 DRIVE 3 DRIVE 4 DRIVE 5 DRIVE 6 DRIVE 7 DRIVE 8
Appendix C-8 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Slot 8
Table C-8: RFx Pinouts: Slot 8
Back Panel Connection
J2-8.C32 J2-8.C31 J2-8.C30 J2-8.C29 J2-8.C28 J2-8.C27 J2-8.C26 J2-8.C25 J2-8.C24 J2-8.C23 J2-8.C22 J2-8.C21 J2-8.C20 J2-8.C19 J2-8.C18 J2-8.C17 J2-8.A32 J2-8.A31 J2-8.A30 J2-8.A29 J2-9.A28 J2-8.A27 J2-8.A26 J2-8.A25 J2-8.A24 J2-8.A23 J2-8.A22 J2-8.A21 J2-8.A20 J2-8.A19 J2-8.A18 J2-8.A17
DOAL(1)
DUT_POS_OUT EXT_PICO_POS DUT_NEG_OUT EXT_PICO_NEG DUT_NEG_IN EXT_DRV_1 DUT_POS_IN EXT_DRV_2 CH1_POS_OUT CH1_PICO_POS CH1_NEG_OUT CH1_PICO_NEG CH1_NEG_IN CH1_POS_IN
OVI(X)
CH3 FORCE CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE
DUT_OUT_2 EXT_LOAD_CONN EXT_RLY_DRV CH0_FEEDBACK RMS_METER DUT_OUT EXT_REF DUT_OUT_OUT CH1_OUT_2 CH1_LOAD_CONN CH1_EXT_DRV CH1_FEEDBACK CH1_RMS_MTR CH1_DUT_OUT CH1_OUT_OUT
CH3 SENSE CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-9
Slot 9
Table C-9: RFx Pinouts: Slot 9
Back Panel Connection
J2-9.C32 J2-9.C31 J2-9.C30 J2-9.C29 J2-9.C28 J2-9.C27 J2-9.C26 J2-9.C25 J2-9.A32 J2-9.A31 J2-9.A30 J2-9 A29 J2-9.A28 J2-9.A27 J2-9.A26 J2-9.A25
DVI(1) Required
CH0 FORCE CH0 GUARD CH0 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA EXT DRV1 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENSE EXT CLOCK
Appendix C-10 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Slot 10
Table C-10: RFx Pinouts: Slot 10
Back Panel Connection
J2-10.C32 J2-10.C31 J2-10.C30 J2-10.C29 J2-10.C28 J2-10.C27 J2-10.C26 J2-10.C25 J2-10.C24 J2-10.C23 J2-10.C22 J2-10.C21 J2-10.C20 J2-10.C19 J2-10.C18 J2-10.C17 J2-10.A32 J2-10.A31 J2-10.A30 J2-10.A29 J2-10.A28 J2-10.A27 J2-10.A26 J2-10.A25 J2-10.A24 J2-10.A23 J2-10.A22 J2-10.A21 J2-10.A20 J2-10.A19 J2-10.A18 J2-10.A17
DMOD
U_board_3 U_board_2 Q_board_3 Q_board_2 I_board_3 I_board_2 IN_3 IN_2 IO_3 IO_2 RYL_DRV_11 RYL_DRV_10 RYL_DRV_9 RYL_DRV_8 RYL_DRV_7 RYL_DRV_6 U_board_1 U_board_0 Q_board_1 Q_board_0 I_board_1 I_board_0 IN_1 IN_0 IO_1 IO_0 RYL_DRV_5 RYL_DRV_4 RYL_DRV_3 RYL_DRV_2 RYL_DRV_1 RYL_DRV_0
DOAL(2)
DUT_POS_OUT EXT_PICO_POS DUT_NEG_OUT CH1_PICO_NEG DUT_NEG_IN EXT_DRV_1 DUT_POS_IN EXT_DRV_2 CH1_POS_OUT CH1_PICO_POS CH1_NEG_OUT CH1_PICO_NEG CH1_NEG_IN CH1_POS_IN
OVI(X)
CH3 FORCE CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE
DUT_OUT_2 EXT_LOAD_CON EXT_RLY_DRV CH0_FEEDBACK RMS_METER DUT_OUT EXT_REF DUT_OUT_OUT CH1_OUT_2 CH1_LOAD_CONN CH1_EXT_DRV CH1_FEEDBACK CH1_RMS_MTR CH1_DUT_OUT CH1_OUT_OUT
CH3 SENSE CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-11
Slot 11
Table C-11: RFx Pinouts: Slot 11
Back Panel Connection
J2-11.C32 J2-11.C31 J2-11.C30 J2-11.C29 J2-11.C28 J2-11.C27 J2-11.C26 J2-11.C25 J2-11.A32 J2-11.A31 J2-11.A30 J2-11.A29 J2-11.A28 J2-11.A27 J2-11.A26 J2-11.A25
DVI(2)
CH0 FORCE CH0 GUARD CH0 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA EXT DRV1 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK
Appendix C-12 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Slot 12
Table C-12: RFx Pinouts: Slot 12
Back Panel Connection
J2-12.C32 J2-12.C31 J2-12.C30 J2-12.C29 J2-12.C28 J2-12.C27 J2-12.C26 J2-12.C25 J2-12.C24 J2-12.C23 J2-12.C22 J2-12.C21 J2-12.C20 J2-12.C19 J2-12.C18 J2-12.C17 J2-12.A32 J2-12.A31 J2-12.A30 J2-12.A29 J2-12.A28 J2-12.A27 J2-12.A26 J2-12.A25 J2-12.A24 J2-12.A23 J2-12.A22 J2-12.A21 J2-12.A20 J2-12.A19 J2-12.A18 J2-12.A17
DCC
EXT_GND_REF DAC_AGND PREC_REF_FORCE DIFF_IN_NEG EXT_IN_1 DIFF_IN_POS EXT_FBACK_2 DIFF_IN_REF DRV_8 DRV_9 DRV_11 DRV_10 DRV_12 DRV_13 DRV_15 DRV_14 EXT_FBACK_1 SERVO_TRIGGER EXT_IN_2 PREC_REF_SENSE EXT_ADC_IN1 EXT_ADC_IN2 EXT_DRV_2 EXT_DRV_1 DRV_0 DRV_1 DRV_3 DRV_2 DRV_4 DRV_5 DRV_7 DRV_6
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-13
Slot 13
Table C-13: RFx Pinouts: Slot 13
Back Panel Connection
J2-13.C32 J2-13.C31 J2-13.C30 J2-13.C29 J2-13.C28 J2-13.C27 J2-13.C26 J2-13.C25 J2-13.A32 J2-13.A31 J2-13.A30 J2-13.A29 J2-13.A28 J2-13.A27 J2-13.A26 J2-13.A25
DVI(3)
CH0 FORCE CH0 GUARD CH0 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA EXT DRV1 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK
Appendix C-14 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Slot 14
Table C-14: RFx Pinouts: Slot 14
Back Panel Connection
J2-14.C32 J2-14.C31 J2-14.C30 J2-14.C29 J2-14.C28 J2-14.C27 J2-14.C26 J2-14.C25 J2-14.C24 J2-14.C23 J2-14.C22 J2-14.C21 J2-14.C20 J2-14.C19 J2-14.C18 J2-14.C17 J2-14.A32 J2-14.A31 J2-14.A30 J2-14.A29 J2-14.A28 J2-14.A27 J2-14.A26 J2-14.A25 J2-14.A24 J2-14.A23 J2-14.A22 J2-14.A21 J2-14.A20 J2-14.A19 J2-14.A18 J2-14.A17 J4.A17 J4.A18 J4.A19 J4.A20 J4.A21 J4.A22 J4.A23 J4.A24 J4.A25 J4.A26 J7.A7 J7.A8 J7.A9 J7.A10 J7.A11 J7.A12 J4.C17 J4.C18 J4.C19 J4.C20 J4.C21 J4.C22 J4.C23 J4.C24 J4.C25 J4.C26 J7.C7 J7.C8 J7.C9 J7.C10 J7.C11 J7.C12
MUX1
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-15
Slot 15
Table C-15: RFx Pinouts: Slot 15
RFx DUT BD (connector.pin)
J6.B1 J6.B3 J6.B5 J6.B7 J6.B9 J6.B11 J6.B13 J6.B15 J6.B2 J6.B4 J6.B6 J6.B8 J6.B10 J6.B12 J6.B14 J6.B16 HVS_REF2 HVS_NEG_FORCE HVS_REF1 DUT 13 (RLY DRV) HVS_POS_FORCE DUT 11 (RLY DRV) HVS_REF_COM HVS_OUT_COM HVS_OUT_8 HVS_OUT_7 HVS_OUT_6 HVS_OUT_5 HVS_OUT_4 HVS_OUT_3 HVS_OUT_2 HVS_OUT_1
HVS
DDD(S1)
DRIVE 1 DRIVE 2 DRIVE 3 DRIVE 4 DRIVE 5 DRIVE 6 DRIVE 7 DRIVE 8
OVI(6)
CH3 FORCE CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE CH3 SENSE CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE
PRO(2)
DUT16 DUT 14 DUT 12 DUT 10
DUT 8 DUT 6 DUT 5 (GND) DUT 3(+15V) DUT 2 (RLY DRV) DUT 1 (-15V)
Appendix C-16 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Slot 16
Table C-16: RFx Pinouts: Slot 16
Back Panel Connection
J2-16.C32 J2-16.C31 J2-16.C30 J2-16.C29 J2-16.C28 J2-16.C27 J2-16.C26 J2-16.C25 J2-16.C24 J2-16.C23 J2-16.C22 J2-16.C21 J2-16.C20 J2-16.C19 J2-16.C18 J2-16.C17 J2-16.A32 J2-16.A31 J2-16.A30 J2-16.A29 J2-16.A28 J2-16.A27 J2-16.A26 J2-16.A25 J2-16.A24 J2-16.A23 J2-16.A22 J2-16.A21 J2-16.A20 J2-16.A19 J2-16.A18 J2-16.A17
MUX(2)
MUX_8_4 MUX_8_3 MUX_8_2 MUX_8_1 MUX_7_4 MUX_7_3 MUX_7_2 MUX_7_1 MUX_6_4 MUX_6_3 MUX_6_2 MUX_6_1 MUX_5_4 MUX_5_3 MUX_5_2 MUX_5_1 MUX_4_4 MUX_4_3 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-17
Slot 17
Table C-17: RFx Pinouts: Slot 17
Back Panel Connection
J2-17.C32 J2-17.C31 J2-17.C30 J2-17.C29 J2-17.C28 J2-17.C27 J2-17.C26 J2-17.C25 J2-17.A32 J2-17.A31 J2-17.A30 J2-17.A29 J2-17.A28 J2-17.A27 J2-17.A26 J2-17.A25
DVI(5)
CH0 FORCE CH0 GUARD CH0 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA EXT DRV1 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENSE EXT CLOCK
OFS
OFS_REF2 OFS_NEG_FORCE OFS_REF1 OFS_POS_FORCE OFS_REF_COM OFS_OUT_COM OFS_OUT_8 OFS_OUT_7 OFS_OUT_6 OFS_OUT_5 OFS_OUT_4 OFS_OUT_3 OFS_OUT_2 OFS_OUT_1
DDD(S2)
DRIVE 1 DRIVE 2 DRIVE 3 DRIVE 4 DRIVE 5 DRIVE 6 DRIVE 7 DRIVE 8
Appendix C-18 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Slot 18
Table C-18: RFx Pinouts: Slot 18
Back Panel Connection
J2-18.C32 J2-18.C31 J2-18.C30 J2-18.C29 J2-18.C28 J2-18.C27 J2-18.C26 J2-18.C25 J2-18.C24 J2-18.C23 J2-18.C22 J2-18.C21 J2-18.C20 J2-18.C19 J2-18.C18 J2-18.C17 J2-18.A32 J2-18.A31 J2-18.A30 J2-18.A29 J2-18.A28 J2-18.A27 J2-18.A26 J2-18.A25 J2-18.A24 J2-18.A23 J2-18.A22 J2-18.A21 J2-18.A20 J2-18.A19 J2-18.A18 J2-18.A17
LZB
MUX_8_4 MUX_8_3 MUX_8_2 MUX_8_1 MUX_7_4 MUX_7_3 MUX_7_2 MUX_7_1 MUX_6_4 MUX_6_3 MUX_6_2 MUX_6_1 MUX_5_4 MUX_5_3 MUX_5_2 MUX_5_1 MUX_4_4 MUX_4_3 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1
MUX(3)
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-19
Slot 19
Table C-19: RFx Pinouts: Slot 19
Back Panel Connection
J2-19.C32 J2-19.C31 J2-19.C30 J2-19.C29 J2-19.C28 J2-19.C27 J2-19.C26 J2-19.C25 J2-19.A32 J2-19.A31 J2-19.A30 J2-19.A29 J2-19.A28 J2-19.A27 J2-19.A26 J2-19.A25
DVI(4)
CH3 FORCE CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE CH3 SENSE CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE
OVI(4)
CH0 FORCE CH0 GUARD CH0 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA EXT DRV1 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK
Appendix C-20 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Slot 20
Table C-20: RFx Pinouts: Slot 20
Back Panel Connection
J2-20.C32 J2-20.C31 J2-20.C30 J2-20.C29 J2-20.C28 J2-20.C27 J2-20.C26 J2-20.C25 J2-20.C24 J2-20.C23 J2-20.C22 J2-20.C21 J2-20.C20 J2-20.C19 J2-20.C18 J2-20.C17 J2-20.A32 J2-20.A31 J2-20.A30 J2-20.A29 J2-20.A28 J2-20.A27 J2-20.A26 J2-20.A25 J2-20.A24 J2-20.A23 J2-20.A22 J2-20.A21 J2-20.A20 J2-20.A19 J2-20.A18 J2-20.A17
MUX(1) Required
MUX_8_4 MUX_8_3 MUX_8_2 MUX_8_1 MUX_7_4 MUX_7_3 MUX_7_2 MUX_7_1 MUX_6_4 MUX_6_3 MUX_6_2 MUX_6_1 MUX_5_4 MUX_5_3 MUX_5_2 MUX_5_1 MUX_4_4 MUX_4_3 MUX_4_2 MUX_4_1 MUX_3_4 MUX_3_3 MUX_3_2 MUX_3_1 MUX_2_4 MUX_2_3 MUX_2_2 MUX_2_1 MUX_1_4 MUX_1_3 MUX_1_2 MUX_1_1
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-21
Slot 21
Table C-21: RFx Pinouts: Slot 21
Back Panel Connection
J2-21.C32 J2-21.C31 J2-21.C30 J2-21.C29 J2-21.C28 J2-21.C27 J2-21.C26 J2-21.C25 J2-21.A32 J2-21.A31 J2-21.A30 J2-21.A29 J2-21.A28 J2-21.A27 J2-21.A26 J2-21.A25
DVI(7)
CH3 FORCE CH2 FORCE CH1 FORCE CH0 FORCE CH7 FORCE CH6 FORCE CH5 FORCE CH4 FORCE CH3 SENSE CH2 SENSE CH1 SENSE CH0 SENSE CH7 SENSE CH6 SENSE CH5 SENSE CH4 SENSE
OVI(3)
CH0 FORCE CH0 GUARD CH0 SENSE CH1 FORCE CH1 GUARD CH1 SENSE EXT DATA EXT DRV1 EXT IN3 EXT DRV2 EXT IN2 EXT IN1 EXT ADC STB EXT GND SENS EXT CLOCK DUT 6 DUT 8 DUT 14 DUT16
PRO(1)
Appendix C-22 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Power
Power Supplies
SIGNAL NAME
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-23
Grounds
SIGNAL NAME
Appendix C-24 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
RFx Digitizer
SIGNAL NAME
RFD_CHAN3 (+) RFD_CHAN3 (-) RFD_CHAN1 (+) RFD_CHAN1 (-) RFD_CHAN4 (+) RFD_CHAN4 (-) RFD_CHAN2 (+) RFD_CHAN2 (-)
Bus Connections
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
Appendix C-25
Appendix C-26 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Glossary of Terms
Glossary of Terms
A
AC Multiplexer - High-speed test site for testing digital clock devices. ACM Instrument - See AC Multiplexer above. AC Source Instrument - A general purpose source and measurement device intended for testing opamps and ADCs and other devices under dynamic conditions. ACS Instrument - See AC Source Instrument above. ADC - See Analog-to-Digital-Converter below. Analog-to-Digital Converter - ADC. A device which converts a continuously varying signal, such as voltage or frequency, into a series of numbers (digital pulses) suitable for use by digital equipment. Advanced Standard Linear (ASL) - The name given to a family of TMT products that are designed to test integrated circuits. ASL - See Advanced Standard Linear above. ASL1000 - Advanced Standard Linear automatic test system designed for high-volume wafer-sort and packaged-part testing of linear and mixed-signal semi-conductor devices. ASL2000 - Next generation ASL automatic test system that, in addiiton to offering the full capability of its predecessor, is designed to offer higher performance DSP and Mixed Signal Digital capability. ATE - See Automated Test Equipment below. Automated Test Equipment (ATE) - Hardware that performs multiple tests in sequence without manual operator intervention.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
D-1
Backplane - The ASL1000 test head motherboard where the various test instruments are mounted. The backplane mounts up to 21 instruments. Break Point - The point where a source code compiler begins running or stops running code during debugging. Buffer - Memory that holds information currently in active use and transfers accessed data at extremely high speed.
C
Calibration - Determining the relationship between the indicated value on a measuring instrument, and the true value of the quantity to be measured. The true value is the value that would be measured if there were no sources of error. CMOS - See Complementary MOS Transistors below. Complementary MOS Transistors - See also MOS Transistors. A pair of transistors of opposite type used together. CMOS transistors are used in lowdissipation logic circuits. Controller Tower - The case containing the CPU, backplane and test instruments.
D
DAC - See Digital-to-Analog Converter below. Data - Information represented as numerical values suitable for computer processing. Data Converter Card - A multifunction instrument card that supports the testing of converter type devices. DB-25 Connector - Standard 25-pin serial connector (RS232) used for data communications. Applies to both male and female connectors. DCC - See Data Converter Card above. DDD - See Digital Driver and Detector below.
D-2 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Glossary of Terms
Default - The action the tester system takes to set parameters if the user does not enter an alternate value. Defaults are normally the most common, or most desirable, values. Digital Driver and Detector - DDD. A general purpose I/O card used to stimulate and read back many types of digital and mixed signal devices. Digital-to-Analog Converter - A device which converts digital pulses (data) into analog signals for use by analog equipment. Dispatch Interface - Communicates between the Visual ATE user interface and the hardware or test head control program. DLL - Dynamic Link Library *.dll file type. DOAL - See Dual Opamp Loop on the next page. DUT - Device Under Test. The component that is undergoing testing. DUT Board - The printed-circuit (PC) or air-wired board configured to interface between the test instruments and the DUT. Dual Opamp Loop (DOAL) - High-precision opamp and comparator resource for testing amplifiers in a closed loop configuration. Dual Voltage/Current Resource (DVI) - Medium-current V/I source that provides four-quadrant force/measure operation and rapid settling time. DVI - See Dual Voltage/Current Resource above
E
ECL - See Emitter-Coupled Logic below. Emitter-Coupled Logic (ECL) - Integrated logic circuit with a pair of transistors couples by their emitters forming a fundamental part of the circuit. The transistors are operated in nonsaturated mode with a delay of about one nanosecond. This is one of the fastest types of circuits.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
D-3
FET - See Field-Effect Transistor below. Field-Effect Transistor - A unipolar, multi electrode semiconductor device where current flows through a narrow conducting channel between two electrodes, and is modulated by an electric field applied at a third electrode. This current channel connects the source and drain regions, while the modulating signal is applied to the gate. When a bias is applied to across the transistor, charge carriers move from source to drain. FIFO - See First in, first out below. First In, First Out - (FIFO) Buffering scheme where the first byte of data that enters the buffer is also the first byte the CPU retrieves. Frequency Division Multiplexing - A form of muxing where each user of a system is assigned a different frequency band.
H
Hardware Bin - A compartment on the handler where tested parts are deposited. Parts enter different bins depending on the test result. Hex - See Hexadecimal below. Hexadecimal - A numbering system consisting of 16 characters: ten digits and 6 letters. The characters condense lengthy series of binary code into compact units. Hexadecimal notation is commonly used to specify computer memory addresses. Numbers 0 through 15 are represented by digits 0 through 9 and letters A through F. A represents the number 10, B represents 11, etc. High-Voltage Source (HVS) - High-voltage, low-current floating source for the ASL1000 and RFx systems. Handler - Also IC Handler. A machine that automatically takes components through the test process, from connecting the part to the tester to placing it in the appropriate bin after testing. HVS - See High-Voltage Source above.
D-4 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Glossary of Terms
IC Handler - Also Handler. A machine that automatically takes components through the test process, from connecting the part to the tester to placing it in the appropriate bin after testing. init - A type of function call that initializes an instrument. Calling init restores all instrument conditions to the pre-determined states. Initialization - A process used on startup to ensure that all indicators and constants are set to pre-determined conditions or values. Interconnect Board - Provides the connections between the DUT board and the 21 instrument slots in the high-performance backplane. TMT offers three versions, a standard (SCB) type, a low-leakage version, and a mediumleakage version. Interface Card I/O - Input/Output. Information transfer between a CPU and a peripheral device. ISA - Industry Standard Architecture, the most common bus architecture on Windows CPUs, with 16-bit connection and data transport of 5 MB per second.
L
LCB - Low-leakage Interconnect Board. Low current (1 nA - 100 nA) measuring instrument with 2 measurement channels. Link/Zener Blower (LZB) - Single quadrant V/I source optimized for link and Zener blows. Low-Pass Filter (LPF) - A filter that transmits signals in the pass band 0 to cutoff frequency (f c). LPF - See Low-Pass Filter above. LZB - See Link/Zener Blower Above.
M
MCB - Medium Leakage Interconnect Board.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
D-5
Medium Voltage Source (MVS) - Medium voltage, low-current floating source for the ASL1000 and RFx systems. MOS Transistor - An insulated-gate field-effect transistor. The gate electrode is metal; the insulator is silicon dioxide. Multiplex Operation (multiplexing) - Signal switching. A process of transmitting several signals simultaneously along a single path with no loss of identity on an individual signal. Multiplexer - Allocates transmission path according to a particular parameter of the signal being multiplexed, or muxed. See also: Frequency Division Multiplexing and Time Division Multiplexing. MUX - See Resource Multiplexer. MVS - See Medium Voltage Source above.
O
Octal Floating Source (OFS) - Medium-voltage, medium-current floating V/I source. Octal Voltage/Current Supply (OVI) - A general purpose V/I power supply with 8 independent, DUT ground-referenced supplies on one board and a dual DC measurement system. OFS - See Octal Floating Source above. Opamp - See Operational Amplifier below. Operational Amplifier (Opamp) - An amplifier of two or more stages constructed from pre assembled units, designed for insertion into other equipment. OVI - See Octal Voltage/Current Supply above.
D-6 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Glossary of Terms
Parameter - A value that is passed to a test function to define how that test function is to run. Also: a value that restricts or defines a limit. Parameters are listed in parentheses after the function call. Peak-to-Peak Voltage (Vpp) - Peak-to-Peak voltage in a sinusoidal wave. Power Subsystem - The ASL1000 power supply, consisting of +/-5, +/-12, +/16, +/-24, +/-50 and +/-65V open frame, OEM-style power modules. Precision Measurement Unit (PMU) - Extremely precise measuring unit, that operates in a single- or dual-pass mode. PMU - See Precision Measurement Unit above. PRO - See Prototyping Instrument below. Prototyping Instrument (PRO) - Configurable instrument card used to create custom circuitry. Pulsed Voltage/Current Source (PVI) - An instrument card that provides a single channel of floating, pulsed voltage and current and a single DC measurement system. PVI - See Pulsed Voltage/Current Source above.
R
Reset - The process of restoring an instrument or machine to its default state. Resource Multiplexer (MUX) - An instrument card that contains a 32x8 relay matrix and allows access to the test-head user busses. The MUX can be configured for a variety of system resource or DUT connections. RFx - A mixed-signal Radio Frequency (RF) tester with a small test head for overhead probing, flexible docking, and open architecture for adaptability. RMS - Root Mean Square. The virtual or effective value of a periodically varying quantity (alternating current) averaged over a complete cycle.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
D-7
SCB - Standard Interconnect Board. Source Code File -.cpp or .h file types. The actual C ++ code that directs the test system in performing test functions.
T
Test Function - A single C++ function that performs one or more tests on a DUT. Test Head Assembly - The portion of the system that contains the test instrument cards, signal and power busses, and ground planes. Test Instrument - Also Board or Card, a general purpose source and measurement board designed to test devices under dynamic conditions. TIA - See Time Interval Analyzer below. Time Division Multiplexing - A process where input signals are sampled and transmitted sequentially, so that each input signal is transmitted over the common channel during a set of predetermined time intervals. Time Interval Analyzer (TIA) - Two channel, high-precision measurement instrument; mounts in the PC case. Time Measurement Unit (TMU) - A test instrument that allows the measuring time between defined voltage events. See Chapter 1 and the TMU reference for more information. TMU - See Time Measurement Unit above. Transistor-Transistor Logic (TTL) -High-speed integrated logic circuits where the input is through a multi-emitter transistor. Essayist output stage is push-pull. Output voltage changes rapidly when the input conditions change because the transistors drive the input level in both directions. TTL - See Transistor-Transistor Logic above.
U
User Code - C++ code entered into the source file by the user.
D-8 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002
Glossary of Terms
Username - Set of alphanumeric characters determined by the user to serve as a unique login identifier.
V
VME Backplane - Verisimilitude Europe backplane. A 1-21 slot mechanical and electrical open bus standard board with pin-in-socket connection, running at 80 Mb/s. Vpp - See Peak-to-Peak voltage.
February 2002 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
D-9
D-10 Visual ATE Programming Reference Manual Copyright 2002 Credence Systems Corporation
February 2002