OPA

277

OPA

227

OPA 4277

OPA2 77

OPA2 277

OPA4 277

OPA2

77

OPA2

277

OPA277 OPA2277 OPA4277

SBOS079A MARCH 1999 REVISED APRIL 2005

High Precision OPERATIONAL AMPLIFIERS

FEATURES
G ULTRA LOW OFFSET VOLTAGE: 10V G ULTRA LOW DRIFT: 0.1V/C G HIGH OPEN-LOOP GAIN: 134dB G HIGH COMMON-MODE REJECTION: 140dB G HIGH POWER SUPPLY REJECTION: 130dB G LOW BIAS CURRENT: 1nA max G WIDE SUPPLY RANGE: 2V to 18V G LOW QUIESCENT CURRENT: 800A/amplifier G SINGLE, DUAL, AND QUAD VERSIONS G REPLACES OP-07, OP-77, OP-177

DESCRIPTION
The OPA277 series precision op amps replace the industry standard OP-177. They offer improved noise, wider output voltage swing, and are twice as fast with half the quiescent current. Features include ultra low offset voltage and drift, low bias current, high common-mode rejection, and high power supply rejection. Single, dual, and quad versions have identical specifications for maximum design flexibility. OPA277 series op amps operate from 2V to 18V supplies with excellent performance. Unlike most op amps which are specified at only one supply voltage, the OPA277 series is specified for real-world applications; a single limit applies over the 5V to 15V supply range. High performance is maintained as the amplifiers swing to their specified limits. Because the initial offset voltage (20V max) is so low, user adjustment is usually not required. However, the single version (OPA277) provides external trim pins for special applications. OPA277 op amps are easy to use and free from phase inversion and overload problems found in some other op amps. They are stable in unity gain and provide excellent dynamic behavior over a wide range of load conditions. Dual and quad versions feature completely independent circuitry for lowest crosstalk and freedom from interaction, even when overdriven or overloaded. Single (OPA277) and dual (OPA2277) versions are available in DIP-8, SO-8, and DFN-8 (4mm x 4mm) packages. The quad (OPA4277) comes in DIP-14 and SO-14 surface-mount packages. All are fully specified from 40C to +85C and operate from 55C to +125C.
OPA277AIDRM

APPLICATIONS
G G G G G G G TRANSDUCER AMPLIFIER BRIDGE AMPLIFIER TEMPERATURE MEASUREMENTS STRAIN GAGE AMPLIFIER PRECISION INTEGRATOR BATTERY POWERED INSTRUMENTS TEST EQUIPMENT
OPA277 Offset Trim In +In V 1 2 3 4 8-Pin DIP, SO-8 8 7 6 5 Offset Trim V+ Output NC

OPA4277 1 2 A D 12 11 10 B C 9 8 14-Pin DIP, SO-14

V 4 5

Offset Trim In

1 Pin 1 Indicator

Offset Trim

Out A In A +In A V+ +In B

14 13

Out D In D

V+

+In

Output

3 4 5 6 7

+In D V +In C In C Out C

+In A 3 Out A In A 1

OPA2277AIDRM
V 4 5 NC

8 Pin 1 Indicator

Out B
DFN-8 4mm x 4mm (top view) Thermal Pad on Bottom (Connect to V)

OPA2277 Out A In A +In A V 1 2 3 4 8-Pin DIP, SO-8 A B 8 7 6 5 V+ Out B In B +In B

In B Out B

V+ In B

+In B

NC = No connection.

DFN-8 4mm x 4mm (top view)

Thermal Pad on Bottom (Connect to V)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1999-2005, Texas Instruments Incorporated

www.ti.com

ABSOLUTE MAXIMUM RATINGS(1)

Supply Voltage .................................................................................... 36V Input Voltage ..................................................... (V) 0.7V to (V+) +0.7V Output Short-Circuit(2) .............................................................. Continuous Operating Temperature .................................................. 55C to +125C Storage Temperature ..................................................... 55C to +125C Junction Temperature ...................................................................... 150C Lead Temperature (soldering, 10s) ................................................. 300C ESD Rating (Human Body Model) .................................................. 2000V (Machine Model) ........................................................... 100V NOTE: (1) Stresses above these rating may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. (2) Short-circuit to ground, one amplifier per package.

ELECTROSTATIC DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE/ORDERING INFORMATION(1)
OFFSET VOLTAGE max, V 50 20 50 20 100 50 25 50 25 100 50 50 OFFSET VOLTAGE DRIFT max, V/C 1 0.15 1 0.15 1 1 0.25 1 0.25 1 1 1

PRODUCT Single OPA277PA OPA277P OPA277UA OPA277U OPA277AIDRM Dual OPA2277PA OPA2277P OPA2277UA OPA2277U OPA2277AIDRM Quad OPA4277PA OPA4277UA

PACKAGE-LEAD

DIP-8 DIP-8 SO-8 Surface Mount SO-8 Surface Mount DFN-8 (4mm x 4mm)

DIP-8 DIP-8 SO-8 Surface Mount SO-8 Surface Mount DFN-8 (4mm x 4mm)

DIP-14 SO-14 Surface Mount

NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet or visit the TI web site at www.ti.com.

PIN DESCRIPTIONS
OPA277 Offset Trim In +In V 1 2 3 4 8-Pin DIP, SO-8 8 7 6 5 Offset Trim V+
In A 2 OPA2277AIDRM

Out A

1 Pin 1 Indicator

Out B

V+ In B

Output NC(1)
+In A 3 6

OPA4277
V 4 5 +In B

Out A In A +In A V+ +In B In B Out B OPA2277

1 2 A 3 4 5 B 6 7 14-Pin DIP, SO-14 C D

14 13 12 11 10 9 8

Out D In D +In D V
OPA277AIDRM DFN-8 4mm x 4mm (top view)

Thermal Pad on Bottom (Connect to V)

+In C In C Out C
In 2 Offset Trim 1 Pin 1 Indicator 8 Offset Trim

V+

Out A In A +In A V

1 2 3 4 8-Pin DIP, SO-8 A B

8 7 6 5

V+ Out B In B +In B

+In V

Output

NC

DFN-8 4mm x 4mm (top view)

NOTE: (1) NC = No connection.

Thermal Pad on Bottom (Connect to V)

OPA277, OPA2277, OPA4277

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SBOS079A

ELECTRICAL CHARACTERISTICS: VS = 5V to VS = 15V

At TA = +25C, and RL = 2k, unless otherwise noted. Boldface limits apply over the specified temperature range, 40C to +85C.
OPA277PA, UA OPA2277PA, UA OPA4277PA, UA MAX MIN TYP(1) MAX MIN OPA277P, U OPA2277P, U PARAMETER OFFSET VOLTAGE Input Offset Voltage: OPA277P, U (high grade, single) OPA2277P, U (high grade, dual) All PA, UA, Versions AIDRM Versions CONDITION MIN TYP(1) OPA277AIDRM, OPA2277AIDRM TYP(1) MAX UNITS

VOS

10 10

20 25 20 50 35 100

V V V V V V V V V/C V/C V/C V/mo V/V V/V V/V nA nA nA nA VPP Vrms nV/Hz nV/Hz nV/Hz nV/Hz pA/Hz

Input Offset Voltage Over Temperature OPA277P, U (high grade, single) OPA2277P, U (high grade, dual) All PA, UA, Versions AIDRM Versions Input Offset Voltage Drift dVOS/dT OPA277P, U (high grade, single) OPA2277P, U (high grade, dual) All PA, UA, AIDRM Versions Input Offset Voltage: (all models) vs Time vs Power Supply TA = 40C to +85C Channel Separation (dual, quad) INPUT BIAS CURRENT Input Bias Current TA = 40C to +85C Input Offset Current TA = 40C to +85C NOISE Input Voltage Noise, f = 0.1 to 10Hz Input Voltage Noise Density, f = 10Hz en f = 100Hz f = 1kHz f = 10kHz Current Noise Density, f = 1kHz in INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection TA = 40C to +85C INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain AOL VCM CMRR

TA = TA = TA = TA =

40C 40C 40C 40C

to to to to

+85C +85C +85C +85C

30 50

100

165

TA = 40C to +85C TA = 40C to +85C TA = 40C to +85C

0.1 0.1

0.15 0.25

0.15

0.15

PSRR

VS = 2V to 18V VS = 2V to 18V dc

0.2 0.3 0.1 0.5 0.5

0.5 0.5

1 1

1 1

IB IOS

1 2 1 2

2.8 4 2.8 4 115 115

2.8 4 2.8 4

0.22 0.035 12 8 8 8 0.2 (V) +2 130 128 (V+) 2 140 115 115

VCM = (V) +2V to (V+) 2V VCM = (V) +2V to (V+) 2V

V dB dB M || pF G || pF

VCM = (V) +2V to (V+) 2V VO = (V)+0.5V to (V+)1.2V, RL = 10k VO = (V)+1.5V to (V+)1.5V, RL = 2k 126 126

100 || 3 250 || 3

140 134 1 0.8 14 16 3 0.002

dB dB dB

TA = 40C to +85C FREQUENCY RESPONSE Gain-Bandwidth Product GBW Slew Rate SR Settling Time, 0.1% 0.01% Overload Recovery Time Total Harmonic Distortion + Noise THD+N Specifications same as OPA277P, U. NOTE: (1) VS = 15V.

VO = (V)+1.5V to (V+)1.5V, RL = 2k

VS = 15V, G = 1, 10V Step VS = 15V, G = 1, 10V Step VIN G = VS 1kHz, G = 1, VO = 3.5Vrms

MHz V/s s s s %

OPA277, OPA2277, OPA4277

SBOS079A

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ELECTRICAL CHARACTERISTICS: VS = 5V to VS = 15V

At TA = +25C, and RL = 2k, unless otherwise noted. Boldface limits apply over the specified temperature range, 40C to +85C.
OPA277PA, UA OPA2277PA, UA OPA4277PA, UA MAX MIN TYP(1) MAX MIN OPA277P, U OPA2277P, U PARAMETER OUTPUT Voltage Output TA = 40C to +85C TA = 40C to +85C Short-Circuit Current Capacitive Load Drive POWER SUPPLY Specified Voltage Range Operating Voltage Range Quiescent Current (per amplifier) TA = 40C to +85C TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance SO-8 Surface-Mount DIP-8 DIP-14 SO-14 Surface-Mount DFN-8(2) CONDITION MIN TYP(1)

(CONT)

OPA277AIDRM, OPA2277AIDRM TYP(1) MAX UNITS

VO

RL = 10k RL = 10k RL = 2k RL = 2k

(V) (V) (V) (V)

+0.5 +0.5 +1.5 +1.5

(V+) (V+) (V+) (V+)

1.2 1.2 1.5 1.5

ISC CLOAD VS IQ IO = 0 IO = 0 40 55 55 5 2

35 See Typical Curve 15 18 825 900 +85 +125 +125 150 100 80 100

V V V V mA

790

V V A A C C C C/W C/W C/W C/W C/W

JA

45

Specifications same as OPA277P, U. NOTES: (1) VS = 15V. (2) Thermal pad soldered to printed circuit board (PCB).

OPA277, OPA2277, OPA4277

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SBOS079A

TYPICAL CHARACTERISTICS
At TA = +25C, VS = 15V, and RL = 2k, unless otherwise noted.

OPEN-LOOP GAIN/PHASE vs FREQUENCY 140 120 100

AOL (dB)

POWER SUPPLY AND COMMON-MODE REJECTION vs FREQUENCY 140

CL = 0 CL = 1500pF

0 30
Phase ()

120 PSR
PSR, CMR (dB)

+PSR

100 80 CMR 60 40 20 0

80 60 40 20 0 20 0.1 1

60 90 120 150 180

10

100

1k

10k

100k

1M

10M

0.1

10

100

1k

10k

100k

1M

Frequency (Hz)

Frequency (Hz)

INPUT NOISE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY 1000

INPUT NOISE VOLTAGE vs TIME

Voltage Noise (nV/Hz) Current Noise (fA/Hz)

Current Noise 100

Noise signal is bandwidth limited to lie between 0.1Hz and 10Hz.

50nV/div

10

Voltage Noise

1 1 10 100 Frequency (Hz) 1k 10k

1s/div

CHANNEL SEPARATION vs FREQUENCY 140 1

TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY VOUT = 3.5Vrms

Channel Separation (dB)

120 THD+Noise (%) 0.1 G = 10, RL = 2k, 10k 0.01 G = 1, RL = 2k, 10k 0.001 10 100 1k 10k 100k 1M 10 100 1k Frequency (Hz) 10k 100k Frequency (Hz)

100 Dual and quad devices. G = 1, all channels. Quad measured channel A to D or B to Cother combinations yield similar or improved rejection.

80

60

40

OPA277, OPA2277, OPA4277

SBOS079A

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TYPICAL CHARACTERISTICS (CONT)

At TA = +25C, VS = 15V, and RL = 2k, unless otherwise noted.

OFFSET VOLTAGE PRODUCTION DISTRIBUTION 16 14 Typical distribution of packaged units. Single, dual, and quad included.

OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION 35 30 Typical distribution of packaged units. Single, dual, and quad included.

Percent of Amplifiers (%)

12 10 8 6 4 2 0

Percent of Amplifiers (%)

25 20 15 10 5 0

504540 353025201510 5 0 5 10 15 20 25 30 35 40 45 50 Offset Voltage (V)

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

Offset Voltage (V/C)

WARM-UP OFFSET VOLTAGE DRIFT 3 Offset Voltage Change (V) 2 1 0 1 2 3 0 15 30 45 60 75 90 105 120 Time from Power Supply Turn-On (s) AOL, CMR, PSR (dB)

AOL, CMR, PSR vs TEMPERATURE 160 150 CMR 140 130 PSR 120 110 100 75 AOL

50

25

25

50

75

100

125

Temperature (C)

INPUT BIAS CURRENT vs TEMPERATURE 5 4

Quiescent Current (A)

QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT vs TEMPERATURE 1000 950 900 850 800 750 700 650 600 550 ISC +ISC IQ 100 90
Short-Circuit Current (mA)

Input Bias Current (nA)

3 2 1 0 1 2 3 4 5 75 50 25 0 25 50 75 100 125 Temperature (C) Curves represent typical production units.

80 70 60 50 40 30 20 10 0 50 25 0 25 50 75 100 125 Temperature (C)

500 75

OPA277, OPA2277, OPA4277

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SBOS079A

TYPICAL CHARACTERISTICS (CONT)

At TA = +25C, VS = 15V, and RL = 2k, unless otherwise noted.

CHANGE IN INPUT BIAS CURRENT vs POWER SUPPLY VOLTAGE 2.0 1.5 1.0
IB (nA)

CHANGE IN INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE 2.0 Curve shows normalized change in bias current with respect to VCM = 0V. Typical IB may range from 05.nA to +0.5nA at VCM = 0V. VS = 5V
IB (nA)

Curve shows normalized change in bias current with respect to VS = 10V (+20V). Typical IB may range from 0.5nA to +0.5nA at VS = 10V.

1.5 1.0 0.5 0.0 0.5

0.5 0.0 0.5 1.0 1.5 2.0 0 5 10 15 20 25 30 35 40 Supply Voltage (V) VCM = 0V

VS = 15V 1.0 1.5 2.0 15 10 5 0 5 10 15 Common-Mode Voltage (V)

QUIESCENT CURRENT vs SUPPLY VOLTAGE 1000 per amplifier Quiescent Current (A) 900 Settling Time (s) 50 100

SETTLING TIME vs CLOSED-LOOP GAIN 10V step CL = 1500pF

0.01% 0.1%

800

700

20

600

500 0 5 10 Supply Voltage (V) 15 20

10 1 10 Gain (V/V) 100

MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 30 25

Output Voltage (VPP)

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT (V+) (V+) 1

Output Voltage Swing (V)

VS = 15V

(V+) 2 (V+) 3 (V+) 4 (V+) 5 (V) + 5 (V) + 4 (V) + 3 (V) + 2 (V) + 1 125C 125C 25C 25C

55C

20 15 10 5 0 1k 10k Frequency (Hz) 100k 1M

VS = 5V

55C

(V) 0 5 10 15 20 25 30 Output Current (mA)

OPA277, OPA2277, OPA4277

SBOS079A

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TYPICAL CHARACTERISTICS (CONT)

At TA = +25C, VS = 15V, and RL = 2k, unless otherwise noted.

SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 60 Gain = 1 50

LARGE-SIGNAL STEP RESPONSE G = +1, CL = 1500pF, VS = +15V

Overshoot (%)

40 30 20 Gain = 10 10 0 10 100 1k Load Capacitance (pF) 10k 100k

10s/div

SMALL-SIGNAL STEP RESPONSE G = +1, CL = 0, VS = 15V

2V/div

Gain = +1

SMALL-SIGNAL STEP RESPONSE G = +1, CL = 1500pF, VS = 15V

20mV/div

1s/div

20mV/div

1s/div

OPA277, OPA2277, OPA4277

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SBOS079A

APPLICATIONS INFORMATION
The OPA277 series is unity-gain stable and free from unexpected output phase reversal, making it easy to use in a wide range of applications. Applications with noisy or high impedance power supplies may require decoupling capacitors close to the device pins. In most cases 0.1F capacitors are adequate. The OPA277 series has very low offset voltage and drift. To achieve highest performance, circuit layout and mechanical conditions should be optimized. Offset voltage and drift can be degraded by small thermoelectric potentials at the op amp inputs. Connections of dissimilar metals will generate thermal potential which can degrade the ultimate performance of the OPA277 series. These thermal potentials can be made to cancel by assuring that they are equal in both input terminals. Keep thermal mass of the connections made to the two input terminals similar. Locate heat sources as far as possible from the critical input circuitry. Shield op amp and input circuitry from air currents such as cooling fans.

connecting a potentiometer as shown in Figure 1. This adjustment should be used only to null the offset of the op amp. This adjustment should not be used to compensate for offsets created elsewhere in a system since this can introduce additional temperature drift.
V+ Trim Range: Exceeds Offset Voltage Specification 0.1F 20k 7 2 3 0.1F 1 8 OPA277 4 6 OPA277 single op amp only. Use offset adjust pins only to null offset voltage of op ampsee text.

FIGURE 1. OPA277 Offset Voltage Trim Circuit. INPUT PROTECTION

The inputs of the OPA277 series are protected with 1k series input resistors and diode clamps. The inputs can withstand 30V differential inputs without damage. The protection diodes will, of course, conduct current when the inputs are over-driven. This may disturb the slewing behavior of unity-gain follower applications, but will not damage the op amp.

OPERATING VOLTAGE
OPA277 series op amp operate from 2V to 18V supplies with excellent performance. Unlike most op amps which are specified at only one supply voltage, the OPA277 series is specified for real-world applications; a single limit applies over the 5V to 15V supply range. This allows a customer operating at VS = 10V to have the same assured performance as a customer using 15V supplies. In addition, key parameters are assured over the specified temperature range, 40C to +85C. Most behavior remains unchanged through the full operating voltage range (2V to 18V). Parameters which vary significantly with operating voltage or temperature are shown in typical performance curves.

INPUT BIAS CURRENT CANCELLATION

The input stage base current of the OPA277 series is internally compensated with an equal and opposite cancellation circuit. The resulting input bias current is the difference between the input stage base current and the cancellation current. This residual input bias current can be positive or negative. When the bias current is canceled in this manner, the input bias current and input offset current are approximately the same magnitude. As a result, it is not necessary to use a bias current cancellation resistor as is often done with other op amps (Figure 2). A resistor added to cancel input bias current errors may actually increase offset voltage and noise.

OFFSET VOLTAGE ADJUSTMENT

The OPA277 series is laser-trimmed for very low offset voltage and drift so most circuits will not require external adjustment. However, offset voltage trim connections are provided on pins 1 and 8. Offset voltage can be adjusted by

R2 R1 Op Amp R1

R2

OPA277

RB = R2 || R1

No bias current cancellation resistor (see text) (b) OPA277 with no external bias current cancellation resistor.

(a) Conventional op amp with external bias current cancellation resistor.

FIGURE 2. Input Bias Current Cancellation.

OPA277, OPA2277, OPA4277

SBOS079A

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V+

1/2 OPA2277 R2 V

VOUT = (V1 V2)(1 +

R2 R1

RR V1 R+R Load Cell

R+R V2 RR

V+ R1 1/2 OPA2277

V R2 R1

For integrated solution see: INA126, INA2126 (dual) INA125 (on-board reference) INA122 (single-supply)

FIGURE 3. Load Cell Amplifier.

IREG 1mA 5V

12 V+ Type J 1/2 OPA2277 RF 10k R 412 13 VLIN

+ VIN

1 IR1

14 IR2

11 VREG

10 V+

4 RG 1250 3

RG XTR105 RG
VIN

RF 10k

B E IO

1k 50 25 RCM = 1250

1/2 OPA2277 V

7 6
+ IO = 4mA + (VIN VIN) 40 RG

IRET

(G = 1 + 0.01F

2RF = 50) R

FIGURE 4. Thermocouple Low Offset, Low Drift Loop Measurement with Diode Cold Junction Compensation.

10

OPA277, OPA2277, OPA4277

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SBOS079A

DFN PACKAGE
The OPA277 series uses the 8-lead DFN (also known as SON), which is a QFN package with contacts on only two sides of the package bottom. This leadless, near-chip-scale package maximizes board space and enhances thermal and electrical characteristics through an exposed pad. DFN packages are physically small, have a smaller routing area, improved thermal performance, and improved electrical parasitics, with a pinout scheme that is consistent with other commonly-used packages, such as SO and MSOP. Additionally, the absence of external leads eliminates bent-lead issues. The DFN package can be easily mounted using standard printed circuit board (PCB) assembly techniques. See Application Note, QFN/SON PCB Attachment (SLUA271) and Application Report, Quad Flatpack No-Lead Logic Packages (SCBA017), both available for download at www.ti.com. The exposed leadframe die pad on the bottom of the package should be connected to V.

LAYOUT GUIDELINES
The leadframe die pad should be soldered to a thermal pad on the PCB. Mechanical drawings located at the end of this data sheet list the physical dimensions for the package and pad. Soldering the exposed pad significantly improves board-level reliability during temperature cycling, key push, package shear, and similar board-level tests. Even with applications that have low-power dissipation, the exposed pad must be soldered to the PCB to provide structural integrity and longterm reliability.

OPA277, OPA2277, OPA4277

SBOS079A

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11

PACKAGE OPTION ADDENDUM

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18-Oct-2013

PACKAGING INFORMATION
Orderable Device OPA2277AIDRMT OPA2277AIDRMTG4 OPA2277P OPA2277PA OPA2277PAG4 OPA2277PG4 OPA2277U OPA2277U/2K5 OPA2277U/2K5G4 OPA2277UA Status
(1)

Package Type Package Pins Package Drawing Qty VSON VSON PDIP PDIP PDIP PDIP SOIC SOIC SOIC SOIC DRM DRM P P P P D D D D 8 8 8 8 8 8 8 8 8 8 250 250 50 50 50 50 75 2500 2500 75

Eco Plan
(2)

Lead/Ball Finish
(6)

MSL Peak Temp

(3)

Op Temp (C) BHZ BHZ

Device Marking
(4/5)

Samples

ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE

Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)

CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU | Call TI CU NIPDAU | Call TI Call TI CU NIPDAU | Call TI

Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR -40 to 85 -40 to 85 -40 to 85

OPA2277P OPA2277P A OPA2277P A OPA2277P OPA 2277U OPA 2277U OPA 2277U OPA 2277U A OPA 2277U A OPA 2277U A OPA 2277U A OPA 2277U A OPA 2277U

OPA2277UA/2K5

ACTIVE

SOIC

2500

CU NIPDAU | Call TI

Level-3-260C-168 HR

-40 to 85

OPA2277UA/2K5E4

ACTIVE

SOIC

2500

Call TI

Level-3-260C-168 HR

-40 to 85

OPA2277UAE4

ACTIVE

SOIC

75

Call TI

Level-3-260C-168 HR

-40 to 85

OPA2277UAG4

ACTIVE

SOIC

75

Call TI

Level-3-260C-168 HR

-40 to 85

OPA2277UG4

ACTIVE

SOIC

75

Call TI

Level-3-260C-168 HR

-40 to 85

Addendum-Page 1

PACKAGE OPTION ADDENDUM

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18-Oct-2013

Orderable Device OPA277AIDRMR OPA277AIDRMRG4 OPA277AIDRMT OPA277AIDRMTG4 OPA277P OPA277PA OPA277PAG4 OPA277PG4 OPA277U OPA277U/2K5 OPA277U/2K5G4 OPA277UA

Status
(1)

Package Type Package Pins Package Drawing Qty VSON VSON VSON VSON PDIP PDIP PDIP PDIP SOIC SOIC SOIC SOIC DRM DRM DRM DRM P P P P D D D D 8 8 8 8 8 8 8 8 8 8 8 8 3000 3000 250 250 50 50 50 50 75 2500 2500 75

Eco Plan
(2)

Lead/Ball Finish
(6)

MSL Peak Temp

(3)

Op Temp (C) NSS NSS NSS NSS

Device Marking
(4/5)

Samples

ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE

Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)

CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU

Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR -40 to 85

OPA277P OPA277P A OPA277P A OPA277P OPA 277U OPA 277U OPA 277U OPA 277U A OPA 277U A OPA 277U A OPA 277U A OPA 277U A

OPA277UA/2K5

ACTIVE

SOIC

2500

CU NIPDAU

Level-3-260C-168 HR

-40 to 85

OPA277UA/2K5E4

ACTIVE

SOIC

2500

CU NIPDAU

Level-3-260C-168 HR

-40 to 85

OPA277UAE4

ACTIVE

SOIC

75

CU NIPDAU

Level-3-260C-168 HR

-40 to 85

OPA277UAG4

ACTIVE

SOIC

75

CU NIPDAU

Level-3-260C-168 HR

-40 to 85

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

18-Oct-2013

Orderable Device OPA277UG4 OPA4277PA OPA4277PAG4 OPA4277UA OPA4277UA/2K5 OPA4277UA/2K5E4 OPA4277UAE4 OPA4277UAG4

Status
(1)

Package Type Package Pins Package Drawing Qty SOIC PDIP PDIP SOIC SOIC SOIC SOIC SOIC D N N D D D D D 8 14 14 14 14 14 14 14 75 25 25 50 2500 2500 50 50

Eco Plan
(2)

Lead/Ball Finish
(6)

MSL Peak Temp

(3)

Op Temp (C) OPA 277U

Device Marking
(4/5)

Samples

ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE

Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)

CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU

Level-3-260C-168 HR N / A for Pkg Type N / A for Pkg Type Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85

OPA4277PA OPA4277PA OPA4277UA OPA4277UA OPA4277UA OPA4277UA OPA4277UA

(1)

The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)

MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(4)

Addendum-Page 3

PACKAGE OPTION ADDENDUM

www.ti.com

18-Oct-2013

(5)

Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
(6)

Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 4

PACKAGE MATERIALS INFORMATION

www.ti.com 9-Sep-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins Type Drawing VSON SOIC SOIC VSON VSON SOIC SOIC SOIC DRM D D DRM DRM D D D 8 8 8 8 8 8 8 14

SPQ

Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 180.0 330.0 330.0 330.0 180.0 330.0 330.0 330.0 12.4 12.4 12.4 12.4 12.4 12.4 12.4 16.4 4.25 6.4 6.4 4.25 4.25 6.4 6.4 6.5

B0 (mm) 4.25 5.2 5.2 4.25 4.25 5.2 5.2 9.0

K0 (mm) 1.15 2.1 2.1 1.15 1.15 2.1 2.1 2.1

P1 (mm) 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0

W Pin1 (mm) Quadrant 12.0 12.0 12.0 12.0 12.0 12.0 12.0 16.0 Q2 Q1 Q1 Q2 Q2 Q1 Q1 Q1

OPA2277AIDRMT OPA2277U/2K5 OPA2277UA/2K5 OPA277AIDRMR OPA277AIDRMT OPA277U/2K5 OPA277UA/2K5 OPA4277UA/2K5

250 2500 2500 3000 250 2500 2500 2500

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com 9-Sep-2013

*All dimensions are nominal

Device OPA2277AIDRMT OPA2277U/2K5 OPA2277UA/2K5 OPA277AIDRMR OPA277AIDRMT OPA277U/2K5 OPA277UA/2K5 OPA4277UA/2K5

Package Type VSON SOIC SOIC VSON VSON SOIC SOIC SOIC

Package Drawing DRM D D DRM DRM D D D

Pins 8 8 8 8 8 8 8 14

SPQ 250 2500 2500 3000 250 2500 2500 2500

Length (mm) 210.0 367.0 367.0 367.0 210.0 367.0 367.0 367.0

Width (mm) 185.0 367.0 367.0 367.0 185.0 367.0 367.0 367.0

Height (mm) 35.0 35.0 35.0 35.0 35.0 35.0 35.0 38.0

Pack Materials-Page 2

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