Features
High performance, low power AVR
®
8-bit Microcontroller
•
Advanced RISC architecture–135 powerful instructions – most single clock cycle execution–32 × 8 general purpose working registers–Fully static operation–Up to 16MIPS throughput at 16MHz–On-chip 2-cycle multiplier
•
Non-volatile program and data memories–64/128Kbytes of in-system self-programmable flash •Endurance: 100,000 write/erase cycles–Optional Boot Code section with independent lock bits•USB boot loader programmed by default in the factory•In-system programming by on-chip boot program hardware activated after reset•True read-while-write operation•All supplied parts are pre-programed with a default USB bootloader–2K/4K (64K/128K flash version) bytes EEPROM•Endurance: 100,000 write/erase cycles–4K/8K (64K/128K flash version) bytes internal SRAM–Up to 64Kbytes optional external memory space–Programming lock for software security
•
JTAG (IEEE std. 1149.1 compliant) interface–Boundary-scan capabilities according to the JTAG standard–Extensive on-chip debug support–Programming of flash, EEPROM, fuses, and lock bits through the JTAG interface
•
USB 2.0 full-speed/low-speed device and on-the-go module–Complies fully with:–Universal serial bus specification REV 2.0–On-the-go supplement to the USB 2.0 specification rev 1.0–Supports data transfer rates up to 12Mbit/s and 1.5Mbit/s
•
USB full-speed/low speed device module with interrupt on transfer completion–Endpoint 0 for control transfers: up to 64-bytes–Six programmable endpoints with in or out directions and with bulk, interrupt or isochronous transfers–Configurable endpoints size up to 256bytes in double bank mode–Fully independent 832bytes USB DPRAM for endpoint memory allocation–Suspend/resume interrupts–Power-on reset and USB bus reset–48MHz PLL for full-speed bus operation–USB bus disconnection on microcontroller request
•
USB OTG reduced host:–Supports host negotiation protocol (HNP) and session request protocol (SRP) for OTG dual-role devices–Provide status and control signals for software implementation of HNP and SRP–Provides programmable times required for HNP and SRP
•
Peripheral features–Two 8-bit timer/counters with separate prescaler and compare mode–Two16-bit timer/counter with separate prescaler, compare- and capture mode
8-bit Atmel Microcontroller with64/128Kbytesof ISP Flashand USBControllerAT90USB646AT90USB647AT90USB1286AT90USB1287
7593LS–AVR–09/12
2
7593LS–AVR–09/12
AT90USB64/128
–Real time counter with separate oscillator–Four 8-bit PWM channels–Six PWM channels with programmable resolution from 2 to 16 bits–Output compare modulator–8-channels, 10-bit ADC–Programmable serial USART–Master/slave SPI serial interface–Byte oriented 2-wire serial interface–Programmable watchdog timer with separate on-chip oscillator–On-chip analog comparator–Interrupt and wake-up on pin change
•
Special microcontroller features–Power-on reset and programmable brown-out detection–Internal calibrated oscillator–External and internal interrupt sources–Six sleep modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby
•
I/O and packages–48 programmable I/O lines–64-lead TQFP and 64-lead QFN
•
Operating voltages–2.7 - 5.5V
•
Operating temperature–Industrial (-40°C to +85°C)
•
Maximum frequency–8MHz at 2.7V - industrial range–16MHz at 4.5V - industrial range
3
7593LS–AVR–09/12
AT90USB64/128
1.Pin configurations
Figure 1-1.
Pinout Atmel AT90USB64/128-TQFP.
AT90USB90128/64TQFP64
(INT.7/AIN.1/UVcon) PE7UVccD-D+UGndUCapVBus(IUID) PE3(SS/PCINT0) PB0(INT.6/AIN.0) PE6(PCINT1/SCLK) PB1(PDI/PCINT2/MOSI) PB2(PDO/PCINT3/MISO) PB3(PCINT4/OC.2A) PB4(PCINT5/OC.1A) PB5(PCINT6/OC.1B) PB6
(PCINT7/OC.0A/OC.1C) PB7(INT4/TOSC1) PE4(INT.5/TOSC2) PE5 RESETVCCGNDXTAL2XTAL1(OC0B/SCL/INT0) PD0(OC2B/SDA/INT1) PD1(RXD1/INT2) PD2(TXD1/INT3) PD3(ICP1) PD4(XCK1) PD5
PA3 (AD3)PA4 (AD4)PA5 (AD5)PA6 (AD6)PA7 (AD7)PE2 (ALE/HWB)PC7 (A15/IC.3/CLKO)PC6 (A14/OC.3A)PC5 (A13/OC.3B)PC4 (A12/OC.3C)PC3 (A11/T.3)PC2 (A10)PC1 (A9)PC0 (A8)PE1 (RD)PE0 (WR)
AVCCGNDAREFPF0 (ADC0)PF1 (ADC1)PF2 (ADC2)PF3 (ADC3)PF4 (ADC4/TCK)PF5 (ADC5/TMS)PF6 (ADC6/TDO)PF7 (ADC7/TDI)GNDVCCPA0 (AD0)PA1 (AD1)PA2 (AD2)(T1) PD6(T0) PD7
INDEX CORNER
12345678910111213141516
64636261605958575655545352515049
48474645444342414039383736353433
17181920212223242526272829303132
4
7593LS–AVR–09/12
AT90USB64/128
Figure 1-2.
Pinout Atmel AT90USB64/128-QFN.
Note:The large center pad underneath the MLF packages is made of metal and internally connected to GND. It should be soldered or glued to the board to ensure good mechanical stability. If the center pad is left unconnected, the package might loosen from the board.
23
1
456789101112131416 33154746 48454443424140393837363534
1 7 1 8 2 0 1 9 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 9 2 8 3 2 3 1 3 0 5 2 5 1 5 0 4 9 6 4 6 3 6 2 5 3 6 1 6 0 5 9 5 8 5 7 5 6 5 5 5 4
AT90USB12
8
/64
(64-lead QF
N
top view)
I
N
DEX COR
N
ER
A
V
CCG
N
DAREFPF0(ADC0)PF1(ADC1)PF2(ADC2)PF3(ADC3)PF4(ADC4/TCK)PF5(ADC5/TMS)PF6(ADC6/TDO)PF7(ADC7/TDI)G
N
D
V
CCPA0(AD0)PA1(AD1)PA2(AD2)
(I
N
T.7/AI
N
.1/U
V
con) PE7U
V
ccD-D+UGndUCap
V
B
u
s(IUID) PE3(SS/PCI
N
T0) PB0(I
N
T.6/AI
N
.0) PE6(PCI
N
T1/SCLK) PB1(PDI/PCI
N
T2/MOSI) PB2(PDO/PCI
N
T3/MISO) PB3(PCI
N
T4/OC.2A) PB4(PCI
N
T5/OC.1A) PB5(PCI
N
T6/OC.1B) PB6
(PCI
N
T7/OC.0A/OC.1C)PB7(I
N
T4/TOSC1)PE4(I
N
T.5/TOSC2)PE5
V
CCG
N
DXTAL2XTAL1(OC0B/SCL/I
N
T0)PD0(OC2B/SDA/I
N
T1)PD1(RXD1/I
N
T2)PD2(TXD1/I
N
T3)PD3(ICP1)PD4(XCK1)PD5(T1)PD6(T0)PD7 RESET
PA3 (AD3)PA4 (AD4)PA5 (AD5)PA6 (AD6)PA7 (AD7)PE2 (ALE/H
W
B)PC7 (A15/IC.3/CLKO)PC6 (A14/OC.3A)PC5 (A13/OC.3B)PC4 (A12/OC.3C)PC3 (A11/T.3)PC2 (A10)PC1 (A9)PC0 (A
8
)PE1 (RD)PE0 (
W
R)