PSPICE AND SIMULINK CO-SIMULATION FOR HIGH

EFFICIENCY DC-DC CONVERTER USING SLPS

INTERFACE SOFTWARE
O.A. Ahmed, J.A.M Bleijs
Department of Engineering, University of Leicester, University Road, Leicester LE1 7RH, (United Kingdom)
e-mail: [email protected] , [email protected]



Keywords: Full bridge converter, PSIM, PLECS, SLPS
interface.
Abstract
In this paper, a high efficiency full bridge current-fed DC-DC
converter for fuel cell applications has been analysed based
on co-simulation of PSpice simulator and Simulink using the
SLPS interface program. For comparison the simulation of
the converter and its control is first realized in PSpice
software and integrated with the PWM circuit in Simulink via
SLPS software. In a second step, the converter is simulated
using PLECS, integrated with Simulink. Both simulation
platforms are tested and selected analytical results are shown
for comparative purposes. The comparison shows that the
PSpice software is the only proper way to conserve the
detailed representation of the power-electronic circuit and can
be used to accurately predict the steady-state and transient
performance of the converter accurately. Finally, in order to
regulate the input current and the output voltage of the
converter a two-loop controller has been designed using the
Control Toolbox in Simulink, validated through SLPS co-
simulation.
1 Introduction
By employing a suitable simulation environment designers of
power-electronic systems can speed up the design process and
save valuable time and money without the need for repeated
hardware experimentation. In general, a power electronic
system consists of the electronic power circuits and a suitable
control system. For the modelling of electronic circuits a
variety of software packages such as a PSIM, SABER, and
PSpice are available. However, these packages are not well
suited for modelling of sophisticated controllers. On the other
hand, Matlab/Simulink is a very powerful program for control
system design but is not suitable for accurately modelling of
power electronics circuit characteristics. Therefore, in order
to simulate the entire power electronic system the simulation
environments should be interfaced together to obtain
simulation results as close as possible to the actual system
behaviour, thus enabling the designer to quickly identify and
correct undesirable interactions between the electronic circuit
and the control system, resulting in a shorter time-to-
manufacture period. A number of co-simulation software
environments have been developed for interfacing
Matlab/Simulink with electronic circuit simulation software.
Examples are the SimCoupler Module tool that is included in
the PSIM environment to provide an interface between PSIM
and Simulink for co-simulation, and the PLECS Toolbox
under Matlab/Simulink environment [1-3].

Both PSIM and PLECS use simplified models of power-
electronic elements such as transistor switches and non-linear
magnetic circuits in order to speed up the simulation. PSpice,
on the other hand, uses accurate models of devices, often
supplied by the device manufacturers, which are valid under
all conditions, including transients. The price to pay is a
slower simulation of complex circuits and possibly
convergence problems. These difficulties are exacerbated
when advanced controllers are incorporated in the system,
since these must be represented in a suitable electronic
format. Therefore, the simulation of the control system in the
PSpice environment in conjunction with power electronic
circuits may require a large amount of time for analysis. To
get around this problem, the SLPS interface has been co-
developed by Cadence and Cybernet Systems, which can be
used to model the actual power electronic circuit in PSpice
and link this with MATLAB/Simulink to analyse the control
system.

In this paper an innovative co-simulation design approach,
applied to an active clamp current-fed DC-DC converter with
feedback controller, is presented.
2 Comparison between Co-simulation
Environments
In this section two different co-simulation packages with the
Simulink environment will be evaluated and compared for the
full bridge current fed converter with voltage doubler as
shown in Fig.1. This evaluation is done by modelling the
converter using the PSpice and PLECS simulators and then
integrate it with the PWM generator, fuel cell source, load
and the measurements blocks in Simulink. Thus the entire
system model can be divided into two parts: Simulink model
and the PSpice or PLECS model.

In the first evaluation, the PSpice model in Fig.2 is embedded
in the Simulink model as a subcircuit block via the SLPS
software as shown in Fig.3. Initially the converter circuit must
be analysed in PSpice in order to create a project file in the
OrCad environment and determine the type of signals which
are sent/received by the PSpice model from Simulink through
SLPS. All the sent and received signals are controlled by the
SLPS block as shown in Fig. 4.


D1 LLK
Ro
-
+
vo
io
D4
1:n
HF Tr.
Co
vfc
ifc
Lboost
S2
S4
S3
S1

Fig. 1 Full bridge current-fed converter with voltage doubler

R12
10M
2
1
0
boost
475uH
1 2
R13
10M
2
1
V2
0Vdc
V3
0Vdc
out
D26
BYV28-200 1
2
M8
IXFK120N20
M9
I XFK120N20
Pr3
Vco3
K
COUPLING=
K2
1
EC70_3C85
L1 = L5
L2 = L6
F
u
e
l

c
e
l
l

s
t
a
c
k
Pr2
D3
20ETS12
D23
BYV28-200 1
2
D24
BYV28-200 1
2
D25
BYV28-200
1
2
MOS2
Psec1
V1
0Vdc
-
+ +
-
E1
ENOM
-
+ +
-
E2
ENOM
-
+ +
-
E3
ENOM
-
+ +
-
E4
ENOM
Lleakage
0. 6uH
1 2
0 0 R9
0.001
2 1
input
L5
9
1
2
D1
20ETS12
L6
77
1
2
R4
5
2 1
R5
5
2 1
R2
5
2 1
R3
5
2 1
V4
0Vdc
R8
0.001
2 1
0
R11
0. 001
2
1
C3
200u
IC = 375
C4
200u
IC = 375
M6
I XFK120N20
M7
I XFK120N20
R10
0.001
2 1 VL

Fig.2 Pspice simulation model
Continuous
powergui
fuel cel l generator
V0_Avarage
Scope3
Scope2
Scope1
P_out
P_in
<V_con>
<pwm_1>
<pwm_2>
<pwm_Sc>
PWM Ci rcui t 1
Vout
Vo avarage
I in
I out
Vf c
Pout
Ef f ic
Pin
Ava Iin
Ava Vf c
Ava I out
Ava Vout
Measurmen ts
750
Lo ad
Ef fi c
input v oltage
S1S2
S3S4
Load
out put volt age
av arage_Vout
I nput current
output current
FC volt age
primary_volt age
Vab voltage
Co nve rt er
1. 95
Con st an t
Ava_ Io ut
Ava_I i n
Ava _V fc


Fig.3 Co-simulation model using SLPS

In Out
SLPS

Fig.4 SLPS block

Unlike co-simulation of PSIM and Simulink, the time step in
PSpice is not necessary to be same as that in Simulink for
SLPS co-simulation. Simulating the PSpice model for any
time step is sufficient to build the project file since the
Simulink will be responsible for the simulation time step [4].
Using the measurements block in the Fig. 3, the converter
efficiency, fuel cell output voltage, converter output current
and the boost inductor input current are monitored for
different load values. Selected results such as the voltage
across the bridge switches and the secondary voltage were
then plotted using the Simulink scope as shown in Fig.5 (a)
and (b). From Fig. 5(a) it can be seen that a severe voltage
oscillation is excited every time the diagonal switches are
opened. This due to a resonant energy exchange between the
transformer leakage inductance and the parasitic capacitances
of the MOSFETs. To avoid damage to these devices it is
necessary to select a much higher rated voltage, which will
lead to a higher on-state resistance. This in turn will have a
negative impact on the efficiency of the converter. Using the
simulation results an efficiency of 81% at 122W output power
is predicted.

1.18 1.19 1.2 1.21 1.22 1.23 1.24
x 10
-3
0
20
40
60
80
100
120
140
1.1 1.11 1.12 1.13 1.14 1.15 1.16 1.17 1.18 1.19 1.2
x 10
-3
-40
-20
0
20
40
60

(a) (b)
Fig. 5 SLPS co-simulation waveforms for a) Drainsource
voltage b) transformer secondary voltage

An evaluation of the performance of the system was also
carried out using a PLECS model in co-simulation with
Simulink as shown in Fig. 6.
Continuous
powergui
fuel cell generator
750
V0_Avarage
Scope3
Scope
PLECS
Probe
Probe2
PLECS
Probe
Probe1
PLECS
Probe
Probe
339.5
P_out
345.8
P_i n
<V_con>
<pwm_1>
<pwm_2>
<pwm_Sc>
PWM Circui t1
Vout
Vo av arage
I in
I out
Vf c
Pout
Ef f ic
Pin
Av a Iin
Av a Vf c
Av a Iout
Av a Vout
Measurments
In Mean
Mean Val ue2
750
Load
98.19
Effic
1.95
Constant
S1S2
S3S4
Input v olt age
DC link
Out put v olt age
Input current
FC v olt age
Output current
PLECS
Circui t
Circui t
0.4527
Ava_Iout
8.971
Ava_Iin
38.57
Ava _Vfc

Fig.6 Co-simulation model using PLECS

In view of the effect of the transformer leakage inductance,
observed in the PSpice simulation, this element was also
incorporated in the PLECS model. However, on execution an
error message was displayed, referring to a current step in
inductance current which cannot be accepted. When the
leakage inductance is neglected, the co-simulation can be
executed, but the resulting voltage across the MOSFETs,
shown in Fig. 8(a), does not show any sign of overshoot or
ringing. The resulting efficiency of the simulated converter
was found as 98.58%, which is unrealistically high. In order
to accommodate the leakage inductance and its effect on the
circuit performance, parasitic capacitors were placed across
the ideal switches, as shown in Fig. 7. By a judicious choice
Fuel cell
source, PWM
generator and
load signals
from Simulink
Measured signals
from PSpice, such
as i/p and o/p
voltage and
current


Fig.7 The PLECS simulation circuit

of parameter values the PLECS simulation could be made to
work. Fig. 8(b) shows the expected oscillatory response to the
switching action, but it can be seen that the oscillations are
sustained throughout the off-period, and that the peak value of
the voltage is still considerably lower than found from the
PSpice simulation. To reduce this problem a damping resistor
was placed across the leakage inductance [5]. After a number
of trial runs with different resistor values a voltage waveform
resembling that of Fig. 5(a) was eventually obtained, as
shown in Fig. 9(a). However, because of the action of the
ideal switches in the bridge, current spikes of up to 50 times
the actual value are now introduced in the switch currents
(Fig. 9(b)), which are absent in the PSpice simulation.

5.15 5.2 5.25 5.3 5.35 5.4
x 10
4
0
5
10
15
20
25
30
35
40
45
50
7.7 7.75 7.8 7. 85 7. 9 7.95 8 8.05
x 10
4
0
10
20
30
40
50
60
70
80
90

(a) (b)
Fig. 8 PLECS co-simulation waveforms for a) Drainsource
voltage without leakage inductance and parasitic capacitances
b) Drainsource voltage with leakage inductance and parasitic
capacitances

5 5.05 5.1 5.15 5.2 5.25 5.3 5.35 5.4 5.45 5.5
x 10
4
0
10
20
30
40
50
60
70
80
4.1 4.15 4.2 4.25 4.3 4.35 4.4
x 10
4
0
20
40
60
80

Fig. 9 PLECS co-simulation waveforms when damping is
included

This example shows that PLECS co-simulation cannot be
used with confidence to predict the steady-state and transient
performance of a power-electronic circuit and to specify
component ratings.

In order to avoid the large voltage overshoots, shown in Fig.
5(a), an active and regenerative clamp circuit has been
incorporated in the converter. For finding the optimal value of
the clamp capacitor co-simulation of PSpice and Simulink via
the SLPS interface has been applied.
3 Full bridge DC-DC Converter with Active
Clamp
As described in [6], a current-sourced full-bridge DC-DC
converter (FBCFC) with an active voltage clamp and voltage-
doubling rectifier, as shown in Fig.10, is most suited for
stepping up the low voltage output of the fuel cell to a
common high-voltage DC bus since it has a lower transformer
turns ratio, a higher efficiency and higher component
utilization. A single switch capacitive clamp (S
c
, C
a
)
alleviates the usual voltage ringing across the bridge switches
(S1-S4) when diagonal switches turn off by clamping the
voltage across all switches to the clamp capacitor voltage
(v
ca
). Other advantages of this configuration are zero voltage
switching (ZVS) for all switches at turn-on, zero current
switching (ZCS) for the rectifier diodes and recovery of the
energy stored in the transformer leakage inductance (L

) to
the clamp capacitor (C
a
).

S4
S3
S2
Lb iLb
vfc
C1
HF Tr.
1:n
D2
io
vo
+
-
Ro
L D1
S1
C2
Cp1 Cp3
Cp2 Cp4
Cpc
A
B
i
vpri
Ca
Sc
iCa
vSc
vCa
ic1
ic2

Fig.10 Schematic diagram of the FBCFC
The benefit of using PSpice-Simulink co-simulation via SLPS
software instead of PLECS co-simulation is that the modelled
performance of the converter will closely resemble that of an
actual converter since PSpice uses accurate models of the
power-electronic elements including parasitic capacitances
and other non-ideal features. As shown in the previous section
it would be difficult to incorporate such detail in other
simulators.

From the co-simulation results it is predicted that the use of
the active clamp circuit will greatly improve the efficiency of
the FBCFC, reaching a maximum value of 97%.

In order to operate the fuel cell and converter as a stand-alone
generator the output voltage of the converter must be kept
constant despite changes in the system load and variations of
the fuel cell voltage (which changes with load current).
PSpice-Simulink co-simulation via SLPS was also used to
investigate the performance of the entire system including the
controller action. The simulation model of the entire system is
shown in Fig. 11. The controller circuit which consists of an
inner and an outer loop is designed to regulate the fuel cell
current and the DC output voltage and is described in detail in
the next section. The PWM generator producing switching
signals for the bridge switches as well as the clamp switch is
shown in Fig. 12.
Continuous
powergui
1
current_SCC
1
Vol tage_SCC
750
V_ref
out_current
To Workspace3
Vctr
To Workspace2
curr
To Workspace1
out_vol tage
To Workspace
Timer
Scope2
Scope1
Scope
<V_c on>
<pwm_s ig>
<pwm_sig>1
<pwm_sig>2
PWM Circui t
PI(z)
PID Control ler3
PI(z)
PID Controll er1
[v_err]
[i _cpm] [i _err]
[i_ref]
[i _sen]
[v_err]
[i _cpm]
[i _err]
[i _sen]
[i _ref]
<PWM>
<load>
<V_Out>
<I_f c>
<I _out>
Converter Model

Fig. 11 FBCFC with controller in SLPS co-simulation
3
Sc
2
S3,4
1
S1,2
doubl e
double3
doubl e
double2
doubl e
doubl e1
double
double
I n1Out8
Subsystem4
I n1Out9
Subsystem3
>=
Relati onal
Operator1
>=
Relati onal
Operator
OR
Logi cal
Operator3 NOT
Logical
Operator2
NOT
Logical
Operator1
15
Gai n3
15
Gai n2
15
Gai n1
180 phase shift
2
Tri ng
1
comp signal

Fig. 12 PWM circuit including dead-time between turn-on of
the main switches and the clamp switch
The integrated PSpice model including Simulink blocks for
measurements, the load, the fuel cell and the feedback
controller is depicted in Fig. 13.

3
<I_out>
2
<I_fc>
1
<V_Out>
fuel cell generator
clamp Voltage
V0_Avarage
Bridge_vol tage
To Workspace6
Ca_voltage
To Workspace5
Pri _voltage
To Workspace4
l oad
To Workspace3
in_power
To Workspace2
effic
To Workspace1
out_power
To Workspace
Pri mary Vol tage
P_out
P_in
Vout
Vo av arage
I in
I out
Vf c
Pout
Ef f ic
Pin
Av a Iin
Av a Vf c
Av a Iout
Av a Vout
Measures
Effic
input _v oltage1
Swit ch 1&2
Swit ch 3&4
Clamp Swit ch
load
out put _v olt age1
Vo_av arage
input_current
out put _current
FC_v olt age1
Primary v olt age
Clamp v olt age
bridge v olt age
DC DC converter
Ava_Iout
Ava_Iin
Ava _Vfc
2
<load>
1
<PWM>

Fig. 13 Converter model block

8
bri dge voltage
7
Clamp voltage
5
FC_vol tage1
4
output _current
3
input_current
2
Vo_avarage
1
output _vol tage1
In Out
SLPS
In Mean
Mean Val ue2
5
load
4
Clamp Swi tch
3
Swi tch 3&4
2
Swi tch 1&2
1
input _voltage1
input current input current
input v oltage
Vpr2
VPr3
VL

Fig.14 Signals sent and received by SLPS block
The signals that are sent from the converter to Simulink via
SLPS are the output voltage, fuel cell current, clamp switch
voltage, primary voltage and current, bridge voltage and
output current, as shown in Fig. 14. The data that are sent to
PSpice are fuel cell voltage, PWM gate signal to the main and
clamp switches, and load signal.
4 Controller Design
Prior to combining the controller circuit with the converter
using SLPS co-simulation, a two-loop circuit consisting of
closed loop current and voltage controllers was designed
using Bode plots in order to obtain the desired dynamic
response for the converter. The specification of the system
was selected as follows: V
fc
= 43-26 V, V
o
= 750 V, n = 8.55,
f
s
= 20 kHz, L
b
= 475H, C
1
=C
2
= 100F, C
a
= 3.61 F, L

=
5H, and rated fuel cell output power P
o
= 1.2kW. The Bode
plots of the control input v boost inductor current and boost
inductor current v output voltage are shown in Fig. 15 (a) and
(b) respectively, where PM is the phase margin.
Frequency (Hz)
10
0
10
1
10
2
10
3
10
4
10
5
10
6
-90
-45
0
P
h
a
s
e

(
d
e
g
)
-30
-20
-10
0
10
20
30
From: Step1 To: Gid1
M
a
g
n
itu
d
e

(
d
B
)

(a)
Frequency (Hz)
10
-1
10
0
10
1
10
2
10
3
-90
-45
0
P
h
a
s
e
(
d
e
g
)
-20
-10
0
10
20
30
From: Step2 To: Gvi3/Vo
M
a
g
n
itu
d
e
(
d
B
)

(b)
Fig.15 Bode plots of converter transfer functions: (a) control
input-to-boost inductor current (b) boost inductor current-to-
output voltage
Two PI compensators have been design using the Control
Toolbox in Simulink to keep the output voltage of the
converter constant despite load changes [6]. The Control Tool
box is a graphical-user interface (GUI) that permits the design
of the PI compensators by automatically tuning the
compensator parameters to give the desired phase margin
(PM) and bandwidth frequency using internal model control
PM=101
PM=93.5
(IMC) or linear-quadratic-Gaussian (LQG) methods [7]. As a
result, the PI controllers of the outer voltage loop C
vc
and the
inner current loop C
ic
are obtained as:


(1)

(2)

The Bode plot of the compensated open current loop system
Ti(s) and the closed current loop is given in Fig. 16 (a) and
(b). In this figure the PM is enhanced to 60
0
at a crossover
frequency f
c
equal to 5.14 kHz as desired.
(a)
Frequency (Hz)
10
2
10
3
10
4
10
5
10
6
10
7
-180
-135
-90
-45
0
P
h
a
s
e
(
d
e
g
)
-80
-60
-40
-20
0
20
From: Step7 To: Gid2
M
a
g
n
it
u
d
e
(
d
B
)

(b)
Fig. 16 Bode plots of (a) compensated open current loop
and (b) closed current loop
Fig. 17 (a) and (b) shows the Bode plots of the compensated
open voltage loop controller Tv(s) and the closed voltage
loop. The phase margin also improved in this loop to 62
0
at
the desired crossover frequency of 31.6 Hz. The Bode plots of
the overall open loop control circuit Top(s) are depicted in
Fig. 18, where PM is equal to 62.3
0
at the selected crossover
frequency of 31.2 Hz.

Frequency (Hz)
10
- 1
10
0
10
1
10
2
10
3
-150
-120
-90
P
h
a
s
e
(
d
e
g
)
-40
-20
0
20
40
60
80
From: Step1 To: Gvi1/Vo
M
a
g
n
itu
d
e
(
d
B
)

(a)
Frequency (Hz)
10
0
10
1
10
2
10
3
-90
-45
0
P
h
a
s
e
(
d
e
g
)
-40
-30
-20
-10
0
10
From: Step7 To: Gvi2
M
a
g
n
itu
d
e
(
d
B
)

(b)
Fig. 17 Bode plot of (a) compensated open voltage loop
and (b) closed voltage loop
Frequency (Hz)
10
-1
10
0
10
1
10
2
10
3
10
4
10
5
10
6
10
7
-270
-225
-180
-135
-90
P
h
a
s
e

(
d
e
g
)
-200
-150
-100
-50
0
50
100
From: Step1 To: Gvi1
M
a
g
n
it
u
d
e

(
d
B
)

Fig.18 Bode plot of the overall open loop transfer function
Top(s)

After obtaining the desired stability parameters, the design of
the controller was first tested by integrating it with the small-
signal transfer functions of the converter [6] using the
Matlab/Simulink environment as shown in Fig.19. The
dynamic response of the converter to negative and positive
step load changes is shown in Fig.20.
Frequency (Hz)
10
0
10
1
10
2
10
3
10
4
10
5
10
6
10
7
-150
-120
-90
P
h
a
s
e
(
d
e
g
)
-100
-50
0
50
100
From: Step2 To: Gid3
M
a
g
n
itu
d
e
(
d
B
)
i_error
V_error
Scope3
I n1 Out1
PI _v2
Ini Outi
PI _i
1
Hvi
16. 4474
Gvio
1
0.02344s+1
Gvi
-K-
Gido
0.0006309s+1
4. 287e-008s +0.002375s+1
2
Gi d
0.4
GPWM
Disturbance
750
Constant

Fig. 19 Simulink block diagram based on the small-signal
transfer functions

The validity of the controller design was then checked by
modelling the converter in the PSpice environment and
interfacing this with the control system in Simulink using the
SLSP interface program, as shown in Fig.11.

Fig. 21 shows that the output voltage is regulated back to 750
V in about 15 ms, and that the ripple of FC current is very
low when the output power changes from 1150 W to 550 W.

0.15 0.2 0.25 0.3 0.35
550
600
650
700
750
800
850
900
Time (sec)
O
u
t
p
u
t

V
o
lt
a
g
e

(V
)

Fig. 20 Output voltage waveform based on the small-signal
transfer functions

0.02 0. 03 0.04 0.05 0.06 0.07
600
650
700
750
800
850
900
950
Time (sec)
o
u
tp
u
t v
o
lta
g
e
(v
)

(a)
0.02 0. 03 0.04 0.05 0.06 0.07
-20
-10
0
10
20
30
40
50
60
70
80
Time (sec)
F
C
c
u
rre
n
t (A
M
P
)

(b)
Fig. 21 Co-simulation results during load changes with two-
loop feedback system: (a) output voltage (b) Fuel cell current
It can be seen that the responses obtained from the small-
signal model with closed-loop control closely resemble those
of the full system, which inspires confidence in the validity of
the approach in designing the closed-loop controllers. The
response of the output voltage following a step load change
obtained through SLPS co-simulation confirms the ability of
simulated converter to maintain the DC bus voltage within an
acceptable tolerance and maintain a small ripple current in the
output of the fuel cell, which is beneficial for its longevity.
5 Conclusions
In this paper, the modelling of an active-clamp current-fed
converter with a two-loop feedback controller using PSpice-
Simulink co-simulation has been presented. The converter
circuit, SLPS interface and control circuit design are all
presented in detail. Two co-simulation packages were
examined to demonstrate their advantages and disadvantages
in modelling power electronic converters. Using the SLPS co-
simulation route a complex mixed-system can be divided into
subsystems, PSpice and Simulink.
Bode plots have been used to assess the stability of the
individual loops and the final closed loop system. Simulation
results using PSpice, Matlab and SLPS interface simulators
have been demonstrated the higher efficiency and lower
switch stresses of the converter.
References
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