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    55:132/22C:122 High Performance Computer Architecture Spring Semester 2002

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    Shravan Kumar
    This document summarizes a course on high performance computer architecture. The course goals are for students to understand quantitative tradeoff analysis in computer system design, use hardware description languages to model and analyze designs, understand modern memory system techniques like caches, understand pipeline design issues and techniques, understand instruction scheduling in modern processors, and understand multiprocessor design issues like cache coherence. Topics covered include quantitative analysis, instruction set architectures, hardware description languages, memory hierarchies, pipelines, instruction level parallelism, I/O subsystems, and multiprocessors. Students complete projects modeling and optimizing designs using Verilog. The course supports outcomes in applying knowledge, designing systems, analyzing data, functioning on teams, identifying and solving problems, and using modern

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    55:132/22C:122 High Performance Computer Architecture Spring Semester 2002

    Uploaded by

    Shravan Kumar
    40 views5 pages
    This document summarizes a course on high performance computer architecture. The course goals are for students to understand quantitative tradeoff analysis in computer system design, use hardware description languages to model and analyze designs, understand modern memory system techniques like caches, understand pipeline design issues and techniques, understand instruction scheduling in modern processors, and understand multiprocessor design issues like cache coherence. Topics covered include quantitative analysis, instruction set architectures, hardware description languages, memory hierarchies, pipelines, instruction level parallelism, I/O subsystems, and multiprocessors. Students complete projects modeling and optimizing designs using Verilog. The course supports outcomes in applying knowledge, designing systems, analyzing data, functioning on teams, identifying and solving problems, and using modern

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    This document summarizes a course on high performance computer architecture. The course goals are for students to understand quantitative tradeoff analysis in computer system design, use hardware description languages to model and analyze designs, understand modern memory system techniques like caches, understand pipeline design issues and techniques, understand instruction scheduling in modern processors, and understand multiprocessor design issues like cache coherence. Topics covered include quantitative analysis, instruction set architectures, hardware description languages, memory hierarchies, pipelines, instruction level parallelism, I/O subsystems, and multiprocessors. Students complete projects modeling and optimizing designs using Verilog. The course supports outcomes in applying knowledge, designing systems, analyzing data, functioning on teams, identifying and solving problems, and using modern

    Copyright:

    © All Rights Reserved
    Download as DOC, PDF, TXT or read online from Scribd
    Download as doc, pdf, or txt
    40 views5 pages

    55:132/22C:122 High Performance Computer Architecture Spring Semester 2002

    Uploaded by

    Shravan Kumar
    This document summarizes a course on high performance computer architecture. The course goals are for students to understand quantitative tradeoff analysis in computer system design, use hardware description languages to model and analyze designs, understand modern memory system techniques like caches, understand pipeline design issues and techniques, understand instruction scheduling in modern processors, and understand multiprocessor design issues like cache coherence. Topics covered include quantitative analysis, instruction set architectures, hardware description languages, memory hierarchies, pipelines, instruction level parallelism, I/O subsystems, and multiprocessors. Students complete projects modeling and optimizing designs using Verilog. The course supports outcomes in applying knowledge, designing systems, analyzing data, functioning on teams, identifying and solving problems, and using modern

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    55:132/22C:122 High Performance Computer Architecture

    Spring Semester 2002


    2000 Catalog Data: 55:132 High Performance Computer Architecture
    3 s.h.
    Description: Problems involve in esigning an anal!"ing current machine architectures
    using har#are escription language $HD%& simulation' an anal!sis(
    hierarchical memor! esign' pipeline processing' vector machines' numerical
    applications' multiprocessor architectures an parallel algorithm esign
    techni)ues( evaluation methos to etermine the relationship bet#een computer
    esign an esign goals.
    Prere)uisites: 22C:0*0 or 55:032 an 55:035
    +e,tboo-: Henness! . Patterson' Computer Architecture-A Quantitative Approach' /econ
    0ition' 1organ 2aufmann
    3eferences: +homas . 1oorb!' The Verilog Hardware Description Language' +hir
    0ition' 2lu#ar Acaemic Publishers
    Coorinator: 4on 2uhl' Professor of 0lectrical an Computer 0ngineering
    Course goals:
    1. /tuents shoul unerstan ho# to appl! )uantitative trae5off anal!sis in the esign of a computer
    s!stem.
    2. /tuents shoul be able to use a moern har#are escription language to moel an anal!"e
    computer s!stem esign traeoffs.
    3. /tuents shoul unerstan moern memor! s!stem esign techni)ues incluing single an multi5level
    cache an virtual memor!
    *. /tuents shoul unerstan processor pipeline issues' incluing pipeline ha"ars an associate
    mitigation techni)ues.
    5. /tuents shoul unerstan the avance scheuling techni)ues an instruction5level parallelism use
    in moern super5scalar processors.
    6. /tuents shoul unerstan relevant esign issues for multiprocessor s!stems' incluing cache
    coherenc! issues
    Prere)uisites b! topic: basic computer architecture' machine an assembl! language programming
    +opics $class hours&: 1. 3evie# of basic computer architecture $2&
    2. 7ntrouction to )uantitative traeoff anal!sis $2&
    3. 7nstruction set architecture an aressing moes $3&
    *. Har#are Description %anguage $*&
    6. Hierarchical memor! s!stem esign $10&
    8. Pipelines an pipeline esign techni)ues $10&
    9. Avance instruction scheuling an 7%P $6&
    :. 7;< subs!stem esign $3&
    10. 1ultiprocessor esign $*&
    11. 7n class e,ams $1&
    +otal: $*5&
    Computer =sage:
    1. Har#are Description %anguage $>erilog& on C// computers.
    Pro?ects :
    1. Design an anal!sis of set associative cache memor! s!stem using >erilog
    2. Design an optimi"ation of a pipeline processor using >erilog $small
    group pro?ect&
    A@0+ categor! content as estimate b! facult! member #ho prepare this course escription:
    0ngineering science: 1.5 creits or AA percent
    0ngineering esign: 1.5 creits or AA percent
    Prepare b!: 4on 2uhl Date: April 1' 2002
    Course Outcomes Worksheet COW!
    55:132/22C:122 High Performance Computer Architecture
    Spring 2001"02
    Course Goals Supports ABT !utcomes Course Acti#it$
    1. /tuents shoul unerstan ho# to
    appl! )uantitative trae5off anal!sis in the
    esign of a computer s!stem
    a$B&' c$B&' e$B&' ?$B&' -$B& Home#or- assignments an pro?ect
    assignments re)uire stuents to appl!
    )uantitative esign trae5off anal!ses
    #ith respect to memor! s!stem an
    processor esign. 0,ams test stuent
    master! of )uantitative anal!sis methos.
    2. /tuents shoul be able to use a
    moern har#are escription language to
    moel an anal!"e computer s!stem
    esign traeoffs.
    b$B&' c$B&' $B&' e$B&' g$C&' ?$B&' -$B& /tuents o t#o significant pro?ects that
    re)uire them to moel an anal!"e the
    performance of portions of a computer
    s!stem architecture using the >037%<D
    har#are escription language. At least
    one of these pro?ects re)uires stuents to
    #or- in small groups' shcih often mi,
    0C0 an C/ stuents.
    3. /tuents shoul unerstan moern
    memor! s!stem esign techni)ues
    incluing single an multi5level cache
    an virtual memor!.
    a$B&' c$B&' e$B&' ?$B&' -$B& /tuents o home#or- assignments an
    pro?ects that re)uire them to anal!"e
    memor! s!stem esign traeoffs. 0,ams
    test master! of )uantitative techni)ues for
    performing traeoff anal!ses
    *. /tuents shoul unerstan processor
    pipeline issues' incluing pipeline ha"ars
    an associate mitigation techni)ues.
    a$B&' c$B&' e$B&' ?$B&' -$B& /tuents o home#or- assignments an
    pro?ects that re)uire them to anal!"e
    pipeline esign issues. 0,ams test
    master! of )uantitative techni)ues for
    performing traeoff anal!ses
    5. /tuents shoul unerstan the
    avance scheuling techni)ues in
    moern super5scalar processors.
    c$B&' e$B&' i$B&' ?$B& Case stuies of moern processor
    architectures are presente. 0,ams test
    stuent master! of concepts use in
    moern processors.
    6. /tuents shoul unerstan relevant
    esign issues for multiprocessor s!stems'
    incluing cache coherenc! issues.
    c$B&' e$B&' i$B&' ?$B& 0,ams test stuent unerstaning of
    important issues in contemporar!
    multiprocessor esign
    C enotes moerate contribution to the outcome B enotes substantial contribution to the
    outcome
    ASSOC%A&'( 'AS) S*+,') -*'S&%O.S
    -uestion
    .o/
    Course
    0oa1
    'AS) Assessment Statement so1iciting 1"2 3isagree"agree response4 p1us comments!
    1 1 7 unerstan ho# to carr! out a )uantitative traeoff anal!sis to evaluate computer s!stem esign alternatives.
    2 2 7 am able to use a moern har#are escription language to moel an anal!"e aspects of a computer s!stem
    architecture.
    3 3 7 unerstan esign issues relate to memor! s!stems' incluing cache memor! an virtual memor!.
    * * 7 unerstan pipeline esign issues' incluing ha"ars an associate mitigation techni)ues.
    5 5 7 am familiar #ith instruction scheuling an instruction5level parallelism techni)ues use in moern super5
    scalar processors
    6 6 7 unerstan relevant esign issues for multiprocessor s!stems
    A5'& Outcomes a! 6 k!
    *se3 for core"course assessments!
    'ngineering gra3uates 7i11 ha#e the fo11o7ing attri8utes:
    $a& an abilit! to appl! -no#lege of mathematics' science' an engineering(
    $b& an abilit! to esign an conuct e,periments as #ell as to anal!"e an interpret ata(
    $c& an abilit! to esign a s!stem' component' or process to meet esire nees(
    $& an abilit! to function on multiisciplinar! teams(
    $e& an abilit! to ientif!' formulate' an solve engineering problems(
    $f& an unerstaning of professional an ethical responsibilit!(
    $g& an abilit! to communicate effectivel! in oral $o&' #ritten $#&' an graphical $g& forms(
    $h& the broa eucation necessar! to unerstan the impact of engineering solutions in a
    global an societal conte,t(
    $i& a recognition of the nee for an an abilit! to engage in lifelong learning(
    $?& a -no#lege of contemporar! issues(
    $-& an abilit! to use the techni)ues' s-ills' an moern engineering tools necessar! for
    successful engineering practice(

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