Generic Sensing Hardware and Real-Time Reconstruction For Structured Analog Signals
Generic Sensing Hardware and Real-Time Reconstruction For Structured Analog Signals
Generic Sensing Hardware and Real-Time Reconstruction For Structured Analog Signals
I. I NTRODUCTION
Signal processing involves hardware and software design. The
front-end amplifies and preprocesses the continuous input before analog to digital conversion (ADC) takes place. Digital signal processing
(DSP) algorithms manipulate the incoming stream of numbers to
achieve a desired effect, e.g., denoising, source separation, estimation
etc. The modern trend is to shift as much processing operations
as possible from analog to digital. In the trend of digitization, the
keys for a successful processing system are two: a generic hardware
platform, so that a single hardware front-end supports a diverse range
of applications, and real-time DSP algorithms with computationallylight digital complexities.
Compressed sensing (CS) is an emerging paradigm in signal processing, named after the works of Donoho [2] and Cand`es, Romberg
and Tao [3]. The goal in CS is to sample signals at rates lower than
what is traditionally required by the Shannon-Nyquist theorem. To
accomplish this goal, the underlying structure of the input, usually
sparsity in some transform domain, is exploited. Mainstream works
in CS study measurement systems in discrete and finite settings.
More specifically, the focus is on recovery of vectors with only a
few nonzero entries from an underdetermined set of linear equations.
Several frameworks have been proposed for extending CS to analog
signals, including Xampling [4][6], finite rate of innovations (FRI)
[7] and random demodulation (RD) [8].
In this paper, we propose a generic sensing architecture which
can reduce the sampling rate of structured analog signal classes. The
scheme, termed X-ADC, is based on mixing the input with a set of
periodic waveforms prior to sampling. The approach is based on the
modulated wideband converter (MWC) which is presented hereafter
as one application of the X-ADC scheme. In Section II, we present
the X-ADC structure in more detail. The X prefix hints at the reduced
sampling rate. We also describe a recent board-level prototype of the
MWC [1], which serves as a reference X-ADC circuit.
ci` ej2`t/Tp ,
(1)
`=
where Tp is the period duration and ci` are a set of coefficients. The
consequence of periodic mixing is deliberate aliasing of the spectrum
of x(t), so that the product x
i (t) contains shifted copies of the input
spectrum X(f ) at equally-spaced frequency spacing
X
i (f ) =
X
ci` X(f `/Tp ).
(2)
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(a)
(b)
(c)
Fig. 1. Generic sensing architecture using periodic mixing (a). A hardware prototype with (b) four-channel analog front-end and a 2 GHz periodic generator
(c) was reported in [1].
B. Circuit work
A hardware design that complies with the X-ADC scheme was
reported in [1]. Fig. 1 depict photos of two hardware boards. One
performs the RF mixing and filtering stage while the other provides
four high-speed periodic functions pi (t). The markers in panels (b)
and (c) of Fig. 1 highlight the interesting blocks in our design.
The RF board splits x(t) into m = 4 analog processing branches.
Tunable amplification gains along the path ensure a signal to noiseand-distortion ratio of 15 dB at the outputs yi (t), which was verified
experimentally over a dynamic range of 50 dB input power [1].
In contrast to standard RF mixing with a single sinusoid, X-ADC
requires periodic mixing, that is simultaneous multiplication with the
multiple sinusoids (1) comprising pi (t). To support the nonordinary
mixing additional circuitries were inserted: wideband equalization,
passive mixing and adjustable power control with frequency reshaping option [1]. An elliptic filter with up to 14 stages allows a flexible
choice for Hi (f ) in a wide range of pass and stop band combinations.
The periodic generator produces four sign alternating waveforms
Tp
Tp
t (k + 1) , 0 k M 1, (3)
pi (t) = ik , k
M
M
with programmable signs ik {+1, 1}, derived from four taps
of a single shift-register (SR) of length M = 108 and clock rate of
2 GHz. Other choices for pi (t) are possible, since in principle only
the periodicity is a design constraint.
The X-ADC is a modular platform; parallelizing two four-channel
X-ADC boards results in a structure with m = 8 branches and so
forth. In particular, with sufficiently large m, the technology can scale
up to the Nyquist rate.
III. G ENERIC S ENSING
We now explain how certain choices of pi (t) in conjunction with
specific filtering Hi (f ) exploit the aliasing phenomenon to achieve
innovative radio and medical applications, thereby supporting the
generality of the method.
A. Sub-Nyquist sampling of multiband signals
The X-ADC concept of mixing with periodic waveforms is based
on the MWC system [4]. The MWC application enables the design of
a communication receiver which intercepts N narrowband transmissions, but is not provided with knowledge of their carrier frequencies.
In this scenario, standard RF demodulation cannot be used. The XADC setup in this case is [4]
1
B, Ts = Tp ,
(4)
m 2N,
Tp
FM
QPSK
1
Tp
f
0
fi
fmax
V=m
C
U
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(a)
(b)
Fig. 3. A map of available spectrum holes (a). The shaded areas represent
frequency intervals occupied by licensed users. An optional maximal-length
LFSR (b) for spectrum sensing using the X-ADC platform.
C. Ultrasonic imaging
An ultrasonic imaging system transmits an acoustic wave g(t)
towards a scanned tissue, which reflects several attenuated and
delayed echoes
x(t) =
L
X
a` g(t t` ),
t [0, T ],
(5)
`=1
(a)
(b)
mixes the input with a pseudo-random bit sequence (PRBS), integrates the product and dumps the output at a low rate. The PRBS
needs to be sufficiently long to approximate a true random sequence.
The X-ADC prototype can provide PRBS lengths up to 2r 1,
r 108. The integrator is a first-order filter, thus requires assembling
only a degenerated version of the elliptic lowpass filter. We point out
that while realizing the RD method is possible using the circuit of
Figs. 1(b)-(c), the method is computationally limited to signals with
low Nyquist rate due to the complexity of the recovery algorithm
which scales with the Nyquist rate of the input [5]. The approach also
requires accurate time-domain properties, e.g., sign transitions sharply
aligned to Nyquist intervals and a rectangular integrator response,
which are difficult to obtain at high rates. In contrast, the previous
applications (MWC, cognitive spectrum sensing and imaging) require
only the periodicity of pi (t), which can be achieved at high rates.
Further details and comparisons appear in [5].
IV. R EAL - TIME R ECONSTRUCTION
Reducing the sampling rate is one important aspect of analog sensing. The computational complexity in the digital domain is another
important factor in practice. In this section, we describe a real-time
fixed-point implementation of the MWC reconstruction algorithm
[4] on an Altera Stratix III field-programmable gate array (FPGA)
mounted on a Gidel PROCStar-III development board. Figure 5
depicts a high-level block diagram of the real-time design. Clock
rates of the various modules are marked.
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A. Frame construction
As described in [4], the reconstruction procedure begins by constructing a frame (or a basis) of the measurements and decomposition
as follows
X
y[n] Q =
y[n]yH [n] Q = VVH ,
(7)
n
where y[n] = [y1 [n], . . . , ym [n]]T and VH is the conjugate transpose of V. The decomposition step to V enables removal of the
noise space, but demands a substantial amount of multiplications
and FPGA resources. In the FPGA design, we decided to avoid the
decomposition, and instead increased the number Nsamples of y[n]
snapshots that are aggregated to Q. Based on recovery results of
Monte-Carlo simulations, Fig. 6, we chose Nsamples = 70.
Fig. 7.
ACKNOWLEDGEMENTS
Fig. 6.
Successful support recovery vs. number of samples used for
constructing the frame matrix Q.
B. Support detection
Given the frame Q (or V) an underdetermined system
Q = CU,
(8)
The authors would like to thank Daniel Barsky, Natalie Pistunovich, Yoni Smolin, Daniel Primor, Omer Kiselov, Amir Bishara,
Morad Awad, Tzvika Shirazi, Eli Sorin, Dima Kichin and Oleg
Greenberg from the HS-DSL laboratory at the Technion for implementing and simulating the real-time recovery algorithm.
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