BRKRST 3437 Marc Alonso

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2006 Cisco Systems, Inc. All rights reserved.
Cisco Confidential
Catalyst 3750/3750E
and 3560/3560E
Architectures
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Questions We Will Answer Today

The Differences between Catalysts 3560/3560E/3750/3750E
Is my new Aggregator Switch Oversubscribed?
What is a stack ring?
How is the stack ring controlled?
How does the hardware work?
How are stack processes controlled?
What happens when I mix different switch types?
How does QoS work?
3560-E
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3
Agenda
Switch Differences
Hardware Overview
StackWise Overview
Packet Walks
Stack Functions
Configuration Management
QoS Model
Summary
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Switch Differences
E Series
3560
3560-E
Catalyst 3750 and 3750E Stackable

Catalyst 3560 and 3560-E Standalone
3750
3750-E
Catalyst 3560 Aggregation Models

3560E-12D
3560E-12SD
Stackable means that it has stacking capability; either StackWise

or StackWise Plus
Other than stackable features the Catalyst 3750 and Catalyst 3560
are identical
Other than stackable features the Catalyst 3750E and Catalyst
3560E are identical
E series and non-E-Series have some feature differences. These
are outlined on the following slides
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Main E-Series Feature Differentiators

Dual 10GE Line Rate Uplinks with Twin Gig SFP
modules
StackWise Plus increases the effective stack throughput
to 64Gbps and maintains StackWise compatibility
3750-E
Hardware-based per port power monitoring and policing

Field replaceable power supplies, supports all 48 ports
at 15.4 watts full POE
3560-E
Supports ePOE, Up to 40 ports at 20W each

On-Board Failure Logging (OBFL)
Jumbo frame L3 routing
3750
IPv6 Multicast Routing

Additional 10/100 management interface
Universal Software Image
*Detailed descriptions provided in the appendix
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3560
Images for Non-E-Series

There Are Three Images Available for
the Classic Non E-Series Switches:
3 Distinct Images
1. IP-Base (L2,Stub routing, IP ACLs)

2. IP Services (Full L3 Routing and
Multicast routing)
3. Advanced IP services (IPv6 Routing)
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One Universal Image for E-Series

A Universal IOS image contains all
IOS features
Licensing enables a specific level of
IOS functionality
Customers only upgrade their license
to upgrade functionality
Both a Universal IOS image and a
license are installed in
manufacturing prior to shipping
Universal IOS
Image
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Do I Need to Upgrade My New Switch?

No. Your new switch arrives with the IOS Feature
license purchased
Licenses are installed during manufacturing
Upgrade is only required in two situations:

When you need to add advanced features
I.e., to deploy IP routing and need OSPF, need Multicast
routing, need EEM, or any advanced feature.
When changing hardware due to RMA or such.
The classic Catalyst 3750 switches will continue to

use IOS reformation images.
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License Installation (Upgrade)

Obtain license file through CCOmanually or via CLM
Needed to generate a license:
Product Activation Key (PAK), PAK is the proof of purchase
Unique Device Identifier (UDI), UDI codes the serial number and the product ID
TFTP license file into flash

Install the license using the license install command
Switch# copy tftp flash:
Address or name of remote host [ ]? 172.20.244.138
Source filename [ ]? r1fs-ips
Destination filename [r1fs-ips]?
Accessing tftp://172.20.244.138/r1fs-ips...
Loading r1fs-ips from 172.20.244.138 (via GigabitEthernet1/0/1): !
[OK - 1161 bytes]
1161 bytes copied in 0.059 secs (19678 bytes/sec)
Switch# license install flash: r1fs-ips
Installing licenses from "flash:r1fs-ips"
Installing...Feature:ipservices...Successful:Supported
1/1 licenses were successfully installed
0/1 licenses were existing licenses
0/1 licenses were failed to install
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Show Commands
Following administrative commands will be supported
to administer software licensing:
Displaying the file
Detailed display of license type
Showing the Unique Device Identifier
Enabling debug mode
show license file [switch
<switch_id>]
show license status [switch <switch_id>]

show license detail <feature_name> [switch
<switch_id>]
show license udi
debug license <events | all | errors>
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Agenda
Switch Differences
Hardware Overview
StackWise Overview
Packet Walks
Stack Functions
QoS Model
Summary
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Architecture Overview
Processor
Switch Fabric
Port
ASIC
Port
ASIC
Port
ASIC
Two Stack
Cables
Stack PHY
CPU
SDRAM
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
Dual Mode PHY
Flash
Serial
10/100
24X1G POE
24X1G POE
12X1G
12X1G
12X1G
12X1G
StackWise,
StackWise
Plus
2X10G or
4X1G
Switch-to-Switch communication and synchronization

Updates the MAC and Routing caches attached to each port ASIC
Performs CPU Software-based forwarding when the TCAM is over its
limits for MACs, Routes, ACL entries etc.
The CPU communicates with the Port ASICs via a dedicated management
ring (the yellow ring in the diagram)
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Switch Fabric
Switch Fabric
Port
ASIC
Port
ASIC
Port
ASIC
Two Stack
Cables
Stack PHY
CPU
SDRAM
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
Dual Mode PHY
Flash
Serial
10/100
24X1G POE
12X1G
12X1G
24X1G POE
12X1G
12X1G
2X10G or
4X1G
StackWise,
StackWise
Plus
128Gbps switching Fabric

Provides line rate and local switching within a switch and stack connectivity
48G + 2X10G + 32 Stack-ports (100Gbps FDX)
64 Gbps Ring Stackwise Plus

1 Gbps Ring Inter-connect control path to the Port ASICs to the CPU
Point-to-Point, 32 Gbps ring connecting each Port ASIC
Jumbo frame switching and routing
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Ring View of the Switch Fabric

Switch Fabric
Port
ASIC
Port
ASIC
Port
ASIC
Two Stack
Cables
Stack PHY
CPU
SDRAM
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
Dual Mode PHY
Flash
Serial
10/100
24X1G POE
24X1G POE
12X1G
12X1G
12X1G
12X1G
StackWise,
StackWise
Plus
2X10G or
4X1G
Switch Fabric
Stack PHY
Switch Fabric
Stack PHY
Physically, the ring is a series of switch fabrics strung together by stack cables
The switch fabric performs token generation and ring control
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Port ASIC
Switch Fabric
Port
ASIC
Port
ASIC
Port
ASIC
Stack PHY
Two Stack
Cables
CPU
SDRAM
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
Dual Mode PHY
Flash
Serial
10/100
24X1G POE
12X1G
12X1G
24X1G POE
12X1G
12X1G
2X10G or
4X1G
StackWise,
StackWise
Plus
The Port ASIC performs:

Traffic forwarding
QoS
ACL lookup
The number of Port ASICs varies, depending on media speed

and type of ports.
I.e., Gig ports, SFP ports, 10Gig ports
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Port ASIC Exposed
To
CPU
Switch Fabric
MAC
Port 2
Port
TXT
ASIC
FIFO
Port
ASIC
Port
ASIC
MAC
Port 1
MAC
Port 3
MAC
Port 4
Two Stack
MAC
PortCables
16
MAC
Port 5
Stack PHY
Forwarding
Controller
CPU
RCV
FIFO
SDRAM
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
Dual Mode PHY
TXT
Queues
24X1G POE
24X1G POE
12X1G
12X1G
TXT
Buffer
RCV
Buffer
10/100
TCAM
SRAM
StackWise,
StackWise
ToPlus
2X10G or
4X1G
12X1G
12X1G
Flash
Serial
From
Switch
Fabric
Switch
Fabric
Copy first 200 bytes of

the header
Build 24-byte internal
header
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TCAM/SRAM
Switch Fabric
TCAM
SRAM
TCAM
SRAM
TCAM
SRAM
Port
ASIC
Port
ASIC
Port
ASIC
Two Stack
Cables
Stack PHY
CPU
SDRAM
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
Dual Mode PHY
Flash
Serial
10/100
24X1G POE
12X1G
12X1G
24X1G POE
12X1G
12X1G
2X10G or
4X1G
StackWise,
StackWise
Plus
The TCAM stores vital information including IPv4, IPv6 and MAC addresses
The 3750-Es TCAM/SRAM is incorporated into the Port ASICHardware Merge
SRAM tables have been sized to fit all existing Catalyst 3750 SDM templates
Support MAC ACL on both IP and non IP traffic (Future)
Egress Port ACL (Future)
With the 3750-E it is now easier to configure the full 2K ACEs
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TCAM Templates
Switch# show sdm prefer routing

"aggregate routing" template:
The selected template optimizes the resources in
the switch to support this level of features for
8 routed interfaces and 1024 VLANs.
number of unicast mac addresses: 6K
number of igmp groups + multicast routes: 1K
number of unicast routes: 20K
number of directly connected hosts: 6K
number of indirect routes: 14K
number of policy based routing aces: 512
number of qos aces: 512
number of security aces: 1K
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PHY
Switch Fabric
Port
ASIC
Port
ASIC
Port
ASIC
Two Stack
Cables
Stack PHY
CPU
SDRAM
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
Dual Mode PHY
Flash
Serial
10/100
24X1G POE
12X1G
12X1G
24X1G POE
12X1G
12X1G
2X10G or
4X1G
StackWise,
StackWise
Plus
All media conversion

10/100/1000 Mbps
10G, Supported:
LR (SMF 10km), ER (SMF 40km), SR (MMF),
LX4 (MMF - 300m SMF - 10km) and CX4 (Copper)
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POE
Switch Fabric
Port
ASIC
Port
ASIC
Port
ASIC
Two Stack
Cables
Stack PHY
CPU
SDRAM
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
Dual Mode PHY
Flash
Serial
10/100
24X1G POE
12X1G
12X1G
24X1G POE
12X1G
12X1G
StackWise,
StackWise
Plus
2X10G or
4X1G
24 X 1G ports per POE per chipfull 15.4W POE

Supports ePOE on up to 40 ports
Provides/Terminates all power to/from the PHY
Performs per port Policing *Auto-sensing and controls all POE
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Catalyst 3750 Hardware Differences

Block Diagram48-Port POE
8 Port
PHY
TCAM
SRAM
TCAM
SRAM
TCAM
SRAM
Port ASIC
Port ASIC
Port ASIC
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
Stack
PHY
8 Port
PHY
2 Stack
Cables
CPU
SDRAM
Flash
POE
POE
Ports
Ports
POE
Serial
Ports
3750 and 3750-E Main Architectural Differences:

3750 Does not have a second tier switch fabric like the 3750-E
and can not locally switch without sending packets on the ring
3750 has external TCAMs
The 3750 does not have an Ethernet Management Port
3750 only runs in StackWise mode
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Catalyst 3750 Ring View

Two Stack
Cables
TCAM
SRAM
TCAM
SRAM
TCAM
SRAM
Port ASIC
Port ASIC
Port ASIC
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
Stack PHY
P
H
Y
CPU
SDRAM
P
H
Y
Flash
Serial
Stack PHY
Port ASIC
Port ASIC
Port ASIC
CPU
Stack PHY
Port ASIC
Port ASIC
Port ASIC
CPU
Physically, the ring is a series of port ASICs strung together by stack cables
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Catalyst 3750 Series

Architectural Differences
Switch Fabric
Port
ASIC
Port
ASIC
Port
ASIC
Stack PHY
TCAM
SRAM
TCAM
SRAM
TCAM
SRAM
Port ASIC
Port ASIC
Port ASIC
Stack
PHY
CPU
Processor
SDRAM
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
8 Port
PHY
Dual Mode PHY
Flash
Serial
10/100
24X1G POE
12X1G
12X1G
24X1G POE
12X1G
12X1G
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
SDRAM
Flash
Serial
2X10G or
4X1G
3750E vs. 3750 Main architectural differences

Catalyst 3750E-48
Switch fabric Allows local switching
Enhanced Ring protocol, DLAP
64G Ring BW
Non-blocking architecture
Destination strip Spatial Reuse
POE Monitor & Police
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Catalyst 3750G-48
Port ASIC controls ring, There is No Switch fabric
3750 Has external TCAMs
3750 only runs in StackWise mode, 32G (HTPP)
1:1.6 Oversubscription Blocking
Source strip
Does not have an Ethernet Management Port
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12
Catalyst 3560E-12SD
10/100
FRU
FAN
FRU
PS
FRU
PS
Serial
Switch Fabric
DDR SDRAM
Supervisor Ring
Point to Point Stackwise

Rings. DLAP-PP mode.
CPU
FLASH
Stackwise 32G
Two Bidirectional ring
16G each
Port-ASIC
1
Port-ASIC
2
Four SFP
.....
Two XAUI
X2-Phy
12
X2
X2
12 SFP
A Port-ASIC handles traffic for twelve 1Gig SFP Ports.

The other Port-ASIC handles traffic for two 10Gig Ports or four 1Gig SFP Ports
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Catalyst 3560E-12D
Three switch ASIC and three internal rings make up
the switch fabric
Switch Fabric
Switch Fabric 2
Switch Fabric 1
Port-ASIC
1
Port-ASIC
2
Switch Fabric 3
Port-ASIC
3
Port-ASIC
4
Port-ASIC
5
10
Port-ASIC
6
11
12
10G Ports 1 - 12
Each Port-ASIC switches traffic for two 10G Ports.

Each Switch ASIC switches traffic for two Port-ASIC
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Traffic Patterns
Local Switching
Non-blocking wire
rate for all traffic
between both
Port-ASIC; that is 20G
bidirectional traffic
Switch Fabric 2
Switch Fabric
Switch Fabric 1
Adequate bandwidth for
two 10-Gbps ports at line
rate
Port-ASIC
1
Port-ASIC
2
10-Gbps is the available

bandwidth from each port
to the Port-ASIC
X2
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X2
X2
Switch Fabric 3
All Local traffic from 10G

ports goes through the
Switch Fabric via the
Port-ASIC.
X2
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Traffic Patterns
Local SwitchingNon-Blocking
Traffic between any four ports on the same Switch ASIC is line-rate.
In this example, no traffic is placed on the rings.
Switch Fabric
Switch Fabric 2
Switch Fabric 1
Port-ASIC
1
Port-ASIC
2
Traffic at line rate

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Switch Fabric 3
Port-ASIC
3
Port-ASIC
4

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Port-ASIC
5
10
Port-ASIC
6
11
12

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14
Traffic Patterns
Local SwitchingNon-Blocking
In this example, traffic flows only on the rings between Switch
ASIC-1 and Switch ASIC-2. Traffic is at line rate, non-blocking.
20G bi-directional
26G Unidirectional
Switch Fabric
Switch Fabric 2
Switch Fabric 1
20G
Capacity
Port-ASIC
1
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Switch Fabric 3
Port-ASIC
2
Port-ASIC
3
Port-ASIC
4
Port-ASIC
5
10
Port-ASIC
6
11
12

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Agenda
Switch Differences
Hardware Overview
StackWise Overview
Packet Walks
Stack Functions
QoS Model
Summary
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What Is the Stack?

The Cisco Catalyst 3750/3750-E switch is a switch
that when stacked together forms a seamless
single device
This is made possible by Cisco StackWise and
StackWise Plus
The term stack ring is used because the stacking
configuration is a true ring
The stack interfaces form a hardware-based ring
A hardware ring is beneficial because:
Non-ring stacks must block, just like spanning tree, or loops will
occur and melt down the stack
A software ring would require the CPU
to forward and this would result in dismal performance
Makes sure only one copy of a multicast packet is on the
stack cables
There are statistics and a MIB for stack ring functions

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Stack MIB (Stack Management)

MIB Object Type
SET
GET
TRAP
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Object Description
Enable stack notification
Max number of switches in the stack

Highest switch priority that can be configured
Indicates if the stackports are connected such that ring redundancy is available
List of switches in the stack
Current switch number and next switch number after next reload
Switch role in the stack
Switch priority
Switch state (for example, waiting, progressing, added, and so on)
Switch MAC
Switch image
Switch stackport info
Switch stackport neighbor
Switch stackport status
Switch stackport state change

New master elected
Stack mismatch for a new member joining
Stack ring redundancy change
New member added
Member removed
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Understanding the Stack Cable

Eight TXT/RCV pairs, that is
16 total pairs
Cable
TXT
Pair Trace
Each TXT/RCV pair has two traces

that use differential signaling. That
is 32 traces in total.
Each TXT/RCV pair runs at
2.5 Gbps
8B/10B encoding is used. That is,
for every ten bits sent, eight bits
are user data and two bits are
overhead
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Understanding the Stack Ring Speed

Two Cable x 16 Pair/Cable x 2.5 Gbps/Pair x 8B/10B = 64G total
Or 32 Gbps send and 32 Gbps receive per cable
Or 16 Gbps per cable bidirectional
Trace
16 Gbps
16 Gbps
16 Gbps
16 Gbps
TXT/RCV
Pairs
Cable
1
Cable
2
Physical Line Rate Only

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Spatial Reuse
Stackwise Plus
(Source Strip)
Spatial Reuse
(Destination Strip)
3750 StackWise
3750-E StackWise Plus
Only 2 Flows
Access-based tokens
Up to N by 2 Simultaneous Flows
Credit-based Tokens
No Spatial Reuse
Stackwise
32 Gbps
Stackwise Plus
N by 32 Gbps
Note: These are packets not tokens. There is are only 1 token per direction, 2 in total
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Stackwise and Stackwise Plus

Protocol Enhancement
1st Gen (Stackwise
(Stackwise))
Ring access controlled by Token
Only one node can transmit at a time
Source strips packets
2nd Gen (Stackwise

(Stackwise Plus)
Plus)
Ring access controlled by Credit
Multiple nodes can transmit simultaneously (Spatial ReRe-use)
Destination strips unicast packets and returns a small Ack (16bits)
Token is used to distribute asynchronous Credit
Backwards compatible with 1st Gen
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Ring Healing
Switch Fabric
Switch Fabric
Port ASIC
Port ASIC
Port ASIC
Port ASIC
Port ASIC
Port ASIC
Port ASIC
Port ASIC
Port ASIC
Loop
Loops
Switch Fabric
3750
3750-E
The Switch Fabric or Port ASIC closest to cable detects link down
Criteria is coding violations in a period of time
Loss of at most one packet that was being transmitted when ring broke
Just microseconds for hardware to detect failure
Each switch signals a bad link to stack its partner

Both ends of the cable loop back on themselves
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Agenda
Switch Differences
Hardware Overview
StackWise Overview
Packet Walks
Stack Functions
QoS Model
Summary
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3750 Packet WalkAll

Port ASIC
Continue to
pass packet
Port ASIC
Copy to
Dest. Port
ASIC Port ASIC
Pass to
Receiver
Port ASIC
Port ASIC
Port ASIC
Remove
Forward
Packet To the Stack
Port ASIC
Port ASIC
Port ASIC
All types of packets are passed all the way around the
ring, copied at the destination(s) and returned to the
sender for stripping
Source
Destination
Data
All packets are sent to the stack ring, the Port ASICs
can not locally switch traffic
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3750-E Unicast Packet Walk

Locally Switched
Switch Fabric
Port ASIC
Port ASIC
Port ASIC
The packet is sent to the switch Fabric and

locally switched to the destination Port ASIC
Source
Destination
Data
Simple switching with, no ACK necessary
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3750-E Unicast Packet WalkRemote

Destination
Remove
Packet
Port ASIC
Send
ACK
Switch Fabric
Port ASIC
Port ASIC
Switch Fabric
Port ASIC
Port ASIC
Port ASIC
Remove
Switch Fabric
ACK
Port ASIC
Port ASIC
Port ASIC
The Source Port ASIC sends the packet to the Source Switch
Fabric and it is switched to the Destination Switch Fabric
The Destination Switch Fabric removes the packet and sends
a 8 bit ACK
Source
Destination
Data
ACK
The Originating Switch Fabric receives and removes the ACK

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3750-E Multicast Packet Walk

Replicate to
Dest. Port
Switch FabricASICs
Port ASIC
Port ASIC
Replicate to
Dest. Ports
Port ASIC
Switch Fabric
Port ASIC
Port ASIC
Port ASIC
Port ASIC
Remove Copy to Port ASIC

Switch
Fabric And Forward
Packet
To Stack
Port ASIC
Port ASIC
The packet is passed all the way around the ring

The Switch Fabrics with multicast ports in that group copy the packet
The originating Switch Fabric removes the packet from the ring
Source
Destination
Data
Note: There is only one packet on the ring per multicast flow,
replication only occurs at the local level
Note: if the sender and all of the receivers are on the same switch no
packets are sent to the ring
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Agenda
Switch Differences
Hardware Overview
StackWise Overview
Packet Walks
Stack Functions
QoS Model
Summary
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Stack Master and Members

A stack is created by connecting switches using
Cisco proprietary Stacking Cable
During the formation of stack, a stack master is
elected
All switches have the ability to be stack masterno
special hardware/software required
The stack master can be selected by assigning a
user-configurable priority 1 through 15, 15 being
the highest
An LED indicates stack master
The master controls all centralized functions
On stack master failure, another switch in the stack
takes over
1:N master redundancy
All non-master switches are called members
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Stack Master Election Criteria

When adding switches or merging stacks, the master
will be chosen based on the rules below, in the order
specified
1. The stack (or switch) whose master has the
higher user configurable mastership priority 115
2. The stack (or switch) whose master is not using
the default configuration
3. The stack (or switch) whose master has the higher
software priority
Cryptographic advanced IP services (IPv6)
Noncryptographic advanced IP services (IPv6)
Cryptographic IP services
Noncryptographic IP services
Cryptographic IP based
Noncryptographic IP based
4. The stack (or switch) whose master has the lowest

MAC address
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Switch Priority
Switch (config)# switch 3 priority 10

Switch (config)# exit
Switch# show switch
Switch# Role
Mac Address
Priority
State
-----------------------------------------------------------1
Member 000a.fdfd.0100
5
Ready
2
Member 000a.fdab.0100
5
Ready
3
Master 000a.fd22.0100
10
Ready
4
Member 0003.fd63.9c00
5
Ready
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Becoming a Stack Master

A Stack Master Can Change If:
The current stack master fails
The stack master is removed from the
switch stack
The stack master is power cycled or
powered off.
A stack member is added with power-on,
and with a higher priority than the current
master (Stack-Merge)
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Functions of the Stack Master

The Stack Master:
Builds and propagates the L3 FIB
Manages and Propagates the
configuration to the stack
Controls the console
Config
FIB
IOS
Config
FIB
IOS
Controls the CDP neighbor table

Controls the VLAN database
Config
FIB
IOS
Upgrades the stack
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Switch Numbers
Member switches, in a stack, are assigned switch numbers automatically
Valid switch numbers are 1 through 9
Numbering does not reflect physical location of the stack members
Switch numbers are sticky, i.e. they switch will keep the same switch number after
reboot
The user has the ability to renumber the switch through the CLI
The switch number can be shown by using the STACK LED
Switch(config)# set switch number 4

Switch(config)# exit
Switch # write mem
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Centralized and Distributed Functions

Centralized functions
Those that are reside on the
master node
Master
Those that are forwarded to the

master node
Those that are controlled or
synchronized by the master node
Distributed functions
Master
Those that are performed locally

by each node
These functions are synchronized
or updated between the nodes
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MAC Address Management

Distributed
MAC address tables are
synchronized across the stack
MAC B
CPU
TCAMs
A switch learns an address

and sends a message to other
switches in the stack
CPU
TCAMs
Learning an address that was

previously learned on a different
port (either same or different
switch) is considered as move
CPU
TCAMs
How it is distributed:
MAC A
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STP
Distributed
Each switch in the stack runs its own
spanning tree instance per VLAN
Each switches will use the same bridge-id
Each switch process its own BPDUs
BPDU
CPU
Show commands show spanning tree as

a single entity
Stacking ports are never blocked
All packets on the ring have the internal ring
header; Therefore, even broadcast packets
are source stripped and do not continuously
recirculate.
Supports Cisco enhancements, like Uplinkfast, Backbone-fast, Port-fast, Root-guard,
BPDU-guard, etc. are supported with no
impact.
CPU
CPU
BPDU
There is support for 128 instances of

STP per node/stack
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CDP
Centralized
CDP is implemented using
centralized model
The master will maintain CDP
neighbor table and the neighbor
tables will be empty on member
nodes
Master
Upon a master switchover,

a new master will build the
CDP neighbor table
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Cross Stack Etherchannel/LACP

Centralized
An LACP-based Etherchannel
can be formed with member
ports from one or more switches
in the stack
Single Channel Group
Etherchannel control, not

forwarding, is performed by
the master node
Benefits:
In addition to port aggregation,
load-balance, and link redundancy;
switch-level redundancy is provided
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VLAN Database
Centralized
All switches in the stack build
from same VLAN database
Members download VLAN
database from master during
initialization
Master
TCAMs
TCAMs
They are synchronized over the

stack ports
The stack supports all 3 VLAN
Trunking Protocol (VTP) modes:
server, client and transparent
modes
TCAMs
1024 VLANs; 4K VLAN IDs are

supported
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Cross Stack IP Host

Centralized
The IP stack is active only
on stack master
All IP applications like
ICMP, TFTP, FTP, HTTP,
SNMP, etc. are handled on
the stack master
irrespective of, which switch
the L3 interface is
connected to
Ping 10.0.0.5
Master
IP Stack
10.0.0.15 / 24
Master Switch
10.0.0.5 / 24
Ping 20.0.0.5
IP Stack
20.0.0.5 / 24
20.0.0.15 / 24
Ping 30.0.0.5
IP Stack
30.0.0.15 / 24
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L3 Routing Overview
Centralized
The route processor and Routing
Information Base (RIB) live on the Master
All Switches have an identical copy of the
Forwarding Information Base (FIB) a.k.a.
Forwarding table
Routing protocols include Static, RIPv1and
v2, OSPF, IGRP, EIGRP, BGP, PIMSM/DM, DVMRP, HSRP
The Catalyst 3750 uses cross stack equal
cost routing
The Catalyst 3750 Stack appears as a
single router to the world
No HSRP peering among stack members
Policy Based (PBR), IPv4 and IPv6
Routing in hardware
Non Stop Forwarding (NSF) Aware and
NSF Capable
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FIBs/TCAMs
FIBs/TCAMs
FIBs/TCAMs
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Agenda
Switch Differences
Hardware Overview
StackWise Overview
Packet Walks
Stack Functions
QoS Model
Summary
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Master:
Copies of the startup and running
config files are kept on all members in
the stack
Config
The current running-config is synched

from the master to all members
On a switchover, the new master
re-applies the running-config so
that all switches are in sync
Member:
Config
Config
Keeps a copy of startup and running

config at all times
On boot-up waits for config file from
master and parses it
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Switch Addition
The stack has three members
with numbers 1, 2, 3
A new switch with an existing
#3 is added to the stack
The new switch detects a
conflict, and loses, based on
the rules used for stack Master
determination.
Master #1
Switch #2
Switch #3
Switch #3
#4
Switch
It is assigned the #4 and

reloads switch #4
All configuration commands in
the config file which apply to
interfaces 4/0/* apply to the
new switch
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Switch Removal
The stack has three members1, 2, 3
Switch #3 is removed or powered down
Neighbor loss is detected by Switch
#1 and Switch #2
Master #1
Layer 2 and Layer 3 convergence

may need to happen
Switch
Master #2
#2
Now there is a stack of two

switchesSwitch #1 and Switch #2
Switch #3
Switch#1 is still the master
Switch #1 is removed or powered down

Switch #2 takes over as master
Layer 2 and Layer 3 convergence may need
to happen
Now there is a stack of one switch#2 which
is the master
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Replacing a Switch
Replacing a Failed Switch:
For example, the failed switch is a
Cisco Catalyst WS-C3750E-48TD
If replaced by another Cisco Catalyst
WS-C3750E-48TD, the new switch
will receive the port-level
configuration of the original unit
Config
Config
If replaced by a different switch, the

original configuration is lost and the
new switch receives all stack global
configuration
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Switch Preprovisioning
Create a provision
Switch #4 (Shadow).
Config
Enter the port

configuration of the
New Switch.
Master #1
Switch #2
Switch #3
Set the Switch Number (#4)

Switch #4
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Preprovisioning a Switch
Switch(config)# switch 4 provision WS-C3750G-12S
Switch(config)# exit
Switch# write mem
Switch# show running-config | include switch 4
!
interface GigabitEthernet4/0/1
!
!
<output truncated>
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Mixed Hardware Stack:

Incompatible Port Level and Interdependent Features
New 3750-E port level features are only allowed
to be configured on the 3750-E
3750-E
User tries to configure a

3750-E-only port based new
feature on a 3750-E Port
3750-E
3750-E
User tries to configure a

3750-E-only port based
feature on a 3750 Port
3750
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E-Series Port Level Features

Feature
Description
MAC ACLs on IP packets, configued on a

port
Both MAC ACLS and IP ACLs on the IP packets
Port + IP ACL on a port
Apply port and VLAN Based ACL at the same time for the same
packet
MAC+ IP ACL on a port
ACLs based on a combination of MAC+ IP fields in the same ACE
10G policing
Policing is supported up to 10G
ACL Timestamp support*
Per-entry timestamp/Dynamic ACLs
Per port per vlan/per vlan per port

classification
Classification on Port+vlan and policing is per port
IPV6 keyword support*
IPV6 address prefix from /0 to /128 are supported. Matching on

presence of routing header and flowlabel
Flow label Support for IPV6
QoS classification based on flowlabel
Egress Shaping
Shaping can go over 50% with improved granularity
Bandwidth limit
Bandwidth limit is in increments of 1%
MAC based QoS classification and

policing for IP packets
Police Ip frames based on MAC ACLs in a policy map
Statistics support for Unicast Routing
Support either byte or frame counters
L2 Forwarding of Multicast Frame
Support programmable .1q other than 800
Unknown Unicast Storm Control
Unknown unicast traffic can be blocked at the ingress
* On a VLAN It Is Interdependent, Otherwise It Is Port Level

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Mixed Hardware Stack:

Incompatible Interdependent Feature Configuration
New 3750-E Interdependent, or system-based, features
can not be configured on any switch in a mixed stack.
3750-E
3750-E
User tries to configure a 3750-E

Interdependent feature
3750-E
3750
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E-Series Switch Interdependent Level

Features
Feature
Description
MAC ACLs on IP packets, configured on

Vlan
Both MAC ACLs and IP ACLs on the IP packets
MAC+IP ACL on a VLAN
ACLs based on a combination of MaC+IP fields in the same ACE
ACL Statistics Support
Statistics based on either byte or frame countess
Address learning for ACL for

denied/redirected frames
L2 MAC addresses out of frames that are denied or redirected
Uncompressed IPv6
Allows for better utilization of the TCAM space
Unicast RPF
Discards IP addresses that do not have a verifiable IP source
QinQ Inner Tag
Look into inner tag while parsing
Jumbo frame routing
Routing of 9K+ frames
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Stack Mismatch
Homogeneous Stack, 3750 or 3750E:
3750-E
Version Mismatch:
3750-E
IOS feature set / licensing mismatch,

i.e. IPbase, IPservices, AIS
3750-E
SDM Mismatch:
All members of the stack must run the
same SDM template as the master.
Version Mismatch has priority over

SDM mismatch
3750-E
Hardware Mixed Stack, 3750 and 3750E:

3750-E
Same as above
3750-E
Feature Mismatch
Hardware features (POE, Jumbo
frame routing)
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Version Mismatch
Master and new member are
not running the same IOS
feature set
Proper IOS image was not
found
Individually upgrade IOS
version
3750-E Universal
3750-E Universal
3750-E Universal
3750 Base
Use the multiple file download

option for HW Mixed stack
Use the TFTP assistance
option
3750 IP Base
3750 IP Base
3750 IP Services
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SDM Mismatch
Hardware Compatibility and SDM Mismatch Mode
The Catalyst 3750-E switch supports only the desktop Switch
Database Management (SDM) templates.
The Catalyst 3750 switch supports either the Desktop or
Aggregator SDM templatesbut a stack can not run a mix
of SDM templates.
All stack members use the SDM template configured on the
stack master
In a mixed hardware stack
A Version mismatch has priority and it gets resolved first
All other switches trying to join this stack enter SDM-mismatch mode
If a Catalyst 3750 stack master is using an Aggregator template, then a Catalyst
3750-E switch cannot join the stack
In this scenario, Only Catalyst 3750 aggregator switches can be stack members
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Feature Mismatch
This Is a Mismatch of Hardware Capabilities in a Stack:
A switch/stack of E series switches running interdependent
features such as Jumbo frame routing or more than 32 HSRP
groups,
And
A switch/stack of Cat3750 switches attempting to join the stack
and not able to support the advanced Hardware capabilities
of an E series switch
Caveat:
If an E series switch in feature mismatch mode is reloaded,
then the switch will be able to join the stack because it will ignore
the incompatible IOS configuration commands as it boots up.
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Stack IOS Upgrade Process

Automatic Upgrade involves two processes:
Auto-Upgrade and Auto-Advise
The auto-upgrade processes consists of:

auto-copy process and auto-extract process
Auto-copy copies a running image of any stack member into a

switch in VM mode
If auto-copy fails, Auto-extract searches for a TAR file suitable for
the switch in VM mode
If auto-extract fails, Auto-Advice provides a recommendation
archive copy-sw To copy an image for any TAR file on any stack member
or
archive download-sw To download an image from the network
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Upgrading with Homemade

Image Bundle
One Can Download up to 4 images

to the master.
3750-E
Master
12.2(35)SEE
3750-E
12.2(35)SEE
3750-E
12.2(35)SEE
3750
A Catalyst 3750 image is

auto-extracted from the initial
3750-E bundle, to the new
Catalyst 3750 switch
The new switch the reloads
and joins the stack seamlessly
12.2(35)SEE
Switch(config)# archive download-sw /allow-feature-upgrade [/directory]

/overwrite /reload <file 1.tar> <file 2.tar> <file 3.tar> <file 4.tar>
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Upgrading A Mixed Hardware and/or

Software Stack with TFTP Assistance
TFTP
Server
Download a compatible
image auto downloaded
from the TFTP server
3750-E
Master
3750-E
3750-E
3750
Configure the URL for the image

repository on a TFTP server
Reloading
Switch(config)# boot auto-download-sw <URL>

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Am I the only one still confused?

Automatic Upgrade kicks in (auto-copy)
If fails, then Auto-extract
If fails, then auto-advise
Recommend:
Store Universal and Reformation TAR images in the master and a backup master for
auto-extract to work.
Configure a url for last resort: (point to the image repository)
boot auto-download-sw tftp://10.1.1.15/images/fall06/c3750-universal-tar
Still in VM mode (manual upgrade):

boot auto-copy-sw
enables auto-Upgrade process for switches in VM mode
archive download-sw
/allow-feature-upgrade Allow installation of image with different feature sets
/directory
Specify a directory for images 2 images, Mixed HW stack.
archive copy-sw
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Make the 3750-E the Master

Mixed StackMastership Roll Over
Making the a 3750-E the master switch gives the user more
options for upgrading in a mixed stack scenario
In a mixed stack the 3750-E will run in StackWise mode,
not Stackwise Plus
Master
3750-E
3750
3750
3750
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Making the 3750-E the Master

Step 1 of 5
Steps:
1. Set the priority of the 3750-E to be lower than that
of the switches in the 3750 stack.
3750-E
3750
Change
Switch 1, Priority 5
To
Switch 4, Priority 1
Master
Switch #,
Priority
1, 6
3750
2, 2
3750
3, 2
Switch_3750_E(config)# switch 1 renumber 4

Switch_3750_E(config)# exit
Switch# show switch
Switch_3750_E# write mem
Switch# Role Mac Address Priority State

----------------------------------------1
Member 000a.fdfd.0100
6
Ready
2
Member 000a.fdab.0100
2
Ready
3
Master 000a.fd22.0100
2
Ready
Switch_3750_E# reload
Switch_3750_E# switch 4 priority 1
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Making the 3750-E The Master

Step 2 of 5
Steps:
1. Upgrade the 3750 stack to be equal to the code level
of the 3750-E.
3750-E code level
3750-E
3750 code level

3750
Master
3750
3750
Switch_3750# copy tftp flash:10.1.1.1 <src_file> <dst_file>

Switch_3750# boot system flash: <new_image>
Switch_3750# reload
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Step 3 of 5
Steps:
1. Power Down the 3750-E
2. Physically add the 3750-E to the stack
3. Power up the 3750-E (it ill now receive the switch config
from the master switch)
Switch #
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1
Master
3750
3750
3750
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Step 4 of 5
Steps:
1. Set the switch priorities so that when one reboots the stack
master, the 3750-E will be come the master.
Switch #
Priority
10
3750-E
Master
3750
3750
3750
Switch_3750(config)# switch 4 priority 10

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Making the 3750-E The Master

Step 5 of 5
Steps:
Reload or Power-cycle the current stack master.
Switch #
Master
3750-E
Priority
10
6
3750
3750
3750
Master
Switch_3750# reload slot 1

/* Note slot 1 is the means Switch ID 1 */
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Agenda
Switch Differences
Hardware Overview
StackWise Overview
Packet Walks
Stack Functions
QoS Model
Summary
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Cisco Catalyst 3750 and 3750-E

QoS Model
Traffic
Policer
Marker
Policer
Marker
Classify
Ingress
Egress
Queues
SRR
SRR
Policer
Marker
Policer
Marker
Classification
Policing
Inspect incoming
packets
Based on ACLs or
configuration,
determine
classification label
Ensure
conformance to a
specified rate
On an aggregate
or individual flow
basis
Up to 256 policers
per Port ASIC
Support for rate
and burst
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Ring
Ingress
Queues
Egress
Marking
Act on policer
decision
Reclass or drop
out-of-profile
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Ingress Queue/
Schedule
Congestion
Control
Two queues/port
ASIC shared
servicing
One queue is
configurable for strict
priority servicing
WTD for congestion
control (three
thresholds per queue)
SRR is performed
Egress Queue/
Schedule
Congestion
Control
Four SRR queues/port shared
or shaped servicing
One queue is configurable
for strict priority servicing
WTD for congestion
control (three thresholds
per queue)
Egress queue shaping
Egress port rate limiting
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Catalyst 3750 Control Plane Protection

16 Processor Hardware Queues
DoS protection via 16 CPU queues.
The workload is distributed to processors
on each switch of the stack.
The stack ring reserves bandwidth for
priority traffic
Bandwidth reservations on the ring ensure the

CPU communication is not affected by data
traffic.
These 16 processor queues are not

configurable.
STP, OSPF and inter-CPU packets on separate
Queues
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WRR vs. SRR

SRR is an evolution of WRR that protects against overwhelming buffers with
huge bursts of traffic by using a smoother round-robin mechanism
WRR
SRR
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Weight
Weight
Weight
Weight
Weight
Weight
Weight
Weight
SRR has a more even traffic flow

Each queue empties
a weighted number of packets
over a given period of time
Each queue empties

immediately as it is weighted
Packet Order
WRR
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Shaped SRR vs. Shared SRR
Shaped
Shared
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Weight
Weight
Weight
Weight
Weight
Weight
Weight
Weight
If higher weight queues are empty,

lesser weight queues can continue
to send while the higher weight
queues are empty
Lesser weight queues sit idle

and wait to transmit, even if
higher weight queues are empty
Packet Order
SRR Non-shared
SRRSRR
Shared
Shared
Wait
Wait
Wait
Room for more traffic, draining the buffers!
Shared Queuing drains queues more efficiently!

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Shaped SRR vs. Shared SRR

and Traffic Shaping
Either Shaped SRR or Shared SRR is Good!
Shared SRR is used to get the maximum efficiency out
of a queuing system, because unused time slots can be
reused by busier queues; Unlike standard WRR.
Shaped SRR is used when one wants to shape a
queue or set a hard limit on how much bandwidth a
queue can use
One can Shaped SRR one can shape queues within a ports overall
shaped rate, and map traffic types to those queues for shaping
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Configuring a Priority Queue (Ingress)

This example shows how to assign the ingress bandwidths to the queues,
one of which is set to a priority queue
Queue 2, the priority queue, is set with a 10% bandwidth guarantee
Equal bandwidth weights are allocated to queues 1 and 2, 4/(4+4), for the
remaining bandwidth.
That is, SRR equally shares the remaining 90% of the bandwidth between
queues 1 and 2 by allocating half, 45%, to each queue
Weights range from 0 to 40 for the first command and 0 to 100 for the
second command
Switch(config)# mls qos srr-queue input priority-queue 2 bandwidth 10

Switch(config)# mls qos srr-queue input bandwidth 4 4
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Configuring Shaped Queues (Egress)

This example shows how to configure bandwidth
shaping on queue 1
The bandwidth is weighted 1/10 or 10%
The final 0 0 0 in the last field indicates that the
remaining 3 queues do not operate in shaped mode,
but in shared mode.
Weights range from 0 to 63555
Switch(config)# interface gigabitethernet2/0/1
Switch(config-if)# srr-queue bandwidth shape 10 0 0 0
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Configuring Shared Queues (Egress)

This example shows how to configure the weight ratio of the SRR
scheduler running on an egress port
Four queues are used, and the bandwidth ratio allocated for each queue
in shared mode is 1/(1+2+3+4), 2/(1+2+3+4), 3/(1+2+3+4), and
4/(1+2+3+4), which is 10 percent, 20 percent, 30 percent, and 40 percent
for queues 1, 2, 3, and 4
This means that queue 4 has four times the bandwidth of queue 1, twice
the bandwidth of queue 2, and one-and-a-third times the bandwidth of
queue 3
Weights range from 1 to 255
Switch(config-if)# srr-queue bandwidth share 1 2 3 4
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Cisco Catalyst 3750 Weighted Tail Drop

WTD is a congestion-avoidance
mechanism for managing the
queue lengths and providing drop
precedences for different traffic
classifications
WTD is used at both, the Ingress
queues or the Egress queues
CoS 6-7
CoS 4-5
CoS 0-3
100%
1000
60%
600
40%
400
User configurable thresholds

determine when to drop certain
types of packets
As a queue fills up, lower priority
packets are dropped first
In this example, when the queue
is 60% full, arriving packets
marked with CoS 0-5 are dropped
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Queue 1
One is Displayed.
All 4 Egress or 2 Ingress Queues
Can Be Configured Independently
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46
Configuring Weighted Tail Drop

This example shows how to map DSCP values 0 to 6 to ingress
queue 1
It maps DSCP values 10 to 16 to ingress queue 1 and threshold 2
Last it maps DSCP values 20 to 26 to ingress queue1 and threshold 3
The final command sets the drop thresholds of levels 1, 2 and 3 to
50%, 70% and 100% respectively
Switch(config)# mls qos srr-queue input dscp-map queue 1 threshold 1 0 1 2 3 4 5 6

Switch(config)# mls qos srr-queue input dscp-map queue 1 threshold 2 10 11 12 13 14 15 16
Switch(config)# mls qos srr-queue input threshold 1 50 70
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Configuring Ethernet Port Rate Limiting

This example shows how to limit the bandwidth on a
port to 80%
Percentages can be set in increments of 1%, from
10% to 90%
Switch(config)# interface gigabitethernet2/0/1

Switch(config-if)# srr-queue bandwidth limit 80
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47
Agenda
Switch Differences
Hardware Overview
StackWise Overview
Packet Walks
Stack Functions
QoS Model
Summary
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Did We Answer?
The Differences between Catalysts 3560/3560E/3750/3750E
Is my new Aggregator Switch Oversubscribed?
What is a stack ring?
How is the stack ring controlled?
How does the hardware work?
How are stack processes controlled?
What happens when I mix different switch types?
How does QoS work?
3560-E
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3750-E
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48
Q and A
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Complete Your Online

Session Evaluation
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Receive 20 Passport points for each session
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Complete your session evaluation online now
(open a browser through our wireless network
to access our portal) or visit one of the Internet
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Dont forget to activate

your Cisco Live virtual
account for access to
all session material
on-demand and return
for our live virtual event
in October 2008.
Go to the Collaboration
Zone in World of
Solutions or visit
www.cisco-live.com.
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49
Recommended Reading
Continue your Cisco Live
learning experience with further
reading from Cisco Press
Check the Recommended
Reading flyer for suggested
books
Available Onsite at the Cisco Company Store

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50
Appendix
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Line Rate 10G Uplinks and

Converter Module
Dual, line Rate 10GE uplink (X2) modules
Converts X2 10GE interface into
dual SFP interfaces
1000BASE-SX
1000BASE -LX/LH
1000BASE-ZX SFP
1000BASE-T SFP
CWDM 1470-1610 NM
Other SFPs will be evaluated
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StackWise Plus
StackWise Plus increases
the effective stacking
throughput to Nx64Gbps
using spatial reuse
3750
E Series switches are

backwards compatible,
using StackWise, with non
E Series switches
3750-E
Local switching, without

placing packets on a
StackWise or StackWise
Plus ring
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Hardware-Based Power Policing

Each port negotiates or is
manually configured for a
power level.
If a port overdraws (due to a
misconfiguration, hardware
issue or software bug) the
power is turned off on
that port.
Port is automatically
Shutdown for
Power Negotiated
Violations
or Manually Set
This protects the switch and

the power being drawn via
the other ports.
Notifies the admin via SNMP
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On-Board Failure Logging (OBFL)

Provides flight recorder capability, enabled by default
Collects operational data about the:
Switch
Field replaceable power supplies
Redundant power systems
Pluggable optics modules
Stores the data as a circular buffer on the flash (2Mbytes)

The Collected data can be retrieved by TAC and repair
personnel to troubleshoot switches including:
CLI commands
Environment data
Message
Power over Ethernet (PoE)
Temperature Uptime data
Voltage
Each switch on the stack records its own OBFL data

Collected data can be copied to storage device
Command: show log onboard
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Field-Replaceable Power Supplies

1150W AC for full 48 x 15.4 W ports
of PoE in a 1 RU switch
750W AC, providing 370W of PoE
265W AC for non-PoE SKUs
265W DC for non-PoE SKUs
The 1150 W and 750W supplies can
be used with the new Redundant
Power System
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Redundant Power System 2300

Makes PS failure transparent to end users
Seamless failover to RPS when switch PS fails
Automatic back-off when internal power supply of switch resumes
RPS can have a different AC source than switch(es)

Programmable failover policy
Backward compatible: Provides RPS675-compatible support for
all Catalyst 3K and 2K switches as well as 2800 and 3800 ISRs
Up to two switches actively backed up (up to six connected)
The RPS can be managed via E-Series Switches
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Other Enhancements
All models have the ability to route Jumbo Frames
up to 9216 byte sizes
All models will have two management ports
RS-232 serial console port
10/100BASE-TX Ethernet port for out-of-band
management
IPv6 Multicast routing
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Port ASIC Ingress Flow

To
CPU
MAC
Port 0
MAC
Port 2
MAC
Port 3
TXT
FIFO
TXT
Queues
MAC
Port 4
MAC
Port 5
Forwarding
Controller
TXT
Buffer
MAC
Port 27
RCV
FIFO
RCV
Buffer
TCAM
SRAM
From
Switch
Fabric
To
Switch
Fabric
Details of This Example Are in the Appendix

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Ingress Flow: MAC Port

Physical layer functionality is terminated
prior to entering the port-ASIC, that is:
Encoding
Power over Ethernet
Etc.
The MAC ports main function is to

implement Ethernet Media Access
Control
The MAC port function also adds the
24B internal header, which may be
modified later
This header is used to guide the packet
through the switch to its destination
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
The packet is then passed to the

RCV FIFO
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Ingress Flow: RCV FIFO

The packet enters the RCV FIFO from
the MAC port
There is one physical memory divided
into multiple logical RCV FIFOs to
serve all of the MACS on the Port
ASIC
One FIFO per port
The RVC FIFO absorbs time so the
forwarding controller to do its job
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
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Ingress Flow: Forwarding Controller

The forwarding controller reads the
24 Byte header and up to 200 Bytes
of the packet and performs
Forwarding lookups
QoS labeling
Marking (packet dropping is not performed
at this point)
ACL lookup
After the header is updated to the

RCV FIFO, the packet is passed to
the RCV buffer
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
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Ingress Flow: RCV Buffer

The packet enters the RCV buffer while
it waits for internal ring access
This is where the two manageable
ingress queues can be configured and
packets can be dropped
SRR is performed on these queues
WTD can be/is also performed here
Each buffer:
Is shared (common) between all flows
Minimum buffer space can be configured to
makes sure ports are not buffer starved
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
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Ingress Flow: Ring Insert

At this point the port ASIC sends the
packet to the Switch Fabric via a
point-to-point local ring connection.
DLAP-PP is used by the Port ASIC
The packets will be sent or received
only on a local ring for the corresponding
ports. If a packet arrives on the other
ring it is ignored
The three local ports connected to a
Port ASIC are configured to be in
DLAP-PP mode
Can transmit whenever required. No tokens
All packets are received
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
All frames stripped

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Port ASIC Egress Flow

To
CPU
MAC
Port 0
MAC
Port 2
MAC
Port 3
TXT
FIFO
TXT
Queues
MAC
Port 4
MAC
Port 5
Forwarding
Controller
TXT
Buffer
MAC
Port 27
RCV
FIFO
RCV
Buffer
TCAM
SRAM
From
Switch
Fabric
To
Switch
Fabric
Details of This Example Are in the Appendix

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Egress Flow: Ring Copy

At this point the packet enters the
Port ASIC from the point-to-point ring
that connects the port ASIC to the S
witch Fabric
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
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Egress Flow: TXT Buffer

At this point the TXT queues control
what happens to the packets in the
TXT buffer
The TXT buffer performs packet drops
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
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Egress Flow: TXT Queues

There are four queues per MAC port
Each queue is highly programmable
The queues are scheduled with SRR
and are susceptible to WTD
Each buffer:
Is shared (common) between all flows
Minimum buffer space can be configured to
makes sure ports are not buffer starved
There also are 16 queues for the CPU.

Each queue is statically allocated and
dedicated to a different protocol
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
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Egress Flow: TXT FIFO

The packet enters the TXT FIFO from
the TXT buffer
There is one physical memory
divided into multiple logical TXT FIFOs
to serve all of the MACS on the
Port ASIC
One FIFO per port
The TXT FIFO absorbs time so the
forwarding controller to do its job
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
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Egress Flow: Forwarding Controller

The forwarding controller reads the 24B
header + the first 200 B of the frame
The controller performs:
Rewrites for the MAC header
Time To Live (TTL) decrements
Checksum calculation
SPAN coordination
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
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Egress Flow: MAC Port

The packet is received from the
TXT FIFO
The MAC port function performs all
Ethernet Media Access Control
The MAC port function strips the
24B internal header
All physical layer functionality is
performed after leaving the port
ASIC function
Encoding
Power over Ethernet
Port
ASIC
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ASIC
Port
ASIC
Etc.
P
H
Y
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CPU Flows
Flows Eligible for CP Forwarding Are:
Control plane traffic
Management traffic
Stack
PHY
Switch Fabric
TCAM overflow traffic

ACL overflow
Port
ASIC
Modular PHY
MAC entry overflow
Port
ASIC
Port
ASIC
P
H
Y
PS
HRC
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
P
H
Y
CPU
P
H
Y
Routing table overflow
Special protocol flows, these

are typically low volume
and unofficially supported
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CPU Flows: To the CPU

To hit the CPU the packet must first
enter the system
The packet follows the typical egress
path, because the CPU is treated like
any other port
From Switch Fabric
TXT buffer
TXT queues
TXT FIFO
Forwarding controller
Off of the Port ASIC to the CPU
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
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CPU Flows: Reentry

The packet returns to the Port ASIC
from the CPU and then follows the
typical ingress path
RCV FIFO
Forwarding controller
TXT buffer
Switch Fabric
After this it follows the transmit path

to its destination port
Port
ASIC
Port
ASIC
Port
ASIC
P
H
Y
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2006 Cisco Systems, Inc. All rights reserved.

2006 Cisco Systems, Inc. All rights reserved.

Questions We Will Answer Today

2006 Cisco Systems, Inc. All rights reserved.

2006 Cisco Systems, Inc. All rights reserved.

Catalyst 3750 and 3750E Stackable

Catalyst 3560 Aggregation Models

Stackable means that it has stacking capability; either StackWise

2006 Cisco Systems, Inc. All rights reserved.

Main E-Series Feature Differentiators

Hardware-based per port power monitoring and policing

Supports ePOE, Up to 40 ports at 20W each

IPv6 Multicast Routing

2006 Cisco Systems, Inc. All rights reserved.

Images for Non-E-Series

1. IP-Base (L2,Stub routing, IP ACLs)

2006 Cisco Systems, Inc. All rights reserved.

One Universal Image for E-Series

2006 Cisco Systems, Inc. All rights reserved.

Do I Need to Upgrade My New Switch?

Upgrade is only required in two situations:

The classic Catalyst 3750 switches will continue to

2006 Cisco Systems, Inc. All rights reserved.

License Installation (Upgrade)

TFTP license file into flash

2006 Cisco Systems, Inc. All rights reserved.

show license status [switch <switch_id>]

2006 Cisco Systems, Inc. All rights reserved.

2006 Cisco Systems, Inc. All rights reserved.

Dual Mode PHY

Switch-to-Switch communication and synchronization

2006 Cisco Systems, Inc. All rights reserved.

Dual Mode PHY

128Gbps switching Fabric

64 Gbps Ring Stackwise Plus

2006 Cisco Systems, Inc. All rights reserved.

Ring View of the Switch Fabric

Dual Mode PHY

2006 Cisco Systems, Inc. All rights reserved.

Dual Mode PHY

The Port ASIC performs:

The number of Port ASICs varies, depending on media speed

2006 Cisco Systems, Inc. All rights reserved.

Dual Mode PHY

Copy first 200 bytes of

2006 Cisco Systems, Inc. All rights reserved.

Dual Mode PHY

2006 Cisco Systems, Inc. All rights reserved.

Switch# show sdm prefer routing

2006 Cisco Systems, Inc. All rights reserved.

Dual Mode PHY

All media conversion

2006 Cisco Systems, Inc. All rights reserved.

Dual Mode PHY

24 X 1G ports per POE per chipfull 15.4W POE

2006 Cisco Systems, Inc. All rights reserved.

Catalyst 3750 Hardware Differences

3750 and 3750-E Main Architectural Differences:

2006 Cisco Systems, Inc. All rights reserved.