Assignment
Assignment
on IGBTs-1.
1. IGBT possess
a) low input impedance
b) high input impedance
c) high on-state resistance
d) second breakdown problems
View Answer
Answer: b
Explanation: Like MOSFET IGBT possess high input impedance.
2. IGBT & BJT both posses ___
a) low on-state power losses
b) high on-state power losses
c) low switching losses
d) high input impedance
View Answer
Answer: a
Explanation: Low on state power loss is one of the best parameters of both BJT &
the IGBT.
3. The three terminals of the IGBT are
a) base, emitter & collector
b) gate, source & drain
c) gate, emitter & collector
d) base, source & drain
View Answer
Answer: c
Explanation: IGBT is a three terminal device. It has a gate, a emitter & a collector.
4. In IGBT, the p+ layer connected to the collector terminal is called as the
a) drift layer
b) injection layer
c) body layer
d) collector Layer
View Answer
Answer: b
Explanation: It is called as a injection layer, because it injects holes into the n - layer.
5. The controlling parameter in IGBT is the
a) IG
b) VGE
c) IC
d) VCE
View Answer
Answer: b
Explanation: The controlling parameter is the gate to emitter voltage, as the device
is a voltage controlled device.
6. In IGBT, the n- layer above the p+ layer is called as the
a) drift layer
b) injection layer
c) body layer
d) collector Layer
View Answer
Answer: a
Explanation: It is called as the drift layer because its thickness determines the
voltage blocking capabilities of the device.
7. The voltage blocking capability of the IGBT is determined by the
a) injection layer
b) body layer
c) metal used for the contacts
d) drift layer
View Answer
Answer: d
Explanation: The drift layer which is a n - layer determines the voltage blocking
capabilities.
8. The controlled parameter in IGBT is the
a) IG
b) VGE
c) IC
d) VCE
View Answer
Answer: c
Explanation: The controlling parameter is the gate to collector current.
9. The structure of the IGBT is a
a) P-N-P structure connected by a MOS gate
b) N-N-P-P structure connected by a MOS gate
c) P-N-P-N structure connected by a MOS gate
d) N-P-N-P structure connected by a MOS gate
View Answer
Answer: c
Explanation: The IGBT is a semiconductor device with four alternating layers (P-N-PN) that are controlled by a metal-oxide-semiconductor (MOS) gate structure without
regenerative action.
10. The major drawback of the first generation IGBTs was that, they had
a) latch-up problems
b) noise & secondary breakdown problems
c) sluggish operation
d) latch-up & secondary breakdown problems
View Answer
Answer: d
Explanation: The earlier IGBTs had latch-up problems (device cannot turn off even
after the gate signal is removed), and secondary breakdown problems (in which a
localized hotspot in the device goes into thermal runaway and burns the device out
at high currents).
[3] To turn off a SCR, the reverse bias should be applied for a period ....... the turnoff time of the SCR
(a) Equal to
(b) Longer than
(c) Less than
(d) Irrespective of
Answer: B
[4] In class A and class B commutation the resonating circuit has to be
(a) Over damped
(b) Critically damped
(c) Under damped
(d) Negatively damped
Answer: C
[5] In phase controlled rectification power factor (PF)
(a) Remains unaffected
(b) Improves with increase of firing angle
(c) Deteriorates with increase of
(d) Is unrelated to
Answer: C
[6] Comparing with the full wave rectifier using two diodes, the four diode bridge
(d) Either a or c
Answer: D
[12] The cycloconverter require natural or forced commutation as under
(a) Natural commutationin bothstep-up and step down cycloconverter
(b) Forced commutation in both step-up and step-down cycloconverter
(c) Forced commutation in step-up cycloconverter
(d) Forced commutation in step-down cycloconverter
Answer: C
[13] In synchronized UJT triggering of an SCR, voltage VC across capacitor reaches
UJT threshold thrice in each half cycle so that there are three firing pulses during
each half cycle. The firing angle of the SCR can be controlled
(a) Once in each half cycle
(b) Thrice in each half cycle
(c) Twice in each half cycle
(d) Four times in each half cycle
(e) None of the above
Answer: A
[14] In a GTO, anode current begins to fall when gate current
(a) Is negative peak at time t=0
(b) Is negative peak at t = storage period tS
(c) Just begins to become negative at t = 0
(d) Is negative peak at t = (tS + fall time)
Answer: B
[15] The SCR can be turned on by
(a) Applying anode voltage at a sufficiently fast rate
(b) Applying sufficiently large anode voltage
(c) Increasing the temperature of SCR to a sufficiently large value
(d) Applying sufficiently large gate current
OPTIONS:
1) A, B
2) C, D
3) B, C
4) A, B, C, D
5) None of the above options
Answer: 4
Solution Hint:
[6] The PIV of diodes used in the full wave rectifier using two diodes is 2 times that
of the four diode bridge rectifier
BJT.
2.
Power dioed.
3.
MOSFET.
4.
None of above.
2. Depending upon the switching recovery time and on state drop, the power
diodes are types
1.
2.
3.
4.
None of these.
3. The trapped energy of an inductive load can be feed back to the input supply
through a diode known as
1.
Zener diode.
2.
3.
Powe diode.
4.
None of these.
IGBTs.
2.
COOLMOS.
3.
TRIAC.
4.
SITS.
SIT.
2.
BJT.
3.
TRIAC.
4.
IGBT.
6. A schottky device is a
1.
2.
3.
4.
Both B and C.
BJTs.
2.
MOSFETs.
3.
IGBTs.
4.
All of above.
2.
3.
4.
9. Optocouplers combine
1.
2.
3.
4.
2.
3.
4.
None of these.
2.
3.
4.
None of these.
12.The reverse recovery time of diode is trr = 3 s and the rate off all of the
diode current is di/dt = 30 A/s. The storage charge current Q RR is
1.
130 s.
2.
135 s.
3.
140 s.
4.
145 s.
13.The turn-on time of a SCR with inductive load is 20 s. The puls train
frequency is 2.5 KHz with a mark/space ratio of 1/10, then SCR will
1.
Turn on.
2.
3.
4.
100 W.
2.
1000 W.
3.
500 W.
4.
None of above.
15.For a diode, reverse recovery time is defined as the time between the instant
diode current becomes zero and the instant reverse recovery current decays
to
1.
0.
2.
3.
4.
PIV.
2.
Temperature.
3.
Storage change.
4.
17.The softness factor for soft recovery and fast recovery diodes are respectively
1.
1, 1.
2.
1, >1.
3.
<1, 1.
4.
1, <1.
2.
3.
4.
IGBT.
2.
FCT.
3.
MCT.
4.
GTO.
4. For dynamic equalizing circuit used for series connected SCRs, the choice of C is
based on:
a) Reverse recovery characteristics
b) Turn-on characteristics
c) Turn-off characteristics
d) Rise time characteristics
10. A resistor connected across the gate and cathode of an SCR in a circuit
increases its
a) dv/dt rating
b) Holding current
c) Noise Immunity
d) Turn-off time