Quartz Crystal Oscillator Circuits Design Handbook
Quartz Crystal Oscillator Circuits Design Handbook
Quartz Crystal Oscillator Circuits Design Handbook
Approved by:
Prepared by:
~~~
D. Firth
Electrical Engineer
The Magnavox Company
,-
H. G. Stewart
Manager, Communications,
Navigation, and Electronic
Warfare Engineering;
The Magnavox Company
NJlI
REPRODUCED BY,
u.s. Department of Commerce
National Technical Information Service
Springfield, Virginia 22161
Itl
ACKNOWLEDGMENTS
TABLE OF CONTENTS
Paragraph
Title
LIST OF ILLUSTRATIONS
LIST OF TAB LES
xxiv
LIST OF SYMBOLS
xxvii
INTRODUCTION
,
'
xiv
xxxvii
SECTION 1
QUARTZ CRYSTAL CHARACTERISTICS
1-1
GENERAL
1-2
1-3
RELATIONSHIP OF R 1 TO R r .
15
1-4
19
20
1-6
24
1-7
34
1-8
37
40
1-10
CRYSTAL rr NETWORK
43
1-11
43
1-12
Crystal
1-5
1-9
L~ading
Due to R
46
TABLE OF
coNt ENTS
Paragraph
(Cont)
Title
1-13
48
1-14
Effect of C i
48
1-15
Effect of Hj
48
1-16
50
SECTION 2
APPLICATION OF QUARTZ CRYSTALS TO
OSCILLATOR DESIGN
2-1
GENERAL
55
2-2
55
2-3
56
SECTION 3.
AMPLIFIER CHARACTERISTICS
3-1
GENERAL
3-2
3-3
:1
61
"
..
61
62
64
3-5
65
3-6
TRANSISTOR AMPLIFIERS
. . .
66
3-7
67
3-8
68
3-4
ii
..
Title
Common-Base to Common-Emitter "h" Parameter
Convers ions . . . . . . . . . . . . . . . . . .
69
3-10
69
3-11
70
3-12
71
3-13
74
3-14
79
3-15
80
3-16
81
3-17
88
3-18
91
3-19
92
92
3-21
98
3-22
99
3-23
100
3-24
104
108
111
3-25
3-26
iii
Title
SECTION 4
IMPEDANCE TRANSFORMING NETWORKS
116
4-1
GENERAL
4-2
IT
NETWORK
117
4-3
IT
Network Design
120
4-4
122
4-5
INDUCTIVE" TRANSFORMER
125
4-6
THE AUTOTRANSFORMER
130
4-7
134
SECTION 5
GENERAL OSCILLATOR TOPICS
5-1
137
5-2
141
5-3
143
5-4
146
SECTION 6
VACUUM TUBE SERIES RESONANCE
OSCILLATOR DESIGN
iv
147
6-1
GENERAL
6-2
148
6-3
152
6-4
152
Title
6-5
Diode Limiting . .
155
6-6
156
6-7
159
164
6-9
DESIGN EXAMPLES, 90 KC TO 60 MC
172
6-10
172
6-11
173
6-12
175
176
6-14
179
6-15
180
6-16
181
6-17
182
189
190
194
6-8
6-13
I'
6-18
6-19
6-21
6-22
'. .
197
200
Title
Page
6-23
202
6-24
204
6-25
Amplifier Characteristics
206
6-26
208
6-27
209
6-28
DESIGN EXAMPLES
210
6-29
210
6-30
1 to 16 KC Series Oscillator . .
212
6-31 .
214
6-32
Two-Stage Oscillators . . . .
218
SECTION 71
TRANSISTOR SERIES RESONANCE OSCILLATOR DESIGN
vi
7-1
GENERAL
......................
224
7-2
225
7-3
226
7-4
228
7-5
228
7-6
229
7-7.
232
7-8
235
Title
Page
7-9
7-10
236
7 -11
238
7-12
239
7-13
240
7 -14
DESIGN EXAMPLES .
241
7-15
241
7 -16
245
7-17
248
7-18
252
7 -19
252
7-20
Amplifier Characteristics .
255
7 -21
256
7 -22
257
7 -23
258
7 -24
260
7-25
260
7-26
Amplifier Stability . . . . . .
261
7-27
262
vii
TABLE OF CONTENTS
Paragraph
Title
7-28
262
7-29
262
7-30
262
263
7-32
264
7-33
264
7-34
266
7-35
DESIGN EXAMPLES
267
7-36
193-MC Oscillator
267
7-37
150-MC Oscillator
270
7-38
120-MC Oscillator
272
7-39
75-MC Oscillator.
277
7-40
280
7-41
282
7-42
Amplifier Characteristics .
282
7-43
282
7-44
Crystal Dissipation . . .
286
7-45
286
7-31
viii
(Co~)
Title
DESIGN PROCEDURE FOR SERIES RESONANCE
TRANSISTOR OSCILLATORS, 90 TO 500 KC
288
7 -47
Noteworthy Points
288
7-48
290
7-49
291
7-50
292
7-51
Amplifier Characteristics
292
7-52
293
7-53
DESIGN EXAMPLES
296
7-54
296
7-55
301
7-56
305
7-57
311
.............
SECTION 8
TRANSISTOR ANTI-RESONANT OSCILLATOR
DESIGN
8-1
8-2
8-3
319
8-4
321
8-5
321
314
316
ix
Design Approach .
322
8-7
324
8-8
Effect of C r
326
8-9
Effect of R r
328
8-10
330
R
Behavior of Rand R T as a Function of =R-....;.e- and
X
-~
em~
Leff
.
Rem~
334
8-12
337
8-13
338
8-14
341
8-15
343
8-16
IlESIGN EXAMPLES
353
8-17
354
8-18
358
8-19
362
8-20
367
8-21
368
8-22
370
8-11
Title
Title
8-23
379
8-24
380
385
390
395
401
405
8-25
8-26
8-27
8-28
8-29
SECTION 9
VACUUM TUBE ANTI-RESONANCE OSCILLATOR
DESIGN
9-1
INTRODUCTION
9-2
410
9-3
410
9-4
Oscillator Configuration . .
415
9-5
417
9-6
420
9-7
421
9-8
~elationship
408
424
xi
Page
. ."
429
431
9-10
9-11
433
9-12
433
9-13
434
9-14
DESIGN EXAMPLES . . . .
443
9-15
443
9-16
443
9-17
444
9-18
445
9-19
446
447
9-2.1
447
9-22
448
9-23
449
9-24
451
455
9-20
9-25
xii
Title
Title
20-MC Triode (6CW4) Isolating Resistor Pierce
Oscillator Evaluation Data . . . . . . . . .
458
461
464
467
9-30
470
9-31
9-32
470
SECTION 10 - BIBLIOGRAPHY . . . . . . . . . . .
471
9-27
9-28
9-29
..
....
470
xiii
LIST OF ILLUSTRATIONS
Title
Figure
xxxvii
1-1
1-2
Impedance z
Resistance R e , Reactance X e , and
Series Arm Reactance Xl for a Crystal as a Function of Frequency ... . . .
1-3
1-4
1-5
14
1-6
d/dQs at
15
1-7
I I,
0 as a Function of Xc /R 1
o
16
17
1-8
Relationship Between
1-9
1-10
20
1-11
23
1-12
33
1-13
37
38
1-15
40
1-16
1-17
1-14
xiv
and R1
1\ =
R1
1/3 ~ max
18
42
44
Title
1-18
54
2-1
57
3-1
62
3-2
68
3-3
72
3-4
75
3-5
80
3-6
81
82
82
86
93
94
3-12
95
3-13
101
3-14
103
3-7
3-8
"3-9
3-10
3-11
.....
xv
3-15
Cir9~it
105
3-16
109
3-17
112
4-1
117
4-2
7T
Network Transformations
118
4-3
7T
120
4-4
Example of
4-5
4-6
Inductive Transformer . . .
126
4-7
Autotransformer Relationship
131
4-8
133
4-9
134
4-10
135
5-1
138
5-2
142
5-3
144
6-1
147
6-2
150
6-3
xvi
Title
7T
Network Design
123
..
. .. .
124
153
Title
6-4
155
6-5
160
6-6
Oscillator Relationships . . . . . .
163
6-7
169
6-8
175
6-9
178
6-10
181
6-11
184
6-12
188
6-13
191
6-14
Chass is Layout . . . . . . .
191
6-15
192
6-16
192
6-17
194
6-18
195
195
6-20
197
6-21
197
6-19
xvii
Title
Frequency Vs. Temperature, 200-MC Tube Oscillator
(8058) . . . . . . . . . . . . . .
....
198
6-23
201
6-24
201
6-25
202
6-26
204
6-27
207
6-28
215
6-29
215
6-30
216
6-31
218
6-32
219
6-33
220
Os~illator
6-34
6-35
7-1
222
226
7-2
227
7-3
231
xviii
220
Title
Crystal Unit and Emitter Waveforms of a I-MC Series
Oscillator . . . . . . . . . . . . . . . . . . . . . .
233
237
244
247
251
256
7-10
258
7-11
263
7-12
267
7-13
7-14
270
7-15
271
7-16
271
7-17
272
7-18
274
7-19
274
7-5
7-6
7-7
7 -8
7-9
268
xix
275
7-21
277
7-22
278
7-23
280
7-24
281
7-25
287
7-26
xx
Title
289
7-27
294
7-28
296
7-29
301
7-30
302
7-31
305
7-32
307
7-33
309
7-34
311
7-35
312
Title
8-1
315
8-2
318
8-3
Value of X
8-4
319
322
8-5
323
8-6
324
8-7
8-8
"
331,
335
8-9
336
8-10
8-11
8-12
8-13
8-14
8-15
340
343
357
360
365
367
xxi
Figure
383
388
393
399
403
9-1
409
9-2
412
9-3
Value of X
or X e for a 300r 32-PF Loading
CL
Capacitor . . . . . . . . . . . . . . . . .
413
415
9-5
418
9-6
419
9-7
422
9-8
442
9-9
452
9-10
455
456
8-16
8-17
8-18
8-19
8-20
9-4
9-11
xxii
Title
9-12
458
459
461
462
464
465
467
9-13
9-14
9-15
9-16
9-17
xxiii
LIST OF TABLES
Title -
Table
1-1
1-2
1-3
1-4
1-5
31
1-6
32
1-7
48
3-1
83
3-2
84
3-3
87
3-4
89
3-5
90
3-6
97
4-1
128
149
6-1
6-2
max
Characteristics . . . . . . . . . . . .
xxiv
28/30
158
6-3
193
6-4
196
Title
6-5
6-6
....
199
203
6-7
206
6-8
215
6-9
217
221
223
225
253
7-3
255
7-4
259
7-5
269
7-6
273
7-7
276
7-8
279
7-9
283
300
6-10
6-11
7-1
7-2
7-10
.,
xxv
Table
7-11
7-12
306
310
313
8-1
317
8-2
320
8-3
406
9-1
411
9-2
414
9-3
Values of V7T
416
7-13
9-4
9-5
9-6
...
424
427
431
9-7
Typical Triode
9-8
xxvi
C~aracteristics
437
468
LIST OF SYM:BOLS
AV
TT
Cs
xxvii
C..Q..
Co(p)
d
df
Af
xxviii
fa
f'a
r~sonance
frequency.
Gv
GvL
GVO
GVR
xxix
hfb
KC
MC
MW
xxx
Mutual inductance.
XCo/Hl'
PF
Picofarads.
PPM
Pc max
PDmax
xxxi
Re'
.Rin(p)
R'r
xxxii
Part of Rr-
1T
R rmax
Rrr min
Minimum value of
Rrr.
Rrr max
Maximum value of
Rrr.
7T
network as viewed
I'K
RK and rK in parallel.
Load resistance of an impedance-transforming network.
Defined in Section 3 -13 .
Voltage transformation ratio of an impedance transforming
network.
xxxiii
11
X'
Xc o
xxxiv
Reactance of Cb' e.
Reactance of Ccb'.
XC.Q.
Reactance of C1.'
XC(p)
Reactance of C(p)'
Reactance of Cr'
Xe
XCL'
Reactance of C K .
Reactance of crystal unit motional arm inductance.
XLeff
XL(s)
Y, Y
Admittance.
Grounded cathode triode input admittance due to feedback
via C pg '
Defined in Section 3-25.
Defined in Section 3 -25.
Total load impedance seen by amplifier in basic Pierce circuit.
Transistor common-base current gain.
Low frequency value of Ci.
xxxv
INTRODUCTION
(b)
That is, the power fed back to the input of the amplifier which maintains the
oscillation because of its capability of providing power gain, must be such that
the amplified output power is just sufficient to supply the oscillator output power,
the circuit losses, and th.e amplifier input power. If this equality did not occur
the feedback power would be either too large, causing the oscillation amplitude
to grow, or too small, in which case the oscillation would decrease; the conditions of oscillation growth or decay being maintained until the unity loop gain
condition is fulfilled.
This behavior also defines a further circuit requirement. Since at the
commencement of oscillation the oscillation amplitude must grow from zero to
a finite value and then stabilize, the circuit must initially provide a loop gain
in excess of 1 to allow this buildup to occur. This loop gain must then decrease
to unity at the desired oscillator power output level, thereby stabilizing the
oscillation amplitude. This action is usually obtained by relying on the nonlinear characteristics of over-driven amplifiers. The power gain of amplifiers
tends to decrease with increasing signal level, thereby providing the necessary
loop, gain reduction as the oscillation grows. Condition (a) can therefore be more
accurately stated as:
(a ') Under small signal conditions, the loop gain must be greater
than unity.
These conditions can be defined in terms of Figure 1.
All sinusoidal electronic oscillators can be considered as consisting of
a power amplifier and a network which selects a portion of the amplifier output
power and returns it to the amplifier input.
Figure 1 (a) shows a generalized oscillator circuit of this form, and
Figure 1 (b) shows the same circuit with the feedback connection broken at point
A. In the latter circuit an additional load Z I F' equal to the input impedance of
the feedback network Z F when terminated by the amplifier input impedance, is
xxxvii
placed across the amplifier output. (The prime sign is used to avoid ambiguity
in the following discussion.) The amplifier is therefor,e terminated in identical
loads in both (a) and (b) of Figure 1.
FEEDBACK NETWORK
POWER ATTENUATION : Ap
VOLTAGE ATTENUATION Av
...
ZF
P
F
&..
,1/
/1'\ A
AMPLIFIER
POWER GAIN : Gp
VOLTAGE GAIN: GV/tPA
,Zln
PT=PF+PL
Vo
OSCILLATOR <)
LOAD Z L >
1
(0)
r+-
FEEDBACK
NETWORK
ApI AV/jJF
---
- 1P
F
P
T
AMPLIFIER
Gp'
~/tPA
PL
V
o
'V
(
(
>
c>
~ ZL ~c>
ZI
F
TP 1072-146
xxxviii
(b)
xxxix
taken inits use, since, like all devices, its good characteristics can only be
applied advantageously under certain conditions of operation.
It is the purpose of this handbook to define these conditions of usage so
that misapplication will be avoided and to detail acceptable oscillator design
methods which will ensure this. The design methods developed are all based
on the loop gain and phase concept used in the preceding discussion. Practical
oscillator design examples are included together with evaluation data obtained
from the oscillators constructed from these designs.
xxxx
xxxxi
SECTION 1
QUARTZ CRYSTAL CHARACTERISTICS
1-1.
GENERA L
(a)
The high effective Q; that is, the high ratio of energy stored
in the crystal relative to the energy dissipated in storing that
energy.
(b)
(c)
These three properties account for their wide use in stable oscillator
designs.
The simple eqUivalent electrical circuit of a quartz crystal resonator at
frequencies close to that of the mechanical resonance is shown in Figure 1-1.
L l and C1 are primarily dependent on the mass and compliance of the quartz.
RI which represents. the. losses of the circuit is, in the common type of crystal
unit discussed here, mainly attributable to damping resulting from the electrodes, the crystal mounting structure, and the internal friction.
;:::::: Co
Xe
TPI072 -I
( 0)
Figure 1-1.
( b)
200 KC
2 MC
30 MC
~.
2K
100 ohms
20 ohms
L1
27 H
520 MH
11 MH
C1
0.024 PF
0.012 PF
0.0026 PF
Co
9 PF
4 PF
6 PF
18 x 10 3
54 x 10 3
10 5
At very high frequencies, the parasitic reactive elements of the mechanical mount start to influence the ov~rall characteristics of the device. The input
lead inductance then has a noticeable effect, and the shunt capacitance Co can no
longer be regarded as a lumped element. However, from the oscillator design
viewpoint, these effects while noticeable, do not invalidate the simple equivalent
circuit of Figure 1':"1 and are only mentioned to show that these effects occur.
This equivalent circuit is only representative of the electrical characteristics of a crystal over a limited frequency range. Every mechanical structure has several modes of resonance. A -simple bar, for example, has flexural,
torsional, shear, and extensional modes of oscillation in each of three axes.
Furthermore, mechanical resonance can be excited at the overtones of each of
these basic modes. The manufacturer shapes, proportions, and clamps the
crystal so as to make one of these mechanical resonances predominant, while
suppressing all others that may occur at frequencies immediately adjacent to
this desired one. If, as is normally the case, sufficient suppression of the
undesired resonances is achieved, the circuit of Figure 1-1 is a valid electrical
equivalent of the electromechanical characteristics of the crystal in the frequency band immediately around the predominant mechanical resonance frequency
and, with a change of component values, at overtone frequencies.
With this restriction, the behavior of the quartz crystal can be discussed
in terms of the electrical equivalent circuit of Figure 1-1 (a), where L , C ,
1
1
R1 , and Co are essentially independent of frequency. This circuit can be considered as a series combination of an equivalent resistance R e and reactance X e ,
as shown in Figure 1-1 (b). The values of Re and X e are frequency dependent
and vary in the general manner indicated in Figure 1-2 as functions of frequency.
The various symbols are defined in Table 1-2.
/:
I
I
I
I
1 I
I I I
- - - - - -1- t -t- - - - - - - - - - - -
I I
I
fm f s f r
TP 1072-2
+I
fa
I
1
fp
fn
+-+ --
x co
FREQUENCY
...........
Definition
Capacitance ratio =
fm
Resonance frequency (X e = 0)
Antiresonance frequency (Xe
Parallel resonance frequency
0)
=...1.
2'TT
J1/2
[
1
L C
1
(1 + !).
1
0)
I I
TABLE 1-3.
Rs
(01
Rs
--
Rs
LDR'
f' cOR.
.1
(d)
Ls =
Rp
(bl
--
RS
Xl (1
+~)
Rr
R1 (1
+ Q/)
Qr .
Rp
R 2
[ 1+1 P
wZL pZ
LS
LDR. -Ls
Xc
L. [,
Rs
Lp
Rp :
'L.[ ~~;J
~;~:i
[ I+ _
h _s
Rl
= R p [ I ;OZJ
: Rs [I
L, [1+W'"~.,J 'L, [I
Rs
~ RsiJ
+ w 2 Cs
C : Cs
[ l+w 2 C1 Z R 2
P
S S
+ OZ ]
~,J
Rs [ 1 + QZJ
Cs
-1- ]
1+
~Z
(1-1)
0
and
where
Qr
=:
Xl
R
at frequency f
(1-2)
(1-3)
Equation (1-1) shows that when Q r is much smaller than 1, .the equivalent
parallel inductive reactance of the motional arm is much larger than Xl and
can, for a suitable value of Qr' resonate with X . Equation (1-2) shows that
Co
the equivalent resistance of the crystal at resonance differs from R1 by the
factor (1 + Q/). However, since Qr is much smaller than 1, the difference is
small and ~ is usually only slightly greater than ~.
As the frequency is further increased, the crystal impedance increases
rapidly until at frequency fa' X e again falls to zero and R e has the value R a . At
this frequency the equivalent motional arm inductance Xl again resonates with
Co, and Equations (1-1) and (1-2) can be restated as:
X
1
Xl (1 + -2)
Xc
Qa
(1-4)
0
R a == R 1 (1 + Qa )
where
Xl
Qa
Ra
at frequency f
(1-6)
Xl
(1-7 )
At fa' however, Qa
Xp
(1-5)
X 2
1
R1
(1-8)
Other frequencies of less interest are fm and fn , the frequencies at which the
crystal exhibits its minimum and maximum impedances, respectively, and f p ,
the frequency at which the motional arm reactance is equal to that of Co. It
should be noted that f p does not quite coincide with the antiresonance frequency
fa because of the presence of R1 in the motional arm. The difference is, however, at the most only a few parts in a million.
An indication of the bandwidth in which these effects occur may be obtained by noting that, for most crystals, the capacitance ratio r lies between
200 and 500. Substituting a typical value of r == 300 into the equation given in
Table 1-2 for f p , the ratio of f to f obtained is:
p
s
(1 +
~)
1/2
~
+....!.2r
==
1. 0017
(1-9)
For example, If f s =l Mc;, then the bandwidth within which the crystal resonance
effects occur will be typically les s than 2 KC.
The spacing between f s and f r is very small; frequency differences of 1
or 2 parts per million are typical. The frequency difference between f s and fm
is equal to that between f s and fro
The electrical impedance of a crystal unit can also be presented as an
impedance plane loci as shown in Figure 1-3, provided that:
(1-10)
RESISTANCE
+
w
z
~
fp
U
<X
cr
TPI072-3
Figure 1-3.
1-2.
(a)
Alone
(b)
(c)
Therefore:
d(XC )
1
(1-13) .
dw
O~I
z
TPI072-11
Since the frequency band of interest is between f s and f p ' u' can be replaced in Equation (1-13) by:
ul s + l:::.w
(1-14)
(1-15)
where:
.<;;
P-
Ws
<rh~ typical
,<'
maximum value of
'
(1-16)
~
W
':',
(1-17 )
(1-18)
(1-19)
- L1
(1-20)
xL
= WL1
(1-21)
(1-22)
Therefore:
d(XL)
1
dw
The two reactances XLI and XCI' therefore, have the same differential
with respect to frequency but are of opposite sign.
combination of the two is, therefore:
d(X L
- Xc )
dw
= 2 L
(1-23)
= XL
- Xc
(1-25)
1
The value of X s at frequency f s is zero and, consequently, for fre-:quencies between f s and f p :
(1-26)
where Af is the incremental frequency change from f s'.
As derived, Equation (1-26) is only valid for frequencies between f s and
f p , but is equally valid over a similar range of frequencies immediately below f s '
Using the value of X s obtained from Equation (1-26), the equation for the
crystal impedance is:
.-j X Co (HI + j 477 L Af)
1
(1-27)
z
HI + j (477 L I 6.f - Xc )
o
Defining Q s as:
(1-28)
10
(1 + j Q s )
(1-29)
Co
R1
(1-30)
+ j
1]
(1-31)
2R
o > 1
(1-32)
(1-33)
11
For
< 1,
the crystal always has a reactive component and resonance does not occur.
Equation (1-32) establishes a limiting condition of operation for the crystal alone if it is to exhibit a resonance characteristic. (In the literature the
ratio Xc /R1 is frequently referred to as the Figure of Merit M. A crystal unit'
o
with M = 2, is therefore only just capable of achieving resonance.)
This is not, however, the only requirement that has to be satisfi~d. The
main concern is with the rate of change of phase angle with frequency capability
of ~he ~rystal, and this further lil?its the permissible minimum value of X C /R1 .
This can be determined in the following way:
The phase angle of the crystal is:
tan- 1
(1-34)
tan
R1 (I+Q2)
--X
Co
(1-35) .
. 2R
1 - -- Q
Xc
(1-36)
df
.EL
dQ s
12
.EL
dQ s
dQ s
Af
477 Ll
..QL
R1
dQ s
(1-37)
= d (tan )
dQ s
Id
(tan )
. d
d (tan )
dQ s
(1-38)
(b)
(c)
(d)
The maximum value of d/dQs always occurs when the crystal unit
appears capacitive.
(e)
(f)
In the light of this behavior, it can be concluded that for XCO/Rl values
13
t::S -6
1.0
~/---t/>~
0.8
~~r+--t/>~
_11
_ . . , . - , ~ -ISo
_31 0
0.6
0.4
0.2
dt/>
dO,
10
-0.2
-0.4
-0.6
-0.8
-1.0
LOCI OF MAXIMUM
TPI072-4
d~s
dt/>
dO.
Xc
as a Function of Qs and RIo
this type of operation, and operation with XCo/~ values of less than 3 is not
normally used. When this condition occurs naturally, as it may in crystals
designed for operation at frequencies above' 100 MC, it is normal practice to
place an inductor across the crystal unit to resonate with Co, thereby effectively
increasing the apparent value of Xeo/RI . At all frequencies below 100 MC,
XCo/~ has a value greater than 3, and operation at zero phase angle has negligible adverse effects on the crystal unit phase-changing capabilities. Figure
14
1-6 shows the behavior of d/dQs for zero phase angle operation as a function
of XC / R1 and illustrates the rapid deterioration of d1J/dQs for values of
o
XCo/RJ less than 4.
1.0
0.9
08
07
-- .... -..,V
Ii
06
dO s
I:
05
II ,
I
04
I
I
I
o3
0.2
01
TPI072-12
10
~
R,
RELATIONSHIP OF R1 TO R r
The crystal parameters that are readily measured are R r , the resonance resistance, and Co ~ Before the preceding formulae can be applied to a
doubtful case, it is therefore necessary to determine Rl from R r . Referring
to Figure 1-8 (a), at resonance the crystal unit can be considered as Xc , R r ,
.
0
and XL m parallel, where:
:
P
(1-40)
15
70
Xc
__=10
R1
60
50
40
en
I&J
I&J
a: 30
(!)
I&J
0
I&J
..J
(!)
Z
C(
I&J
20
VJ
C(
:x:
Q.
10
~=2
-10
RI
4
QS =
4 " LI
4f
RI
TPI072-13
16
10
R,
(bI
(Q)
1 PtQ72 .jq
flcfcrrlng
of thc network at
that of X s and Rl
Qs
",1\
(1-41)
Xl-p
fly.
Xs
Xc
[~]
and
u
[ I
,(~:,o)' ]
(1-4:2)
(I-'Ll)
Xc
o
Iftl
(1-44)
/7
1.0
0.9
0.8
0.1
'"
'\
0:6
RI
(0 )
Rr
0.5
""
0,4
0.3
0.2
0.1
..........
--r- r-
I--...
. Rr
QS=--
XC o
\,
'""'-
r--.
.
~ R
Xc
Figure 1-9. Relationship Between __, --.!.,and __
0
,
Xc
18
Rr
R1
operation below I\./X C ratios of at least 0.35 and preferably 0.25 is desirable
o
.. .
if the phase shifting capability of the crystal unit is to be fully utilized. In all
military type crystal units, except those designed for operation above 100 MC,
Rr/X I s of 0.35 or less are guaranteed by their specificatjon. The danger
Co
.
lies in external oscillator capacitance causing the crystal circuit to operate
in this undesired region.
1-4.
The preceding discussion shows that the crystal unit exhibits a high rate
of change of phase angle in the neighborhood of its resonance and anti-resonance
frequencies. Operation of a crystal unit at resonance in an oscillator Circuit is
readily achieved over the entire frequency range of 1 KC to 200 MC.
Operation at anti-resonance is not, however, very practical. In the
first place the crystal unit impeda'nce is very high at the anti-resonance fre-.
quency, and difficulty would be experienced in obtaining suitable matching into
the oscillator circuit. Also, in the majority of crystal unit types, Co has values
in the range of 5 to 10 PF, and oscillator circuit stray capacitance across the
crystal unit terminals could easily introduce an appreciable effective increase
in Co' And since the anti-resonance frequency 'is directly related to Co, a decrease in effective anti-resonance frequency would result, causing the oscillation to occur at a frequency lower than fa' Stray circuit capacitance can vary
markedly between circuits of the same type and can also vary due to aging or
environmental stres s. Furthermore, the effect of a given amount of circuit
strays on the oscillator frequency would vary markedly between crystal units
of the same type, due to differences of their parameters.
All of these factors would lead to oscillator frequency tolerances much
greater than those of the crystal unit alone, and, since the object is to make the
oscillator frequency solely dependent on the crystal unit, this is therefore undesirable. A method of reducing these undesirable effects is to manufacture the
crystal unit so that the equivalent of anti-re'sonance operation occurs at a specified frequency with a specified value of external crystal "loading" capacitance.
In the oscillator circuit the major part of the loading capacitance is then formed
by a variable capacitor, and the circuit stray capacitance constitutes the remaining part. The variable capacitor is adjusted until oscillation, occurs at the
crystal unit frequency.
Placing a loading capacitance C L in parallel with the crystal unit is
equivalent to increasing Co' Therefore, if Co and Xc are replaced by Co + C L
.
0
and X(C + CL)' respectively, in the preceding analysis, Equations (1-27) to
o
(1-44) describe the behavior of this circuit,' If the value of C L is sufficiently
large to make the effect of circuit stray capacitance changes negligible and
19
sufficiently small so that X(C oR: CL) does not approach the limiting value of 2,
the parallel combination of the crystal unit and C L can be used as an anti-resonant circuit at the frequency fla' wherE! fla is the new frequency of anti-resonance
with C L in circuit. This is a possible method of usage in certain frequency
ranges where the conditions placed on CL can be met. Crystal units are made
specifically for operation in this or a very similar manner to be discussed in
the next subsection.
1-5.
(1-45)
O~------------l
XC
Xc
.0
TPI072-16
Z X~:
=
1+
(X
20
CL
Cc1 y[1
__
o_Q
+j
X~
:o)lS+(~o -QsY]
Qs
(1-46 )
Qs
(1m
1 + 2( XCL)
XC o
XC o
-2Rl
-1
(1-47)
XCL)
2Rl ( 1 + -
1+{XCL)
--
XC o
XC o
0)
1/2
XC o
>:i
The condition for Equation (1-47) to have two real roots is that:
> 1
(1-48)
When two real roots occur' the smaller value of Qs obtained from Equation
(1-47) is the value of Qs at which the circuit exhibits resonance characteristics,
and the larger value of Q s corresponds to that required in order that the circuit
appears anti -resonant.
. Equation (1-48) establishes the minimum conditions necessary for the
network to exhibit resonance characteristics. This is not, however, the only
requirement of the network.. The network should not only exhibit resonance and
anti-resonance characteristics, but should also have a large rate of change of
phase angle with frequency. This requirement adds further limitations to the
XCo
XCL
.
values of""R and X- that can be effectively employed.
1
Co
The phase angle of .thenetwork is:
,.;,
'I-'
.-11 -XCR-o
= tan
(1-49)
-Qs
XCL
L
Rl- ( 1 +XC
- - ) + Qs (1 + 2
Xc o
Xc 0
XC o
XC o
XC o
)
(1-50)
Rl
21
(1-51)
XCL'
1 + 2-XC o '
(1-52)
2Rl
~en
d (tan )
dQs
(1-53)
XC o
XCL
.
of - and - - . The curves of Figure 1-11 are obtained from such calculaRl
XC o
.
.
as a function of
dQs'
XCL
XCo
~
Rl
for a crystal unit alone without CL. It, therefore, serves as a reference to which
~
XCL
the values of
obtained for various values of - - can be compared. Using
dQ s
XC o
.
.'
Xc
this comparis on, it is evident that for low values of RIo the degradation' can be
more severe in this case than when the
cry~tal
22
1.0
0.9
0.8
0.7
~---1--0.. 4
0.25
0.6
"'--0.7
d
l1J
0.5
d QS
Xc L
PARAMETER; - -
0.4
X
Co
Co
CL
0.3
0.2
0.1
o
o
10
TPI072-17
..
Figure I-H. d/dQs as a Function of XCo/Hl and XcrlXco
loading capacitor in parallel with the crystal. To illustrate this, Figure 1-11
shows that .JM.. is zero when XC o = 2.8 and Xc L = 0.4. If the same value of
dQ s
Rl
XC o
of Xc L is in parallel with the crystal, the total parallel capacitance is increased
to:
Co + C L = 3.5 Co
(1~54)
23
0 when:
2.
(1-55),
(1-56)
showing that for: parallel capacitive loading, the ratio XCo/R1 will need to be
greater than 7 for resonance to occur; while for series capacitive loading, the
requirement is that Xc /R 1 be greater than 2.,8. The conclusion to be drawn
from this comparison i~ that whe~ the ratio XCo/R1 is small, parallel capacitive loading is more likely to degrade the phase-shifting capability of the network
than would equal series -capacitive loading.
1-6.
The preceding analyses show three ways in which the quartz crystal unit
can exhibit a high rate of change of phase angle as a function of frequency. These
are:
(a)
(b)
24
Type of operation
(b)
(c)
(d)
(e)
(f)
(g)
(h)
Maximum value of Co
(i)
25
(j)
(k)
(1)
In certain frequency ranges crystal units of the same constructIon are available
26
(a)
The tolerance when operated within a specified narrow temperature range. This is known as the operating-temperature range
frequency tolerance and is the crystal unit manufacturing tolerance plus the tolerance allowed. for the variation of crystal unit
frequency over the small temperature range.
-
(b)
(c)
In both cases, the shock, vibration, and aging frequency tolerances are
additional to the preceding tolerances.
The specified value of maximum equivalent resistance applies throughout the crystal operating temperature range. A typical crystal will usually have
an equivalent resistance considerably smaller than the maximum value, generally one-third to one-half of the maximum. However, the total range of equivalent resistance found in a large batch of crystal units of the same type and frequency may be as great as 9 to 1. Therefore; when oscillators are being produced
in large quantities, this range of equivalent. resistance values is likely to be encountered, and the oscillator circuit must be designed to accept this wide variation and still pe.rform satisfactorily. Field replacement considerations indicate
that this is also advisable when only a few oscillators are involved.
The crystal unit power dissipation rating should not be exceeded under
any conditions of operation. Although crystals can be operated at higher dissipation levels than those specified without catastrophic failure, several undesired effects occur. The coupling into undesired oscillation modes tends to
increase with crystal unit drive level, possibly causing sudden increases in Re ,
particularly as a function of temperature which may in severe cases cause
oscillation to cease.
High crystal unit dissipation is also frequently synonymous with high loop
gain, particularly in vacuum tube circuits,. and this can lead to oscillation at the
crystal unit spurious modes normally occurring at frequencies slightly higher
than f r or f/a' Frequently the crystal unit eqUivalent resistance at these spurious mode frequencies is les s than twice that. at the des ired mode, and the possibility of shock excitation into one of these spurious modes is significant under
high loop gain conditions. f r or ff a are also functions of drive level and can
vary at a rate of from 0.5 to 5 PPM per MW of crystal unit power dissipation.
For crystal units having the latter characteristic, it can readily be seen that a
significant increase in f r or f' a and hence in oscillator overall frequency toler.
ance can be caused by only a few milliwatts of overdrive.
The crystal unit power dissipation in an oscillator circuit depends to a
great extent on the loop power gain, which is in turn dependent on the crystal
eqUivalent resistance. Since the latter has a wide range of variation, the crystal unit dissipation also varies between individual crystal units in a given oscillator circuit. It is good design practice to ensure that, for the worst conditions,
the crystal unit dissipation does not exceed the specified maximum.
A listing of all military standard crystal units is presented in Tables 1-4
through 1-6. Figure 1-12 shows the outline dimensions for crystal units utilizing different holders.
27
CrystalUnIt
Type
Frequency
Range
Mode
CR-18A/U
0.8to20MC
Fundamental
Frequenoy
Toleranoe
Percent (:1:)
0,005
Operating
Temperature
Range
(OC)
-55 lo +105
Holder
(See Figure
1-12)
HC-S/V
Mulmum
R r or He
Load
Capaoltw e ,
(PF)
825 to 20 Sl
32.0 D,5
Rated Drive
Level
()'lW)
~10.0 :1:2.0
7.0
@
10.0:l:2.0
7.0
CR-IM/U
0.8 tD 20 MC
Fundamental
0.005
-55 to +105
HC-S/U.
520 tD 15n
5.0:1:1.0
5,0:1:1.0
CR-25A/U
,200 tD 500 KC
Fundamental
0,01
-40 to +85
HC-S/V
2.5to7.5K
2.0 D.4
---
CR-2SA/U
200 to 500 KC
Fundamental
0.002
70 lo SO
HC-S/V
2,5to7.5K
2.0 D.4
---
CR-27 A/U
O.S to 20 MC
Fundamental
(!l O. 002
70 to 80
HC-S/U
S25lo 20n
32.0 D.5
CR-28A/U
0.8 to 20 MC
Fundamental
(!l0.002
70 to 80
HC-S/V
520 to ISn
CR-32A/V
10 to 75 MC
Third
Overtone
0,002
0,005
70 to 80
HC-S/U
40 to son
CR-35A/V
0.8 to 20 MC
Fundamenta I
0.002
80 to 90
HC-6/V
520 to Ibn
CR-3SA/V
0,Sto20MC
Fundam ental
0.002
80 to 90
tlC-s/v
S25 to 20n
32.0D.5
CR-37A/U
90 to 250 KC
Fundamental
0.02
-40 to +70
HC-13/V
5t05.5K
20.0 D. 5
CR-3SA/V
IS to 100 KC
Fundamental
0.012
-40 to +70
HC-13/V
110 to 90 K
20,0 :<0.5
CR-42A/U
90 to 250 KC
Fundamental
0.003
70 to SO
HC-13/V
4.5to5K
32.0 D.5
2.0 :<0.4
455 KC
Fundamental
0,02
-40 to +70
HC-S/V
3,3 K
2,0 D.4
5.0 :1:2.5
CR-47A/V
200 to 500 KC
Fundament. I
0.002
70 to SO
HC-6/V
5.3toS.5K
20.0D,5
2.0 D.4
---
CR-50A/V
16 to 100 KC
Fundamental
0.012
-40 to +70
HC-13/V
100lo60K
CR-52A/U
10 to 61
. . . ~~hiid~,'~;'
0.005
-55 to +105
HC-S/V
40 n
CR-45/V
~d:.'
SOn
5.0 :!:l.0
2,5D.5
7.0
5,0 :1:1.0
2.5 D.5
7.0
2.0 D,4
1.0 D.2
7.0
5,0 :<1.0
7.0
ffi
5.0:1:1.0
2.5 D.5
7.0
2.0 D.4
GJ
0.1
0,1
4.0 D,6
2.0 D,4
7.0
2.0 :<0.4
7.0
2.0 D.4
7.0
2.0 :<0.4
7 AJ
7.0
CD
CR-54A/V
50 to 125 MC
Fifth
Overtone
0.005
-55 lo +105
HC-6/U
CR-55/U
17t061MC
Third
Overtone
0.005
-55 to +105
HC-IS/V
CR-56A/V
50 to 125 MC
Fifth
Overtone "
0,005
-55 to +105
HC-IS/V
50 to
CR-59A/V
50 to 125 MC
Fifth
Overtone
SO to 90
HC-IS/V
50ta60n
1.0:<0.2
CR-SOA/V
5 to 20 MC
Fundamenta I
-55 to +105
HC-18/V
50 to 20 n
5.0:1:1,0
7.0
CR-61/V
17t061MC
Third
Overtone
SO to 90
HC-IS/V
40n
2.0 :<0,4
1.0 D,2
7.0
0.002
0,005
0.002
50 to
@ 2.5D,5
Overtone
28
Mulmum
Shunt
Capaoltance
tpF)
40.n
son
CrystalUnit
Type
Frequency
Range
Mode
CR-63A/U
200 to 500 KC
Fundamental
CR-B4/U
4 to 20 MC
Fundamental
CR-65/U
10 to 61 MC
ThIrd
Overtone
CR-66/U
3 to 20 MC
CR-67/U
Frequency
Tolerance
Peroent ()
Operattng
Temperature
Range
('IC)
Holder
(See Figure
1-12)
(Cont.)
MaxImum
Rr or He
Load
capaclmce,
(PF) I
Rated DrIve
Level
(MW)
Maximum
Shunt
Capacitance
(PF)
0.01
-40 to +70
HC-6/U
5.3toB.5K
20.0 %0,5
2.0 %0.4
---
0.005
-55 to +105
HC-IS/U
120 to 25n
30.0%0.5
5.0 1.0
7.0
2.0%0.4
1.0 %0.2
7.0
<])10.0:102.0
5.0 1.0
7.0
@O.OOI
70 to SO
HC-6/U
40 n
G)
Fundamental
0.0025
-55 to +lOS
HC-6/U
60 to 25n
30,0 %0,5
17toBIMC
Third
Overtone
0,0025
-55 to +lOS
HC-IS/U
40n
2.0%0.4
7.0
CR-BS/U
3 to 20 MC
Fundamenta I
CR-B9/U:
2.9 to 20 MC
Fundamental
CR-71/U
4.5to5,5MC
CR-72/U
17t061MC
CR-75/U
50 to 125 MC
0.002
?O to SO
HC-B/U
15 to 40n
32.0 %0.5
5.0 H.O
7.0
0,0025
-55 to +105
HC-IS/U
175 to 25n
30.00.5
5.0 1.0
7.0
Fifth
Overtone
O.OOOOS
+0.5 11
HC-30/U
175n Max
loon MIn
32.0 %0.5
70 UA :1020%
4 o IO%
Third
Overtone
0.005
-55 to +105
HC-IB/U
40n
2 MW
7.0
70 to SO
HC-6/U
40n
1.0 %0.2
7.0
0.0025
-55 to +lOS
HC-IS/U
40n
2.0 %0.4
3.5
0,0025"
-55 to +105
HC-25/U
40n
2.0%0.4
7.0
-55 to +lOS
HC-25/U
175t025n
30.0 %0.5
5.0 H.O
7,0
5.0 1.0
7.0
2.0%0.4
7.0
Fifth
(!l0.001
Overtone
CR-76/U
17t061MC
Third
CNertone
CR-77/U
17 to B2 MC
Third
,Overtone
CR-7B/U
2.9 to 20 MC
Fundamental
0.005
CR-79/U
2.9t020 MC
Fundamental
0.005
-55 to +lOS
HC-25/U
50tol25 MC
Fifth
Overton,;
0.0025
-55 to +lOS
HC-IB/U
50 to 60n
2.0 %0.4
7.0
CR-BO/U
.~:-
':
CR-BI/U
17 to 61 MC
Third
Overtone
0.005
-55 to +105
HC-25/U
40n
CR-S2/U
50 to 125 MC
Fifth
Overtone
0.005
-55 to +lOS
HC-25/U
50 to 60n
2.0 %0.4
7.0
CR-B3/U
50 to 125 MC
Fifth
Overtone
0.0025
-55 to +105
HC-25/U
50 to 60n
2.0 %0.4
1.0
CR-B4/U
17 to 61 MC
Third
Overtone
0.002
SO to 90
HC-25/U
40 n
2.0 %0.4
.
1.0 %0.2
7.0
CR-B5/U
0.Bto20 MC
Fundamental
0.0025
-55 to +105
IO.O :102:0
5.0 1.0
7.0
HC-6/U
520tol5n
G)
7
29
CD
When a load capacitance Is glv,en, the crystal unit Is designed to operate at anti-resonance (parallel resonance). Crystal
units which have infinite load capacitance are designed to operate at series resonance.
'@
Cfi
Frequency (KC)
90 to 170
170+ to 250
322 + 1. 2, 15 percent
f
16 to 34
~ + 1. 6, 15 percent
34+ to 54
54+ to 100
Where f
~30
+ 1. 6, l5 percent
If
.
g!, +. 1. 6, 15 percent
If
Frequency tolerance over secondary operating temperature ranil:e (-550 to _40 0 and 70 0 to 90C): O.015 percent.
At point of zero temperature coefficient; must be a specific temperature between 650 and 77 0 C.
CrystalUnit
Type
Frequency
Range
Mode
Frequency
Toler.nce
Percent ()
CR-15B/U
80 to 200 KC
Fundamental
0.01
CR-16B/U
80 to 200 KC
Fundamental
0.01
15t025MC
Third
Overtone
25+ to 50 MC
Fifth
Overtone
C'P'Clt~)"
Holder
Electrodes
(PF)
. -40 to +70
HC-21/U@
Pl.ted
32.0 D.5
-40 to +70
HC-21/U@
Plated
..
Maximum
Shunt
Capaclt.nce
(PF)
2.0 D.4
---
2.0 D.4
---
2.0 D.4
7.0
.2.0 D,4
---
Pressure
70 to 80
HC-21/U@
Plated
32.0 D.5.
0.002
70 to 80
HC-21/U@
Plated
2.0 D.4
---
Third
Overtone
0.005
-55 to +105
HC-6/U
Plated
32.0 D.5
2.5D.5
12.0
Fundamental
0.01
-30 to "75
HC-16/U@
Plated
45.01.0
2.0 D.4
45.0
-40 to +85
HC-6/U
Plated
20.0 D.5
2.0D.4
---
Pressure
20,0 %4.0
7.0
Pressure
20,0%4.0
7.0
32.0 D.5
CR-29A/U
80 to 200 KC
Fundamental
0.002
CR-30A/U
80 to 200 KC
Fundamental
CR-33A/U
10 to 25 MC
CR-43/U
80.860 KC
Fundamental
0.01
-55 to "105
CR-51A/U
10t061MC
Third
Overtone
0.005
-55 to +105
HC-6/U
CR-53A/U
50 to 87 MC
Fifth
Overtone
0.005
-55 to +105
HC-6/U
CR-57/U
500 KC
Fundamental
0.001
80 to 90
HC-6/U
Plated
0.8 to 20 MC
Fundamental
0.001
70 to 80
HC-6/U
Plated
CR-62/U
Rated Drive
Level
(MW)
HC-10/U@
0,005
15 to 50 MC
200 to 500 KC
Lo.d
;;>"
CR-24/U
CR-46A/U
Operating
Temperature
Range
("C)
32.0 D.2
0.5
CD
5.01.0
7.0
7.0
2.5 D.5
CD
These units are suitable for special applications but not for general use. Specific approval of the Government is reqUired prior
to each intended use. A written justification of necessity is required before their use in new equipment design, and shall be
submitted as soon as possible after the circuit design has firmed to the point at which the need for one of these crystal-unit
type is evident.
When a load capacitance is given, the crystal' unit Is designed to operate at anti-resonance (parallel resonance). Crystal units
which have infinite load capacitance are designed to operate at series resonance.
0'
See Figure 1-12 for dimensions of crystal unIts utilizing this holder.
@)
Frequency tolerance over secohdary operating temperature range (20 0 to BOoC): C.D05 percent.
G)
31
16 to 100
80 to 200
80.860
Crystal- Unit
Type.
Preferred
or Special
Application
CR-38A/U
CR-50A/U
Prefe17red
CR-15B/U
CR-16B/U
CR-29A/U
CR-30A/U
Special Application
CR-4'3/U
Special Application
Frequency
Range
(MC)
O. 8to 20
2.9t020.0
90 to 250
200 to 500
32
CR-37 A/u
CR-42A/U
CR-25A/U
CR-26A/U
CR-46A/U
CR-47A/U
CR-63A/U
455
CR-45/U
Preferred
500
CR-57/U
Special Application
Preferred
or Special
AppUcation
CR-18A/U
CR-19A/U
CR-27 A/U
CR-28A/U
CR-35A/U
CR-36A/U
CR-62/U
CR-85/U
Preferred
Preferred
Preferred
Preferred
Preferred
Preferred
Special Appl1catlon
Preferred
CR-69/U
CR-78/U
Preferred
Preferred
3.0 to 20.0
CR-66/U
CR-68/U
Preferred
Preferred
4 to 20
CR-64/U
Preferred
4.5t05.5
CR-71/U
Preferred
5 to 20
CR-60A/U
Preferred
10 to 25
CR-33 A/U
Special Application
10 to 61
CR-5IA/U
CR-52A/U
CR-65/U
Speciiil Application
Preferred
Preferred
15 to 50
CR-24/U
Special Application
17 to 61
CR-55/U
CR-61/U
CR-67/U
CR-76/U
CR-81/U
CR-84/U
Preferred
Preferred
Preferred
Preferred
Preferred
Preferred
p to 62
CR-77/U
Preferred
50 to 87
CR-53A/U
Special Application
50 to 91
CR-59A/U
Preferred
50 to 125
CR-54A/U
CR-56A/U
CR-75/U
CR-80/U
CR-82/U
CR-83/U
Preferred
Preferred
Preferred
Preferred
Preferred
Preferred
Preferred
Preferred
Preferred
Preferred
Special Appl1catlon
Preferred
Preferred,
Crystal- Unit
Type
.72!5 MAX-I
08.421
.317 lolA X
7 2 !l MAXjI8'0!l1
(18.421
I
IT
.775 MAX
(19.691
,~lt::::::j'
t:;t;:=::1
I~
(12.55-12.14)
1+-.7!l7 MAX
09231
WITH SOLDER
i+
SOLDER
1.!l0
(38.10)
I
~.I92"
L.
.050_.002...j ..
352
DIA
(1.32
MAX
1.221
(8.94)
WITH SOLDER
I III
.017~:~~~~
.008
(!l.08-4.671
DIA
I-
(048-.38)1.-~~~. .
1--4.35 MAXW.051
(4.65)
1
I
t:=:::;t:::j,~--+-~
'---.:
.530
03.461
MAX
WITH
'
--...l
.402 101 AX
00.211
TT
I,
!~ _2~~3~~X
.J '486'008~
UNIT WITH HOLDER HC-S/U
. I
I
I I
1.526
MAX
(38.761
l+I
1.!50(38.101
1.37(34.801
CYLINDRICAL
SEE NOTE 3
.19 MAX (4.831
f
.192.008
(!l.08 -4.67)
.435 MAX
(11.05)
.lee.OO!l~
4.85-4.60
NOTES;
I. ALL DIMENSIONS IN INCHES.
2. METRIC DIMENSIONS IN PARENTHESES ARE SHOWN FOR GENERAL
INFORMATION ONLY AND ARE BASED UPON IINCH= 25.4 MM.
3. NO LIMITING DIMENSIONS FOR SEAL A,REA.
TPI072-!l
33
1-7.
Military crystal units are specified in such a way that only three characteristics are of primary importance to the oscillator designer. These are:
(a)
The crystal unit frequency. For series resonance crystal units this
is the resonance frequency f r , and for anti-resonance crystal units
the anti-resonance frequency f~ a when loaded with a specified value
of capacitance C L .
(b)
(c)
The standard equipment for the testing of crystal units is the Crystal
hnpedance or CI Meter. The purpose of this equipment is to provide a standard
method of testing crystal units, thereby ensuring a fair measure of agreement
of crystal unit parameter measurements.
The basic principle used in the CI Meter to test a series resonance crystal unit is one of comparing the crystal unit being tested to a known resistor in
an oscillator circuit. The comparison is made in the feedback network of an
oscillator; and when the frequency and amplitude of oscillation coincide in response to oscillator tuning, loop gain adjustments, and variation of the substitution resistor, the crystal unit resonance resistance is equal to that of the substitution resistor, and the frequency of oscillation is the same as the crystal
unit resonance frequency . When testing anti-resonance crystal units, the method
is slightly modified. In this case, the specified value of loading capacitance is
inserted in series with the crystal unit, and this combination is then compared
with the substitution resistor in the same manner used for series resonance
crystal units to determine the crystal unit equivalent resistance and anti-resonance frequency. To ensure good repeatability, these measurements must be
made at the rated crystal unit dissipation levels given in the crystal unit specifications. It is also possible to measure the value of Co and to derive values of
the motional arm eqUivalent impedance elements R1 , L 1 , and C1 using the CI
Meter.
Because of the wide frequency range of crystal units, there are four CI
Meters designated as follows:
34
Model Number
Frequency Range
TS-710/TSM
10 KC to 1100 KC
TS-330/TSM
O. 8 MC to 15 MC
TS-683/TSM
10 Me to 100 MC
AN/TSM-15
75 MC to 200 MC
The crystal unit specification details which CI Meter will be used for
testing. The CI Meters are completely self-contained, and the only additional
test equipment required is a frequency counter. Measurement repeatability and
accuracy is of the order of 2 PPM on crystal frequency and 5 percent on crystal
equivalent resistance.
CI Meters are not always available to the oscillator designer, and there
are several alternative methods of crystal unit measurement of lower accuracy
that can be employed. Two of these methods are as follows:
(a)
35
The frequency measured using this method is the frequency of maximum transmission fm which coincides with the frequency of minimum crystal unit impedance. This frequency is several PPM below
f r , and there is therefore an inherent frequency measurement error.
The correlation with measurements made using a CI Meter can be
expected to be within 7 PPM for frequency and lO-percent for
resistance.
36
SIGNAL
GENERATOR
SIGNAL
GENERATOR
TPI072-6
37
0....--------'110.------,
R
TPI072-7
(b)
(a)
and
(1-58)
where K1 is the value of d/dQs at series resonance, which, for the condition
stipulated, has a value in the range of 0.85 to 1 and k is a constant phase angle
given by:
(1-59)
(1-60)
(1 + j tan )
and for phase angles less than 10 degrees, this can be approximated as:
Zc
38
::::J
R r [1 + j (K 1 Q s - I1Jk) ]
(1-61)
I {Rr
[1 +
j (K 1 Qs - k)] + R + j X}
(1-62)
Over the small frequency range of interest, the inductive component of the load
is essentially constant. Therefore, the phase 'angle change of the voltage V2 '
relative to VIis solely a function of the change in the phase angle of I relative
to Vl ' The phase angle of VI relative to I is:
(1-63)
Rr
Rr + R
K1
(1-64)
(1-65)
Equation (1-65) shows that the reduction in d/dQs incurred is solely due to the
resistive component of the load and that the inductive component has no effect on
the circuit rate of change of phase angle.
Since the stability of the oscillator is dependent on the phase shifting
ability of the crystal unit when inserted in the feedback loop, it is desirable that
the ratio given in Equation (1-65) should approach unity. 'That is, R should be
much less than Rr . However, R does not constitute the total resistance in series
with the crystal unit. The driving source will also have a series resistive component r which will have a similar effect to R in reducing the phase angle shifting
capability of the crystal unit. Introducing r into Equation (1-65) gives:
(1-66)
Equation (1-66) gives the total degradation of the circuit d/dQ s relative
to that of the crystal unit alone. One of the objects in oscillator design is to
make (R + r) as small as possible 'relative to R r , subject to maintaining an adequate loop gain.
39
1-9.
It is desirable that the crystal unit power dissipation should not exceed
the rated value under all conditions of operation. Since the resonance resistance of a crystal unit is permitted such a wide range of variation, the limitations
placed on the crystal terminating voltage levels are not evident and the purpose of
the succeeding analysis is to determine the limits. The circuit to be analyzed
is shown in Figure 1-15, where R i represents the circuit at the amplifier input
side of the crystal unit and V represents the voltage applied to the crystal unit
by the feedback circuit connected to the amplifier output. This implies that the
oscillator output represents a constant voltage source, a reasonable approximation because of the limiting that occurs. From Figure 1-15 the crystal unit
dissipation Pc is:
V2 Rr
(1-67)
P
c
2
(1\ + ~)
This is the well-known power transfer equation which shows that Pc will be a
maximum when ~ and R r are matched. That is:
~ == R r
(1-68)
'V\I'v
Rr
vI:
};
TPI072-8
Pc MAX
= 4R
1
(1-69)
Substituting the crystal unit dissipation rating Pc MAX into Equation (1-69) and
transposing gives:
40
Vmax
2 / p c MAX' R i
(1-70)
where V max is the maximum allowable crystal unit driving source voltage.
Equation (1-70) is applicable when Ri has a value intermediate between
the minimum and maximum values of R r . For the assumed 9-to-1 variation of
Rr , R i must have a value in the range:
1
-R
9 r max -< R.1 <- R r max
(1-71 )
If R i is less than.!. R r max' the maximum allowable driving source voltage is:
9
.
9 R. + R
V
max
r max
Ip
3 R r max
c MAX
(1-72)
r max
(~Rr
max +
~)
(1-73)
1. R r
max'
(1-74)
41
1.0
u
11.
,/
0.9
i=
cr:
1i)
en
Ci
...J
<:[
.......
0.8
f-
"
en
>a:
u
w
>
i=
<:[
...J
W
............. ....J..
0.7
a:
0.6
" '"
II
o
1.0
0.5
Rr
TPI07Z-9
RrMAX
~ ~ max
the loop gain will increase for decreasing values of R r . This will cause an increase in oscillator output voltage and crystal unit driving source voltage with
decreasing Rr , since the crystal unit driving source voltage will be directly
proportional to the oscillator output voltage. The values of Vmax given by Equations (1-70) and (1-72) apply when Rr is less than its maximum value and, consequently, when the loop gain is high. Therefore, when determining amplifier
bias levels for a worst-case design, the crystal unit drive source voltage used
in the calculations must be less than the values given by Equations (1-70) and
(1-72). Reducing Vmax 20 p,ercent below the calculated value will usually prove
sufficient.
Power supply voltage variations will also influence the oscillator output
voltage and should also be taken into account. As a general rule, the oscillator
output voltage will increase by the same percentage as the B+ voltage increase.
This analysis assumes that the amplifier input resistance remains constant as the loop gain increases. This is normally a justifiable assumption when
the oscillator uses a vacuum tube amplifier, since the grid-base of the tube is
normally lar~e compared to the signal levels appearing there. However, when
42
.a transistor amplifier is used, the signal level may easily exceed the linear signal handling capability of the emitter-base junction and the assumption of a constant amplifier input resistance is not justifiable. The input resistance of an
overdriven transistor amplifier is difficult to estimate except in the most general terms, since it depends on the transistor current and voltage bias levels
and the amplifier output signal voltage. The effect of overdrive is to increase
the average amplifier input resistance, since the emitter-base diode is effectively reverse-biased over a portion of the signal period. Because of the highly
non-linear characteristics of the junction, the increase is quite marked; average input resistance of 10 or more times the small signal input resistance occurring for loop voltage gains of 3. Insofar as crystal unit power dissipation is
concerned, the increase in amplifier input resistance means that the maximum
.crystal unit dissipation will occur at a larger value of R r , permitting the crystal drive source voltage to be larger than the values given by Equations (1-70)
and (1-72). This, in turn, allows an increase in amplifier output voltage and
oscillator output power. This effect is further discussed in Section VI where an
attempt is made to estimate the allowable crystal unit drive voltage under these
conditions.
1-10.
CRYSTAL
17
NETWORK
Crystal
17
Network Analysis
The generalized form of the 17 network is shown in Figure 1-17 (a). This
circuit shows the driving source and its output resistance R and the 17 network
terminating load Zi. R can be regarded as the amplifier total output resistance
(reactive component tuned out) including the oscillator load resistance RL' Zi
is the amplifier input impedance, and C1, is included in series with the crystal
to provide a method of adjusting the impedance level of the network.
.
If it is assumed that Zi, the load across crystal 17 network, is negligibly
large compared to XC ' the simplified network is as shown in Figure 1-17 (b)
s
when the crystal is replaced by its series equivalent circuit. This assumption
43
C.l
(0 )
,.PI072-IB
(b)
Figure 1-17. Equivalent Circuits of a Crystal Network and its Driving Source
concerning Zi simplifies the analysis and does not invalidate the results, provided that the crystal loading and the network phase angle modifying effects of
Zi are otherwise introduced into the analysis. The assumption is also made
that the effective inductance of the crystal is a linear function of frequency and
that its effective resistance is constant over the small frequency range of interest.
The equations for the network of Figure 1-17 are:
(1-76)
(1--77 )
(1-78)
(1-79)
44
Equ~tion
(1-80)
R + Xc ' (X e - Xc - Xc n)
T
S)(.;
The condition required for the imaginary component in the denominator to cancel
is:
(1-82)
R (X Leff - Xc ) = R e ' Xc
T '
T
-Leff
Re
Xc
(1-83)
Xc
- --V
X
(1-84)
Leff
The phase angle of V2 relative to VI' over and above the 180-degree
phase inversion, is obtained from Equation '(1-79) as:
R (X
tan
- X
Cs
- X
Ct -
CT
)- R
' X
CT
(1-85)
45
That is:
d
df
d
dX e
d ,
dX e
(1-86)
But:
d (tan )
dX e
Therefore:
d (tan )
dX e
(1)
--9L
dX e
e
~[
R
(1-88)
(2)
1 + X CT . X Leff
R
R
e '
(1-89)
The factors of Equation (1-89) are denoted as (1), (2), and (3) for the purposes
the succeeding discussion.
1-12.
46
~ (max) =
dXe
(1-90)
The crystal loading due to R is therefore minimized as factors (2) and (3)
approach 1 and as approaches 0 degree.
A suitable value must be found for the reduction in the network d/dX e
below that of the crystal unit alone. Further degradation will be incurred due
to Zi as will be shown later, and a circuit d / dX e degradation (due to R) to 75
percent of that of the crystal unit alone when Re has its maximum value R e max
is considered suitable.
Another factor must also be considered. Factor (1) shows that a large
deviation of the input-output \,;oltage phase angle from 180 degrees will cause a
large degradation of circuit d/dX e , in addition to those due to Rand ZiG For
example, a phase deviation of 10 degrees causes a 3 percent reduction, 20
degrees in 11 percent reduction, and 30 degrees a 25 percent decrease. Clearly
a phase angle of less than 20 degrees is desirable because of this effect. Assuming a maximum value of of 10 degrees and noting that the bracketed term of
factor (3)- is tan (/) (Equation 1-85)) gives the following equation for the normalized
degradation:
.
0.75
1 -
Xc
T
0.176 I r
Xc
(1-91)
X Leff
1 + -T
-.
R
R e max
Values of XLeff/Re max' XCT/R, and R/X~T R e max/XLeff which simultaneously satisfy the equality of Equation (1-91) are given in Table 1-7 for values
of XLeff/Re max from 0.5 to 30. Reference to Table 1-7 and Equation (1-84)
shows that the voltage attenuation then lies between the limits:
___
X __s__ <
5.5 X
Leff
IAV I <
(1-92)
47
--.
0.5
0.45
4.45
0.27
3.7
0.15
3.32
0.08
3.16
0.041
3.05
12
0.028
3.03
20
0.016
3.02
30
0.011
3.02
1-13.
As shown subsequently, the input impedance of a phase inverting amplifier can be considered as a parallel combination of resistance Rin(p) and capacitance Cin(p) which for the purpose of this analysis become Ri and Ci. Introducing Zi into the crystalTT network requires certain conditions to be met if the
preceding analysis is to remain valid.
1-14.
Effect of Ci
Effect of Ri
R.
l+j_I_
Xc
48
cs
. Xc
.
S
1 -l-H-I
(1-93)
Cs
(1-94)
Comparison of Equation (1-94) with Equation (1-78) shows that the presence of
Ri has reduced the phase of angle V2 relativeto 12' from -90 degrees to a value:
(1-95)
'TT
network
and will be beneficial when the amplifier has a phase lag It should not, however, be allowed to become too large, since any phase lead greater than that of
the amplifier phase lag will require a compensating phase lag of 120 And if this
becomes excessive, a reduction in d/dX e will occur as shown by the cos 2 term
of Equation (1-89) A maximum value of 10 degrees therefore appears to be a
reasonable compromise for tan- 1 XC/Ri when the phase angl~ is the controlling
factor. This gives:
.
,
0
Cs
Ri
:;; 6
(1-96)
However, this does not take into account the crystal loading due to Rio The
parallel-to-series transform of ~ and Xc results in a resistance r i in series
with the crystal unit equal to:
S
.
R.1
1+'(X~s)2
(1-97)
Equation (1-96) shows that ~/XCS will be greater than 6 when the maximum
phase angle condition is satisfied and, therefore, ri can be approximated as:
(XCsY
R1
(1-98)
In the 'TT network, ri is in series with Re and effectively increases the value of
Re to be used in Equation (1-89). This will result in a further reduction in
49
d/dX e , and a limit must be placed on this effect. Bearing in mind the 25-percent reduction due to R when Re equals R e max and possibly as much as 5 percent due to input phase angle deviations, a suitable limit to place on loading due
to ri would be 10 percent. That is:
(1-99)
Substituting this value of ri into Equation (1-98) and transposing gives:
Xc
O. 1 R e max . ~
:5: j
(1-100)
The value of Xc must therefore have the smaller value given by Equation (1-96)
S
Relative to VI
Neglecting ri as small compared to Re the crystal unit power dissipation Pc can be obtained by substituting in terms of ~ for V2 in
Equation (1-84). When VI and ~ approach 90 degrees:
VI
(1-102)
R - - R-e -]
X
1+
Leff [
X
X Leff
CT
Then:
2
j I/ R =
e
(X
V 2 R
,1
Leff
2[' R R J2
(1-103)
e
1+---X
X Leff
CT
Differentiating Pc with respect to Re shows that the maximum crystal dissipation occurs when:
R
Xc
Re
X
(1-104)
Leff
Bearing in mind the possible 9-to-1 range of values of R e , the condition given by
Equation (1-104) will occur if:
50
..
R
x -.
(1-105)
CT
Table 1-7 shows that this condition is satisfied for all X Leff/Re max values
exceeding 0.5. Therefore, the maximum crystal dissipation will be:
V 2
Pc max
.1
(1-106)
(X Leff)2
The value of He that satisfies Equation (1-104) can be obtained from Table 1-7,
Column 3, in terms of Re max' This shows that for all values of XLef/Re max
greater than 0.5, the range of values of R e that results in the equality given by
Equation (1-104) is:
(1-107)
Equation (1-107) shows that the value of R e at which maximum crystal unit dissipation occurs does not vary greatly, and using a value of Re equal to 0.274
R e max in Equation (1-106) will result in an error of less than 20 percent in
Pc max for all values of XLeff/R e max greater than 0.5. The maximum value
of VI that does not overdrive the crystal can now be obtained from Equation
(1-106) by substituting for Re and for the crystal unit dissipation rating Pc MAX
as:
VI max
X Leff
3.8 R
emax
r--------
JP c MAX'
He max
(1-108)
. Equation (1-108) shows that the maximum allowable input voltage is directly proportional to the value of X Leff/Re max used, all other terms in the
expression being constant for a given crystal type and frequency.
(b)
Relative to Vrr
In one method of operation, R will be the combined resistance of
the oscillator external load R L and the amplifier output resistance
Ro(p) in parallel. The value of R (R L in this case) is determined by
51
(1-109)
Because of the 9-to-l variation of R e between crystal units, the value of ~ is
a variable and will have a minimu:n value when Re is at maximum and vice,:",
versa. The minimum value of Rrr is obtained by substituting Re equals R e max
into Equation (1-109) giving:
Rrr min
Re max
[+ (~r:,f~) 2]
Rrr
(1-110)
is:
(1-111)
(1-112)
Pc = Rrr
where V1T is the voltage across CT. Therefore, for a given V1T , the crystal
dissipation will be greatest when Rrr has its smallest value. The maximum
allowable value of V1T when R e equals Re max is then:
V1TA =
52
jp c
MAX
R1T min
~~C;"";M;';":;';;';A=X=--.-R-"e'--=m=ax;;;:"""~~----+-(-R-:-Le-m-f:-)-=-2-=J
(1-113)
or, transposing:
V 2
17' A
Pc MAX
But V17' A is the voltage across R L , and therefore the output power is:
V 2
P
=
17' A
RL
(1-114)
(1-115)
If it is assumed that Ro(p) is much greater than RL' R L then replaces R in the
crystal loading equations previously derived. Substituting for Rand Re max in
Equation (1-83) gives:
Re max
Leff
Re max
(1-116)
SubstitutIng for RL in Equation (1.-115) from Equation (1-116) and dividing Equation (1-115) by Equation (1-114) gives:
r y
1+
Leff
P L Re max
Pc MAX
X Leff
RL
- - -1
R e max Xc
(1-117 )
53
20
10
1.0
1
\
"
.
i,
0.1
TPI072-19
10
12
XLeff
Re mOll.
,
54
14
SECTION 2
APPLICATION OF QUARTZ CRYSTALS TO OSCILLATOR DESIGN
2-1.
GENERAL
In the preceding section it was demonstrated that, provided certain conditions of usage are observed, the quartz crystal has the high rate of change of
phase angle, and the insensitivity to external disturbances, desirable in the frequency controlling element of an oscillator. Because of these conditions, the
.
introduction of the crystal unit into the oscillator circuit requires careful consideration, and this is the purpose of the following discussion.
2-2.
From the discussion iIi the Introduction, it can be seen that the essential
circuits of an oscillator are a power amplifying device and a feedback network
which extracts a portion of the amplifier output power and returns it to the amplifier input. Consideration of this circuit and the operating characteristics of the
crystal unit leads to certain conclusions regarding the placement of the crystal
unit in the circuit and the nature of the network that will be required to terminate
the crystal unit. These are:
(a)
In Sections 1-8 and 1-11 it was shown that to avoid reducing the crystal ~ characteristics unduly, the power transfer between the input
df
and output of the crystal unit, or the network in which it is incorporated, should be inefficient. That is, the power available at the output
side of the crystal or crystal network should be small compared to
the power dissipation in the crystal unit. In view of the limited power
dissipation capabilities of the crystal and the desirability of minimizing the dissipation, it follows that the crystal should be inserted into
the oscillator circuit at the minimum power level point. Simple
reasoning shows that this occurs, at the input of the amplifier which
is, therefore, the logical position for the crystal or the crystal
network.
I
, (b)
It was also shown in Sections 1-8 and 1-11 that the crystal terminating impedance levels should be compatible with those of the crystal
unit if its high rate of change of phase angle with frequency characteristic is to be maintained. In general, neither the input or output
impedance levels of the power amplifier will meet this requirement,
and passive networks having impedance transforming properties may
need to be interposed between the crystal unit and both the amplifier
input and output. The purpose of these networks is to reflect the
55
2-3.
From the preceding discussion it is possible to construct the more detailed oscillator block diagram shown with the loop broken in Figure 2-1 and to
determine the power and voltage relationships. In this circuit the loop gain is
assumed to be 1 and the power transfer efficiencies E, the voltage attenuations
Av
the power gain Gp , and the voltage gain Gv
of the various blocks are
those applying when each block is terminated in the succeeding block as shown.
The reactive components of the feedback network and the oscillator load are
also as sumed to be tuned out. The total amplifier output power is then:
A.,
&
(2-1)
where
G'p
(2-2)
and
(2-3)
Substituting for PT from Equation (2-3) into Equation (2-1) and transposing gives:
PL
- - = G p -1
(2-4)
PFB
56
PFB
...,
IMPEDANCE
TRANSFORMING
I-NETWORK
. E I AI & I
CRYSTAL
UNIT
E2.A2~
IMPEDANCE
TRANSFORMING
AMPLIFIER'
I-NETWORK
Gp GV/PA
PT
E3A~
!PL
>
<>
<
<
~RL ~
Vo
TPl072 -10
(2-5)
Therefore,
RFB
RL
p -1
(2-6)
V2/V 2
- _...:....0- -FT
- FFB - RT
RFB
(2-7)
where
(2-8)
Therefore,
(2-9)
G'
P
(2-10)
or
AI' A2 . A3 . Gv = 1
(2-12)
57
and
01 + 02 + 03 + 0A
Equation (2-4) defines the ratio between oscillator output and feedback
power and shows that it is dependent on the net power gain of all the oscillator
. blocks. It also determines the maximum power output of the oscillator, since
the maximum feedback ,power will be limited by the permissible crystal unit
dissipation. Equation (2-6) expresses this in another way, showing the maximUJll value of RFB that can be employed for a given net gain. Equations (2-9),
(2-10), and (2-12) are also useful in oscillator design calculations.
These equations are all derived for a loop gain of 1. In a practical oscillator it is desirable that the loop gain under small signal conditions should be
greater than 1 so that minor gain reductions due to any cause will not result in
the cessation of oscillation. It is also advantageous up to a point in stabilizing
the oscillator output power; a topic that will be discussed later. A loop power
gain of 2 or 3 seems to be generally suitable, and this can be introduced into
the preceding equations by assigning toG p or G p a value of 1/2 to 1/3 of its
actual value; or, if the voltage relationships are to be used, by decreasing Gy to
Gy
Gy
{2 or {3'
The use of these equations can be demonstrated by an idealized design
example of a series resonance oscillator. The following circuit conditions are
assumed: The amplifier power gain is 200 when RT = 1K and has zero phase
shift between input and output. The amplifier input impedance is resistive and
has a value of 20 ohms. The crystal resonance resistance R r is 80 ohms.
The amplifier input resistance is sufficiently low that an impedance
transforming network will not be reqUired between the crystal unit and the amplifier input, and the crystal unit can be directly connected to the amplifier input.
The power transfer efficiency between the crystal unit input and output will be:
'\'"
Ec
Rin
= 0.2
Rin + R r
(2-13)
The net gain from the crystal unit input to the amplifier output, calculating on the
basis of a loop gain requirement of 2, is:
Ec .
2B.
2
20
(2-14)
The input resistance as viewed at the input terminal of the qrystal unit is 100 ohms.
This is considerably smaller than RT' and an impedance transforming network
58
will be required between the amplifier output and the crystal unit input terminal.
Specifying the efficiency E1 of this network as 0.75 gives a net loop gain of:
\
GP
E1
RL
GP
then: .
. Ec
2E. =
2
15
(2-15)
RFB
= G p -1
f
= GP
RT
RT
15 K
1.07 K
(2-16)
(2-17)
RFB
Hin + Rr
150
(2-18)
= T
r
(2-19)
Pin
PFB
Rin
Rr
Pc MAX = 0.5 MW
(2-20)
then
.(PC MAX + Pin)
= 3.33 MW
E1
(2-21)
and
PL = PF B (G
P- 1)
~ 47 MW
(2-22)
This example could also have been given in terms of loop voltage gain.
59
In the preceding, the requirement for additional networks having impedance transforming properties has been determined, and general oscillator design equations have been developed. A further outcome is the added emphasis
placed on the important characteristics of amplifiers and impedance transforming networks which need to be known before oscillator design calculations can
be made. These characteristics which are subjects of Section 3 and 4, respectively, are:
,.
60
(a)
The power or voltage gain, the phase angle, and the input and output
impedance of the amplifier.
(b)
SECTION 3
AMPLIFIER CHARACTERISTICS
3-1.
GENERAL
As stated in Section 2 the amplifier characteristics of primary importance are the power or voltage gain, the input impedance, and the phase shift
between input and output. Because the amplifier normally provides the limiting
action that stabilizes the amplitude of oscillation, its operation in an oscillator
circuit is non-linear, with the input impedance and voltage and power gain varying cyclically with the period of oscillation. The estimation of average values
of input impedance and gain under these conditions would be difficult and, as it
turns out for the simple types of oscillators discussed here, unjustified in view
of the satisfactory results that can be achieved by simpler methods.
The approach used is to ignore the non-linear action of the amplifier, and
to assume that the small signal gain and input impedance suffice to characterize
the amplifier for oscillator design purposes. This simplification is justified in
practice by the results obtained and also closely approaches the actual circuit
operation when the loop gain is only slightly greater than 1. Additionally, it also
accurately portrays the circuit conditions during the initial buildup of oscillation
prior to the oscillation amplitude stabilization by the amplifier non-linearity.
Therefore, the amplifier small signal gain and input impedance are appropriate
design parameters when estimating the loop gain and phase shift which will allow
oscillation to build up.
The following discussion presents appropriate formulae for the calculation of amplifier input impedance, power gain, voltage gain and, in some cases,
output impedance for the frequency range where the amplifier characteristics
are amenable to calculation. For both transistor and vacuum tube amplifiers
this range extends from zero frequency to possibly 10 to 40 MC, depending on
amplifier configuration. Above this range the amplifier characteristics become
increasingly complex, and simple formulae,no longer give sufficient accuracy
for design purposes. An experimental approach is then preferable, and experimentally derived data are presented to provide background information which will
allow the effects of active device bias level changes to be estimated.
In the following discussion, design equations which are commonly avail-
61
PLATE
PLATE
Cpk
~:..
Rp
Cpk
-OmVgk
Ok
CATH,ODE
CATHODE
( b)
(Q)
TPI072-20
==
URT
- ----'''-
RT+
(3-1)
==
(3-2)
62
In the frequency range where these equations apply, the phase angle
between input and output voltage is essentially 180 degrees when the plate circuit is tuned to resonance.
b.
With the sam~ plate tuning conditions as for the grounded cathode
amplifier, the following equations are applicable:
The voltage gain is:
(U + 1) R
T
(3-4)
The input impedance consists of two parallel components. The resistive component is:
_ RT + ~
U+ 1
(3-5)
~n(p) -
(3-6)
Rr.~
Rr
. JY-.
(3-7)
In the frequency range where these equations apply, the phase angle
between input and output voltage is essentially 0 degree when the plate circuit is
tuned to resonance.
63
r-:- -
3-4.
(3-9)
Rp
The input impedance consists of two parallel components. The reactive component is:
Cin(p)
Cgk +
(Gv +
1) C pg + C(strays)
(3-10)
The resistive component is that of the grid leak resistor .Rp. which is
usually specified as 1 megohm maximum for the type of tubes suitable 'for low
power oscillators. The output impedance is Rp in parallel with Cp , the capacitance between the plate and all other electrodes.
The power gain is:
GP
2
GV
(3-11)
In the frequency range where thj3se equations apply, the phase angle
between input and output voltage is essentially 180 degrees when the plate circuit is tuned to resonance.
b.
64
(3-13)
Rin(p) - gm
(3-14)
GV Rin =
T
3-:-5.
2'
gm R T R in
(3-15)
6E
in Rp. Nevertheless, this simple concept does aid in understanding the amplifier behavior at high frequencies. At lower frequencies the effect is less severe
and should be negligible below 75 MC for all high-frequency triodes.
The input reactance of high-frequency grounded grid triodes with the
plate load tuned to resonance appears to be negligible compared to the resistive
component. The input impedance can therefore be considered as being essentially resistive.
3-6.
TRANSISTOR AMPLIFIERS
NOTE:
66
Virtually all recently introduced small-si~nal transistors have commonemitter current-gain cutoff frequencies in excess of 100 KC and behave as essentially resistive devices below this frequency. Consequently, practically any
small-signal general-purpose transistor is suitable for use in oscillator designs
in this frequency range. For these types of transistor, the manufacturer's data
sheets most frequently quote the "h" or hybrid transistor parameters which are
defined by Figure 3-2 and the following equations:
I
hf . II + h o . V2
(3-16)
(3-17)
hf
67
II
--'--+
V,
1 '" :
TRANSISTOR
TPI072 -21
-------_: :'
.'
The data sheets also usually specify the maximum and minimum values
of hfe, the common-emitter current gain, and frequently include this and the
term (1 + hfb) in the graphical information. For a given transistor type, the
range of hfe between minimum and maximum values is typically 3:1, and comparable variations of h ib , hrb' arid hob can be expected.
3-8.
The formulae for power gain, input resistance, and output resistance of
a transistor in terms of the "h" parameters are:
G =
P
where
&r
2
h f
&r
(1 + ho . R T ) [hi + (hi' ho - h f . h r )
&r]
(3-18)
68
h. + R
1
hi . ho - hf . h r + ho . Ra
(3-20)
3-9.
(3-23)
(3-24)
(3-25)
(3-26)
The approximate formulae indicate the dependence of the common-emitter
parameters on the term (1 + hfb)' The value of hfb is within a few percent of
-1. Consequently, when converting the parameters, small changes in the
assumed value can radically affect the values obtained. Therefore, the power
gain and impedance level calculations should only be regarded as indicative of
the actual performance of the transistor, and experimental checks are desirable.
3-10.
The typical operating characteristics of small signal transistor amplifiers' suitable for low-frequency oscillator service are:
.
69
a.
Common-Base Amplifier
Gp
%n
Ra
b.
Common-Emitter Amplifier
Gp
R in
Ra
3-11.
He Formulae
&r
G
P
:::::>
GV
:::::>
1
ho
2
and
hf
R
~n ~
~
(3-27)
RT
hi
(3-28)
T
hib
(3-29)
h1
(3-30)
(3-32)
70
3-12.
The gain-bandwidth product fT' This quantity typifies the behavior of the common-emitter short-circuit current gain hfe'
It is found that above a certain frequency the product of hfe and
test frequency remains relatively constant. That is, hfe decreases with an approximately 6 DB per octave slope as shown
in Figure 3-3. The value of f T quoted in the transistor data
sheet therefore enables an estimate to be made of the hfe at any
frequency in the range above fa, the .cutoff frequency where the
slope commences. Below ffj the low-frequency current gain
h FE applies.
(b)
(c)
71
I:\:)
-:J
cu
-20
f/3
10
"
............
'
.....
............
...........
............
'"
100
............
............
~.
, ......
......
'"
1000
~hfbl
' .....
6 DB / OCTAVE SLOPE
FREQUENCY (MC)
......
---<~
~',
............ 1'0~
---
1--------------_
TPI072-22
a:
10'
-10
<i
(!)
.s::
.c
920
30
40
73
I I
o!o e- Jm Ie;
1+
.
(3-33)
.1..
J fO!
.
where the term e- Jm fO! accounts for the phase angle lag that occurs in the tran. sistor in excess of that given by the simple pole (1 + j f~)-~ In present day highfrequency transistors, this excess phase angle at fa lies in the range of 20 to 50
degrees, giving values for m of from 0,.35 t() 0.9.
The other components' of the circuit are as follows:
(a)
74
Ccb I is the capacitance associated with the collector-base junction and is approximately equalto (Cob - 1 PF).
0(1,
r.
b'
RO
rbb'
Vb'e b'
Cell
rbb
RO
Rb'e
Cb"
mVb',
b
(0 )
TPI072- 23
Ceb
(b)
(c)
(3-34)
25 + r'
IE
(3-35)
Judging from measurements made on several types of transistor, r' typically has a value of 1 ohm and therefore has little
influence on r e at emitter current levels of less than 3 MA,but
can have a major bearing on r e at high current levels.
(d)
75
Rn is the dynamic resistance of the reverse-biased collectorbase junction. An estimation of Rn for a particular transistor
type can be obtained from the common-emitter collector current-collector voltage curves frequently given in the data sheets.
These curves are obtained with the base essentially open-circuited (constant base current) and therefore the slope 9f the
curves at any given working point is approximately equal to
RD (1 - 0:0 ), which is in turn approximately equal to RD/hFE..
Reference to a set of these curves shows that RD is a function
of both collector current and voltage, decreasing with increasing collector current and voltage. (Care should be taken using
this interpretation in the region immediately below the collectoremitter breakdown voltage BVC EO, where the slope of the curves
increases drastically. hFE also increases rapidly in this region, and RD remains essentially constant.)
The common-emitt,er equivalent circuit shown in Figure 3-4 (b) is derived from the common-base circuit of Figure 3-4 (a). Rbi e' the resistance
between the intrinsic base and emitter, is related to the r e of the common-base
circuit by the equation:
~/e
re
=
1-0:
(3-36)
0:0
eq~ation:
(3-37)
=-
re
0: 0 is very nearly 1 and, since re can be less than 2 ohms under heavy bias conditions, a gm of several hundred MA/Volt is attainable. The value of Cb I e is
obtained in terms of r e and f T by equating the short-circuit current gain of the
common-emitter equivalent circuit to 1. If the transmission through Ccb I is
neglected, the value of Cb Ie obtained is:
I
C be -
76
wT . r e
(3-38)
where
(3-39)
rbb"
Ru,
and Ccb I are the same elements as those in the common-base circuit.
Both of these equivalent circuits are based on, and adequately portray,
the short-circuit current gain of the transistor as functions of frequency. In
this condition the feedback effects governing operation are those due to the common coupling element between input and output circuits. In the common-base
circuit this is the component r bb ,; in the common-emitter circuit it consists of
~ J e and Cb , e in parallel. In both cases, the voltage sensitive feedback is
assumed to have a negligible effect and the presence of Ccb ' in the equivalent
circuits is merely a token acknowledgement that voltage sensitive feedback occurs.
"
In attempting to apply these equivalent circuits to oscillator design, tuned
amplifier voltage gain and input impedance equations were derived for the circuits of Figure 3-4 and compared with experimental results. It was found that
at frequencies below, say, 2 MC, a satisfactory degree of agreement was obtained for operating conditions likely to be employed in oscillator design. Above
this frequency the agreement between calculated and measured voltage gains
gradually decreased, while the actual amplifier input impedance varied drastically from that calculated for all but small amplifier total load resistances.
Under short-circuited output conditions, good agreement was reached
between calculated and measured input impedance. The disagreement appears
to be due to the inadequate specification by the circuit of Figure 3-4 of the voltage sensitive feedback between the collector and the intrinsic base and extrinsic base of the transistor. The equations derived from Figure 3-4(b) fail to predict the onset of positive feedback within the amplifier which causes the actual
parallel input resistance to increase fo'r amplifier loads above a certain value,
whereas the equation predicts a continuous decrease of the parallel input resistance as the amplifier load is increased.
77
Common-Base Amplifier
Voltage gain:
(3-40)
(3-41)
b.
Rr
=::--=--
Xccb '
(3-42)
Common-Emitter Amplifier
Voltage gain:
Gvo
(3-43)
IGVo I is
(3-44)
78 '
~'e '~2
( Rb'e+rtJb')
where:
and
Xc(p)
3-14.
rbb '
l
Ibb +
~'e
Rt'e
1
w (Cb I e + Cob I )
(3-45)
(3-46)
(3-47)
The following data was obtained in the circuits shown in Figure 3-5(a) and
The twovoltage supply circuit of Figure 3-5(a), which allows a true grounding of the base
lead, was used for the common-base amplifier tests to prevent decoupling problems in the base connection to ground. Similarly, in the common-emitter circuit the emitter lead was directly grounded to avoid emitter decoupling problems,
and the base current was derived from a second voltage source through a highvalue resistance to make the input impedance component due to ~ negligible.
(b) for common-base and common-emitter amplifiers, respectively.
quently larger than 27 PF, the largest value directly measurable by the RX
Meter. Known values of inductance were then placed across the RX. Meter terminals to allow measurements tq be made and the parallel-input capacitance
then derived by calculation. The RX Meter used for input impedance measurements was modified to reduce the output terminal voltage to 10 MV or less to
ensure linear amplifier operation.,
._Measurements were mg:tde on groups of five types of transistors having
typical gain bandwidth products of from 300 MC to 1 KMC. Although transistors
79
TO RX METER OR
SIGNAL GENERATOR
TO -10 :DC
0-----11----,
LOAD
RESISTOR
0-10 VDC
TRANSISTOR
UNDER TEST
430 OHMS
LOAD
RESISTOR
TO RX METER OR
SIGNAL GENERATOR
0-10 VDC
(b)
TPI072-24
0---11------.
10K
TRANSISTOR
UNDER TEST
O-IOVDC
Iva
80
Figures 3-6, 3-7, and 3-8 show the typical voltage gain as a function of
frequency for the various transistor types. Each of these plots was derived
from measurements taken on a number of transistors. The variation between
units of a given type was in general found to be small; the gain spread at voltage gain levels of 40 DB being 2 DB, decreasing to less than 1 DB at typical
voltage gains of 25 DB. Occasionally, however, transistors are found that
deviate appreciably from the norm. In some cases, this appears to be due to
an unusually high value of ohmic emitter resistance, affecting the low frequency
gain drastically but having little effect at high frequencies. In other cases, Cob
appears to be abnormally high, resulting in negligible effect at low frequencies
but causing a severe reduction of voltage gain at high frequency. This behavior
appears to be exceptional, however, and the spread between individual units of
a particular type is probably no greater than that found in vacuum tubes.
60
I
~
RT=2.5K,IE'IOMA
RT=IK,IE'IOMA
50
-- ----
I
_ RT=500n,IE'IOMA
40
~-R~;jK,1E'3MA
- --
. --
f--.
"'-
.- ._.
1-._-_. f--.-
....
r--
r--....
RT'50Il.,IE=3MA
00
00_"
............
~ ...
\.
_. -,
..
"
1-
00
..
..
..
..
00
1(+'i6;"'~~
-.... .....
,
..
.......
i:i-;~i' ~
............. ~
'\--.
\
\
.............
I
VCE 7V
I
I
o0.1
...
-........
-........
,"",,-
'"
I
10
-........
<;..
F-::l
20
..
~E=3MA-
"\.
RT=50n,'IOMA
ICIOMA_
.........
--
-"
t..;:; :::,....
t-..
r--
.......
.......
-""t-..
"~
r- .
I
10
100
FREQUENCY (MCI
TPI072-25
At low emitter currents in this frequency region, the differences in voltage gain of all the transistors tested was small. As shown in Table 3-1, at a
frequency of 100 KC and an emitter current of 3 MA, the variation in voltage
gain for all types was, with two exceptions, within l. 5 DB (20%) for collector
loads of 200 ohms and 1 K. Increasing the emitter current to 10 MA causes an
81
60
_ RT=2.SK, IE=IOMA
'---........::-,
--
_RT=IK,IE=IOMA
r--....
\.
RT=SoOn,IE=IOMA
40
- ------ ....I----I
III
RT=IK,IC 3MA
--- - - - -
RT=200n,IE=IOMA
_.
. ---J.
s.
........
.......
1e:=3MA
............
.......................
1"1"-
~.......
\
-...
RT=SO.n.,IE =IOMA
>
.......
.............
........
--
\
\
.- .- . -.
- - f - - . - f - - - -, r--'-
::-...
............
I"'........
-.-
VCE =7V
1', ,
"""'llo..
"-
-'-
10
........
..........
....",.
""""
\
\
20
,-~,
............... ..........
.......... e:-~
1\
=.._._
RT=50n,IE
=3MA
..-=-._,....-
~,
\
f--
LDCI OF CUTOFF
FREQUENCY I v
.L
RT=SOO.n. ,IC3 MA
r--.
r--.
~30
~
--
IE=IO~A
I .
I
r--
to-
.......
50
i"'-
......
......
..... ....
I....
I
I
I
o0.1
10
100
FREQUENCY (MCI -
TP1072-26
60
I I
I
LOCI OF CUTO~ FREQUENCY Iv
SO
\.;;;;;::;.2"
I
I
RT'IK,IE=3MA
RT=SOO.n.,IE =10 MA
- -
- - --- -- -
UJ
Cl
~
g
,
.......
~
--
'"":-
\
I--- RT=SO.n.,IE=IOMA
20
-
I
I
RT=SO.n.,IE'3MA
=- . . ,.....
"I'
._.
,- .- .-
","",'
._
10
---
IE'3MA
-;.
\1:-"-.
RT=200n,IE=IOMA
30
\
r--.... I
--"'\-- 1<--.['~
I
RT=500.n., IE =3 MA
.1
\./'
'==----------
iii
I
IE=IOMA
I
~
40
RT'2.SK, IE =10MA
.- '-.
........
-....
I-....
r--
.......
-....
t""-
\-..
"-
-.
I'-....
VCE'7V
I
1
01
TP1072-27
FREQUENCY (MCl
10
Figure 3-8. 2N917 and 2N2708 Tuned Amplifier Voltage Gain as a Function
of Frequency
82
100
Transistor
Type
Transistor hFE at Ie
of
3MA 10MA 30MA IE'" 3MA IE = lOMA IE = 30MA IE = 3MA IE = 10MA IE = 30MA
(V CE = 7 VDC)
2N2219
2N706A
2N917
2N2708
28
27.5
28
28
36
36
36
36.5
43
42.5
43.5
43.5
40.5
40.5.
41
40.5
49.5
49
49
49
58.5
57
57
56.5
30
24
60
46
68
25.5
25.
26.5
26
26.5
32.5
32.5
34
34
34.5
36
36.
39
39
40
39
38.5
40.5
39.5
40
45.5
45
47
47
47.5
49.5
48
51. 5
51
50
87
80
105
108
85
120
26
26
20.5
26
26
26.5
33
32.5
24.5
32.5
32.5
32.5
39.5
39.5
34
39.5
39.5
40
45
44.5
37.5
44.5
45
45
85
55
120
45
81
58
130
48
25.5
25.5
26.5
25.5
31. 5
32
33
31
40
39
40
39
44
44
46
43.5
40.5
38.5
39
35
39.5
39.5
48
43
44.5
42.5
45.5
46
130
170
130
330
30
22
55
42
60
150
190
180
380
(V
60
17
82
2N709
68
23
96
* Denotes
27
26
26
24
26.5
26.5
CE
35
32
33
31. 5
33.5
33.5
= 4 VDC)
41
36
35.5
35
37
37.5
53.5
43
44
44
47
48
exceptional units
83
increase in the spread to 5 and 7 DB for 200-ohm and 1-K collector loads,
respectively. However, the total spread between individual units of a given type
is less than 2. 5 DB and typically less than 1. 5 DB. A further increase of
emitter current to 30 MA results in wide variations of voltage gain between the
various transistor types. But here again, as 'in the preceding case, the typical
spread within a given type is less than 2 DB.
The variation in voltage gain between transistors for a load of 200 ohms
is primarily due to the differences in the hFE'S and the emitter ohmic resistance
values, since for this load RD will have a negligible effect. It is therefore possible to estimate the values of r e + rbb' (1 -00) by comparing Equation (3-48)
with the actual voltage gains given in Table 3-1. The voltage gain expressi<m,
when R D is assumed infinite, is:
(3-48)
GV =
Substituting RT equals 200 ohms, assuming a typical value for O!o, and equating
Equation (3-48) to the typical value of voltage gain given in Table 3-1, gives the
values of r e + rbb r (1 - 00) shown in Table 3 - 2. The values of r E" the dynamic
resistance of the emitter-base junction, are also included in Table 3-2 for comparison. Relating the values of the r e + ~b' (1 - O!o) to rE' shows that the following breakdown gives a satisfactory distribution of the excess resistance:
2N2219
2N706A
2N709 }
2N917
2N2708
r'~
84
0:0 )
Ie = 10MA
. Ie = 30MA
2N2219
2N706A
2N709
2N917
2N2708
8.0
10
10
10
10
3.2
4
4.5
4.5
5.0
1.4
2.2
3.2
rE'
8.3
2.5
0.83
These experimentally derived values of r' and lbb l suggest that, when
considering other comparable transistor types, the emitter-base junction and
base ohmic resistances can be assumed to have values of about 1 ohm and 60
ohms, respectively.
The wide variations in voltage gain between the transistor types at high
current levels is probably due in part to the difference in the collector-base
junction characteristics. As stated previously, the dynamic resistance Rn of
the collector-base diode at any given working point is proportional to the slope
of the collector curves (frequently given in the transistor data sheets) divided by
hFE' Typical sets of these curves are given in Figure 3-9 and show that, at
collector currents of a few milliamperes, the onset of voltage breakdown is
abrupt, and its effects are largely confined to a small region of voltages in the
immediate vicinity of the collector-emitter breakdown voltage, BVCEO. Therefore, for collector-emitter voltages well below BVCEO, the value of Rn is high
and virtually uninfluenced by the breakdown characteristic. At higher collector
currents the onset of breakdown spreads over a wider region, and consequently
its effects are felt at lower collector voltages. The slope of the collector curves
at voltages well below BVCEO is then increased relative to that at lower collector
currents, causing a reduction in the value of Rn. For a given transistor type,
the value of Rn, at a particular working point VCE and IC, is a function of hFE,
the relative value of VCE to BVCEO, and any peculiarities of the collector-base
diode. In view of this complex relationship, it is therefore not surprising that
large differences in voltage gain occur at high emitter current levels.
Equation (3-40) qualitatively illustrates the effect of the decreasing value
of Rn with increasing emitter current. rtb' is much greater than re for emitter
(~b'
+ r e ) RT is virtually
Rn
inversely proportional to Rn for a given amplifier load, RT. Also, re + rtb'
(1 - eta), the remainder of the denominator term, decreases rapidly with increasing emitter current, approaching a terminal value of 1 to 3 ohms for emitter currents in excess of 20 MA. At high current levels, therefore, an (rbb' +
r e ) ~T value of a few ohms will have an appreciable effect on the amplifier voltage gRn, while at low current levels its contribution to the denominator term will
be small, particularly since RD will then have a larger value.
The effect of the emitter ohmic resistance will also be great at these
current levels and can cause substantial variations. Similarly, the product
rtb (1 - aa) also has a significant effect on the voltage gain at high currents.
For those transistor types haVing data sheets containing collector curves
covering the contemplated operating conditions, it is possible to estimate the
value of Rn and its effect on the voltage gain by measuring the slope of the curve
85
00
10
201
30 I
TPI072-28
o
u
~
~
IU
oa::
::>
u
a::
~401
I-
501
~
60.
II"
--
u.~
12
-~ I
'~l
"
~ ;<
.I
I
VCE -
00
2 II
2N709
7
(VOLTS)
la=OMA
COLLECTOR-EMITTER VOLTAGE
7"""""""-=
311........-F
4~
~""='
I","'!'
2N917
I /1
12
2~
411~1
61 1... ........-= I
8 I 1"'1
10
16
Jo;..e=
I i i .
2N706A
~.... +!'7
20
at the operating point. Carrying out this procedure for the 2N706A and 2N917
gives the results shown in Table 3-3. Comparison of these voltage gains with
the measured values in Table 3-1 and Figures 3-6 and 3-8 shows good agree-.
ment, except for the case of the 2N917 with RT = 2. 5K, which gives a gain 3 DB
higher than that measured. This appears to be caused by the behavior of the
transistor saturation resistance at collector currents larger than 10 MA. Above
10 MA the saturation resistance increases appreciably, with the knee extending
out into the region of VCE = 5V at an IE of 30 MA. In addition, h FE falls rapidly
with increasing emitter current in the region above 10 MA. This combination
of effects would cause a considerable amount of 2nd harmonic distortion in the
collector voltage waveform. However, the increase would be gradual and would
not be readily apparent in the procedure used during the tests to check linearity.
This consisted of increasing the drive signal by 3 DB and noting the increase in
output. This knee behavior also occurs in the 2N2708 transistor and may be a
characteristic of the very high gain-bandwidth transistor types. When considering the use of these types of transistors in the common -emitter configuration, it
will be advisable to investigate this and to determine any resulting undesired
effects. In the case of the 2N917 and the 2N2708, the behavior of the saturation
resistance and hFE will limit the desirable operating current range to below 10
MA and to oscillator applications requiring less than, say 20 or 30 MW of output
power.
TABLE 3-3.
Transistor
Type
2N706A
2N917
Slope
IE
(MA) VCE
10
10
(K)
:
h FE
from
RT
RD RT (re + rbb') -RD
(ohms)
curves (K) (K)
Gy
30
240 1
0.27
30
240 2.5
0.7
30
35
70 1
0.9
10
3.5
60
210 1
0.3
10
3.5
60
210 2.5
0.75
87
Yo~tage
Because of the desirability of being able to estimate the voltage gain cutoff frequency, a semi-empirical approach was used in developing a formula for
fy with the following results. The behavior of the loci of fv at emitter current
levels of 3 and 10 MA for various values of amplifier load is shown in Figures
3-6, 3-7, and 3-8. The same general behavior is apparent for all the tested
transistor types. At low values of amplifier load, fv is almost independent of
RT and is primarily determined by the behavior of the extrinsic transconductance
of the transistor. From Figure 3-4 (b), the relationship between Yl and Yb'e when
the collector and emitter are short-circuited is:
(3-49)
where
(3-50)
Therefore, the extrinsic transconductance is:
gm . Rb'e
Extrinsic gm = (~b' + Rb'e) (1 + j __r_)
XC]je
88
( 3-51)
-=1_ _
(3-52)
V - 2rrCb'e . r
Relating Equation (3 -38) to Equation (3 -52) gives:
I
fV
rre .
fT
(3-53)
Using typical values of fT from the data sheets and the typical values of
r e , rbb" and h FE previously tabulated gives the fV shown in Table 3-4. fV is the
theoretical frequency at which the extrinsic transconductance is 3 DB down on a
response curve having a 20 DB per decade attenuation characteristic at higher
frequencies. The experimental results indicate that the actual attenuation characteristic is approximately half this theoretical value and that the experimental
values of fV correspond to the frequency at which the voltage gain is 1 to 1.5 DB
down. The magnitude of the response of a network having a simple single pole is
down by 1 DB at one-half the cutoff frequency, and this is the value which should
be compared for agreement with the experimentally derived cutoff frequencies,
fV, given in Table 3-4. '
TABLE 3-4.
Transistor IE
Typical Rb'e
flV
r
re
fT
Type
(MA) (ohms)
(ohms) (ohms) (MC) (MC)
hFE
2N706A
2N2219
fl V/2
(MC)
fV
(MC)
10
2.5
40
100
40
300
19
9.5
10-11
8.3
40
330
50
200
33
16.5
13-14
10
2.8
130
360
50
300
17
8.5
10-12
8.3
100
830
56
250
37
18.5
16-18
I
2N917
10
3
80
320
50
700
56
28
21-24
9.5
70
670
54
700
120
60
38-42
89
Gvv
Using the measured values previously derived and values of Ccb' estimated from
the data sheets, assuming Ccb'is 1 PF less than Cob', gives the cutoff frequency
values shown in Table 3-5.
TABLE 3-5. CUTOFF FREQUENCY VALUES
IE - 10 MA, VCE
Type
(K)
Ccb'
(PF)
(Me)
2N706A
2.5
2.5
1.8
2.5
4.3
0.5
2.5
8.3
2.5
1
0.5
3.5
3.5
0.9
2.3
3.5
4.6
2.5
5.2
RT
2N2219
2N917
90
= 7 V
fV
12
The cutoff frequency values derived from Equation (3-56) indicate the
frequency at which the response is 3 DB down. In this case, however, reason~ble
agreement is obtained for RT values of 1 K or larger when a direct comparison
is made with the measured values of fV' The exception is the 2N917 with a 2.5 K
load where the calculated and measured values show substantial disagreement.
This may also be attributable to the previously noted behavior of saturation resistance characteristic of this transistor. At lower values of RT the cutoff frequency given by Equation (3-56) approaches the transconductance cutoff frequency
and is therefore no longer valid. The theoretical cutoff frequency fVC, when
both effects are combined, can be derived from the transistor equivalent circuit
as:
1
(3-57)
fVC
tv
91
ing in this frequency range using other transistor types, although preliminary
estimations can be made from the plots of Figure 3-6, based on the relative
values of f T and h FE . This is no great inconvenience if the test circuit is constructed in the form to be used for the prototype oscillator.
In this sub-section the following has been determined:
(a) The voltage gain at frequencies below f V can be estimated with
adequate accuracy from Equation (3-40), assuming r' = 1 ohm,
rtb' = 60 ohms, and using a value for RD derived from the data sheet.
(b) The value of the cutoff frequency fV can be adequately estimated
from Equations (3-53) and (3-56) and the known general behavior of
fV '
For the Pierce type oscillator which is only used up to 20 MC, it is desirable to know the amplifier input impedance in terms of the parallel resistive
and reactive components. Measurements were made on tuned amplifiers for
various amplifier loads and transistor types at frequencies,of 5 and 20 MC, and
the results obtained,are shown in Figures 3-10,' 3-11,and 3-12 .
. 3-20.
92
to
CJ,;l
1~
gI
TPI072-29
a:
a:
600
600
RT (OHMS)
400
RT(OHMS)
800
800
1000
.,
1000
2000
150
200
300
400
50
0
1000
900
800
700
600
:;- 500
~
I
\
2N2219
200
200
600
R T (OHMS)
400
---
600
RT(OHMS)
400
800
800
1000
1000
'U~1~i-;i::::
~"
200
400
"""""-b -----4
200
200
300
400,...-------,------r----,
500
400
11
~ 300
~
-.
1-- . . . . . . .
i'-
200
2N706A
IE: 10MA
300
- - - - ----- "'"- - - - - --
1..-
--- ------
--
...
-~
~---_.--
200
..,~
-- --
I 00
L--
---..
400
200
RT (OHMS)
_ _..j
400
RT (OHMS)
1000 .....-----~-------,-------,
900
I--------+-------+-,I-~
8001-------+-----Jl---..Jl---l
700~-
600
I-------+----.,...--~~~
11
500 ~------+--___,~~~."e-----l
~
~
c
~
200 1--~::::!IIIooo_ _-t"l~----+_---l
400 1-----::::l....".---+--:600~....".-t_---..,
300
100
TPI072-30
200
RT (OHMS)
400
..........-::;;..-+~~---t_---..,
~~
200
400
RT(OHMS)
94
CD
CJl
50
40I
./
2N2219
...-
",.
./
2N270B
BOO
1000
f=20MC
} IE'\OMAI E3MA----
"
1//
1/ i
001
10
_~/
V/
.'"
- '-
//
-;;y"
2N706A
--
'=
30 1
"'"
-----I
,,":JI'
2N917
j-
200
400
600
AMPLi FI ER LOAD R T (OHMS)
..--I--
600
,--
'.20MC
ICIOMA-} IE=3MA ----
1000
--
-- - ---
?--- ~
,= 5 MC
IE=IOMA
200
400
600
AMPLiFIER LOAD R T (OHMS)
1.--7
./.
_.... ._}
600
1000
t~ ~ }!i:~::=
~ ~! ,.-?(;=i-\
0.
./
/-/
'V /
20I
30
U 40
co
~ 50 II /
100
90
BO
ii: 70
~ 60
200)
200
400
600
AMPLiFIER LOAD RT (OHMS)
,./
L"
,/
", I./~
.--
- -'" - -----
I~
} f'5MC
......
'=20MC
I =30MA---.} E IOMA
IC
--
1000
---
BOO
~---
200
400
600
AMPLIFIER LOAD R T (OHMS)
If?
.....
~~
./
~ ~/ ...
~~I'
10 71
9
B '.'
II
20
'/
TPI072 - 31
'0/
100
90
BO
70
60
30
40
-co 30I
0.
a.
lL
.'
I'
//
/.
~
. "
11/
./
1--- -
....-} f=5MC
IE= 10MA
./.' ~......
.",
/.
//
/J /
'/
11/ /'
50
u 100
90
BO
70
60
co
0.
!!;;
lL
_200
300I
400
500
300
1 + (_r_)2
XCbe
1 + r ' Rb' e
(XCb 'e)2
where r is the parallel resistance of rbb' and Rb' e.
and (3-39):
r
,-
(Xcb'e)
re
fT
(3-58)
(3-59)
and:
r ' Rb'e
(~b'e)
h FE '
r
re
(i~Y
(3 -60)
'Therefore:
1 +
1+h
(...!... '
re
.i..)2
fT
lf)
(3-61)
''- 2
FEmin
rre
fT
96
-1
(0
10
30
10
30
20
20
20
2N2708
10
20
20
75
10
20
2N70GA
2N2219
15
(~IA)
(~IC)
Type
I'e
Il])'e
r
:::30
85
75
GO
85
20
1~0
94
1.1
4
210
51G
S.G
2.8
94
210
128
50
1.1
~.8
8.5
2.~
10
:i-l
:17
40
17
G.:1
34
47
51
:~7
17
4.~
41
47
II
27
IE
Freq
100
I I 30
284
-\0
1130
1100
300
300
250
300
0.3.1
0.0;:
0.25G
:,. 1
1. :1
0.2~
0.0:,2
O. I
O. S4
0.37
~.4
"
5.7
0.75
170
110
210
21"
G7
15:>,
~4U
HI;, 1.-,0,
~-l3,
~OO
230, 340
II~,
~.-1.1J
leO, 17:"
)kasurc'd ll in \P)
2~3,
97,
L:S,
~:13,
1.10
9:1
1~,IJ
110
Ilin(p)
f
If
r e{IT
(ohms)
0.0~9
I"
r
I )2
hFt-:
r" . IT
0.08
li4 x 10- 4
4
0.017 2.9xI0-
O.OS
0.OG7 45 x 10
-4
0.0()7 45 x 10- 4
:100
281
0.01
0.1
10-.1
200
(S:)~
.).,
0.OG7 4.,
IT
::00
(~IC)
7 VOl'
I Ili
~~)
(Typical)
''I'
p<~
l:
Cl:I
C")
c:
:::c
o
-0
rn
:;0
-I
:z
o
of transistors will then be larger than this value for all conditions of loading, and
only occasional transistors will result in lower values (and then only for a narrow
range of amplifier loads).
Another factor justifying this approach is the behavior of the input impedance under the actual large signal operating conditions that occur in an oscillator.
The signal voltage appearing across the emitter-base junction is then usually
large compared to the "linear" operating region of the junction, and, the input
'resistance can then only be considered in terms of its average value. Since this
cannot be readily specified or related to the small signal input resistance , it
appears unrealistic to attempt a more accurate determination of Rin(p)) than
that outlined above.
'
The frequency dependence of Rin(p) varies appreciably between transistor
types. In general, when all other characteristics are similar, a transistor type
having a high value of hFE min will show a greater frequency dependence ,of
Rin(p) than a transistor type having a lower hPE min. This is because Rb Ie is
larger, and therefore XCb Ie, which will have a similar value for both types,
, becomes comparable with Rb Ie at a lower frequency. Also" high values of fT
will result in a smaller frequency dependency. The 2N917 and2N2708 types
tested showed negligible frequency dependence of Rin(p) up to 20 MC.
3-21.
98
In the Pierce oscillator, the amplifier input is terminated in a capacitance forming part of the feedback network. The amplifier parallel input
capacitance forms a part of this capacitance; and consequently it need not be
known accurately during the preliminary design calculations, since any discrepancies can be remedied during the experimental stage of the design, provided Cin(p) does not exceed the required total value of the feedback network
capacitance. In practice it is desirable, because of the instability of Cin{p),
that it should be much smaller than the required total. In view of this it IS
considered preferable, when considering the use of other transistor types, to
use the plots of Figure 3 -12 to estimate Cin(p) rather than to attempt to calculate
its value, particularly since the equation for Cin(p) based on the transistor
equivalent circuit of Figure 3-4 is unwieldy and of limited accuracy.
The estimation of Cin(p) for other transistor types should be made on
the basis of the relative values of fT and hFE to those of the transistor types
tested.
In this sub-section it has been determined that:
(a) The parallel input resistance of a common-emitter amplifier
can be calculated with sufficient accuracy using Equation (3-61).
(b) The parallel input capacitance can be estimated with adequate
accuracy from the plots of Figure 3 -12.
3 -22.
The behavior of the phase angle between the amplifier input and output
voltages has not been investigated in detail, primarily due to the lack of suitable
test equipment. However, crude measurements of tuned amplifier phase angle
were made at a frequency of 60 MC for an amplifier load of 200 ohms and an
emitter current of 10 MA using a dual-trace sampling oscilloscope. At this
frequency it was found that, for the 2N706A, 2N2219, 2N709, 2N917 and 2N2708
type transistors, the amplifier phase shift, when tuned to maximum output, was
in the region of 40 to 60 degrees.
As shown by the amplifier response plots of Figures 3-6, 3-7, and 3-8 at
60 MC, the amplifier was in all cases working well above the cutoff frequency in
the region where the tuned voltage gain has a response of 12 to 14 DB per decade.
Network theory suggests that a network exhibiting a slope of this order will have
a phase angle of 50 to 65 degrees, which closely agrees with the values measured.
Assuming that this agreement is not coincidental, this result can be extrapolated
indicating an amplifier phase shift of approximately 30 degrees at the cutoff frequency fV ' Amplifier phase angles of more than 20 degrees are not desirable,
primarily because of the variations which may occur due to environmental
J
99
condition changes and which will cause oscillator frequency drift. It is therefore desirable to work the amplifier below fV if at all possible. For the lower
fT transistors at frequencies above a few megacycles, this entails working under
low voltage gain conditions. The use of emitter degeneration will also be helpful
in increasing the effective value of fV and reducing phase shift.
3-23.
Figure 3 -13 shows the behavior of the series input resistance of the
. various transistor types as a function of frequency. Comparison of the plots
shows the same general pattern of behavior for all the transistor types. At low
frequencies, the series input resistance is essentially independent of the load
resistor value and is approximately equal to:
Rin(s)
Rj
r e + ~b I (1 - 00)
(3-62)
100
"I::>-
.........
I-
_1
T +-
l-
I .II
ii iI
17d'LL
~/
I
I
I 't
I 1II
tI
10
FREQUENCY (MCI
:'"
"
... . '-.~.-:;:
'/' /.,
.
./'. ~.//....
......
',';'- :/r.,~
__ -~.,
rTt-_..L
TpI072 - 32
10
1\
\ \
100
I I 1\1~
"".
\'
Jf'/~~;\'
Jl.~._-VV::/~~\f\l~~
a: 15'L
"
.3
20
25
30
2N2219
H-
I I
E 10
a:
15
10
2N27C1B
10
.~
. <....
/
FREQUENCY (MC)
.,;
100
100
1""I'
"',
....
Im'...-f-I-++-J
,"
.-"
FREQUENCY (MC)
-'1
a:
151
2/'91"
.~
a:
10
15
20
25
10
2N706A
,'E'IOmA
!'
100
'101
,VCE 7vac
RTIK-----
RT '500 OHMS - - -
FREOUENCY (MC)
for the other types of transistor, and it appears that the input resistance will
not be negative with a 1-K load resistance below 150 MC for these types .
. The plots of Figure 3-13 show the behavior of the amplifier input
resistance at the .frequency to which the amplifier is tuned. It is also possible
that, at frequencies adjacent to that to which the amplifier is tuned, the positive
feedback will be increased due to the additional phase shift ,to the point where the
input resistance is negative. The oscillator stability will then be dependent on
the resistance and reactance of the driving source. Oscillation may then occur
if the- driving source effective series resistance is smaller in magnitude than
the negative amplifier input resistance, and if the source series reactance is
equal in magnitude, to the amplifier input reactance but of opposite sign. At
frequencies above 30 MC where the positive feedback within the transistor is
likely to cause a negative amplifier input resistance, only series resonance
crystal units are employed. The crystal unit resonance resistance is in the
range of 40 to 100 ohms, and a good crystal termination is obtained by inserting
the crystal into the loop in series with the amplifier input. The crystal unit then
constitutes the major part of the amplifier driving source impedance; and since
its reactance can change rapidly for only small frequency changes, it is entirely
possible that the driving source and amplifier input reactance cancellation can
occur. A positive amplifier input resistance does not therefore guarantee that
the amplifier will be sufficiently stable. Sustained oscillation at a frequency
other than that of the crystal unit is unlikely because of the relatively large value
of the crystal unit resonance resistance which has to be cancelled for this to
occur. However, it is found that smaller amounts of positive feedback than that
resulting in complete instability will cause undesirable characteristics of the
crystal-controlled oscillation. Notable among these is the distortion of the
oscillator tuning response and of the frequency-versus-temperature response.
An example of this is a 50-MC oscillator using a 2N706A transistor where it was
found that the amplifier load could not exceed 500 ohms because of these effects.
This appears to be an effect that can only be determined experimentally, and it may be necessary to redesign the oscillator at several amplifier
load levels before a satisfactory oscillator is obtained.
b.
102
CJ.>
"
10
15
_.~
/;"
/ 1/
10
~..........
I':
:/ :
I .:'
1'/
,';
//:1
./
.r/
100 10
:~A'-'"
.II!
/
.
II
1/..
.' j
l/l,I / ' /
:' I
I ;
tr./:
I
I
/'
100
J,
i:
'J / /
.
'I'
/
I' J
Ij /
~ :/ / /
./ --:., /v
FREQUENCY (MCI
"
II::
~V.
11/
17
I.
L~.
..;1"
Vfl
V
.
'I J /
/)
.I
I,) .,
V//~f:/-..
r;. ~
.. ~
~' .~:.- . . "
TPI012-3'
"
20
25
30
-...
-;
2N706A
)~-l---I--+-t-++---t:''-t-ITT1
35
"
10I
2.0I
.-:., ~OI
40
50
,0
2N2219
.'
/0
_j
=3mA,RT .IK - . - .
Vee' 7 VDC
'E
R IK
R T '5000HMS----
'E"OmA
100
FREOUENCY (MCI
(3-64)
(3-65)
104
om 'V,be
e
..
.----
Om 'V~e
=GM'Vb'E
v
m'V be
E
(a
=GM'Vb'E
b'
(c
(d )
TP 1072 -34
Figure 3-15.
(e)
105
Substituting for Vb 'e from Equation (3-63) into Equation (3-64) gives:
V
Vb'E =
(3-66)
_
The current generator of Figure 3-15 (c) can be rearranged as shown in
Figure 3-15 (b) without changing the circuit conditions (the two generators are
equal, and therefore the connection between the emitter (e) and the mid-point
of the two generators will carry no current). The generator connected across
ZE now has the voltage V across its terminals and can be replaced by an impedance Z. From Equation (3-66):
(3-67)
GM
(3-68)
(3 -69)
For the circuits of (a) and (c) to be equivalent, the parallel combination
of ZE and Z must equal r E' That is:
(t + ~~~J
j
Transposing gives:
rE
(3-70)
~ + gm Rb , e + j ~ )
(3-71)
Rb'
l+j _
_e_
XCb' e
106
But:
(3-72)
and
re
(3-73)
1 - 0'0
Therefore:
r _
l+,_e
J x~ ,
'''Cb e
1 + j
__
(1 - etO) Xcb' e
e~
(3-74)
ZE is, therefore, the series - parallel combination shown in Figure 3-15 (d).
At frequencies well below fT, the effect of the complex numerator term
of Equation (3-74) will be small and can be ignored. With this approximation,
ZE behaves as a parallel combination of resistance and capacitance with a cutfT
off frequency at
. This is the same cutoff frequency exhibited by Rb 'e
1 - et o
and Cb 'e and, therefore, these networks can be combined as shown in Figure
3-15 (e) where:
(3-75)
(3-76)
+ r
(3-77)
107
_17
to
17
In one type of Pierce oscillator to be subsequently considered, the bilateral behavior of a transistor poses difficulties in the analysis of the circuit
and in the development of a design procedure. These difficulties are removed
if the transistor equivalent circuit is divided into two parts; one part of which
behaves as a unilateralized amplifier, and the other part, which represents the
internal fe.edback within the transistor, is incorporated into the oscillator feedback network. The object of the following analysis is to effect this transformation of the transistor equivalent circuit.
It has been shown that, at frequencies below the cutoff frequency fV' the
hybrid-rr equivalent transistor circuit, and hence circuits derived from it,
adequately represent the behavior of a transistor amplifier. Therefore, for these
conditions, the network conversion shown in Figure 3-16 is valid .. The values of
the 17 equivalent circuit elements are derived as follows.
(3-78)
in parallel with
r
,[ 1 + C be ' +
bb
108
XCb'
Xccb I
r2
~ (p) ]
,/
I,
..
rbb
VI
Vb'e
R~e
De
gm'Vb'e
:"1'
(a )
I,
G
r
12
Rr
Co{p)
R in{ p)
Cin{p)
g'm . V
VI
be
Ro(p)
e
TPI072 -35
IT
where
r
rbb Rb'e,
Tbb' + Rb'e
(3-79)
and
(3-80)
( Ccb
+R
(3-81)
109
b.
Yf (g'm)
Yf is the forward transconductance from the transistor input terminals (b) and (e) to the short-circuited output terminals (c) and (e), neglecting the
current throughRD and Cob': That is:
Rb'e
(3-82)
g'm = gm
(J't..b' + Rb'e) (1 + j _r_)
-u
. XC(p)
c.
Ro(p)
e
R . .r- [ 1
D OQ.r
1 )2]
-r-
XCb'e
(3-83)
in parallel with
re
0:: 0 .
Ccb'
r2
(3-84)
Yin is the admittance at the input terminals (b) and (e) when the
output terminals (c) and (e) are short-circuited. Yin includes R r and C r , and
. the admittance required to determine Rin(p) and Cin(p) alone is:
Y'in
Yin - Y r
(3-85)
However, Rn and Ccb ' are much larger than Rb'e and Cb'e and Yin is practically
' I
Rin(p) - (rbb + Rb e)
XCb'e
1 + Rb' e " r
XCb e
110
(3-86)
and:
(3-87)
These equations also apply when emitter degeneration is used, provided Rb'E,
Cb 'E, (Cb 'E + Ccb I), and GM are substituted for Rb Ie, Cb Ie, (Cb 'e + Ccb I), and
gm, respectively. The effects of emitter degeneration can be determined by
considering these substitutions in Equations (3 -78) to (3 -87). These are:
(a)
(b)
(c)
(d)
(e)
For the normal practice of batching transistors for a maximumto-minimum hFE ratio of 3 to 1, interchange of transistors will
cause a possible 3-to-I change in base current for a constant
emitter current.
111
4.5
MA.
Rbi
JIBI
IS
Rb2
..
[B2
TPIOT2-36
6VBG
VBG . IB2
(3-88)
112
=-
6 VBG
VCC - VBG
I B1
(3-89)
[I
(3-91)
where lIB is a current whose value lies intermediate to the two extremes and
which "vill be determined later. The current ratios IB2 and IB, 1 are related by
I' B
I B
.
the condi tion:
(3-92)
The possible 7.5 to 1 range of variation of I B is related to AlB and I' B by the
equation:
7.5
(3 -93)
or
AlB
0.765
I' B
(3-94)
~:~G into
l'B
change in I
I~2,
I B
Equation
the fractional
0.765, the transistor biasing network meets the base voltage variation requirements.
Having obtained the required ratios of IBI and IB2 to l' B' substituting
for I'B gives IB1 and IB2 and, hence, RbI and Rb2 . l'B is calculated from:
liB
(3-95)
113
As previously stated, the base current of a transistor at -55C is approximately 167 percent of its 25C value. Also, the b8:se current of a transistor
having a minimum hFE value at -55C is given by Equation (3-94) as 1. 765 I'B.
Relating these gives:
1. 765 liB
(3-96)
or
I B (hFE min at 250C)
I I B = -=--=-==-------1. 06
(3 -97)
I B is related to IE by:
I
IE
B --~-
h
+ 1
FE
(3-98)
28 VDC
18 VDC
BG
hFEmin
85
IE
35 MA
0.12 x 18 = 2.2 V
If:
I B1
l'
2.6
and:
I
B2
-1'B
1.6
Then:
tJ B
I' B
114
0.77
liB
106 x 86
0.38 MA
and:
lB1
1 MA
IB2
0.6 MA
RbI
10 K
giving:
Rb2
30 K
7.5 K
This is the maximum value that Rb(p) can have for this emitter current at the
'given transistor bias point.
The effect of the emitter-base voltage change with temperature on the
emitter current will be negligible, amounting to approximately 160 MV in 18 V.
For emitter-to-ground voltages of less than, say, 3 volts, this effect will play
an increasing part in the transistor operating point instability and must also be
considered.
115
SECTION 4
IMPEDANCE TRANSFORMING NETWORKS
4-1.
GENERAL
Because of the large differences in impedance level likely to occur between the crystal unit and the active device, at least one impedance transforming network is usually necessary in an oscillator circuit. Possible applications
of impedance transforming networks in oscillators are:
(a)
(b)
(c)
116
(a)
(b)
I
I
I
I
I
I
I
.J_.
, ....-"
I
I
I
I
I
I
"
_L
0(
'T'
(
I
I
I
r
TPI072-37
( b)
(0 )
Figure 4-1.
I'
I
I
( c)
'f'
I
I
JlJl
(e)
(c)
(d)
The operation of the networks shown in Figure 4-1 are analyzed below,
and design equations are developed from these analyses.
4-2.
1T
NETWORK
The useful property of this network, in addition to its impedance transforming characteristic, is its phase inverting action between input and output
when the component values are chosen appropriately. This characteristic is
useful when the power amplifier phase angle is close to 180 degrees. Above 20
or 30 MC, crystal units are normally used in a manner giving zero phase angle
transmission at an impedance level suitable for grounded cathode or base operation. Consequently, unless two impedance transforming networks are used in
the feedback loop (a configuration usually not justified on the grounds of complexity when an alternative is available), the usage of the network is confined to
frequencies below 20 to 30 MC. It can, however, be used at all frequencies for
matching to the oscillator load.
The following analysis is based on the practical aspects of the network
and is intended to show how the impedance transformation occurs. This is not
the most elegant approach, but it is believed to yield a better practical appreciation of the impedance transforming action of the network. The analysis is
developed through the series-parallel circuit transformations given in Figure
4-2 which show only that portion of the network active in the impedance transforming function; the capacitor placed across the input to tune with. L' is not
shown. The load resistance r s in this circuit is representative of the parallel
resistance of the succeeding circuit. The parallel reactive component of this
circuit is considered to form part of C.
117
VI N-----4t------.~-...,
<
RS<"
>
TPI072-38
( b)
(a)
(c)
Figure 4-2.
11
(d)
Network Transformations
Transforming from (a) to (b), Figure 4-2, the relationships between r s '
and r s and C' and C (Table 1-3~ c) are:
r's
(4-1)
and
(4-2)
Transforming from (b) to (c), Figure 4-2, gives:
XLeff
(4-3)
XL - XC'
R s + R'L
1 + { XLeff)2]
\r's + rL .
(4-4)
and
XL'
r Is + r
XLeff [1 + ( XLeff
L) 2]
(4-5)
The values of R s and R'L can be obtained separately be equating rL and r's to
zero, respectively, in Equation (4-4).
118
The voltage attenuation ratio AV is obtained from Figure 4-2 (b) and
(c) as:
r's.- jXc'
(4-6)
rL + r's + jXLeff
And when rL + rls and rls are smaller than wLeff and ---.l.-CI' respectively, which
3
3~
.
will be necessary if the phase angle is to approach 180 degrees, Equation (4-6)
can be approximated with less than 10 percent error as:
AV
- XC'
--
(4-7)
XLeff
Further, for the prescribed condition, Equations (4-1) and (4-2) show that the
value of C' is within 10 percent of C and therefore:
AV
Xc
(4-8)
XLeff
-;:V
The power transfer efficiency is:
E =
r' s
RIL
r's + rL
RL + R s
(4-10)
(4-11)
= tan
-1 XC'
rrs
(Lagging)
(4-12)
119
r + v.
(4-13)
r--------------------....."".VIN
TPI072-39
Figure 4-3.
4-3.
7T
7T
Network Design
When used in the feedback loop, the known requirements for the network.
are:
(a) The value of R s . The known ratio of output power to feedback
power determines R s .
120
(b)
The value of rs. This is the value of the parallel input resistanceof the succeeding netWork.
(c)
(d)
The desired phase shift deviation from 180 degrees may be known.
The network unlmowns are C, rL' and L. With this number of unknowns
the network design becomes involved, especially when phase requirements have
to be met. A relatively rapid method that enables the designer to pay constant
attention to these requirements is the graphical approach outlined below. This
is based on the vector diagram of Figure 4-3.
Since r s and R s are lmown and represent the same power dissipation,
the ratio of Vo/Vin can be calculated as follows:
Vin
Vo
=~
(4-14)
rs
Using suitable scaling, draw a line of length Vin on the reference axis.
From the origin of the vector Vin, draw a partial circle of radius Vo in the third
quadrant. Bisect Vin and, using this point as origin, draw a semicircle in the
fourth quadrant of diameter Vin. These two circular segments are the loci of
Vo and V (r's + rL), respectively. If the required phase angle between Vo and
Vin is known, the vector Vo can be drawn; if not, a value must be assumed.
Specifying anyone of the remaining four vector quantities will automatically complete the design, since VLeff and VC I are in opposition to each other
and mutually perpendicular to Vr's and V (rls + rL). The choice resolves into
the assumption of a value r, and the following factors may influence this
choice. For a fixed phase angle between Vo and Vin, the value of r used determines the power transfer efficiency E, since:
rls
_
Vr's
r's + rL - V(r's + rL)
(4-15)
rls = rs .
rls .
Vr's
Vo2
VC'
Vr's
(4-16)
(4-17)
121
Xc = Xc' [ 1 +
;~~22
] (Table 1-3, d)
1
1 + [
V (rls + r
o]2
(Table 1-3, b)
(4-18)
(4-19)
VLeff
(4-20)
rL = r l s
(4-21)
(4-22)
, If this Q is not a feasible value (either too small or too large), the design
can be optimized by recalculating, using a new value of I' Increasing I will
require a higher Q for the coil and vice-versa. A typical design is shown in
Figure 4-4.
4.4
This network introduces near to zero phase angle when properly terminated. Its major advantages are the control of phase angle that can be obtained
by varying the values of C1 and C2 and the simplicity of design.
The circuit to be analyzed is shown in Figure 4-5 where Cl and C2 form
the impedance transforming network andr s is the load.
The voltage attenuation ratio of this network is:
V2
A V = V1
(.L;C1 rs
./1 +
122
w2
(C1 + C 2 )2 r s 2
(4-23)
t,
l:>:l
W
f-'
Vo
TPI072-40
rL
V /'
.83
= ~ = 160 = 190
83
5 - -L, -
rL
= 160.
[I
= 48n
(~.64)2 = 120i\..
:~~4J
0.5_
"""'5
- 0.83 J\.
Xc' = 16011.
= r
Vr
V rs
+
rL
= 160A
= 39.41\.
= 39.4
21.3
~
~'r;'+ rL)]
~':.J
-;;;-eV(
I +[VL.eft
[I
Vc'
X Left
=, XL"
= XC'
Leff
XL
Xc
'
Xc'
= 0.37
rs . V,2
..!!.. = 200M = 8.3
V 2
22
Pi-
I
21F' X 200 X 106X 5X 10- 12
r;
VIN
Vo
XL'
L II
V
V"
~===============-
= 1.5K;
DESIGN INFORMATION:
r s = 200n; R s
TPI072-41
C1
V - C1 + C2
(4-24)
(4-25) .
Tr
Rs
= r
s
..
(4-26)
:
..
",
(~~)2
'
1
AV 2
w2
(C1 + C2)2 rs 2
w2 C1 2 rs 2
1 +
~3,
T (Cl ~lC2)
r '"
124
(4-27)
(4-28)
The relative values of X(C 1 + C ) and rs required for various phase angles can
2
be found from the phase angle term of Equation (4-23). The phase of V2 relative to VI is:
(4-29)
Therefore:
10 degrees when rs ~ 6 X(C 1 + C 2)
= 26degreeswhenrs~
2X(Cl+ C 2)
This is the phase shift due to the relative values of (Cl + C2) and "rs. The tuning of this network by an inductor can also introduce a phase angle if mistuning
occurs.
The input capacitance of the network at the input terminals is:
1+
C
rs
Xc 2 . X (C 1 + C 2)
4-5.
(4-30)
INDUCTIVE TRANSFORMER
The circuit to be analyzed is shown in Figure 4-6, where
Ll is the primary winding inductance
n 1 is the number of turns of the primary winding
L2 is the secondary winding inductance
n2 is the number of turns of the secondary winding
rs is the load resistance in the secondary circuit
k is the coefficient of coup~ing of the windings
M is the mutual inductive coupling between the windings
125
VI
II
L2
",
1
2
"2
rs
TPI072-51
The relationship between the primary and secondary winding inductances and
number of turns is:
(4-33)
The dots in Figure 4 -6 indicate the polarities of the windings. The analysis
is presented for the nominally phase-inverting transformer, but is equally valid
for the nominally zero phase-shift transformer if a l80-degree phase shift of
the secondary winding relationships is introduced. The resistance of the windings is assumed to be negligible in comparison to rs and the driving source
resistance.
The loop equations for the circuit of Figure 4-6 are:
j
w Ll + 12 .
jWM
(4-34)
(4-35)
From these:
V2
12 . rs =
(4-36)
and
(4-37)
Because of the large number of variables involved, a general analysis is difficult and attention is confined to two particular cases often met in practice. The
first of these is when the secondary winding inductive reactance is large compared to the secondary load resistance; the second, when the secondary load
resistance is large compared to the secondary winding reactance. When
126
J~,~;-:'.';~i''"
11
~~rs [1 +jW~2
k2
,(1;;2 ) ] . _
,~,-..
", ,~c;-:
." :
()
~.
,,
2
(I~Jk2)2" tan -1 __
wL2 (l-k2)"'-'
'_',JUI_
1 +. w L22 ,_'_'
_"
'
,,' rs 2
k2
I1 '
k2 '
'
(4-39)
(4-40)
n
L2
Ll
(~~)
k~
(4-41)
The resistance reflected into the primary terminals due to 1-s is:
Rs
(~~)2 r s
k
Ll,'
LZ
2
2 2
[1 + w L2 (1-k ) 2J s
,
'rs2
k2
r
(4-42)
For the simple case where k approaches closely to 1, Equations(4-41) and (4-42)
become:
V2
VI
_V LZ
Ll
=and
Rs
rs
n2
nl
too
-tan- 1 wLZ
rs
(4-43)
Ll
LZ
rs . (
:~ ) 2
(4-44)
127
For the stipulated ratio of WL2 to r s' the phase angle of the transformer then
approaches closely to the ideal value of 180 degrees, the phase error being
+18 degrees or less, and the impedance transforming ratio is simply related
to the inductance ratio of the windings. However, these are idealized relationships, and even small deviations of k from a value of unity can have an appreciable effect on the transformer action, particularly insofar as the phase angle
of the transformer is concerned. This can be illustrated by the calculations
presented in Table 4-1. These calculations are for a ratio of wL2/rs equal to
3 and show that both the phase and voltage ratio errors are reasonably small
when k is 0.9 or larger, but are appl'eciable when k is 0.85 and large when k
falls below 0.8. The voltage ratio error as k decreases is not of great significance since the correct transformation ratio could be obtained by suitably
adjusting the turns ratio, but the large phase error for k less than 0.9 is undesirable if the transformer is used in the oscillator loop.
tan -1 1JJL2 = 72 0
rs
Transformer
Phase Angle
(Referenced to 180 0 )
Voltage
Transformation
Error (%)
0.9
35
-17
- 9
0.85
49
-31
-23
0.8
59
-41
-36
0.75
67
. -49
-43
0.7
72
-54
-56
Normally, the amplifier circuit, in addition to its nominal zero or 180degree phase shift, will have a phase lag between input and output due to the
inherent time delay of signals passing between input and output. At low frequencies this will be negligible, but at high frequencies the phase lag may be
appreciable, particularly in transistor amplifiers. If anything, therefore,.it
is desirable that the impedance transforming network should contribute a phase
lead rather than an appreciable lag, as is the case for an inductive transformer
with a coupling coefficient of less than 0.9.
. ,
128
It is therefore necessary to minimize the transformer phase lag by making the coupling as close as possible. At frequencies below, say, 10 MC,
coupling coefficients of 0.9 or larger can be achieved relatively easily using
high permeability toroidal cores (J.Lo = 400 or larger), if intimate contact between windings occurs. This generally entails minimizing the spread of the
windings around the core and winding one of the windings tightly over the other.
At the low radio frequencies and audio frequencies, even these precautions are
frequently unnecessary when high permeability toroidal or pot cores are used.
The flux external to the core is then often negligible, permitting the windings to
be distributed around the core.
It should be emphasized that the values given in Table 4-1 are for a ratio
of WL2 to rs of 3. If this ratio is made larger, the phase and voltage transformation err()rs will increase for a given coefficient of coupling. Therefore, the
optimum design condition is wL2 equal to 3 rs.
The second case considered occurs when the load applied to the transformer
secondary is large compared to the secondary winding reactance. When rs ~
3 wL2, Equation (4-37) simplifies to:
VI
~ 11 ["':2
j"'Ll ~ -
(4-45)
129
Then
Vz ;::::: -k
VI
J*
LZ
Ll
90 0 -tan- 1
L!0
o - t an -1 wLZ
rs
- - t an -1.
rs
kZWLZ
(4-46)
(4-47)
Tan -1 wLZ will always be less than or equal to 18 degrees for the given condirs
tion, while tan -1 ~s
will be between 72 and 90 degrees. The maximum
k wLZ
input-output voltage deviation from 180 degrees is therefore -18 0 which occurs
when rs = 3 wLZ and k 1, decreasing as rs increases relative to wLZ. The
transformer phase angle is therefore always close to ideal. The resistance
reflected across the primary winding terminals due to rs is:
1 (n1)Z
nZ r s
(4-48)
- kZ
THE AUTOTRANSFORMER
130
JLl .
LZ
(4-49)
rs
TPI072-66
~.
0'"
"
-~-
-~----~--
,~.___
J2
(.l,;
[L2 +
M]
(4-50)
(4-51)
(4-52)
Therefore:
"
~2 [r;w+(i:~J..
.,' ,.
'
- _
'
...
_
(4-53)
12 {(rs~jw~~),tl:~:~2M
1- jW (L2
M))
(4-54)
and:
(4-55)
(4-56)
131
Substituting for M in terms of Ll' LZ, and k and manipulating finally gives:
-VI
V
1 +k j f
- l + -Ll (
L2
l_k
L2
1 +
kfi~
2
k + L2 + 2 k
wL2
( 1:l+j rs-
Ll
Ji2 )
Ll
(4-57)
1 + LZ + Z kJ'iZ
Ll
Ll
(4-58)
For the simple case where k approaches closely to 1, Equations (4:-57) or (4-58)
reduce to:
( 4-"E~9)
V2
132
100
90
:- t- ~
1\ r-....
r\.
80
\\
\12'1\11 ,
(%)
60
'"
"ro-
'\.
'\
[\.
\\l2/ VI
..... t--~
........
r- Io-
'- '-
~-
r-
'\
50
r-
r-
I- I - ""-
i"'t::: ::..::::
40
,I'-'-
-----
t-
i"-
,-
I'-...
o
/0
!' ...
k'
<
c=
k= 0.9
- ....
_ ",L2 = 3
"
--
--
1\
'~
20
30 PHASE
LAG
40
k' 0.7
)
'I,
50
60
k' 0.5
Y
2
12
10
16
18
20
22
24
TPI072-92
VI
=-
II
ju.:
,
Ll + L2 + 2M
(4-60)
WL2,'
rs
(4-61)
133
and for rs
~L2:
wL2
.
rs
(k
Ll + L2 + 2M) +
j~
(Ll + L2 + 2M)
(4-62)
.0
to rs
is:
(~~r rs
Rs =
(4-63)
Rs = (1 + ~)\
(4-64)
fL1
1.
Then:
-VI
V2
= - 12
k
m1
-
L2
2~
[ju.:L2
1 + - - . (1 - k )
rs
(4-65)
The autotransformer does not appear to offer any advantages over the
two '-winding transformer, except possibly when the impedance transformation
ratio required is small.
4 ...7.
The Wien Bridge network has frequency selective properties that may he
useful in low-frequency oscillators. The network is shown in Figure 4-9.
II
VR}
Vc
vlN
TPI072'5~
12
:;::: ~c
l' c
"!
....
Figure 4-9. Wien Bridge Network Circuit
134
fVa
13 ,
Vo
Vo
\'in
11 [R + iW1C + 1 +
II
j~ CR]
(4-66)
(4-67)
1 + j(.l,) CR
(4-68)
1
R
(1 + j(.l,) CR) (R + - - + - - - j(.l,) C
1 + j~ CR
1
(4-69)
where
Wi
At
1
CR
1
3
(4-70)
(.I,)
I,
1
jWIC
(4-71)
and therefore:
(4-72)
~.
TPI072-50
Figure 4-10.
135
Vin
3
2
11
R(I-:j)
(4-73)
3 R
(4-74)
(4-75)
3 R
This analysis is for one particular case of this type of network. If the
network is analyzed in its general form where Rl and Cl are the series elements
and R2 and C2 are the parallel elements, the input and output voltages are in
phase when:
u.: 2
( 4-76)
o
Vat zero phase angle is:
In
( 4-77)
136
SECTION 5
GENERAL OSCILLATOR TOPICS
5-1.
137
50
25
fo
.;1-
,,
ol---.L...---------:::,...-c;:::--+----~I--------=~-..::::::=------____,.l
-25
,--'"
"
'"
-50
......
""
".....
"
", ,
-75
-50
TF'I072-52
-20
......
....
" .....
,I,
.....
---L /
, '....
_....
-'''
"
"
"
,,"
""
"
" ""
20
100
TEMPERATURE(OC)
cuit, the frequency offset introduced initially will now cause the oscillator frequency to follow curve B1 over the temperature range, again assuming no variation due to the effects of temperature on other oscillator components. The
oscillator tolerance is now increased by 50 percent relative to that of the crystal unit. This may be further increased by the effect of temperature and other
variables on the other oscillator circuit components.
This is an extreme example and, although possible, it is not possible
that the effect will be so sev:ere. Nevertheless, an appreciable unnecessary
increase in oscillator overall frequency tolerance is likely to occur when this
method of initially tuning the oscillator is used. The correct method is to
138
initially adjust the oscillator to the actual crystal unit resonance frequency.
There will then be no frequency offset, and the sole cause of the increase in
oscillator tolerance relative to that of the crystal will be component variation
in the remainder of the oscillator circuit.
It is not always desirable to measure the frequency of each crystal unit,
and the necessity for this can be obviated if one crystal unit of known characteristics is used as a standard for initially adjusting all oscillators. The frequency
offset or miscorrelation, when the crystal units intended for use with the oscillators are inserted in circuit, will then be less than 5 PPM and typically less
than 2 PPM. It is good practice to determine the extent of this effect during the
oscillator design evaluation stage by measuring the frequency miscorrelation
for several known crystal units, preferably having a wide range of equivalent
resistance.
Changes in loop gain will cause variations in crystal unit dissipation. This may cause frequency variations of from 0.5 to 5 PPM
per milliwatt change in dissipation, depending on crystal unit type.
One of the major causes of loop gain change is the wide range of
crystal unit equivalent resistance. Loop gain differences of
sever-al times can be expected between several oscillators of the
same type because of this variation between crystal units. Consequently, oscillator and crystal unit frequency miscorrelation of
several parts per million can be expected if several crystal units
are interchanged in an oscillator circuit.
(b)
139
load that the tank circuit should tune to resonance at the crystal
frequency. If this is not the case the amplifier will be operating
. on the slope of the resonance curve and, in addition to the undesired resultant phase angle, there will be a possibility of loop gain
variation due to variations of the tuning capacitor and inductor
with temperature. This is also desirable from the viewpoint of
field maintenance. When a crystal unit, tube, or transistor is
sUbstituted, ,there will inevitably be a change in the oscillator
tuning due to the difference in parasitic reactanc'e, gain or resistance of the component changed.
In circuits where the amplifier is tuned to resonance, it is found
140
(d)
5-2.
141
I:\:J
.......
..,.
::0
til
)
100
1000)
10K
10
f-""]
2OOMC~
~/
lA17
II"
100
VI
I I
I I I I I "I
1000
1I11
10K
I I II I III
I
20K 30K
f--
I---
l -I---
10
/f30WC
hl\
1\
IIOMC
200MC
I I II
)'
'/
17
//
I)
/I
II'
/I
,
--,
::0
til
-'
..
:1
-'
:::J
UJ
...o
UJ
Q:
Vi
If)
Q:
"
:'i:1 l!j~rnl;!:~{I'IJ i
,~
:~'
'1
-5
~. .:-'=-
p::
f-'c'
,u
--
-,
II
,-.:
'"
"~_
if
'i
T 1.-1
I;
"I'T -,-:-;-,
I,
'
I'III,I'-~J:I
I'
, : , :11
I,"
I'"
',I'
:;:
,-
--
-I-_i
'i
I --
'I!, _~:_l,
',Tr-I
RESISTOR (OHMS)
-I-r
-,---~I-!
-,
:-+-:--1l
i'
II'IH
II,I;:L,-
i~ .
II,
'i: I,
II!
' i
!lllilJ
Iii, "fJ: bf1t:"11 i i '!!J~
H, lin':, 11 ;,fj}i 'llllf!i'
I, illl
',11 ~Il'
,,,IT
Ij
MJ'
.'1- 11""III"I=";:L'!I;['!'i ', lilil" :c'f!'i!"tl++li'iiliii,p,r'
1'111
II
"
-
i,
-;-L.;-l
.;il!_"" ' ,
Ijll=t, 1",
Iji :iliPi;.
, I
Ii:'
1m
-I"IT
,i=f:.jlc"
"~.~'
Ib
'111!ilT.,
p", n'\
;,'1
~""
::!
...o
'I
ft'" I" I II
'"""d:'I,
II:
'",
-10
..-
lOOK
iii
+5
_1=:',
'I' I
-15
I--'"
-4
=-
""I"
<,i
I-,'! I ,I,i:1"II"!"ltJII!I"IIT
11\ ttH
~1i- L
'I' ,II ' =,'
~20
100MC,130MC
F1"2~OMC
170/MC
I
-30
100
Figure 5-2. Variation of Resil;3tance and Reactance With Frequency of 1/2 Watt Resistors
IA
170~C
TP107Z-92
-'
-'
:::J
UJ
...o
UJ
Q:
in
If)
of-
Q:
lOOK
IMEGO
i-
;:".---
'Y: ",.
.r.,""--;~,
!'
'.
"-",...>l.~-- i,
t .~
".,
In other instances,' such as using a resistor to load the oscillator for test purposes,
it will be essential to know the actual value of resistance with reasonable accuracy.
Circuit wiring will also influence the performance of these elements.
It is of little use to employ a component with a desired characteristic if the component will be wired into the circuit with long lead lengths. One inch of 20-gauge
wire has a self-inductance of approximately 0.02 UH, corresponding to a reactance of 25 ohms at 200 MC. When working at low impedance levels, this inductance can have appreciable effect 'on circuit performance. Long lead lengths also
increase mutual inductive coupling (the effects of which are more difficult to
interpret) and stray capacitive coupling (which will have a maximum effect at
high impedance points of the circuit).
When designing at high frequencies;because of the possible wide deviations from nominal of the components that will be used in the oscillator, it is
advisable to measure the component values at the particular operating frequency
to insure that design conditions are being fulfilled. In fact, the experiences of
this program suggest that impedance measuring equipment is essential to the
design effort at the high frequencies. Throughout that part of the ,program dealing with high-frequency oscillators, an RX meter was in constant use and proved
invaluable In aiding the design effort.
The circuit layout problems posed during initial experimental design
eyaluation are somewhat different from those in a final design. It will be necessary to take measurements and change components in the circuit to: evaluate
the performance, while this will not be necessary in the final design., A more
open construction is therefore necessary initially, to allow access for voltage
measuring probes and to facilitate the changIng of components. ' Figure 5-3
shows photographs of the layouts used for all the high-frequency oscillator test
circuits evaluated during this program. ' In these layouts the output and input
circuits were separated by the shield extending across the chassis. This shield
is not essential; it was included during the early evaluations as an additional
safeguard and, since the layout met the measurement needs, it was used throughout the high-frequency design program.
5-3.
143
F1LAMENT
DECDUPLING
Co CANCELLATION
CHOKE.
BOTTOM LEG OF
IMPEDANCE TRANSFORMER
BOTTOM LEG
CATHODE
CHOKE
8ASE BIASING
AND DECOUPLING
R, 'METER
GROUND TERMINAL
120 - MC
2N834 TRANSISTOR
INPUT
CIRCUITS
150-MC
8058 TUBE
3188
CAPACITIVE IMPEDANCE
TRANSFORMER
LOAD
RESISTOR
DECOUPLING
OUTPUT
CIRCUITS
8+ DECOUPLING
I!lO-MC
8058 TU8E
H84
144
(b)
The power output and its variation, when subj ected to, a certain
'range of environmental stress, specified variations in oscillator loading, and permissible power source variations.
(c)
The task facing the designer is to meet all of the design requirements
and, when a quantity of oscillators are to be built, to ensure that compliance is
maintained when the likely range of variables such as amplifier gain, component r
tolerances, and crystal eqUivalent resistance are encountered. The following
guidelines may be useful in making a preliminary assessment of design feasibility.
The causes of oscillator frequency instability have already been detailed
in Paragraph 5-1, together with the precautions required to minimize this effect.
As a general rule when many oscillators are to be constructed, the oscillator
overall frequency tolerance is likely to be 10 to 15 PPM wider than that of the
crystal unit, provided reasonable precautions are made in the selection of components. If oscillator adjustments are permissible when any maintenance changes
are necessary, this tolerance will decrease to possible 50 percent of the crystal
unit tolerance.
The oscillator power output is a function of the power supply voltage,
the loop gain, and the oscillator external load. Because of the possible large
variation in loop gain due to the wide range of crystal eqUivalent resistance likely
to be encountered, the power output differences from unit to unit may exceed a
rati9 of 4:1. The change in power output caused by supply voltage variations will
be approximately equal to the square of the supply voltage change.
Ignoring heater power requirements, vacuum tube oscillators are generally inefficient in converting supply power to oscillator output power. Crystal
unit power dissipation usually limits the plate voltage swing to a fraction of the
DC plate voltage, and plate current levels are frequently dictated by consideration of maximizing the amplifier gain. This is particularly the case at design
frequencies above 20 MC where high transconductance, and, hence, high plate
current tubes are practically essential. Transistor oscillators can be designed
to give power conversion efficiencies of 30 to 40 percent, allowing for adequate
biasing to meet wide temperature variations.
145
5-4.
146
SECTION 6
VACUUM TUBE SERIES RESONANCE OSCILLATOR DESIGN
6-1.
GENERAL
Vacuum tube series type oscillators can be used throughout the entire
frequency range from below 1 KC to 200 MC. Many types of circuits have been
developed for use with this type of crystal unit, no one of which is usable throughout the entire range due to the wide variation of crystal unit characteristics encountered in the frequency range.
One circuit that is usable over a wide frequency range, when a suitable
tube is selected, employs a grounded grid amplifier in the configuration shown
in Figure 6-1 (a). This circuit can be used in the frequency range of 90 KC to
200 MC, although in the range of approximately 2 to 60 MC an additional impedance transformer is required between the crystal unit and the tube cathode
if the design is to be optimized.
Below 90 KC, the oscillator configuration of Figure 6-1 (a) is no longer
entirely suitable and a more useful configuration consists of a grounded cathode
amplifier with a phase inverting feedback network, as shown in Figure 6-1 (b).
TPI072-67
( 0 )
{b)
147
Table 6-1 gives the major characteristics of the military standard series
resonance crystal units in the frequency range of 200 KC to 125 MC. More detailed specifications are given in MIL-C-3098, Supplement 1. There are no preferred series resonance crystal units in the 90 to 200 KC range, but the CR-37A/
U anti-resonance type can be used as the equivalent of a series crystal unit if a
20 PF loading capacitor is connected in series with the crystal unit. This type
and the CR-42A/U for use in controlled temperature applications, for whicq the
appropriate series loading capacitance is 32 PF, are included in Table 6-1 with
this proviso. Similarly, there are no military crystal units for the frequency
range of 125 to 200 MC, but crystal units can be purchased in this range that meet
the specifications of the CR-54A/U, CR-56A/U, CR-80/U, CR-82/U or CR-85/U
types, except that the maximum resonance resistance may be increased to 80 or
100 ohms.
The multiplicity of crystal unit types in certain frequency ranges is due
partly to the various types of crystal holders employed and also to there being
usually two and sometimes three different frequency tolerances. In the majority
of cases the actual quartz element is the same for all the various types at a given
frequency, the differences being either the crystal holder type or the degree of
precision employed in manufacturing the quartz element.
The maximum resonance resistance of crystal units varies appreciably
over the frequency range of 90 KC to 200 MC, particularly at frequencies below
20 MC. 'This variation is plotted in Figure 6-2 illustrating the rapid change of
this crystal unit characteristic below 20 MC. Only the maximum value of
resonance resistance is specified, and the actual resonance resistance of individual crystal units varies widely. The actual range of values likely to be
148
TABLE G-l,
Frequency
Range
(MC)
Operating Temperature
Range (Centigrade)
Frequency
Tolerance
( Percent)
Rated
Drive
(MW)
Maximum
Resonance
Resistance
(ohms)
Crystal
Unit
Type
Holder
Type
to 200
-40
-40
-40
-40
-55
-55
-55
-55
-55
-55
-55
-55
-55
-55
-55
-55
to +70
to +70
to +S5
to +70
to +105
to +105
to +105
to +105
to +105
to +105
to +105
to +105
to +105
to +105
to +105
to +105
0.01
0.02
0.01
0.02
0.005
0.0025
0.005
0.005
0.005
0.005
0.005
0.0025
0.005
0.0025
0.002
0.005
-55
-55
-55
-55
-55
-55
to
to
to
to
to
to
+105
+105
+105
+105
+105
0.005
0.005
0.005
0.002
0.005
0.002
20
2
2
2
2
2
-55 to +105
0.005
+105
2
2
2
2
10,and 5
10 and 5
5
20
2 and 4
2
2
2
2
2
2
2
~OOO to 2500
5000 to 5500
2500 to 7500
3300
520 to 15
520 to 15
50 to 20
40
40
50 and 75
40
40
40
40
40
40
50
50
50
50
50
60
and
and
and
and
and
SO
so
so
SO
SO
80 to 100
CR-ISB/U
HC-21/U
CR-37A/U
HC-13/U
HC-S/V
CR-25A/U
HC-S/V
CR-45/V
HC-S/U
CR-19A/V
IIC -S/U
CR-S5/U
HC-lS/U
CR-soA/u
HC-S/U
CR-51A/U
CR-52A/V
HC-S/D
CR-24/V
HC-lS/V
CR-55/U
HC-lS/V
HC-lS/V
CR-S7/U
HC-lS/U
CR-72/U
HC-lS/U
CR-7S/U
CR-77/U
HC-25/V
HC-25/U
CR-S!/V
CR-73/U
HC-S/U
CR-53A/U
HC-S/U
CR-54A/V
HC-lS/V
CR-5SA/V
HC-lS/V
CR-SO/V
HC-25/U
CR-S2/U
HC-25/U
CR-83/U
Similar to
CR-54A!U, CR-5SA/U
CR-80/U, CR-82/U or,
CR-S3/U
i:.-':
t:t~
70 to
70 to
70 to
70 to
SO to
70 to
,70to
80 to
80 to
SO to
70 to
80
SO
SO
80
90
SO
SO
90
90
90
SO
0.002
0.003
0.002
0.002
0.002
0.001
.0.002
0.002
0.002
0.002
0.001
2
2
2
5and2.5
5 and 2.5
2 and 1
2 and 1
2 and 1
2 and 1
1
1
2000 to 2500
4500 to 5000
2500 to 7500
520 to 15
520 to 15
60 and 40
SO and 40
40
40
50 and SO
40
CR-30A/U
CR-42A/U
CR-2sA!U
CR-28A!U
CR-35A/U
CR-S5/U
CR-32A/U
CR-Sl/U
CR-M/U
CR-59A/u
CR-75/U
HC-21/l
HC-l:J/r;
HC-S/U
HC-G/U
HC-S/U
HC-S/U
HC-S/U
HC-lS/u
HC-25/u
HC-lS/U
HC-6IV
* Special Application
**
149
t_
+t
-l-
8K
6K
-". +-
='!
4K
,-
>C
c
E
...
a:
2K
I K ~....I....l....L..l....L..l..u.L.L.U.l.U.L.u.u....I..l..JU.,j,J..J.l.l..LU.I.l.L.l...J..j".L.U~
100KC
500 KC
I MC
TPI072 -79
FREQUENCY
f-':-
400
200
c;;
~
:I:
..
0
I I
100
Rsmax
~;
r:l'
a:
..~
a:
40
-20
10.........uI.............I-I..I....l,,,,I.J..I.2,1,,,j,,j,,O.......,I,I,,,O.......4j,,,j,,,J,,J...l.j,j,j...6.l...l..~ ........I.10.................................2.u0.................................
4~O....................
6....
0 .....................
IO..O
.........................2....00
TPI072-80
FREQUENCY (Me)
150
151
6-3.
The basic triode amplifier design equations are given in Paragraph 3-5.
These appear to be reasonably accurate, when suitable tube types are employed,
for predi'cting amplifier small-signal characteristics at all frequencies below
50 or 60 MC, using parameter values derived from the plate characteristic
curves and other related plots. The most useful of these plots are the smallsignal transfer characteristics which relate U, R p , ~nd gm to the DC plate current and voltage. If necessary, however, these parameters can be derived
from the plate characteristics using the methods given in the majority of textbooks dealing with vacuum tube amplifier design.
In general, for this type of oscillator the effect of the tube reactive
elements is small at frequencies below 60 MC, provided suitable tube types are
,selected at the higher frequencies. The tube can therefore be treated as an
essentially resistive device, except, of course, insofar as the tube plate
capacitance will influence the plate circuit tlUling.
Above 50 or 60 MC, judging by measurements made during oscillator
designs and evaluations, the accuracy of the basic amplifier design equations
appears to gradually decrease, making them lUlsuItable for design purposes.
The behavior of grounded grid triode amplifiers is then such that it appears as
if the apparent plate resistance of the tube is reduced appreciably below the
value applying at low frequencies. The effect of this is that,for a given plate
load resistance, the amplifier voltage gain is substantially higher and the input
, resistance lower than predicted from the low frequency tube characteristics.
In view of this behavior, the most suitable method of design is to
experimentally determine the amplifier characteristics for a variety of plate
load resistance values. The method employedfor the high-frequency oscillator
designed for this handbook was to us'e an RX meter as the amplifier driving source
and to measure the voltage gain and the amplifier input impedance. The measuringtechnique and the use of the derived data forms part of the design procedure
for crystal oscillators above 60 MC and is fully discussed in Paragraph 6-17.
6-4.
152
There are two ways in which the tube can be made to perform this function, one of which relies on the non-linear voltage gain relationship of the
amplifier as a function of signal level. Referring to Figure 6-3, if the plate
voltage and plate circuit load line are as designated by the symbol A, a signal
of the amplitude indicated by A I and A II would require a m~ch larger negative
than positive grid signal voltage excursion. That is, the instantaneous gain of
the amplifier is severely reduced during the positive plate signal voltage swing,
and consequently a form of plate signal limiting occurs.
30
II I
d~
l/
~'
~9/
rJ I/'
1/
.J ....
rT
Z
17
a 10
l/
1/
a::
a::
I.--"
.J
L,..-
""""
....
.....
L.",oo
....... V
......1.--"
L.,...
""""
Il
1/
[...00 10"""
I,.;'" I~
"-
I--"
100
TPI072 -78
l/
t...-'
B"
.... r>r .A
1.0-"
[...0010'
;p
.....10""'"
"""
L,...o
.....
......
.-
I--"
lo-
""""
. . , 9..... 10'
L,...o
I"~ ~E
A~
./
..... 10'
.J1o"""
\~
'"
~('," V
1/
.....V
~k B'
V
~
rJ
....
OV
o~ 1./
..... 10'
,~
1/
1/
ILl
....
tz,9 V
1/
-/
./
1/
.J
t-
/'
l/
"~~.o ....
'f'"
~"
t...-' ....
I.--"
~
10"
"..
~4'0
.
200
6.0
300
L.",oo
350
PLATE VOLTAGE
Figure 6-3.
153
The DC operating point in conjunction with the plate circuit load line determine the level at which limiting can commence as denoted approximately by
the intersection of the load line with the plate characteristic curve for zero grid
voltage. The actual point at which a significant degree of limiting will occur,
however, is a function of the grid-cathode circuit DC resistance and, to a lesser
extent, the DC plate current of the tube. If the DC resistance of the grid-cathode
circuit is low, the increased loading of the signal source by the diode will not
cause substantial limiting until the grid has an appreciable instantaneous positive
bias relative to the cathode, and the plate signal voltage will then be larger than
anticipated from the load line relationships. Alternatively, if the grid-cathode
circuit DC resistance is high, the input signal loading contribution of the diode
will be significant when the instantaneous grid-cathode signal voltage approaches
zero volts, and the plate signal voltage will accordingly be decreased below that
anticipated from the load line relationships.
The signal limiting action of the tube is related to the DC plate current to
the extent that, as the plate current level is decreased, a given amount of
instantaneous grid current is more effective in producing signal limiting. The
lowest grid-cathode signal level at which limiting can be made to occur is also
a function of the diode characteristics. In a thermionic diode a few microamperes
of current flow when the diode is reverse-biased, typically having a value of 5 to
10 UA when the cathode is positive relative to (in this case) the grid by 0.7 V
and perhaps a value of 1 UA at 1 volt reverse-bias. At grid bias levels of 1 volt
or larger, the effects of this current are negligible under all likely circuit conditions. But if a tube operating point which requires a grid bias voltage of less
than 1 volt is desired, this current can substantially affect the bias condition
achieved if the grid-cathode circuit DC resistance is high.
The oscillator circuit requirements are usually such that the only way in
which a high cathode-grid circuit DC resistance can be obtained is by using a highvalue grid leak resistor and, depending on the amplifier configuration, an
associated coupling or decoupling capacitor. Under these conditions, the relatively
large quiescent grid current flowing at bias levels of less than 1 volt charges
.
this capacitor in the sense that increases the grid bias level. Consequently, the
desired grid bias point is not obtained, and in addition the amplifier voltage gain
is less than that contemplated. Because of this behavior, it is therefore not
practicable, using a high DC resistance grid-cathode circuit, to design for tube
operation at grid bias levels of less than 1 volt with any assurance of obtaining
the expected amplifier gain or input resistance.
If the relative limiting characteristics of a triode, having a high DC
grid-cathode circuit resistance and operating at a grid bias of 1 volt, are compared to those of the same triode having a low DC grid-cathode circuit resistance
and operating at a grid bias of less than 1 volt, it appears that the former will
cause limiting. at a lower plate signal level. Consequently, this is considered
154
Diode Limiting
It is also possible to use an auxiliary circuit to provide the plate voltage limiting action. One such method is shown in Figure 6-4'. In this circuit
the diode connected to the plate of the tUbe is reverse-biased by the volt-drop
across resistor R '. Consequently, for peak plate signal voltage amplitudes
DIODE
R'
SUPPLY
VOLTAGE
TPI072-93
155
smaller than the reverse-bias voltage, the diode has no effect on the circuit
operation. But when the peak plate signal voltage amplitude attempts to exceed
this bias level, the diode conducts and the signal amplitude is stabilized. This
circuit provides a means of limiting the plate signal voltage at virtually any
desired amplitude and almost entirely divorces the limiting action from the
amplifier, permitting the amplifier to now be optimized for its sole function of
amplification.
The characteristics required of the diode are as follows:
(a)
(b)
The peak inverse voltage rating must exceed the peak-to-peak signal
voltage.
There are two major factors that have a great. influence on the impedance
and voltage level relationship required between the various circuits that make up
the oscillator. .One of these is the relationship required between the crystal unit
resonance resistance and its driving source and load resistances.
Paragraph 1-8 shows that if the phase-shifting capability of the crystal
unit and hence its frequency stabiliZing property is not to be unduly degraded by
the remainder of the oscillator circuit, the terminating"resistance levels on
both sides of the crystal unit should be small in compari.son to the crystal unit
resonance resistance. Ideally these should be negligibly small in comparison
to R r , but in practice, with the simple type of circuit considered here, this
cannot be approached and a compromise is necessary. For any type of crystal
unit, at any given frequency, that unit having the largest permissible value of
resonance resistance for its type will have the worst phase-shifting capability.
Therefore, in an oscillator the worst performance in this respect can be
expected for this worst-case crystal unit. Since the oscillator should operate
156
satisfactorily with any crystal unit meeting the type specification, this worstcase conQition of operation is the one which should be considered when arriving
at a suitable compromise value of crystal unit terminating resistance. The
phase-shifting capability of the crystal unit in the oscillator circuit relative to
that of, the crystal unit 13.lone,is given in Paragraph 1-8 (when R r is replaced by
R r max) as:
d1/QL.
dQ s
='
dQ s '
Rr
R
max
max
r
'
+ Ri + r
(6-1)
where rand Ri are the crystal unit drive source and load terminating resistances,
respecti vely .
Substituting relative values into Equation (6-1) shows that if the total
terminating resistance is equalto,Rr max, 0.5 Rr max, or 0.33 Rr max, the
circuit phase-shifting capability is, respectively, 50, 67, or 75 percent of that
of the crystal unit. The last of these values causes a relatively small degradation and is a suitable choice of terminating resistance level, disregarding all
other considerations. Except when using diode limiting, however, the characteristics of triode amplifiers are such that, at the crystal dissipation levels allowed,
this type of oscillator would be impractical over a wide range of frequencies if
the total terminating resistance was restricted to this value. In order to obtain
design feasibility it has been found necessary in practice to compromise further
and to regard a total terminating resistance equal to or less than Rr max as
acceptable at frequencies up to 60 Me.
The sacrifice in circuit phase-shifting capability incurred by this relaxation is not excessive, resulting in a reduction from 75 to 50 percent of that ,of the
crystal unit. This is considered warranted by the resulting relaxation in amplifier limiting performance ,and gain requirements obtained;
In practice, it is difficult to control both the terminating resistance values
simultaneously. Fortunately, the drive source resistance is usually found to be
acceptable when attention is concentrated solely on the output terminating resistance.
The second factor having a major influence on design is the problem of
preventing crystal unit overdrive posed by the relatively large signal level at
which limiting occur_s in tube amplifiers. The allowable signal voltage across
the crystal .unit is limited by its dissipation rating which should not be exceeded
for any conditions of oscillator operation. When the crystal unit is operated
into a terminating re sistance, thi s in turn places a restriction on the allowable
voltage at-the crystal unit input terminal. This effect is considered in Paragraph
157
1-9 where the allowable input voltage is shown to be a function of the output
terminating resistance, the relatiohship being:
Vmax .= 2 ~ PCMAX . Ri
(6-2)
The allowable crystal unit input voltage at any frequency can be determined by relating Ri to R r max for the known value of PCMAX and applying
Equation (6-2). This gives the values of Vmax shown in Table 6 -2 for typical
crystal unit types when Ri is chosen to provide a satisfactory crystal unit
terminating resistance.
TABLE 6-2. VMAX AND TVo -1 AS FUNCTIONS OF CRYSTAL UNIT
CHARACTERISTICS
Ri = 1/3 Rr max
Vmax RMS
l/ TVo
Ri = 0.5 Rr max
Vmax RMS
l/
Tvo
Ri = Rr max
Vmax RMS
l/ Tvo
Frequency
Rr max
(ohms)
PCMAX
(MW)
90-170 KC
5000
3.6
5.5
4.5
4.5
6.3
3.2
170-250 KC
5500
3.8
5.4
4.7
4.2
6.6
200 KC
2500
2.6
7.7
3.2
6.2
4.5
4.5
500 KC
7500
4.5
4.5
5.5
3.6
7.7
2.6
1 MC
440
10
2.4
8.3
6.7
4.2
4.8
2 MC
185
10
1.6
12.5
1.9
10.5
2.7
7.4
5 MC
37
10
0.7
29
0.86
22
1.2
16.7
10 MC
20
10
0.52
38
0.63
32
0.9
22
10-15 MC
18
0.35
57
0.42
48
0.6
33
15-20MC
15
0.32
63
0.39
51
0.55
36
10-61 MC
40
0.33
61
0.4
50
0.57
35
The crystal unit input terminal signal voltage is related to the plate
signal voltage by the voltage transformation ratio TVo of the interposed impedance transforming network.
From the foregoing discussion of tube limiting characteristics and the
values of Vmax given in Table 6-2, it is possible to estimate the maximum value
of Tvo which may be employed when using tube limiting at the various frequencies.
Assuming the 20 VRMS plate signal limiting criterion previously arrived at, this
gives the plate signal to crystal input signal ratios(_I_) given in Table 6-2 for
TVo
158
the various relative crystal unit output terminating resistance levels. The values
are given in this form because it allows a readier appreciation of the problem
when it is realized that the product of the amplifier gain and the step-up voltage
ratio of the amplifier input transformer (when used) must exceed the values of
1 .
T'
Vo
For example, using the values contained in the bottom line of Table 6-2,
above io MC when Ri is equal to 1/3 R r max, the voltage "gain" from the crystal
output terminal to the plate circuit must be in excess of 61 becauseof the voltage
reduction in the transformer connected between the tube plate and the crystal input terminal. A further attenuation occurs across the crystal unit, and in actuality
the voltage "gain" from crystal output terminal to the tube plate would need to be
in excess of 300. At the impedance levels involved, this is not feasible with the
available triodes. If, alternatively, Ri is equal to R r max, the actual voltage
"gain" required is approximately 100; a value that is just feasible using the most
suitable tube type.
Above 10 MC, therefore, it is only practicable to use crystal output
terminating resistance levels approaching the maximum resonance resistance of
the crystal unit if tube limiting is employed. Using diode limiting, TVo can be
increased to practically any desired value, reducing the reqUirements on the
remainder of the circuit and allowing the use of a lower relative value of Ri.
Below 10 MC, the allowable values of TVo increase, and the amplifier
requirements are then riot as critical. And at the lowest frequencies, this effect
is no longer a design problem.
6-7.
Referring to Figure 6-5 the loop gain of the oscillator circuit can be
conveniently divided into four factors as follows:
(a) The amplifier voltage gain GV from cathode to plate circuit.
(b)
(c)
The voltage attenuation AVC from the crystal unit input to output
terminals.
(d)
159
NOTE
.R
I: Tv
TPI072-77
Figure 6 -5.
e ircuit Defining
RT +R p
(6-4)
~+1
and
(~ + 1) RT
R T +R p
Gy
RT
R in
(6-5)
The vol~ge ratio of the transformer at the amplifier input, assuming negligible
losses, is:
(6-6)
where Ri is the transformed amplifier input resistance which is related to R r max
by the expression:
.
k
Ri
R rmax
(6-7)
AYe is the voltage division ratio of R r ~ax and Ri in series: That is:
AYe
160
Ri +R r max
k
1 +k
(6-8)
Ri + R r max
Tv, 2
(1 + k) R r max
Tv, 2
(6-9)
The oscillator external load resistance reflected into the plate circuit is related
to RT and RFB as:
(6-10)
Substituting into Equation (6-3) for Gy, AYe' and T\j gives:
-k (I + k)
TV
o
( 6-11)
RL
k R r max
(6-12)
R in
L
T
+ ( 1 + k) Rr max
Yo
L
2
Tv,
o
For a worst-case design a small signal loop voltage gain of 1.4 is normally suitable to ensure satisfactory oscillation. Substituting this value for
G-v L then gives the relationship:
GV
1.4
(1 + k) Rr max
TVO
k R r max
Rin
~
- 1.4 Tv,o
1.4
t...1...... -
TV;o TV,-
(6-13)
Equation (6-13) defines the relationships that must exist between the voltage ratios
of the two transformers, the amplifier input resistance, the crystal unit output
termination factor k, the oscillator external load, and the crystal unit resonance
161
:5;
Rin
:5;
(6-14)
3 Rin(s/c)
, where Rin(s/c) is equal to J.L ~P l' the input resistance when RT is zero. Relating this to TVi then gives:
0.58jkRr max s I s 0.85 k R r max
Rin(s/C)
TVi
Rin(s/c)
(6-15)
1
relative to 'the
Vi
selected tube characteristic s. With the aid of this relationship, while also
considering the values of TVo dictated by the crystal dissipation, it is possible
to locate the range of oscillator circuit relationships from which a suitable
selection can be made.
In performing this process it is necessary to know the amplifier total
load resistance RT. This can be obtained by substituting for RFB iIi Equation
(6-10), giving:
162
TV o 2
RL
1+
(1 + k)' R r max
(6-16)
: - rt
r!--ti
---'~:,T.,-I~,'
~r--H-ti,',J:I'~I H-+++- np
-i-:!o.-
'"
,':
I;
I Ii
1
-i
- -e--.-' j1l='
---,-
- ,.
J..
FF
-T,
f-tl
,,~
i'l..- - fl
-
",':-
_t.,
~_If+j _ - ~
r
-- -
f--:-
,j
0.15
,
.-ti: --q -
~:F
0.2
h-
0.4
- h-:
++
0.5
II
0,6
0.7I
0.8
/.0
1.0
II- +----+,-t-t-t-r-i--H-t+
=1- ~ -
'-+--1--1-
0.1
0.0\
TPI072-76
0.3
0.4 0.5
I 0.7 I 0.9
0.6 0.8
0.\
0.1
\.0
Tvo
163
6-8.
Vi
as a parameter.
Step 1 - Select a crystal unit type applicable at the desired operating frequency, and determine from the specification sheet the crystal unit dissipation
rating PCMAX and maximum resonance resistance R r max at this frequency.
Calculate the maximum allowable crystal unit input voltage for an output
terminatingresistanceofk' R rmax , assigning to k values of 0.33, 0.5, and
1. The formula is:
Vmax = 2 jPCMAX . k . R r max
(6-17)
Vmax
20
(6 -18)
164
Step 4 - Determine the short-circuit input resistance (g)of the tube for
.
m
the selected tube operating conditions. At design frequencies above 2 MC where
an amplifier input transformer is necessary, calculate the likely range of values
of l/TVi from:
0.58
k . R r max
R
in(s/c)
k . R r max
Rin(s/C)
(6-19)
k should be assigned values of, say, 0.33, 0.5, and 1. The ranges of values of
1
Tv,. obtained and the maximum values of TV obtained in Step 1 for the same k
1
values locate the regions in Figure 6-6 suitable for investigation. For an
165
lying within
Vi
RL
the range obtained for a particular value of k and locating a value of (1 +k) R
rmax
on this curve which is compatible with the appropriate maximum value
of TnVo
,
calculated in Step 1. The values of RL and R T are then obtained from the values
1
RT
of k, T~' R r max and the ratios of -R given in Figure 6-6. The value of RT
Vi
L
obtained is then used to calculate the actual amplifier input resistance from:
_ R p + RT
/-L + 1
(6-20)
Rm -
Using this value of amplifier input resistance the actual voltage ratio of
the amplifier input transformer that will give the assumed crystal unit terminating condition is calculated from:
T~
1__R;.:.i.:.:,n
'\l K
_
. R r max
(6-21)
The loop voltage gain is then calculated using the values of RT, Rin, and TVi
obtained in the three preceding calculations from:
k
Gv L
1'""+k .
RT . TVo . TVi
Rin
(6-22)
If the loop voltage gain obtained is 1. 4 or larger, the design is feasible for the
166
If the loop voltage gain calculated for k equal to 1 is much less than 1.4,
it will be necessary to repeat the loop gain calculation commencing with a smaller
assumed value for l/TVi'
The design feasibility will be dependent on obtaining a value of R L which
is practicable when referred to the actual oscillator external load and the losses
to be expected in the plate tuning circuit and feedback network. These losses
are taken into account by considering them to form a part of RL' The actual
value of RL is then given by:
(6-23)
where RLP is the effective parallel tuned circuit losses appearing at the plate
terminals.
At frequencies above 10 MC and particularly above 30 MC, RLP can be an
appreciable part of the oscillator load, even when the Q of the network is high.
This is due to the fact that the plate circuit tuning capacitance C will need to be
from 10 to 20 PF. This is related to RLP by the formula:
(6-24)
At 50 MC, for example, the reactance of 20 PF is 160 ohms, giving R LP equals
16 K for Q equal to 100.
At design frequencies below 2 MC where an amplifier input impedance
transforming network is not used, TVi has a value of 1. Attention is then confined to the circuit relationships given by the l,owest curve of Figure 6-6 in the
region.to the left of the approp~iate maximum value. of TV determined in Step 1.
o
The process is then the same as described above,
RL
is read from
.
(1 + k) R r max
Figure 6-6, and a value of k is assumed based on the short-circuit amplifier
input resistance. RL is calculated for the assumed value of k, and RT determined
RT
1
from the plot of R for ~ equal to 1.
L
Vo
The actual amplifier input resistance for the calculated value of RT is
obtained from:
= R p + RT
J.J.+1
(6-25 )
167
(6-26)
Rr max
GV L
= l+""k'
RT . TVo
Rin
(6-27)
The further manipulations required to finally fix the circuit relationships are then as previously described for designs above 2 MC.
The crystal unit terminating resistance level on the input side is
difficult to ascertain since the amplifier output resistance is a function of the
drive source resistance. A rough estimate can, however, be obtained by considering the amplifier output resistance to be equal to RT' The crystal unit
input terminating resistance is then equal to RT . T ~ . This will usually be
o
small compared to the output terminating level.
(6-28)
168
r--....--------
----
---
~II--......
( b )
( Q)
~D~-'"
TPI072-75
...
.---
(c )
~Dt---
(d )
169
\
(c)
170
The amplifier grid circuit will normally consist of a parallel combination of a resistor and a capacitor. The value of capacitance required is
determined by the need that the grid should be effectively at AC ground at the
operating frequency. It will usually be satisfactory if the reactance is less than
10 ohms. Above 10 MC, the type of capacitor and the lead dress may be critical
factors because of self-resonance. The ideal choice is then a capacitor that is
self-resonant at the design frequency. A grid-dip meter is useful for determining a suitable value of capacitance meeting this condition.
The grid leak resistor can be conveniently used to adjust the level at
which signal limiting occurs. A large grid resistance causes limiting at a lower
signal leve I relative to a smaller resistance. The selection of a suitable grid
resistor value is therefore made during the initial testing of the breadboarded
oscillator. A 10 to 100 K resistor is a suitable one with which to commence
testing.
Step G - Experimental Adjustments
After constructing the breadboard, it is helpful to check the loop
gain experimentally. This can be done by applying a signal, at the design frequency, to the crystal output terminal point via a resistor equal to R r max with
the crystal unit removed from the circuit. An oscillator load resistance equal
to RL should be connected across the plate circuit and another resistor equal to
R r max + Ri, simulating the feedback network load, should be connected from
the crystal unit input terminal point to ground. The plate and cathode circuits
a rc then tuned for maximum signal at the crystal unit input terfulnat
points
and
j
,
a comparison made of this voltage relative to that at the signal input side of the- ..
resistor simulating Rr max' Satisfactory oscillation will only be feasihle if this
ratio is larger than 1.3. The resistors used in this test should be measured at
the design frequency, particularly above a few megacycles per second.
-_
171
...
DESIGN EXAMPLES, 90 KC TO 60 MC
R r max
k
Vmax
TVa max
(RMS)
0.33
2.4
0.12
0.5
0.15
1.0
4.2
0.21
120 VDC, VG
4 !v1A,
~n(s/c)
260 0 hm s ::::: 0 . 6 R
r max'
14.3 K,
RT
12.3K,
Rin
460 ohms.
2
.
. GVL. = 1.37., RT . TVa ::::: 120 ohms, and the total crystal unit
termmatIng res1stance 1S approximately 1 3 R
172
r max'
6-11.
R rmax
15 ohms,
= 5 MW
PCMAX
Vmax
(RMS)
TVomax
0.33
0.32
0.016
0.5
0.39
0.02
0.55
0.028
Tube Characteristics
For E p
110 VDC, VG
63,
Rin(s/c)'~
-0.9 VDC, I p
=6
110 ohms.
MA, and R p
7 K.
Let the crystal unit output terminating resistance be 8 ohms (k = 0.53), then
T1
\l
O. 16
Setting
1
TV;
~ 0.23
TVI
and
Rin
.....
300 x 23
RL
Actual GVL
6.9 K, R T
0.8 R L
5.5 K,
200 ohms.
1. 45, R T T V2
o
;:::::::
8 ohms.
The diode dipping level should be set to give Vmax less than 0.39 VRlVIS
for a crystal unit having a resonance resistance of 8 ohms. This corresponds
to a plate signal voltage level of 13 VRMS.
'Using a capacitive divider amplifier output impedance transforming"network and with the notation of ~ection 4, the network values are obtained as follows:
x (C 1
+ C)
2 <
"':, '13:.
(R rmax + R I) = 8 ohms,
173
giving:
Cl + C2
Cl + C2
Cl
Therefore:
1
0.03
C2
Cl
Selecting C 2
1000 PF
32
1000 PF gives C 1
32 PF.
A diode reverse bias of 12 VDC was found suitable for preventing crystal
uni t overdrive.
174
6-12.
, Rr
(ohms)
19.999710
19.999980
19.999980
4 (Unit 3 with
7 ohm series
resistor)
19.999840
15
Crystal Units
(CR-19A/U)
r - - -. .- -....-.J\",N'__
2.0K
IO.OIUF
RL=IIK":"
IN3064
~ O.OIUF
6CW4
30PF
36PF
O.OIUF
IOOOPF
~~<~~
::1,
:~:I' ';
/':
TPI072-74
Figure 6-8.
11 VRMS)
Change
Frequency
Vo
1 PPM
~Vo
= +20%
175
Change
Frequency
Vo
1 PPM
l::.Vo = -30%
Frequency
Vo
1 PPM
l::.Vo = 10%
Frequency
Vo
<1 PPM
l::.Vo < 3%
Frequency
Vo
28 PPM
l::.Vo = 7%
6-13.
< 3 PPM
Frequency
Miscorrelation
Vo
2 PPM
avo = 22%
PCMAX = 2 MW
Vmax
0.33
0.33
0.016
O.S
0.4
0.02
0.S7
0.028
Tube Characteristics
110 VDC,
and
Rin(s/c) = 110 ohms.
176
I p = 6 MA, VG = -0.9 V,
R p = 7K, IJ.
63,
Let
Ri
40 ohms (k
= 1),
then Tv,.
(sic) is ,0.6
and:
o. 35
1
TV-
0 . 51
For Tv:
= 0.4,
Rin
T Vo
R L = 12K,
= 0.025,
VL
R T = 11.5 K ,
1. 32.
o
k is 0.88, and
Gv L is
1.43.
RL
i~
8 ohms.
The
3"
:2:
130 PF
(R r max + R i ) = 25 ohms
giving:
C1 +C2
C1+ C 2
C1
1
0.025
40
Therefore:
C2
C = 39
1
The plate circuit inductor was selected to resonate with 20 PF, requiring an inductance of 0.5 UR. The effective parallel resi stance of the inductor
was 35 K, and that of the resonant circuit consisting of the inductor and the
tuning capacitance network was 22 K. A capacitive divider network was also
selected for the amplifier input transforming network. The relationships are:
2
(R T . Tv, + R r max) = 16 ohms
o
177
C1+C2;:::: 200PF
C1 + C2
C1
2K
IO.OOIUF
0.5UH
42K-(MEASUREO)
6CW4
I-IIPF
10PF
160PF
0.04UF
320
PF
1.5
MEGO
TPI072-73
0.001
UF
390PF
160 OHMS
'-------tD~-----~
Figure 6-9. 50-MC Series Oscillator Circuit
178
"
'~':
unit having a resonance resistance of 40 ohms was in circuit and that the crystal
unit dissipation could be held below 2 MW. Both of these conditions were satisfied, the latter requiring a 1. 5 megohm grid leak resistor. The oscillator
frequency correlation was within 5 PPM for several crystal units having
resonance resistances of from 14 to 40 ohms. Oscillation would commence
when operated at a reduced supply voltage of 90 volts. The tube could be changed
without substantially affecting the oscillator performance. Voltage measurements
at various points around the oscillator loop with the worst-case crystal in circuit
indicated that the circuit was behaving much as predicted by the design calculation ..
The plate circuit is very critical in this design, with the inductor and the
capacitor network contributing the major part of the amplifier load. If a
repetition of this design is attempted, care will be necessary in selecting the
components of this network and measurement of their combined resistance before installation in the circuit is recommended. Otherwise, the amplifier load
may be too small, preventing oscillation under worst-case conditions.
6-14.
179
6 -15.
180
TPI072-72
The amplifier voltage gain (GV) from the tube cathode to plate
(b)
The voltage ratio (Tv: ) of the amplifier output impedance transforming network
0
(c)
The voltage attenuation (AVC ) between the crystal unit input and
output terminals
(6-29)
181
The crystal unit voltage attenuation factor AVC is related to the amplifier
input resistance by the equation:
Av.
C
Rin
Rr max + ~n
(6 -30)
= R1 max
+ Rin
(6-31)
And the voltage ratio of the amplifier output transformer is related to the feedback network input resistance (neglecting losses) as:
RFB =
Rr max + Rin
T
(6-32)
Vo
=G
6-17.
1.4
.
A
V
VC
(6-33)
Step 1 - Select a crystal unit type applicable at the desired operating frequency, and determine from the specification sheet the crystal unit dissipation
rating PCMAX and the maximum resonance resistance R r max at this frequency.
From 100 to 125 MC where neutralizing of the crystal unit parallel capcitance is
required, the specified values of maximum resonance resistance can be regarded
as equivalent to the maximum values of the motional arm resistance R1 max'
Above 125 MC where no military specification exists for crystal units at this
time,Rl max can be specified to the manufacturer as 100 ohms, and the crystal
dissipation rating can be considered as 2 MW.
Step 2 - Select a suitable tube type. In this frequency range the physical
characteristics of the tube are equally as important as the usual electrical
characteristics specified in the data sheets. In making a selection attention should
be confined to those tubes having a small electrode structure and a minimum of
lead length between the active parts of the structure and the connecting pins.
182
183
r---"---1~V\I\r---.
TPI012 -71
B+
HEATER CIRCUIT
184
When the tube plate connection is brought out at the tube base, possibly the best
solution is to erect a shield across the middle of the tube socket with the plate
circuit on one side and the cathode and heater circuits on the other side. The
plate inductor and tuning capacitor should not be installed at this stage.
step 6 - Determine the amplifier characteristics. For the oscillator
designs subsequently to be introduced, the method employed an impedance .
measuring bridge as the amplifier input signal source. In this instance, the
bridge was a Boonton RX Meter, but other types should be equally applicable
provided that the signal voltage at the bridge terminals is sufficiently low. The
object is to measure the small signal amplifier characteristics, and too large.a
signal may modify the results obtained, particularly if signal limiting occurs.
In view of the voltage gain levels expected, a bridge output signal level of 50 to
100 MV is considered most suitable. The signal output of the RX Meter may be
larger than this, and the particular instrument used in these tests was modified
to make the bridge output signal adjustable. This modification is described in
detail in the instruction manual and consists of connecting a variable resistor
in series with the bridge oscillator DC supply voltage line. The modification
requires approximately one hour to introduce and is in any case a desirable
improvement of the instrument, greatly enhancing its usefulness, particularly
for semiconductor circuit measurements.
When using the RX Meter at signal levels of 50 to 100 MV at high frequencies, adjusting the output signal level will often cause a sufficient change of
the bridge oscillator frequency to desensitize the null detector circuit unless a
corresponding adjustment of the heterodyne oscillator is made. (This oscillator
is required to operate at a frequency 100 KC removed from the bridge oscillator
frequency to produce a 100-KC difference frequency which is then fed to the null
detector circuit.)
The measurement procedure , is as follows:
Adjust the RX Meter to
.
operating conditions at the design frequency. Measure and note the input
impedance of the RF voltmeters that will be used to measure the amplifier input
and output signal voltages. Measure the resistance of a number of carbon
resistors, and select several having actual resistance values in the range of 1
to 15K for use as amplifier loads. Values of approximately 1, 1.6, 2.5,4, 6,
10, and 15 K are suitable. The graphs of Figure 5-2 may be useful when making
a preliminary selection of resistors, although a wide variation of the ratio of
AC to DC resistance can be expected for resistors of different manufacture.
Measure the effective parallel resistance of the plate inductor and tuning
capacitor when tuned to resonance. Calculate the actual total amplifier load
resistance for each load resistor. This consists of the parallel combination of
the measured resistance of the loading resistor, the plate circuit RF voltmeter
parallel resistance, and the effective parallel resistance of the plate circuit
inductor and tuning capacitor.
185
Install the plate tuned circuit. Connect the amplifier to the RX Meter
terminals, with the "live" terminal connecting to the tube cathode via a capacitor
of low impedance. Short circuit the plate tuned circuit to the decoupled DC plate
supply point, null the bridge while setting the bridge output voltage in the range
of 50 to 100 MV, retuning the detector oscillator if necessary; Note the
amplifier parallel input impedance components. Measure the signal appearing
at the decoupled DC supply point and at the cathode decoupling point to ascertain
that the decoupling is adequate.
Replace the short circuit with one of the load resistors and tune the plate
ciFcuit for maximum plate voltage. Null the RX Meter and retune the plate
circuit for maximum signal. Null the RX Meter again if necessary. Note the
amplifier parallel input impedance components and the amplifier input and output
voltages. Repeat this process for the remaining load resistors.
Using a signal generator and a calibrated attenuator, measure the relative
accuracies of the RF voltmeters at the scale settings employed in the test. Correct the relative readings accordingly and calculate the amplifier voltage gain
for each load resistor value. Plot the voltage gain and the amplifier input resistance as a function of the total amplifier load resistance.
The amplifier will also have a parallel reactive component which will
normally lie in the range of 5 PF. It is usually capacitive at low amplifier
load levels, becoming inductive as the plate load is increased due to the feedback
via the stray capacitance between the plate and cathode. Normally this reactance
is large compared to the resistive component and can be neglected. At the highest
frequencies, however, it may be comparable with the resistance and then appears
to be a potential source of loop phase and gain errors. In practice this does not
appear to be the case, however; the introduction of a resonating capacitor to
cancel.this component producing no significant change in o.sctllator performance.
Based on these eX:perimental findings, .it appears justifiable to neglect the parallel
reactive component of the amplifier input impedance.
A possible alternative method of amplifier characterization, but one which
has not been experimentally tested, would appear to be to drive the amplifier
from a signal generator via a resistance equal to Rr max or HI max' whichever
is appropriate. Voltage measurements at the input to the resis.tor simulating
Rr max or R1 max and at the cathode would then give the value of AV ' enabling
C
Rin to be estimated. This would give an indication of whether or not the terminating level was suitable. Measurement of the plate voltage would then enable
estimation of the net voltage gain, corre sponding to GV . AVC' from the in put of
the resistor simulating the crystal unit resistance to the plate.
186
1.4
A yC '
Gy
-+-
Rin
T 2
Yo
Calculate the resistance of the parallel combination of RFB and the previously
measured effective parallel resistance of the plate circuit and the voltmeter
used in the plate circuit. Designating this resistance as Rn , calculate t4e actual
oscillator load resistance from:
R.L
Rn . RT
Rn - R T
Va max =
187
This is the permissible voltage when the crystal unit in circuit has a resonance
resistance equal to Rin' When a worst-case crystal unit having a resonance
resistance equal to Rr max is in circuit, the loop gain and hence the plate signal
voltage will be smaller.
If the amplifier input resistance is larger than R r max' maximum crystal
unit dissipation will occur for a crystal unit having a resonance resistance equal
to Rr max' assuming the plate signal voltage does not increase too greatly as
the loop gain increases. The allowable plate signal voltage is then:
Vo max
R i n ) . J PCMAX . Rr max
R r max
TV;o
1+
The relationship between the allowable plate signal voltage and the
limiting diode reverse-bias DC voltage does not appear to be simple. Judging
by experimental results, the required diode DC bias voltage will be somewhere
in the range between the RMS and the peak plate signal amplitudes. Selecting
a diode DC bias voltage equal to the RMS signal amplitude should result in plate
signal limiting at a level below the permissible amplitude previously calculated.
Experimental adjustments may then be made if necessary.
The parallel impedance components of the diode selected should be
measured at the calculated DC reverse-bias voltage at the design frequency.
The circuit of Figure 6-12 is suitable for this measurement, provided that
the resistor R does not introduce appreciable loading. This can be ascertained
by measuring the circuit impedance without the diode. At the higher frequencies
due to the low resistance of even high-value carbon resistors at these frequencies,
it may be necessary to calculate the diode resistance from the measurements
obtained with the diode in and out of circuit. If the diode parallel resistance
value obtained is not negligibly large compared to the previously derived value
of oscillator load, H L will need to be increased acco-rdingly to ensure adequate
loop gain.
,
"
+
BIAS VOLTS
~~
TPI072-70
188
Tv.o
C1
C1 + C 2
and
Four designs and evaluations were carried out in this frequency range.
Two of these, however, were not very satisfactory because of the amount of
189
experimental adjustment required to obtain a satisfactory oscillator. The unsatisfactory designs employed the type 5718A subminiature tube which has a
typical low-frequency amplification factor of 25 and a plate resistance of 4 K.
The design frequencies were 100 and 200 MC .
The major problem encountered in these designs was that of suppressing
uncontrolled oscillation which tended to occur when the plate circuit was mistuned. Numerous adjustments of the plate and grid circuits were required before these effects were finally eradicated. In the 200 MC design this entailed
operating at a low amplifier voltage gain and with a 200-ohm loading resistor
at the amplifier input before adequate amplifier stability was obtained. In the
100 MC design a higher amplifier voltage gain was used and the effect was
more severe.
It appears that, although the electrode structure of the 5718A tube is
physically small, the connecting lead lengths within the tube and the close
proximity of these leads are sufficient to make the tube unsuitable for crystal
oscillator design at high frequencies. These designs are included for complete-:ness and to indicate the problems that may be met when designing at these
frequencies and are not recommended for duplication.
The other two designs used the 8058 nuvistor triode. This tube is
similar in characteristics to the 6CW4 but has a completely different physical
form, having a top cap plate connection and a grid grounding connection encircling the tube body. The results obtained using this tube were excellent,
perhaps because of the good shielding between input and output circuits possible
with a tube of this physical form. This is a relatively costly tube and it may be
possible to achieve similar results with the 6CW4, although since this latter
tube is single-ended, the shielding between input and output circuits will not be
as good.
6-19. 'lOO-MC, 5718A Series Oscillator
Crystal Unit Characteristics (CR-56A/U)
P CMAX = 2 MW,
Rr max = 60 ohms
= -1 VDC.
The amplifier test circuit was similar to that shown in Figure 6-13, excluding the feedback components and the physical layout as shown in Figure 6-14,
the chassis mounting directly on the RX Meter ground terminals with the line
terminal protruding through the chassis adjacent to the cathode connection.
190
NOTES
0.6-14
RL
0.15 UH
x
12
100
~~~IN3062
1000
0.5UH
300
3.3UH
20
Ip = 10 MA
1000
1000
IIOVDC
6.3V
TPI072-6B
Figure 6-13.
..
--------3IN-------~.j
1oI,
..
FILAMENT
CHOKE
CRYSTAL,GRID,
AND CATHODE
CIRCUITS
TUBE IN RF
SHIELD AND
CLAMP
FILAMENT
CHOKE
PLATE TUNING,
LOAD, AND
DECOUPLING
CIRCUITS
CORNER OF SHIELD
CUT AWAY TO ADMIT
PLATE LEAD
TPI072-69
3 K,
=
R in
190 ohms,
GV
14.
0.13, giving:
R FB = 14.4 K.
191
400
til
:::Ii
J:
9
z
300
~~
a:
"' ~
w
u
i:!z
z
<i
(!)
R1N 200
-- ----
til
iii
a:
...
:J
100
Q.
,/
(!)
~ ~ r--G V
:i
o
>
o
o
1000
3000
2000
TPI072-88
~OOO
4000
LOAD RESISTANCE
Rr:
6000
7000
8000
(OH~SI
Figure 6-15. Input Resistance and Power Gain Versus Load Resistance,
5718A Tube at 100 MC
The voltage measuring probe and tuned circuit parallel resistances were 50 K
and 25 K, giving R = 4.9 K. Using a capacitive divider feedback network,
L
the relationships are:
Yl:'i
Cl
Cl + C2
X(CI + C2)
0.13
s;
83 ohms
..........
100,003
"'-
u 100,002
""""
)-
~ 100,001
:J
~ 100,000
a:
LL
'"
"'- ~
66.1 PPM
99,999
"'-
99,998
99,997
-50 -40 -30
TPI072-89
-20 -10
0
10
20
30
TEMPERATURE (Ocl
40
~~
~O
60
.......
'"
70
80
192
i-'
(,0
=:
=:
33 PPM
6%
Ebb
Ebb
Ebb
4%
lJ. Vo
Ebb
1.2 PPM
Ebb
1%
b. Vo
=:
3.2 PPM
Ebb
Ef
12%
{j" Vo
=:
Ef
99.9998MC,
1.4 PPM
CHANGE
=:
10% Change in R L on
Output Voltage
lO% Change in R L on
Oscillator Frequency
10% Change in B+ on
Oscillator Frequency
EFFECT OF
fr
=:
=:
=:
=:
=:
=:
29 ohms
RL
120V,
120V,
Ef
Ef
120V, R L
120V, RL
120V, R L
120V, R L
=:
15K,
=:
=:
=:
=:
=:
6. 3V,
6. 3V,
RL
RL
25C
25C
=:
=:
0;:::.
TA~
15K, TA
15K,
15K, T A
15K,
15K
15K
25C
25C
25 C
TA ':::::. 25C
TA
15K, TA
=:
=:
TEST CONDITIONS
=:
100.0000 MC
6.3V, RL
=:
=:
=:
6.3V,
Rr
Nominal Vo
6-20.
I p = 10 MA,
VG = O.
The amplifier test circuit was similar to that shown in Figure 6-17 excluding
the feedback network, and the measured data are plotted in Figure 6-18.
A working point was selected at RT = 2. 7 K,
Gy
36,
~n
= 85 ohms.
Then
AVC
and
NOTES
0.6-14
0.06 UH
FD 200
1200
1000
Ip
LX RESONATES WITH Co OF
CRYSTAl- Y
1000
90VDC
TP 1072-116
Figure 6-17.
194
= 10 MA
220
~
~200
:I:
,.....
Zl80
a:
ILl
160
(.)
~140
~ 120
a:
~ 100
ll.
80
~
60
1000
.--
2000
50
45
./
40z
c
35 "
/'
5!!
/'
".",
ILl
Gv
\"RIN
----
3000
"
30~
...J
o
25 >
20
4000
5000
15
6000
TPI072-87
Figure 6-18. Input Resistance and Voltage Gain Vs. Load Resistance,
8058 Nuvistor at 150 MC
1~0.028
150.027
'--
r------
1~0.026
1~0.02~
_1~0.024
u
2
;: 150023
u
~ 1~0.022
e: 1~0.021
'\..
"\
I\.
'\
a
UJ
"'"
68PPM
"-
'\
'"
1~0.020
1~0.019
150.018
150.017
-55
TP 1072-123
Figure 6-19.
'" '\
~
5
I~
25
35
TEMPERATURE (OC)
45
55
65
............
75
85
--
,,/
95
105
195
f-'
22%
6Vo
36 PPM
,-
2%
(16% for 5% 6 E f )
26%
6 Vo
2.6 PPM
l%
6 Vo
=
l.4 PPM
6 Vo
2 PPM
CHANGE
10% Change in R L on
Output Voltage
10% Change in R L on
Oscillator Frequency
+15%,-20% Change in B+ on
Output Voltage
EFFECT OF
Ebb
Ebb
Ebb
Ebb
Ebb
Ebb
RL
RL
90V,
90V,
90V,
90V,
90V,
90V-,
5.1K,
5.1K,
RL
RL
RL
RL
Ef
Ef
Ef
Ef
TA
TA
TA
5.1K,
5.1K,
5.1K,
5.1K,
Ef
Ef
TA~
TA
6. 3V, T A
6.-3V,
6.3V,
6. 3V,
TEST CONDITIONS
Crystal Unit: f r
Nominal Vo
TABLE 6-4.
6.3V
6.3V
25C
25C
25C
25C
25C
25C
6-21.
= 100 ohms,
P CMAX
2MW
I p = 10 MA,
VG = O.
The amplifier test circuit was similar to that shown in Figure 6-20, excluding
the feedback circuit, and the measured data are plotted in Figure 6-21.
A working point was selected at RT = 2.5 K, G V = 45, and Rin = 75
ohms, where R includes the plate circuit losses. Then,
AVC
0.43 and TV
o
RFB
33 K.
0.073,
giving
The voltmeter probe resistance was 8 K and, since the tuned circuit
losses are already accounted for in R~, the oscillator load is 4.1 K. Using a
capacitive divider feedback network, the relationships are:
C1
0.073
0.6-14
NOTES
0.05 UH
ALL CAPACITORS IN UUF
UNLESS OTHERWISE NOTED
Ip
1000
LX
= 10 MA
RESONATES WITH Co OF
CRYSTAL Y
1000
1000
r
'"=
100 VDC
6.3 V
'"=
TPI072-81
Figure 6-20.
197
100
80
:::IE
J:
45
A'RIN
90
U)
50
70
---
....
[ 60
a:: 50
40
40
<!)
35
ILl
30
~Gv
<!)
25 0
>
20
30
1000
15
3000
2000
RT (OHMS)
TPI072-91
Figure 6-21. Input Resistance and Voltage Gain Versus Total Load
Resistance (minus coil losses), 8058 Nuvistor at 200 MC
If C2 is 25 PF, C1 = 1. 8 PF, then X(C1 + C2) = 30 ohms. The allowable plate signal voltage is then 10 VRMS. Using a limiter diode reverse bias
of 7.5 VDC, limiting was obtained at a plate signal voltage of 6 VRMS.
To obtain satisfactory oscillation under all test conditions, it was necessary to increase C 1 to 3 PF. The evaluation data for this oscillator are presented in Figure 6-22 and Table 6-5.
200.002
200.001
~200.000
/'
io"'"
- -......
'" ~
>-
~199.999
ILl
:::I
""~
"
33 RPM
fi3199.998
a::
u..
I'\.
199.997
" "-
199.996
199.995
-55
TPI072-86
- 45
-35
-25
-15
-5
5
15
25
TEMPERATURE
r'\..
35
1/
'""i'-...
45
55
65
../
75
(DC)
198
85
95
105
f-'
'.D
'.D
10% Change of Ef on
Output Voltage
10% Change of Et on
Oscillator Frequency
Ef
l:i Vo
10% Change of R L on
Output Voltage
l:i Va
18 PPM
l:i Va
6%
22%
2.5 PPM
<1%
Ef
2.8 PPM
10% Change of R L on
Oscillator Frequency
RL
RL
RL
RL
23%
Ef
l:i Va
+15%,-20% Change of B+ on
Output Voltage
10K,
Ebb
Ebb
Ebb
10K,
10K,
Ebb
Ebb
10K,
6. 3V,
Ebb
RL
6. 3V,
6. 3V,
RL
6. 3V,
100V,
100V,
100V,
100V,
100V,
100V,
10K,
10K,
25C
Ef
Ef
G.3V
6.3V
T A ::::: 25 0 C
TA:::::
T A ::::: 25C
T A ::::: 25C
T A ::::: 250 C
TA ::::: 25 C
JEST CONDITIONS
88 ohms
Rr
Ef
MC,
2 PPM
CHANGE
199.9990
199.9985 MC
EFFECT OF
Crystal Unit: f r
Nominal Va
TABLE 6-5.
6 -22.
Assumed Rr max
PCMAX
100 ohms
= 2 MW
100 VDC,
Ip
7.5 MA, V
G
1.5 VDC
The amplifier test circuit was similar to that shown in Figure 6-23, excluding
the feedback network, and the measured data are plotted in Figure 6 -24.
A working point was selected at
RT = 1 6 K ,
GV
= 11,
Then:
AVC
giving
RFB = 3.5 K.
The voltage measuring probe parallel resistance was 8 K, and the tuned circuit
effective parallel resistance was 40 K, giving:
R L = 5.3 K.
200
NOTES
0.6-14
0.05 UH
IN3062
270
1000
Ip
= 10 MA
LX RESONATES WITH Co OF
CRYSTAL Y
1000
1000
125 VDC
.3V
TP1072- 82
Figure 6-23.
14
,-----r---~---
...
--.,..--~
140
Ul
~
:I:
z
~
12 t - - - + - - - - + - - - h " , : ; - - - + - - - T i 130
llJ
~
:
llJ
U
10 1 - - -.....~.,...::;--I----F=---+----1120
1500
2000
110
Ul
Ul
llJ
0::
~
a.
Figure 6-24. Input Resistance and Voltage Gain Versus Load Resistance,
5718A Tube at 200 MC
Using a capacitive divider feedback network, the relationships are:
Cl
C1 + C 2
If
C2
X(C1 + C2)
25 PF,
C1
73 ohms
26 ohms.
201
200,003
200,002
/'
200,00 I
200,000
Co)
~ 199,999
>-
lE
199,998
I~
1IJ
;:)
a:
."
44 PPM
199,997
ll.
199,996
"" ""
.......
199,995
199,994
199,993
-50 -40
TPI072-84
-30 -20
-10
10
20
30
40
50
""
60
1'"- .....
70
80
TEMPERATURE (Ocl
202
t-:l
o
w
Ii Vo = 2%
Ii Vo = ll%
22 PPM
2.5 PPM
Ii Vo = 2%
lO% Change in R L on
Output Voltage
Ebb = 125V,
Ebb = 125V,
Ebb = 125V,
RL = 13K,
Ef = 6. 3V,
Ef = 6. 3V,
2.5 PPM
10% Change in R L on
Oscillator Frequency
RL = 13K,
E f = 6. 3V,
1:1 Vo = 11%
10% Change in B+ on
Output Voltage
R L = 13K,
25C
25C
25C
Ef = 6.3V
Ef = 6.3V
TA~
TA~
T A ';::;:. 25C
TA ~ 25C
TA~
T A ~ 25C
TEST CONDITIONS
Ef = 6. 3V,
CHANGE
1 PPM
c>
lO% Change in B+ on
Oscillator Frequency
EFFECT OF
Crystal Unit: f r
Nominal Vo
Rg
TPI072-85
The only military type series resonance crystal unit applicable in this
frequency range is the CR-50A/U covering the range from 16 to 100 KC. The
major characteristics of this crystal unit are:
Frequency Range:
O. 012 percent
-40 to +70 oC
Rated
0.1 MW
Dissipation:
16 to
Maximum Resonance Resistance:
Crystal Holder:
204
30 KC:
100 K
50 KC:
90 K
70 KC:
80 K
90 KC:
70 K
60 K
HC-13/U
major characteristics:
Overall Frequency Tolerance:
O. 015 percent
Physical Configuration:
k R r max
(6-35)
205
R r max
(Kilohms)
PCMAX
(UW)
k = 0.33
k = 0.5
k = 1
100
5.2
6.4
10
1.6
2.8
100
100
3.6
4.5
6.3
50 KC
90
100
3.5
4.3
50+ to 70 KC
80
' 100
3.2
4.0
5.6
70+ to 90 KC
70
100
3.0
3.8
5.3
90+ to 100 KC
60
'100
2.8
3.5
4.9
1 to
16 KC
16 to 30 KC
30+ to
6 -25.
200
Amplifier Characteristic s
(6-36)
(6-37)
(6-38)
where is the phase angle of the plate signal relative to the grid signal in radians.
The amplifier input impedance therefore consists of Rg , RM, CM, and Cgk all in
parallel.
206
k
l+k
(6-39)
Rrmax
Rin
: k Rr max
TPI072-86
Figure 6-27.
k
1 +k
R r max
XCM
0.18
(6-40)
207
Provided that the plate phase lag {s not more than 10 degrees, values of
XCM satisfying Equation (6 -40) will result in values of RM sufficiently large
that its effect on the amplifier input resistance can be neglected. And when
XCM does not satisfy Equation (6-40) and neutralizing is required, RM will not,
of course, be present. Under normal circumstances RM can therefore be
neglected and Rin is then equal to Rg .
The amplifier output impedance insofar as the feedback network is
concerned consists of the parallel combination of R p , the oscillator load RL,
and the capacitance from the plate to all other electrodes.
Loop Gain Relationships
6-26.
For the oscillator circuit of Figure 6-26, the loop gain relationships can
be conveniently divided into three factors. These are:
(a)
The amplifier voltage gain GV from the grid to the plate circuit
(b)
The attenuation AVC from the crystal unit input terminal to the
tube grid
. (c)
= GV . AVC .
Tvo
(6-41)
where:
(6-42)
Tvo
208
R r max + Rin
T 2
Vo
(6-43)
1.4
Gv
(6-43)
AVe
The terminating resistance level at the input side of the crystal unit is
where Ro is equal to Rp and RL in parallel.
6-27.
Tvo .
Ro '
r
JE
L900 t
V2
VI = -k
wL2
--
rs
1
$;
-,
L2
L2
k--
where rs
an
rs
Rr max + R g .
k2 wL2
--=_
(6-46)
(6-47)
209
RLP
RL + R LP
(6-50)
where RL is the actual oscillator load reflected into the plate circuit. Depending on the external oscillator load relative to the calculated RL and the Q of the
transformer windings, the transformer loss resistance may necessitate a
larger value of primary inductance than that given by Equation (6 -48).
Plate circuit tuning may present a difficulty at the lowest frequencies
because of the large value of tuning capacitance required. One possibility is to
adjust the transformer to resonance at the design frequency before installation
in the circuit. Another alternative is to wind the transformer on a tunable pot
core.
6-28.
DESIGN EXAMPLES
This example is presented for the two extreme frequencies of the range.
The circuit value changes r.equired for intermediate frequencies should be evident.
210
Crystal characteristic s:
100 KC
16 KC
60 K
Rr max
100 K
P CMAX
100 UW
For
0.5 (R in
= 0.5
Rr max)' A yC
100 UW
1
3.
Then:
Vmax (RMS)
Rg
~n
Rr max + R in
k Rr max
(1 +k) R r max
16 KC
100 KC
4.5
3.5
50 K
30 K
150 K
90 K
33 K
20 K
T 2
Yo
= 0.135
0.018
Then:
RFB -_ (Rr max + Rin)
11 2
Vo
16 KC
100 KC
8.2 MEGO
4.9MEGO
33 VRMS
26 VRMS
14 K
14 K
211
100 KC
130 ohms
130 ohms
210 K
33 K
0.16
0.6
16 KC
100 KC
7 MH
1.1 MH
158 UH
25 UH
16 ohms
16 ohms
0.143 UF
2300 PF
1 to 16 KC Series Oscillator
Crystal characteristics:
R r max and P CMAX are assumed to be 200 K and 10 UW, respectively.
For
212
k = 0.5, AVC
1
3'
Then:
Vmax (RMS) == 2 V
Rin == k R r max== 100 K
300 K
67 K
== 0.084
T 2
== 0.007
Vo
Then
RFB ==
::::
tr~J +Ri~
87 PF.
== 43 megohms
Vo max == 24 VRMS
The crystal unit input terminating resistance
T 2
( Vo
LR =~}s ohms.
~L
300
L +
16 KC
1 KC
115K
1. 84 MEGO
0.58
0.036
213
1 KC
16 KC
690 MH
43 MH
4.8 MH
0.3 MH
3 ohms
3 ohms
0.037 UF
.2300 PF
At the lower frequencies it may not be desirable to employ a tuned circuit in the oscillator because of the problem of tuning. One suitable alternative
circuit which may be used below 16 KC employs the crystal unit as a fourterminal network. In this frequency range if requested from the manufacturer,
the crystal unit can be supplied having four electrical connections which can
then either be paired for operation as a conventional two-terminal crystal unit
or can be used as a four-terminal network.
When used in this latter manner, the crystal operates similarly to a
filter network giving maximum signal,transmission with either a 0 or a 180
degree phase shift at the crystal unit reSonance frequency. Using the crystal
unit as a phase-inverting network in conjunction with a grounded-cathode amplifier then results in a very simple circuit. Due to the limited experience with
this circuit, a worst-case design procedure has not been developed, and it will
be necessary for the designer to draw conclusions .in this respect.
The design method used consisted of experimentally determining the
characteristics of a particular crystal unit as a phase-inverting network and
then relating this to the amplifier characteristics. In this particular instance
the design frequency was 1 KC, and it was found possible, using a/stable audio
signal generator, to measure the voltage ratio of the crystal unit input and output
signals for various values of output load resistance with the test circuit of
Figure 6 -28. Including a resistor in the signal input line also enables the crystal unit input resistance to be estimated. The crystal unit test data are given.
in Table 6-8.
The tabulated data show:
(a)
214
300K
SIGNAL
GENERATOR
TPI072-115
Vel
VCl
20 K
Va
R
R r' + R
0.063
0.50
300 K
0.067
200 K
0.42
0.63
510 K
0.39
510 K
0.54
0.75
900 K
0.57
750 K
0.61
0.78
1.1 MEGa
0.68
1 MEGa
0.69
0.81
1.3 MEGa
0.77
~ is approximately 5.5 times the resonance resistance of the crystal unit as a two-terminal network, which was 55 K in this instance.
It appears, therefore, on the basis of this test that, at the crystal unit resonance
frequency, the crystal unit and load resistor act similarly to the network shown
in Figure 6-29.
TPI072-82
:215
= G 1.4
V . AVC
0.28
Using a resistive feedback network and assuming the loading due to the
crystal to be negligible, the resistor ratio is then:
R2
Rl + ~
= T
= 0.28 or R2 = 0.39
Vo
R1
where R 1 and R2 are designated in Figure 6-31. For R1 = 100 K,' then ~ = 36 K,
satisfying the assumption that R2 is much less than the crystal input resistance.
The amplifier total load resistance consists of the oscillator resistance,
the plate feed resistance, and the feedback network resistance in parallel. The
latter are 51 K and 130 K, respectively, and the external oscillator load resistance is therefore 33 K. The allowable crystal unit input voltage, assuming a permIssible crystal unit dissipation of 10 UW, is 2.2 VRMS, and the allowable plate
signal voltage is then 8 VRMS. The evaluation data for this design is presented
in Table 6-9 and Figure 6-30.
999.950
999.900
III
r-- r--.
Q,
~999.850
>-
u
~ 999.800
........
Rg = 1MEGOHM
224 PPM
;;)
o
~ 999.750
lo.
999.700
- >5
-45
TP 1072-124
Figure 6-30.
216
- 5
-25
-I :>
15
5
TEMPERATURE
25
35
45
55
65
'" '"
I~
85
rei
Frequency Vs. Temperature, l-KC Tube Oscillator
1(15
-;J
tv
i--'
',--
= 13%
Vo
= 6%.
60 PPM
~Vo
<3 PPM
~Vo
= 6%
<4 PPM
= 20%
= 2%
Vo
= 2%
50 PPM
~Vo
<3 PPM
I1vo = 5%
<4 PPM
~Vo
<10 PPM
<10 PPM.
= 22%
5.9
5.2
~Vo
999.905
510K
999.910
Nominal Vo
200K
= 20%
= 5%
= 2%
Vo
= 2%
55 PPM
~Vo
<3 PPM
~Vo
< 4 PPM
~Vo
<10 PPM
5.9
999.910
750K
R r = 55 K
Value of R g
= 14%
= 4%
= 2%
~Vo
< 2%
50 PPM
~Vo
< 13 PPM
~Vo
< 4 PPM
~Vo
< 10 PPM
5.8
999.905
1 MEGO
TABLE 6-9. DESIGN EVALUATION DATA, 1-KC VACUUM TUBE OSCILLATOR (FOUR-TERMINAL CRYSTAL)
100V
51K
0.1
0.5
NOTES:
ALL CAPACITORS
IN II-F UNLESS
OTHERWISE NOTED.
33K
2000
Ip=0~5MA
10
TPI072-90
Two-Stage Oscillator
218
The oscillator configuration for this design example is as shown in Figure 6-32, and the design calculation using analogous notation to that employed
previously is as follows, using a 12AX7 triode operating at Fp = 100 VDC,
I p = 0.5 MA, Va =-1 VDC, R p = 85 K, 1.1. = 100. For RTl= 50 K and RT2 =
30 K, the total voltage gain from VI grid to V2 plate is 970. For a loop voltage
gain of 1.4 in a worst-case design, the voltage attenuation A from the plate of
V2 to the grid of Vi is then 6~0' This is satisfied by the feedback network
r-------H(---------II--------.
1600
jJjJF
1001<
3000
IJJJF
......--------------+-..o+125V
NOTES:
ALL CAPACITORS
IN jJ.F UNLESS
OTHERWISE
NOTED.
201<
Ipi =0.5 MA
I p 2=0.5 MA
4.5 9
6.3V
1600
10
jJ.jJF
10
10
TPI072-148
Figure 6-32.
Referring to the Wien bridge analysis of Section 4, the requirement for zero
phase shift in the Wien bridge network is:
where the loading due to the crystal unit is included in R2 and the amplifier output resistance forms a part of R1. R2 is therefore 113 K and R1 is 122 K. For
C1 = 1150 PF and C 2 = 1600 PF, w' = 6280 and f' = 1000 CPS. The nominal'
value of C1 required was 1040 PF.
The permissible output voltage before crystal overdrive occurs is obtained by considering the case when Rr is equal to R r min, which is assumed to
be 1/9 Rr max; that is, 22 K. The crystal input voltage causing a crystal dissipation of 10 UW is 0.6 VRMS. The attenuation between the plate of V2 and
the crystal input terminal is approximately 0.043. Therefore, the allowable
plate signal voltage, when a very good crystal unit is in circuit is.14 VRMS.
219
The evaluation data are presented in Figure 6-33 and Table 6-10, f?llowed by the data for a 3-KC oscillator of the same design in Figures 6-34 and
6-35 and Table 6-11.
999.950
-r--
......
999.900
................
..........
_ 999.850
en
lL
U
242 PPM
- 999.800
>u
~ 999.750
e: 999.700
999.650
-55
-45
-35
-25
-15
-5
15
25
35
45
55
65
75
.......
"
85
95
105
TEMPERATURE (DC)
TP1072-125
Figure 6-33.
...--------It-(---------11--'-----,
470
2400
UUF
UUF
,.---------------+-U+125V
lOOK
NOTES,
20K
ALL CAPACITORS
IN UF UNLESS
OTHERWISE
NOTED.
Ipi =0.5 MA
1p2=0.5 MA
4.5 9
6,3V
470
UUF
Rgi
5100
10
'~
TP 1072-126
220
10
10
f-'
tv
tv
Et
on
l 0% Change in
Output Voltage
lO% Change in Et on
Oscillator Frequency
lO% Change in R L on
Output Voltage
Vo
= 13%
PPM
l:i Vo = 1%
47 PPM
l:i Vo = 2%
53 PPM
l:i Vo = 7%
-=: 3 PPM
10% Change in B+ on
Output Voltage
lO% Change in R L on
Oscillator Frequency
~ 3
CHANGE
R L = 30K,
R L = 30K,
R L = 30K,
R L = 30K,
E f = 6. 3V,
E f = 6.3V,
Ef = 6.3V,
TA~
25C
Ebb
25C
25C
25C
25C
Ef = 6.3V
TA~
TA::::l
TA~
TA~
= 125V, Ef = 6. 3V
Ebb = 125V,
Ebb = 125V,
Ebb = 125V,
Ebb = 125V,
Ebb = 125V,
Ef = 6.3V, R L = 30K,
TEST CONDITIONS
lO% Change in B+ on
Oscillator Frequency
EFFECT OF
TABLE 6-10.
2999.70
-r---....
..... ~
2999.60
/'
2999.50
1/
2999.40
Iii
~ 2999.30
>
~ 2999.20
w
~
o
'\I\.
1/
\
296 PPM
li! 2999.10
'""
10.
2999.00
2998.90
2998.80
2998.70
-55
-45
-35
-25
-15
-5
5
15
25
TEMPERATURE ("C)
35
45
55
65
75
85
95
TP 1072-127
222
105
l\J
l\J
W
Ef
Vo
< 2%
150 PPM
R L = 30K,
R L = 30K,
Ebb
12SV,
Ebb = 12SV,
Ebb = 125V,
R L = 30K,
Vo < 2%
25C
25C
Ef
6.3V
E f = 6.3V
TA
T A ~ 25C
TA~
Ebb = 125V,
25C
2SoC
2SoC
TA~
=
TA~
TA
12SV,
Ebb
30K,
30K,
Ebb = 125V,
6.3V,
6. 3V,
30K,
=
RL
6. 3V, RL
6. 3V,
RL
TEST CONDITIONS
3 PPM
Ef
7%
13%
~ Vo
Ef
Vo
Ef
3 PPM
S 3 PPM
CHANGE
10% Change in Ef on
Output Voltage
lO% Change in E f on
Oscillator Frequency
10% Change in R L on
Output Voltage
10% Change in R L on
Oscillator Frequency
10% Change in B+ on
Output Voltage
10% Change in B+ on
Oscillator Frequency
EFFECT OF
TABLE 6-11.
SECTION 7
TRANSISTOR SERIES RESONANCE OSCILLATOR DESIGN
7-1.
GENERAL
(b)
224
7-2.
Frequency
Range in
MC
Operating
Temperature
Range
(Centigrade)
Frequency
Tolerance
( Percent)
Rated
Drive
(MW)
Maximum
Resonance
Resistance
(ohms)
Crystal
Unit
Type
Holder
Type
520 to 15
520 to 15
50 to 20
40
40
50 and 75
40
40
40
40
40
40
CR-19A/U
CR-85/U
CR-60A/U
CR-51A/U
CR-52A/U
CR-24/U
CR-55/U
CR-67/U
CR-72/U
CR-76/U
CR-77/U
CR-S1/U
HC-6/U
HC-6/U
HC-18/U
HC-6/U
HC-6/U
HC-18/U
HC-1S/U
HC-1S/U
HC-1S/U
HC-1S/U
HC-25/U
HC-25/U
520 to 15
520 to 15
60 and 40
60 and 40
40
40
CR-2SA/U HC-6/U
CR-35A/U HC-6/U
CR-65/U
HC-6/U
CR-32A/U HC-6/U
HC-18/U
CR-61/U
HC-25/U
CR-S4/U
-55 to
-55 to
-55 to
-55 to
-55 to
-55 to
-55 to
-55 to
-55 to
-55 -to
-55 to
-55 to
+105
+105
+105
+105
+105
+105
+105
+105
+105
+105
+105
+105
0.005
0.0025
0.005
0.005
0.005
0.005
0.005
0.0025
0.005
0.0025
0.002
0.005
10 and 5
10 and 5
5
20
2 and 4
2
2
2
2
2
2
2
70
SO
70
70
SO
80
to
to
to
to
to
SO
90
80
80
90
to 90
0.002
0.002
0.001
0.002
0.002
0.002
5 and 2.5
5 and 2.5
2 and 1
2 and 1
2 and 1
2 and I
*Special Application
225
200
f.-f-ff-
L.
,
I
,+
1,
a::
- H~ \
-+. +1
=r:rl:t:):;,
I, . ~~
.""1~-:
-=
C'C
"
C
i:::I::
-H-t
~
+H -+++,++-+.J_;
H
"_',I",. '"1-' ,
1-1-
t'""If.
i H- ..
1-+--'-':; t , ~t: ~ :!'
f- ,- =I ," 4- , 4 - - .. +r +- f' :t
if- -+
rt
I
+f )l'ij .L J.t i~:
++H ++-I+ii+tf+H'+! 1+.LIft=t=t::ttt-ttttrttttj.!-J ++ HI
.r!-
::o-rr
t-!
~=f+;:
, -lHl 1+,"
20
I0
+ ': ,Hit
H+++-HH-H+-"
,+
:'
1"
1-1- -
rHid-- H,H1-1+++-f.-t+f+++-I+I++IH++H
'Ill' ,'[Ii'
L.-'-L.J....L..J..U...L.....!.-"-'--'-.l.-'-'--'..J...L.'..l...U.J-'J.U.J....l...J....J...J.,J.-U-C.u.:.cJ..l..l--:o...........J....W..l-L-.J....l..-'-'-J....l...J....J...J.,J....u..L.l.U.J..W
2
TPI072-I08
10
20
30
FREQUENCY (Me)
In this frequency range, the input resistance of a grounded base amplifier can provide an almost ideal terminating level for series resonance crystal
units. The discussion of grounded base amplifier input resistance given in Section
3 shows that, with the possible exception of the region where the complex internal
feedback causes an input resistance peak, the series input resistance Rin(s) of an .
226
(a)
TPI072-94
227
The loop voltage gain of the circuit of Figure 7-2(b) is the product of
the amplifier voltage gain and the feedback network attenuation. The latter
consists of two parts: that occurring in the impedance transforming network
between the amplifier output (transistor collector) and the crystal unit, and that
resulting from the connection of the crystal unit to the amplifier input. Over
the frequency range conSidered, the latter can be accounted for in the amplifier
gain calculation by replacing re by re + R r . That is, the net amplifier voltage
gain GVR ' including the effect of R r is:
.
Ci o
. RT
The net voltage gain of the amplifier and crystal unit combination will be
smallest when the crystal unit resonance resistance has its maximum value
Rrmax, and this is the value to be used in a worst-case design. Further, for
the values of RT likely to be used, the term RT (~b' + r e + R r ) will be small
RD
compared to Rr max' and Equation (7-1) can be approximated as:
(7 -2)
where AVt is the voltage attenuation ratio of the impedance transforming network
between the amplifier output and the crystal.
7-5.
At frequencies up to 20 MC, the series input resistance of a commonbase amplifier has a value approximately equal to:
Rin(s) = re +rtb' (I-
228
Cio )
(7-4)
RT
K . R r max
(7-5)
where K is a constant depending on the relative values of Rin(s) and Rr max and
has a value of:
K
1 +
1 +
Hin(s)
R r max
re +rbb' (1 -a o )
R r max
(7-6)
For the assumed crystal loading conditions, K will have a value in the
range of 1 to 1.33. The lower value applies when Rin(s) is much smaller than
Rr max' and the latter value when Rin(s) equals 1/3 R r max'
7-6.
Equation (7 -5) shows that, for the assumed crystal unit loading conditions,
the net voltage gain from the crystal unit input to the collector is almost entirely
determined by the ratio of the collector total load resistanc.e to the crystal unit
resonance resistance, since the effect of Rin(s) is small.
RT is the parallel combination of the oscillator external load RL and the
impedance transforming network parallel input resistance RFB. Neglecting
losses in the impedance transforming network, RFB is related to the secondary
load resistance r s by the equation:
rs
A2
(7 -7)
Vt
In this case rs is the series combination of Rin(s) and Rr max, and substituting
for rs in terms of Rin(s) and R r max gives:
229
(7 -8)
(7 -9)
GVR
. RL
(7-10)
K . R r max
+A~
(7-11)
(7-12)
A loop voltage gain of 1. 4 for a worst-case design is adequate in protecting against loop gain variations with temperature, etc., particularly in view of
the large amount of degeneration introduced by Rr max. Substituting this value
of loop voltage gain and the limit values of K into Equation (7-12) gives:
For K
RL
R r max
For K
RL
R r max
= 1.33
1. 86
AVt (1 - 1.4 . AVt )
(7 -13)
1
1.4
= AVt (1 - 1.4
AVt)
(7-14)
Figure 7-3 gives plots of Equations (7-13) and (7-14). These show that
the minimum usable value of RL determined by loop voltage gain and crystal
loading considerations occurs for a feedback transforming network attenuation
AVt of approximately 0.36 and lies in the range of 8 to 10 R r max' depending
on the relative values of Rin(s) and R r max. However, this does not take into
230
50
tt
ll-
1-
11
f---C-+
e--l-+
i
H-+
B~--L
- :+
!--- -
,-1-
'I\.
I,
'*
\-1 i
' T
I1-- "---, I
-I---L
I I I
1 ,
~I
____ 1
I
1
""I ~ 30 H
a:
I
I
,
1"-
r.-Lt1 1 \-i\
-'I a:~.. 20 ~I
J..J
! i\
10
I
!
-=p::
I
.~.
'
'\'
"
H-'
,'h.
!
"
f-I-L'--'I--~~:
, ''I I
f-+-,j
_,
j I
~+f-- -~
-j
...~ I
'10.'
0.2
R r max
....
a.
30
: 20
--,--'---,
8
N
:J
<l
:::ii
a:
---'----:-----'----
.-~--j~
I","
, - , mox
"
"-----'---L~t
.
"
.
k=1.33 - k -I ' , .
1-"
.
I...,
..L.:..J....
+-t+
0.4
w
a:
w
'" "'ff
,
1-,. ........
:
Rr max
., I
....~
u
1--1-
---
0.3
. . . . =FA1---.l~-1
R
'
I
I
0.1
,' VJ
-~:j
r-~
I
:
40
,/
,-""""
",
I
...
T~I072-B4
Figure 7-3,
,1
50
~*
-i+h
'=C:::::U:
1 I
I lt~7
1
-".
I
I.'
I'
'tJ!
'"",
!
f----'--.-1-
I !
to..
-&-1_
"'0"'0
- -1-
I
I
R, mox
N~I
i l I\.
~-Ll.....:- --'--;'
'
60
----+---t-
1'\
I , \. ~ "
'I
'
1 :\1 k=1.33::':"k=1
I'. \"",
- --'----i--
r'-Lr-
1
,
'"
RL
I~
'\\
1, I
I i\i
'\i,
::--+1+
I\.
'=II
I
X
I\l'\
W-,'\ f--.LI
1\
1\1 I
-~=ff
, 1
-'--'- -- '' -,-,--, I
k=1
70
h-
I
I\. I
1\.'
\,R, max
\ I
rot-
,L.
!/
i-,
-I
'"
~ RFB
I
I ,
...1
"/.
V
I
k=L33 1
I
I
i==
iA
IV
a:
,I
1---L
1-,~1
I ' ___
=-~-
I-jj
I I
--
d4>
df
CIRCUIT
I
,
-+- -+-
I '
I
I
a:
'i"
80
1 -.----
1
!
I I
i
:
-I
+=
-=F -1-;; l'
I
~I\.
_L_
i'I.'
-
I
,
'I:
I-i-,
I
I
40
90
0.5
"I'~""'.
i-
~*
0.6
+-
0.7
account the crystal unit loading due to the terminating resistance appearing at
the driving source side of the crystal unit, which will also influence the desirable
value of RL' This resistance consists of the oscillator load resistance RL and
the amplifier output resistance Ro(p) in parallel reflected to the secondary side
of the impedance transforming network. Ro(p) will normally be much larger
than RL and, therefore, the terminating resistance rt seen by the crystal 'unit
at the driving source side is approximately:
(7 -15)
231
For K
1 and
~~ is then:
For K
Circuit :
Crystal unit
1.33
Circuit d
df
~~
Crystal unit d
df
R r max
rt + R r max
(7-16)
Rr max
rt + 1.33 R r max
(7-17)
~~
~~
the crystal unit alone when AVt equals 0.36 and 0.24 for K values of 1 and 1.33,
respectively. These values represent a reasonable compromise condition for
total crystal unit loading and will subsequently be used as design limits, operation with AVt values larger than those quoted being considered undesirable.
7-7.
The driving source voltage applied to the crystal unit is limited by the
.crystal unit dissipation rating. When Rin(s) is linear and much smaller than
1/9 R r max, the allowable drive voltage must be less than:
Vmax
KVPCMAX'
R r max
9
(7-18)
where K is a constant allowing for drive source voltage increase with loop gain
and B+ increases. And when Rin(s) is intermediate between 1/9 R r max and
. R r max, the permissible drive voltage is:
(7-19)
Equations (7-18) and (7-19) are derived on the assumption that Rin(s)
remains constant as the loop gain increases. This is not the case in transistor
amplifiers where, as the loop voltage gain increases, the signal appearing between the emitter and base exceeds the linear operating range of the emitterbase junction, and for some portion of the cycle the emitter-base junction is
wholly or partially reverse-biased. The effect is illustrated in Figure 7-4 which
shows the emitter and crystal unit input voltage waveforms of a 1-MC oscillator
232
Rr
= 440
OHMS
CRYSTAL
INPUT
WAVEFORM
2.2V
....------2"
RADIANS - - - - -.......
EMITTER
WAVEFORM
V=0.7V
------~=::::::::....-_~_L
Rr
=170
OHMS
CRYSTAL
INPUT
WAVEFORM
EMITTER
WAVEFORM
TP 1072-95
2V
e'2) + (B
-. '2B cos '2B)] (7 - 20)
. '2B - 2'B
cos
'2 - sm
[ (sm
1T(lcos2')
233
~CMAX
2
. Rr max
(7-21)
234
fundamental frequency voltages and the relative emitter and crystal unit voltages,
the actual amplifier input resistance is 140 and 520 ohms for the 440 and 170
ohm crystal units, respectively. This does not, however, appear to b~ a valid
approach to estimating the loading conditions. During the period when the large
emitter signal voltage excursions occur, the circuit is "freewheeling, " the
amplifier is cutoff and the loop is open-circuited, and signals within the circuit
are solely due to the release of energy by the amplifier tank circuit and the
crystal unit. The crystal unit is therefore incapable of controlling the oscillator
frequency during this part of the oscillation period. During the remainder of
the cycle, the loop is closed, and over the greater part of this period the
instantaneous amplifier input resistance will be smaller than that indicated by
Equation (7 -4). Therefore, during the period when the loop is closed and the
crystal unit can control the operation of the oscillator, the crystal unit is .
adequately terminated.
The effect of the pulsating crystal unit drive is not clear, but it is very
possible that it degrades the performance of the crystal unit relative to when it
is linearily loaded. However, this condition is almost inevitable in a series
resonance transistor oscillator designed to accept a wide range of crystal
equivalent resistance. One way of linearizing the amplifier input resistance
would be to connect a physical resistor in parallel with the amplifier input. If
its value was sufficiently small, the variation in total input resistance could
then be appreciably reduced. This would result in the crystal unit operating
under more linear conditions, but the loop would still open-circuit during each
cycle of oscillation in essentially the same way, and the control period would
remain practically constant. This approach has not been evaluated and it has
been assumed that an adequate crystal unit termination during the time the loop
is closed is sufficient. With thfs assumption the discussion of Paragraph 7-5
is valid.
7-8.
The voltage applied to the input of the crystal unit is also applied across
rt, the load reflected from the collector side of the impedance transforming network. rt is representative of the oscillator load RL and therefore has the same
power dissipation. The oscillator output power is therefore:
2
Vmax
PL = - rt
(7-22)
R r max
2 rt
(7 -23)
235
R r max
(7 -24)
Figure 7-5 is a plot of Equation (7-24) for K = 1 and K = 1.33 as a function of AV t. These curves show the relative values of crystal unit maximum
dissipation and the worst-case design oscillator output power, and indicate that
the oscillator power output can only be appreciably greater than the crystal unit
dissipation rating when AVt is less than 0.1. Reference to Figure 7-3 shows
that the oscillator load RL must then be greater than 14 to 20 R r max'
At the lower frequencies of this range where R r max is relatively large,
the oscillator load required to give an output power of more than 3 Pc MAX will
be of the order of 5 K or greater. This, in turn, will require a high breakdown
voltage transistor because of the large collector voltage swing that will be encountered. For example, for a 30 MW power output at 800 KC, Figures 7-5 and
7-3 show that AVt = 0.1 and RL = 14 (K = 1). At 800 KC, R r max = 520 ohms
giving RL = 7.3 K. To dissipate 30 MW in a 7.3 K load requires a collector signal voltage of 14.8 VRMS or 42 V peak-to-peak. Allowing for an increase in
collector signal voltage due to loop gain change and power supply variation, the
transistor breakdown voltage rating must be at least 50 volts and preferably 60
V. If a single supply
voltage is used the applicable voltage rating will be BVCER ,
.
the collector-to-emitter breakdown voltage rating with a total resistance R between base and emitter. Transistor types with BVCER ratings of more than 60 .
V together with suitable high-frequency characteristics are costly at the present
time, and this example probably approaches the economically feasible limit,
particularly when higher power output can be obtained with less expensive transistors using the Pierce oscillator at these frequencies. At higher frequencies,
the power output limitations are less severe due to the much lower values of
Rr max'
Quite often high oscillator output power is not required, and the values
of AVt and RL can then be selected from considerations of transistor type, desirable biasing levels, etc.
7-9.
7-10.
236
, ,
0.9
0.8
0.7
+--,
+---+-r-t--
0.6
a=-r
0.5 =1=
0.4
1--
"--r
f---r-
f--j-
0.3
TPI072-85
0.1
0.2
0.3
0.4
A Vt
237
where overtone crystal units with frequency tolerances of 0.005 to 0.002 percent
are available with dissipation ratings of 2 MW. The latter types complete the
coverage to 30 MC.
The selection of a crystal unit type will be governed by the overall
oscillator frequency tolerance desired. If a large number of oscillators are to
be constructed, the in-service overall oscillator tolerance can be expected to
be at least 5 PPM wider than that of the crystal unit unless special precautions
are taken. In the overlap region where a choice of crystal unit dissipation rating is available, this may also form a basis for selection, depending on the
oscillator output power desired.
7-11.
The feasibility of the design using the selected crystal unit at the desired
oscillator output power level can be determined from Figures 7-3 and 7 -5. The
maximum value of AVt allowed by crystal unit dissipation considerations is determined from Figure 7-5 for the known values of desired output power and
crystal dissipation rating. This value of A Vt is then found on the curves of
Figure 7-3 to find RL'
There may be some uncertainty at this stage as to which K value applies,
and values of RL should be determined for each value .of K. The collector signal
voltage required to give the desired power output is:
(7 -25)
1.4 Vc
(7-26)
VCE
RT
(7-27)
where RT is given in Figure 7-3 for the particular value of AVt. Some allowance
should be made for the collector circuit tuning coil losses which will decrease RT
and increase the required collector bias current. The value of IC calculated
from Equation (7-27) is the minimum value and may be increased if necessary to
decrease the amplifier input resistance. This may be desirable in the 10- to 20MC region where R r max is small for certain crystal units.
238
(7-28)
re =
25
IE
+ r'
(7 -29)
(In the absence of specific information regarding the value of the emitter ohmic
resistance r', assume a value of 1 ohm.)
Then:(7-30)
and:
K = 1 + Rin(s)
R rmax
(7-31)
The values of VCE and IC finally obtained determine the feasibility of the
design. The power supply voltage available must be higher than VCE' _ preferably by at least 2 volts to allow for adequate transistor biasing, and the
transistor power dissipation and breakdown voltage ratings must be larger than
VCE . IC and 2 VCE, respectively. The design may be practically feasible in
the sense that suitable transistors are obtainable but economically unfeasible
because of the high transistor cost.
7-12.
The transistor power dissipation rating required at the highest working temperature is calculated from:
P D max
>
V CE . IC
(7-32)
Variations in power supply voltage will increase both VCE and IC'
and an appropriate allowance should be made taking into account
the stability of the supply.
239
7-13.
(b)
(c)
(d)
(7 -33)
Q . XL
(7 -34)
If HLP is not negligibly large compared to RT' then RL must be increased to offset the additional amplifier loading. The actual R L is
then:
240
Actual RL =
R'L RLP
RLP - R'L
(7-35)
Transistor Biasing
It is desirable if possible that the emitter-to-ground voltage should
Rr max
.
9
) hFE mm
(7-36)
DESIGN EXAMPLES
7-15.
Pow~r:
4 MW
= 10 MW
241
= 1,
AVt::;; 0.4.
From Figure 7 -3 :
RL = 7.2 K
RT
6.2 K
Vc = 5.4 VRMS
VCE = 7.5 V
IC
1. 2 MA
140 MW
BVCEO
15 VDC
10
Typical fT
150 MC
1.4 MA
19 ohms
25 ohms
IE
re
~n(s)
K~
1. 06
242
or
==
r s == 465 ohms
89 ohms
Let XC2
Then:
C2 == 1800 PF
C 1 == 200 PF
==
890 ohms
Xc
L == RLP
140 UR
==
Crystal Units
CR-19A/U
Resonance
Frequency
(MC)
Rr
(ohms)
0.999990
180
0.999987
150
0.999993
170
4
(Number 3 + 270 ohms)
0.999993
440
243
Change
Frequency
Vo
<1 PPM
+16%
Frequency
Vo
<1 PPM
-20%
Frequency
Vo
<1 PPM
3%
Frequency
Vo
20 PPM
7%
3 PPM
Frequency
Vo
<1 PPM
<2%
Frequency
Miscorrelation
Vo
2 PPM
4%
6.2.K
2N706A
0.01 UF
2.4K
200PF
0.01 UF
1.8K
1800PF
TPI072-132
Figure 7-6.
244
7-16.
10 MW
R r max = 37 ohms
From Figure 7-5 for:
K = 1
AVt
:s;
0.12
1.33
AVt
:s;
0.09
1. 33
RL
:2:
520 ohms
RL
:2:
890 ohms
RT
:2:
430 ohms
RT
:2:
780 ohms
Vc = 3.6 VRMS
K = 1.33
Vc
= 4.7 VRMS
= 1
Ie
= 12 MADC
1.33
VCE = 6.7VDC
IC = 9 MA
245
BVCEO = 15 VDC
20
Typical fT
300 MC
re
3 ohms
Rin(s)
6 ohms
Then:
K = 1.2
Use K
1.33 values
1
A Vt
or
C2
C1
= 10
43 ohms
rs
LetX C2
rs
-5
9 ohms
then
C2
3600 PF
C1 = 360 PF
Xc = 100 ohms
The tuning inductance required is then:
L
__ Xc
= 3.2 UR
RLP
Maximum Ib
0.5 MA
246
. Rr
(ohms)
4.999941
12
4.999931
11
4.999932
23
4.999967
20
4.999963
37
Crystal Units
CR-19A/U
5
(Number 4 + 15 ohms)
.....-----O()+ 10 VDC
r - - - -......----------4~--
2.7 TO
4 UH
RL=910 OHMS
2.7 K
0.01 UF
360 PF
1.8 K
0.01 UF
330 OHMS
3600 PF
TPI072- 131
Figure 7-7.
247
Change
Frequency
Vo
<1 PPM
+18%
Frequency
Vo
<1 PPM
-23%
Frequency
Vo
<1 PPM
5%
Frequency
Vo
23 PPM
10%
7-17.
<3%
Frequency
Vo
<1 PPM
<2%
Frequency
Miscorrelation
Vo
4 PPM
5%
248
PCMAX
5MW
R r max
15 ohms
K = 1
AVt
s;
0.06
1.33
RL = 300 ohms
R L = 510 ohms
RT = 270 ohms
RT = 470 ohms
Vc = 2.5 VRMS
Vc
3.2 VRMS
VCE = 4.5
Ic = 13 MA
IC = 10 MA
Its characteristics
are:
0
For
140 MW
BVCEO
15 VDC
hFEmin
20
Typical f T
300 MC
1.33
IE
14 MA
IE
11 MA
re
2.5 ohms
re
3 ohms
Rin(s)
5.5 ohms
Rin(s)
6 ohms
K is approximately 1.4, and the values calculated for K = 1.33 must be used.
249
r s = 21 ohms
rs
= 4 ohms
Let XC2 :=::::! 5
Then
C2 = 2000 PF
C1
66 ohms
Xc
L
RLP
130 PF
0.5 DR
:=::::!
Crystal Units
CR-19A/U
Resonance
Frequency
(MC)
R
(ohms)
20.00060
4.5
20.00031
20.00068
5.5
20.00027
20.00009
15
(Number 4 + 10 ohms)
250
1.6 K
R L : 510 OHMS
130 PF
1000 PF
3K
1000 PF
510
OH~2000PF
TP 1072-130
Effect of
+15% B+ Change on Oscillator
Frequency
Vo
. <1 PPM
+13%
Frequency
Vo
1 PPM
-20%
Frequency
Vo
<1 PPM
7%
Frequency
Vo
25 PPM
5%
3 PPM
Frequency
Vo
2 PPM
3%
Frequency
Miscorrelation
Vo
4 PPM
10%
251
7-18.
Table 7-2 gives the major characteristics of the military standard series
resonance crystal units in the frequency range from below 30 MC to 125 MC.
More detailed specifications are given in MIL-C-3098,Supplement 1. There are
no military standard crystal units for the frequency range from 125 MC to 200 MC,
252
Of,
t>j
en
c.u
Operating Temperature
Range ~oC)
Frequency
Tolerance
( Percent)
to
to
to
to
to
to
to
50
87
125
125
125
125
125
0.005
0.005
0.005
0.002
0.005
0.002
0.005
-55 to +105
to
to
to
to
to
to
+105
+105
+105
+105
+105
+105
-55
-55
-55
-55
-55
-55
to 61
to 75
to 61
to 61
to 125
to 125
70
70
80
80
80
70
to
to
to
to
to
to
80
80
90
90
90
80
0.001
0.002
0.002
0.002
0.002
0.001
2
2
2
2
and
and
and
and
1
1
20
2
2
2
2
2
1
1
1
1
Rated
Drive
(MW)
60
and
and
and
and
and
60
60
60
60
60
60 and 40
60 and 40
40
40
50 and 60
40
80 to 100
50
50
50
50
50
Special Application
NOTE: Refer to Table 7-1 for other crystal units applicable from 30 to 61 MC.
10
10
17
17
50
50
125 to 200
35
*50
50
50
50
50
50
Frequency
Range
(MC)
Maximum
Resonance
Resistance
(ohms)
Holder
Type
CR-65/U
CR-32A/U
CR-61/U
CR-84/U
CR-59A/U
CR-75/U
HC-6/U
HC-6/U
HC-18/U
HC-25/U
HC-18/U
HC-6/U
CR-73/U
CR-53A/U
HC-6/U
HC-6/U
CR-54A/U
CR-56A/U
HC-18/U
CR-80/U
HC-18/U
CR-82/U
HC-25/U
HC-25/U
CR-83/U
Similar to
CR-54A/U, CR-56A/U,
CR-80/U, CR-82/U,
or CR-83/U
Crystal
Unit
Type
but crystal units can be purchased in this range that meet the specifications of
the CR-54A/U, CR-56A/U, CR-80/U, CR-82/U, or CR-85/U types, except that
the maximum series resonance resistance may increase to 80 or 100 ohms.
The maximum resonance resistance of crystal units therefore lies in the
range of 40 to 100 ohms in the 30 to 200 MC frequency range. The actual range
of re'sonance resistance which will be encountered for large groups of crystals
of the same type and frequency will probably be R r max to 1/4 Rr max below 60
MC and R r max to 1/3 ~ max above 60 MC.
For these crystal unit types, the crystal unit shunt capacitance Co is
below 7 PF and is of little importance insofar as oscillator design is concerned
below 100 MC. Above 100 MC, however, this capacitance can degrade the
crystal unit phase-shifting capability since the ratio of Xea to R1 is then small.
The reactance of a 7 PF capacitance varies from 230 ohms at 100 MC to 114
ohms at 200 MC, while the crystal series arm resistance may, in the worst
case, be 60 ohms at 100 MC and 100 ohms at 200 MC.
, The ratio of XC o to R1, therefore, lies in the range of 1 to 5. The
analysis of Paragraph 1-4 shows that the crystal unit phase-shifting capability
is severely degraded when this ratio is less than 3. At frequencies above 100
MC, therefore, this condition is either being approached or exceeded, and to
prevent excessive degradation of the crystal unit phase:-shifting capability, it is
riecessary to neutralize Co. This is achieved by connecting an inductor, which
resonates with Co at the crystal unit frequency, in parallel with the crystal unit.
The value of Co at the operating frequency can vary appreciably from the value
measured at low frequencies, and to obtain maximum effect Co should be determined at a frequency close to the operating frequency, but sufficiently lower
that the motional arm of the crystal unit has a negligible effect on the measurement. A frequency 5 to 10 percent below the operating frequency is usually
satisfactory.
Complete cancellation of Co is not essential since the object is simply to
increase the parallel capacitive reactance to a value such that
Xc
R~ for a worst-
case crystal will be larger than, say, 5. Therefore, an inductance which resonates with the typical value of Co at the operating frequency will suffice for all
crystal units of the particular type.
The Q of the inductor should be sufficiently large that its effective parallel
resistance is at least 10 times the crystal unit series resonance resistance to
avoid a degradation of the crystal unit phase shifting capability due to'this cause.
This is not a demanding requirement considering the low value of R1 at these
frequencies, and frequently the inductor is constructed in the form of a closely
254
spaced single-layer coil wound on a 1/2 watt carbon resistor of 3 to 10 K nominal value. At all frequencies below 100 MC the ratio of XCo to R1 is sufficiently
large that it is unnecessary to neutralize the crystal unit shunt capacitance.
Since the shunt capacitance is neutralized above 100 MC, the crystal
operates at the motional arm resonance frequency f s and the resistance of the
crystal at this frequency is the motional arm re sistance R1. To a void having to
refer to both Rr and R1 and f r and f s in the following discussion, these distinctions will be ignored and the discussion will in general be presented in terms
of R r and f r . It should be understood, however, that when applied to designs
above 100 MC, R1 and f s are the appropriate crystal characteristics.
7-20.
Amplifier Characteristics
2N2219
2N270S/2N917
50
3.2
3.2
3.2
200
10
10
11
500
20
16
25
1000
27
20
35
255
transistor type, bias level, and load resistance. The series input inductive
reactance as a function of frequency appears to increase almost coincidentally
with the series resistive component up to the region of the resistance peak.
And above the peak it increases rapidly relative to the resistive component.
From immediately above the frequency of peak series resistance, the amplifier
input impedance is essentially inductive.
Above 20 MC the amplifier develops a large phase lag which reaches a
value of 45 to 70 degrees in the region of 60 MC, but which does not, judging by
oscillator performance, exceed a value of 90 degrees below 200 MC.
7-21.
jWL(p)
1 + jWL(p)/Rin
VI
(7-38)
Rrmoll
V2
L(s)
rin(s)
(b)
( 0 )
rin(s) ~ XL(s)
Rin
~ XL(p)
XL(p) ~ 2XL(s)
TPI072-83
Figure 7-9.
256
VI
R rmoll
Rin
L(p)
(e)
(7 -39)
and:
AVC\
(7-40)
=
WL(p)
1 +
[ R r max
Av. I ~ wL(p)
C
R r max
(7 -41)
In practice, this does not appear to give a good estimate of the attenuation.
It was found that the actual attenuation occurring between the crystal unit input
and the amplifier input lies somewhere between the value given by Equation (740) and that which would be obtained if the inductive component in Figure 7-9 (c)
was absent. That is:
AV;
Rin
Rin + R r max
(7 -42)
No satisfactory explanation has been found for this effect. One possible explanation is that the increase in effective emitter resistance due to the addition of
Rr max in series with the emitter causes a change in the distribution of the feedback currents between the base and emitter paths, thereby increasing L(p).
Oscillation can usually be obtained when calculating the loop gain on the
basis of the attenuation given by Equation (7 -42), but it will then usually be nece ssary to increase the loop gain to obtain satisfactory oscillator performance when
subjected to external variables. A value of voltage attenuation mid-way between
the two values given by Equations (7-40) and (7-42) seems to be a suitable choice.
7-22.
factors.
The loop voltage gain of the oscillator is conveniently divided into three
Referring to Figure 7-10, these are:
(a)
Gv
257
TPI072-80
Figure 7-10.
(b)
(c)
(7-44)
Gy and AyC are obtained from the amplifier measuring process and the known
value of R r max, enabling the impedance transforming network voltage ratio to
be calculated.
The amplifier loading due to the feedback circuit,neglecting losses ,is
then:
(7-45)
7-23.
The signal voltage at the input terminal of the crystal unit Ymax has to
be limited to a specific value to prevent crystal unit overdrive. This in turn
indirectly determines the maximum value of the collector signal voltage Yo max'
The two are related by the voltage ratio AY of the impedance matching transformer
t
258
Vmax
A
Vt
(7-46)
Vmax is also a function of the load impedance at the output side of the crystal
unit which is, in this case, the amplifier input impedance. The complex nature
of the amplifier input impedance at small signal levels has already been described,
and a further increase in complexity occurs when the amplifier is subjected to a
high input signal level of the order of that expected in oscillator service. This
be far larger than the "linear" region of the emitter-base diode characteristic, and a large but apparently unpredictable increase in the amplifier input
impedance can be expected. Because of this it is difficult to develop an
equation for Vmax which will ensure that crystal overdrive does not occur but
which is not so stringent as to place needless restraints on the design.
will
Vmax (RMS)
40
0.56
50
0.64
60
0.7
100
0.9
259
7-24.
. t
Since this type of oscillator gives good correlation of crystal unit and
oscillator frequencies without major corrective measures despite the large phase
lag present in the amplifier, the mechanism by which this occurs is worth consideration. Low miscorrelation of oscillator and crystal unit frequencies implies
that the net loop phase angle of the remainder of the circuit is approaching zero
and therefore a compensation of the amplifier phase lag must be inherent in the
circuit. It appears that this phase correction is obtained due to the action of
the crystal unit in conjunction with the amplifier input impedance. Reference to
Figure 7-9 (b) shows that, at the crystal unit resonance frequency, the phase
angle of the amplifier input signal relative to the signal at the crystal unit input
frequency is:
e
260
WL(s)
R r max + Rin(s)
(7-48)
Rin(s) is always smaller than R r max + Rin(s) and at the higher frequencies
is much smaller. Therefore, 8 is a phase lead which is correspondingly small
at low frequencies but gradually increases with frequency.
Judging by the small amounts of phase lead which had to be introduced in
other ways into the circuit to obtain good frequency correlation, it appears that
the compensation is almost complete for the range of resonance resistance values
expected at the various frequencies. This leads to the conclusion that it is undesirable to connect a low impedance across the amplifier input, since this will
tend to decrease the phase lead obtained at this point. The emitter DC current
feedpath should therefore preferably be at least 10 times XL(s), a condition
which will normally be automatically satisfied by the conditions imposed by
transistor operating point stability with temperature variations. This also
precludes the use of resistive loading of the amplifier input to decrease amplifier regeneration, leaving as the two alternatives either increased amplifier
output loading or amplifier neutralization.
7-26.
Amplifier Stability
261
7-27.
The characteristics having the greatest influence on the amplifier performance are the current gain-bandwidth product and the collector-base
capacitance. A high fT and low Cob are indicative of good high frequency performance.
Judging by experimental results, satisfactory oscillators can be designed
at frequencies up to 120 MC and perhaps 150 MC using transistor types having
typical current gain-bandwidth products of 300 to 400. Above 120 MC, transistor
types having current gain-bandwidth products of 700 or larger should be satisfactory. It appears doubtful that types having a typical fT of less than 500 will be
suitable at the highest frequencies due to excessive amplifier regeneration at
suitable voltage gain levels. To adequately stabilize amplifiers using these types
at 200 MC will probably require the voltage gain to be so low that crystal unit
overdrive is likely to occur. However, if the amplifier is neutralized, it may
be possible to develop a satisfactory design.
7-3 O.
262
If only low power output is required as would usually be the case when
used, for example, as a receiver mixer injection signal source, the lower collector current and collector-emitter voltage will be suitable. If high power
output is desired, bias conditions approaching the higher end of the quoted
ranges will be necessary. Power outputs approaching 50 percent of the transistor dissipation can be obtained, and calculations similar to those that would be used at low frequencies to determine the bias conditions for a Class A power
amplifier may be helpful in determining suitable bias conditions. This assumes,
however, that the amplifier will be stable with the calculated collector load resistance, which may be very far from the case.
7-31.
The circuit will be of the form shown in Figure 7-11. The collector
circuit tuning inductor should resonate with, say, 50 PF at 30 MC, decreasing
to perhaps 10 PF at 200 MC. It is desirable that the collector tuned circuit
effective parallel resistance should be large compared to the highest value of
collector load resistance RT that will be used during the test. The highest
value of RT will usually be 1 K or less, making a tuned circuiteffective parallel
resistance of 8 to 10 K suitable. At the lower frequencies the losses of the
TPI072-611
263
The circuit layout should follow good engineering practice with regard
to minimizing lead lengths and the decoupling of supply lines. To decrease the
possibility of feedback, the emitter and collector circuits should be spaced as
far apart as possible consistent with maintaining minimum lead lengths. The
layout should allow access to the collector and emitter leads for the voltage
measuring probes, and the impedance bridge connections should be immediately
adjacent to the emitter connection. With the object of converting this circuit
to the prototype oscillator, provision should be made for installing the feedback
circuit components at a later stage.
Figure 5-3 shows a circuit layout constructed on a brass chassis designed
to mount directly on the ground terminal of the RX Meter. The shield between
the emitter and collector circuits is not essential. Unless previously measured
and found satisfactory, the collector tuning inductor should not be installed at
this stage.
7-33.
264
voltage line. It requires about one hour to introduce this modification and is, in
any case, a desirable improvement, greatly enhancing the instrument's usefulness for semiconductor circuit measurements.
When using the RX Meter at low output signal levels at high frequencies,
there are two effects which should be noted. Adjusting the output signal level
will often cause a sufficient change of the bridge oscillator frequency to desensitize the null detector circuit unless a corresponding adjustment is made of the
heterodyne oscillator frequency. (This oscillator operates at a frequency 100
KC removed from the bridge oscillator frequency to produce a 100-KC difference
frequency which is then fed to the null detector circuit.) At the highest frequencies
the heterodyne oscillator signal appears at the bridge terminals at a level of from
5 to 20 MV. This will cause an amplifier output which may mislead the operator
into thinking that the amplifier is oscillating.
The measuring procedure is as follows: Adjust the RX Meter to operating
condition at the design frequency. Measure and note the input impedance of the
RF voltmeters that will be used to measure the amplifier input and output signal
voltages. Measure the resistance of a number of carbon resistors and select
several having actual resistance values in the range of 200 ohms to 1 K for use
as amplifier loads. Values of approximately 200, 300,.500, 700, and 1000 ohms
are suitable. The graphs of Figure 5-2 may be useful when making a preliminary
selection of resistors. Measure the effective parallel resistance of the collector
circuit tlUling inductor. Calculate the actual total amplifier load resistance for
each load resistor. This consists of the parallel combination of the measured
resistance of the loading resistor, the plate circuit RF voltmeter input resistance,
and the effective parallel resistance of the collector tuning inductor.
Install the collector tuning inductor in the circuit. Connect the amplifier
to the bridge terminals, with the live terminal connecting to the transistor
emitter via a capacitor of negligible impedance. Short the collector to the decoupled supply point, null the bridge while setting the bridge output voltage to
10 or 15 MV, retlUling the detector oscillator if necessary. Note the amplifier
parallel input impedance components. Measure the signal voltage appearing at
the decoupling points of the collector and base to ascertain that the decoupling is
adequate.
Replace the short circuit with the lowest value loading resistor and tune
the collector circuit for maximum collector signal voltage,adjusting the bridge
output voltage if necessary. Null the RX Meter and retune the plate circuit for
maximum signal. Null the RX Meter again if necessary. Note the amplifier
parallel input components. The amplifier input inductance may in some cases
be beyond the range of the bridge and it will then be necessary to place a
capacitor across the bridge terminals to obtain a null indication. Repeat the
measuring process for the remaining load resistors.
265
Using a signal generator and a calibrated attenuator, measure the relative accuracies of the RF voltmeters at the scale settings employed in the test.
Correct the readings accordingly and calculate the amplifier voltage gain for
each load condition. Plot the amplifier voltage gain and input resistance as a
function of the total amplifier load resistance.
7-34.
The problem is one of selecting from the plotted data an operating point
which will provide a high voltage gain and negligible undesirable effects due to
amplifier instability. Numerous alternatives exist, but one criterion which
appears to be valid at least above 70 MC is that at the operating point selected
the amplifier input resistance should not exceed twice the value measured when
the collector is shorted. This appears to ensure a satisfactory degree of
amplifier stability and may be used as a guide in determining the maximum
collector load that may be employed.
When the operating point has been selected, the oscillator design calculation is as follows: Tabulate the corre sponding values of amplifier total load
RT, the amplifier parallel input components Rin and XL(p), and the amplifier
voltage gain GV' Calculate:
AVC
Rin
(7 -50)
R in + Rr max
wL(p)
IAvcl
R r max
[ WL(El
R rmax
~+ \:axf
(7-51)
1.4
Rin + R r max
A 2
(7-52)
(7-53)
\t
Calculate the resistance of the parallel combination of RFB and the previously
measured parallel resistance of the collector tuning inductor and the voltmeter
to be used in the collector circuit. Designating this resistance as Rn , calculate
the actual oscillator load re sistance from:
( 7 -54)
266
C1
C1 + C2
(7-55)
and
(7-56)
This latter condition is imposed by phase angle considerations as discussed in
Section 4. In order to obtain good frequency correlation, it may be necessary
to increase or decrease X(C1 + C ) to introduce a small phase angle. Convert
2
the amplifier to the oscillator circuit.
7-35.
DESIGN EXAMPLES
7-36.
193-MC Oscillator
The circuit is shown in Figure 7-12 and was designed for true grounded
base operation as a precaution against possible difficulties due to AC grounding
the base. This is not necessary in practice, and a conventional single voltage
supply biasing scheme should be suitable. The calculation is presented for both
values of AVC for comparison purposes.
A 150-MC crystal was used in this evaluation by operating it in the 9th
overtone mode. Late in the evaluation period the pins of the crystal holder (HC18) were damaged and it was necessary to transfer the crystal to another holder
LX
RL .04 UH
1000
5V
1.3K
1000
1000
15V
.8-11
NOTES:
Ic = 5 MA
ALL CAPACITORS IN
UUF .UNLESS OTHERWISE
NOTED.
LX TUNES WITH Co
TPI072-li4
Figure 7-12.
267
AVC
0.82
AVt
0.136
RFB
30 K
Therefore:
RL
::::::
1
=
A
C1
Vt
For
C2
AVt
C2
0.22
600 ohms.
C2
6.3
= 3.5
C1
25 PF, C 1 = 4 PF
800
0.51
IAVcl
80
20
~ 700 ~70
:I:
l&J
~600 <.J
a:
~.
60
<l:
~
1LJ
~ 500 ~ 50
<l:
l&J
~
a:
VOLTAGE GAIN-
~400 ~ 40
a:
Q.
f-'
~ 300
200
XL(p)--...
30
20
200
TPI072-117
----.---~
l---
300
.--~
400
./
500
~~
>
z
<l:
,/
1LJ
~
INPUT RESISTANCE
<l:
10~
>
600
700
5
800.
268
15
t-.:l
(,0
AVo
AVo
38
36
AVo
AVo
TA
= 4%
= 10%
192.854 MC
C2
C2
C2
C2
C2
C2
C2
C2
C2
C2
C2
C2
~ 25C
~ 25C
~ 25C
~ 25C
~ 25C
~ 25C
TEST CONDITIONS
= 10%
= 17%
PPM
PPM
= 13%
= 15%
PPM
2
1.5 PPM
avo
AVo
3.2 PPM
2.2 PPM
CHANGE
10% Change in RL on
Output Voltage
10% Change in R L on
Oscillator Frequency
10% Change in B+
on Output Voltage
10% Change in B+
on Oscillator Frequency
EFFECT OF
.
f s = 192.8560 MC, R1 = 78 ohms
Crystal Umt: f s = 192.8463 MC, Rl = 96 ohms (repackaged)
= 3 . IV (25
Nominal Vo
TABLE 7-5.
192,853
192,852
192,851
l,...-- :-..
"'-
192,850
192,849
~ 192,848
>
~ 192,847
LU
"" '"
56PPM
::>
8192,846
...a:
"'" ""-
C2 '15PF
'\
192,845
"-
192.844
r\
192.843
192.842
192.84~55
-45
-35
-25
-15
TPI072-e4
Figure 7-14.
7-37.
-5
5
15
25
35
TEMPERATURE (C)
45
"55
/
../
...........
65
75
85
95
105
150-MC Oscillator
This is essentially the same circuit that was used at 193 MC but with
tuning and feedback circuit changes (see Figure 7-15). However, a comparison
of the amplifier voltage gain and input impedance as a function of load for the
two cases shows that the transistor characteristics changed considerably. The
same comments concerning amplifier biasing apply.
The crystal units used had characteristics similar to those of the CR"56A!U but with Rl max = 100 ohms, P CMAX = 2 MW. The measured amplifier
data is given in Figure 7-16 and an amplifier working point was selected at
Rr = 600 ohms, ~n = 150 ohms, Gy = 34, XL(p) = 43 ohms.
Then:
AyC = 0.6
AYt
IA yc
0.069
= 0.35
AYt
0.12
RFB :::::: 53 K
Therefore:
RL
RT = 600 ohms
Cl
1
Ay
C2
50 PF, C1 = 3.7 PF
C2
For
270
1 = 13.5
C2
7.5
Cl
For C2 = 25 PF, C1 = 3.3 PF
LX
.8-11
1100
NOTES:
1.3 K
10 0
1000
5V
IC = 5 MA
ALL CAPACITORS IN
UUF UNLESS OTHERWISE
NOTED.
Vee
15V
LX TUNES WITH Co
TPI072~55
240
:I:
~ Zl80
-
a::~
~ 160
tJ
~
;:
~ 140
I-
I-
.~
a:
INPUT RESISTANCE-
l&f
a:
100
80
' /K
./
~ 120
50
55
/'
ln200
---
..,-
~V
.....
",
~
,/
,."
,.../
V"
Jt'
65
60
~/
220
-l
V"
45
z
40
<[
C>
ILl
35
<!l
~o
30 >
oJ<
"-VOLTAGE
>
C>
GAIN
25
20
INPUT REACTANCE
60
40
I5
\
300
TPI072-150
400
500
600
LOAD RESISTANCE, R
700
T
800
(OHMS)
271
This design was evaluated using C1 ::: 5 PF, C ::: 25 and 50 PF with
2
the results indicated in Figure 7-17 and Table 7-6.
150.001
150.000
./
r-........
~~
149.999
"'"
~ 14~.9ge
)-
~ 149.997
UJ
52 PPM
S149.996
a:
u.
149.995
""- ~
I~
149.994
149.993
149.992
-55
-45
-35
-25
'"0'''''
-15
-5
5
15
25
35
TEMPERATURE (Oe)
45
""
55
I--...
65
75
85
95
105
120-MC Oscillator
The object of this design was to obtain a high power output. Consequently,
a transistor type was selected having a dissipation rating higher than would normally be used in crystal oscillator service. The oscillator circuit is shown in
Figure 7-18. The crystal unit characteristics are:
CR-56A/U, R r max ::: 60 ohms, PCMAX ::: 2 MW.
The measured amplifier data are given in Figure 7-19, and a working
point was selected at RT ::: 320 ohms, Rin ::: 130 ohms, XL(p) ::: 19 ohms,
G V ::: 37.
272
rv
-::J
eN
{),.V o
{),.Vo
TA
C2
= Ambient Temperature
= 7%
= 1l%
Cz
- C2 = 25 UUF, Vcc
No oscillation with Cz
C2
t:::.Vo = 8%
- - - - -
Cz
= 2%
t:::.Vo
TEST CONDITIONS
R1 = 50 ohms
Rl = 65 ohms
150.0013 MC,
150.0018 MC,
150.0011 MC
1. 7 PPM
= 2%
t:::.Vo
1. 5 PPM
1.4 PPM
CHANGE
.:~
35 PPM
-50C to +80 o C Variation
of TA on Oscillator Frequency 35 PPM
10% Change in R L
on Output Voltage
10% Change in R L
on Oscillator Frequency
10% Change in B+ on
Output Voltage
10% Change in B+ on
Oscillator Frequency
EFFECT OF
Crystal Characteristics:
= 3 . IV
.
Nommal Vo
TABLE 7-6.
+28 V
1000
1000
1000
NOTES:
IC = 25MA
ALL CAPACITORS IN
UUF UNLESS OTHERWISE
NOTED.
1000
TPI072-56
Figure 7-18.
300
I e =25 MA
vec: 28V
Xl...(pjI90HMS
(J)
:E
J:
z200
0:
~
lJJ
U
Z
eX
l-
ll)
(J)
lJJ
a:
I:;)
Q.
100
--
~
~
l.--/
~INPUT RESISTANCE
V
~
.----- l--- ~
VOLTAGE GAIN
I
300
'
LOAD RESISTANCE, RT(OHMS)
400
TP 1072- 151
Figure 7-19.
274
40
30
200
L--- ~
20
Then:
AyC
0.69
IA yc
AYt
0.055
AYt
1=
0.29
= 0,.13
RFB = 60 K
Therefore:
For
320 ohms
RL
:::::>
RT
C2
Cl
1
AY
t
C1
8 PF, C2
- 1
17
For
136 PF
C2
C1
6.7
Ci
8 PF, C2
54 PF
The design was evaluated for C2 = ,50 PF for R L equal to 320 and 250 ohms
with the results shown in Figure 7-20 and Table 7-7.
120,008 v
'",
120,007
120,006
120,005
"'J
'" ""
U 120,004
2
)-
120,003
LJJ
88PPM
:l
8120,002
a:
l>.
120,001
"" l"-.
120,000
119999
119998
119997
-55
-45
-35
-25
-15
-5
15
25
35
45
55
'~
65
"""--
75
85
90
--'
105
TEMPERATURE (Oe)
'.'012-'0
Figure 7-20.
275
l:\:l
-:]
.0':>
TA on Output Voltage
/:).Vo
::: 12%
44 PPM
TA on Oscillator Frequency
::: 12%
52 PPM
!::J.Vo
on Output Voltage
10% Change in R L
::: 28V,
TA ::::: 25C
TA ::::: 25C
::: 28V,
T A ::::: 25C
T A ::::: 25C
C2
C2
C2
C2
2 PPM
L
on Oscillator Frequency
10% Change in R
Cz ::: 50 UUF,
::: 7%
/:).Vo
10% Change in B+
on Output Voltage
TEST CONDITIONS
CHANGE
3 PPM
lO% Change in B+
on Oscillator Frequency
EFFECT OF
.
6 V(R L ::: 320 ohms)
.
Nommal Vo :::
, OscIllator Frequency::: 120.0004 MC
4.4 V (R L ::: 250 ohms)
TABLE 7-7.
7-39.
75-MC Oscillator
The object of this design was to develop as much pOwer output as possible
while maintaining the crystal dissipation below the 2 MW maximum. The circuit is shown in Figure 7-21. This design followed the one at 120 MC, and the
2N2217 - 2N2219 types were again selected for evaluation. At this frequency
the 2N2219 had the best voltage gain and input resistance characteristic. When
converted to an oscillator and the feedback network optimized, the performance
was surprisingly poor, 100 MW being the maximum output obtained. After
several values of load resistance and feedback network were attempted without
any improvement, it was decided to partially neutralize the transistor so that
operatiop with a larger value of load resistance would be possible. The neutralizing scheme consisted of connecting a coil across the crystal socket. Retesting
the circuit on the RX Meter (crystal removed) gave the improved curves of
Figure 7-22. These curves show stable gain characteristics for RT = 900 ohms.
In practice 500 ohms were the maximum value before tuning hysteresis occurred.
The neutralized oscillator displayed a much improved power output (170 MW).
The crystal unit characteristics are:
CR-56A/U, R r max = 50 ohms,
2MW
2400
1000
2000
TP 1072-114
PCMAX
2000
+28V
0.6-14
1000
!OOO
NOTES: IE=25MA.
ALL CAPACITORS IN UUF UNLESS OTHERWISE NOTED.
277
O.
200
400
600
aoo
1060
1200
RESISTANCE. RT (OHMS)
TPI072 -61
AVe
0.48
AVt
=
=
0.097
RFB
278
10 K
IAvel
A\i
0.35
0.133
co
t\:)
-;j
= l7%
l2.5 PPM
of TA on Oscillator Frequency
6.Vo
= 20%
1.7 PPM
t::. Vo = 10%
10% Change in R L on
Output Voltage
10% Change in R L on
Oscillator Frequency
Output Voltage
10% Change in B+ on
Oscillator Frequency
2.4 PPM
10% Change in B+ on
RL
RL
Vcc
Vcc
RL
RL
=
75.0000 MC
25 C
~ 25C
= 28V, T A ~ 25C
= 28V, T A ~ 25C
= 470 ohms, T A
TEST CONDITIONS
R r = 38 ohms
CHANGE
=9
EFF,ECT OF
Nominal Vo
Therefore:
RL
:::::;
RT
-C2 =
C1
For
.A
C1
470 ohms
- 1
C2
9.3
C1
Vt
= 75
8 PF, C2
PF
6.5
8 PF, C2
C1
= 52
PF
In this' case it was necessary to decrease AVt to prevent crystal unit overdrive,
and a value of 100 PF was found suitable for C2. The design evaluation data is
presented in Figure 7-23 and Table 7 -8.
75,001,000
75,008,000
75,006,000
Vl
75,002,0'00
>-
~ 15,000,000
r---.
75,004,000
~
'"
'\
/
24PPM
1\
\
1/
II
::J
874,999,800
a::
u.
74,999,600
74,999,400
-35
-25
-15
I"" "'--
74,999,200
74,999,OO~55 -45
-5
15
25
35
45.
55
65
1/
-"
75
/
85
95
TEMPERATURE (OC)
TP I0722
7-40.
TRANSISTOR SERIES
NOTE:
280
OSC~LLATORS,
90 TO 500 KC
105
TP1072-81
(a)
(b )
281
7-41.
Amplifier Characteristics
It is recommended that only the high-frequency type transistor characterized by current gain-bandwidth products of 100 MC or larger should be employed
in this frequency range. These transistor types behave as essentially resistive
devices in this frequency range, and their low ohmic emitter and base resistance
allow amplifier voltage gain and input resistance to be calculated from relatively
simple formulae.
The loop voltage gain of the circuit of Figure 7-24 (b) can conveniently
be divided into two factors. These are:
,(a) The net voltage gain GVR from the crystal unit input terminal to
the collector.
(b)
282
I.\:)
c.v
00
Operating
Temperature
(OC)
(%)
Frequency
Tolerance
O.OI
0.02
-40 to +85
-40 to +70
0.02
O.OI
to 0.5
70 to 80
70 to 80
70 to 80
** Anti-Resonance Types
* Special Application
0.2
**0.09 to 0.25
*0.08toO.2
0.002
0.003
0.002
0.455
to 0.5
-40 to +70
**0.09 to 0.25
0.2
-40 to +70
*0.08 to 0.2
Nominal
Frequency
(MC)
Rated
Drive
(MW)
2500 to 7500
4500 to 5000
2000 to 2500
3300
2500 to 7500
5000 to 5500
2000 to 2500
Maximum
Resonance
Resistance
(ohms)
CR-26A/U
CR-42A/U
CR-30A/U
CR-45/U
CR-25A/U
CR-37A/U
CR-16B/U
Crystal
Unit Type
Holder
Type
1,
HC-6/U
HC-13/U
HC-2I/U
HC-6/U
HC-6/U
HC-13/U
HC-2I/U
"
the voltage gain cutoff frequency fv , 'and provided that the collector load is much
smaller than the collector-base diode resistance, is:
aa
RT
(7-58)
(7 -60)
Cio
min RT
GVR =
(7-61)
The actual amplifier input resistance will be smaller than that given by
the second term .of Equation (7 -60) due to the loading contributed by the base
biasing network. The net voltage gain will then' be less than that given by
Equation (7-61). Frequently, however, the loading due to the base biasing network can be arranged to be negligible in comparison with the transistor input
resistance. Temporarily assuming this to be the case, the net voltage gain is
then:
RT
~ hFE min' R.
(7-62)
284
(7-64)
Rin
-2
A
Vt
K R rmax
A 2
(7-65)
vt
K RL . R rmax
A
2. (
vt
rmax
R L + KR
A 2
(7-66)
)
"t
(7-67)
A loop voltage gain of 1. 4 is considered suitable for a worst-case design, provided that the value of hFE min used is the minimum value likely to be encountered due both to the spread between units and the lowest ambient temperature
285
1.4
(7 -68)
Crystal Dissipation
\ max
7 -45.
'Y'!PCMAX
. Rrmax
2
(7-69)
PL =
Vmax
2
AVt ' R L
PCMAX
R rmax
2
2 A\t, R L
(7-70)
Substituting for
..
= (hFEmin-1. 4AVt)
2.8 . A"t
286
..
(7-72)
..
o
...J E
0: 0:'~
TPI072-63
287
This equation also provides useful design information when plotted using hFE min
as a parameter. These curves are shown in Figure 7-26 and can be used to
estimate for a given transistor minimum hFE the required feedback transformer
voltage ratio for a given power output relative to the crystal unit dissipation
rating.
7-46.
It is suggested that the design procE':dure should follow the pattern of that
presented in Paragraphs 7-9 to 7-13 for design in the 0.8 to 30 MC range. This
procedure uses design charts similar to those given in Figure 7-25 and 7-26 to
determine a suitable amplifier load resistance and feedback network, and then
relates these to the. amplifier biasing conditions.
7-47.
Noteworthy Points
(a)
(b)
The loading due to the base biasing network can be accounted for by
considering the transistor current gain to be reduced in the same
ratio as the amplifier input resistance is reduced by the loading.
Alternatively, the oscillator load may be increased by a similar
amount. Paragraph 3-6 gives a method of designing for a minimum
loading due to the base biasing network.
(c) If the amplifier is operated at a high voltage gain, the amplifier may
have a substantial capacitive reactance input component possibly
approaching the amplifier input resistance in magnitude due to feedback through Cob' This may result in a loop phase lag and a resultant
oscillator frequency miscorrelation. It is possible to neutralize the
feedback current which causes this effect by means of a capacitor
connected from the secondary of the feedback transformer to the
amplifier input; that is, in parallel with the crystal socket. The
capacitor value should be related to Cob by the equation:
Cn =
288
Cob
A Vt
(7-73)
1--------..,-----,---J--
i
I
---------, .. - - - "l----t---- -I
--;-----~1~---j-----:-------,j.
t
"' I " . I
I:
w
-.
~-----~- -~-----1-,,-----~
I ---- ~---
1
!
-- -- +-~
- --I----I-----c--
I:
~-----~--:+------f----+----+------+-----,---c-------i----~I
I
'
I
.
I
I
I
iI i ,
:
1
:
I
1.00,
I:
, i .-"
'l '.
i"
'-.:'-
II
1'-:'
,
i':
'
!.
I
i.
I : I,
--t--Hr-"'~.-;-'
-r--.
-+--~'-.~-~-+-, --+----.-+-----.-+.--~-+~.----!:~---1
+---,- ,-.
t---:-+-'
,-..
.'
. I, .. , .
r'
-!
'---,
---.+-----
. '. _. " !
"i'
+----h----'----.
I ..L---.----.--~---:
I
I'
I ,
J.
"'--- 1--
a....JI E
...
a.
:ll::
-i--~-I
-.
~.2 __~-+,
.+. '---.
i
' ~ _ :-'--
.2
.4
,_:",__
.6
F'E rn
---:'-
i -,
:-+~
i,
-,
.1,
If)"
So
_8
1.0
TPI072-64
Figure 7-26.
289
7-48.
The value of hFE min used in estimating the oscillator load and feedback network relationships should correspond to the minimum value
of the transistor hFE at the lowest operating temperature. Otherwise, the loop voltage gain is likely to be inadequate under these
environmental conditions.
290
The only military type series resonance crystal unit applicable in this
frequency range is the CR-50A/U covering the range from 16 to 100 KC. The
major characteristics of this crystal unit are:
Frequency Range:
o. 012 percent
o
-40 to +70 C
Rated Dissipation:
0.1 MW
Crystal Holder:
16 to
30 KC: 100 K
30+ to
50 KC:' 90 K
50+ to
70 KC:
80 K
70+ to
90 KC:
70 K
60 K
HC-13/U
0.015 percent
-40 to +70 0 C
Rated Dissipation:
291
Physical Configuration:
In the circuits to be presented the crystal unit operates into the base
input impedance of a transistor. Insofar as low-level signal conditions are
concerned, this resistance level is much smaller than the crystal unit resonance
resistance. It would appear from this that the signal voltage at the amplifier
input will be much smaller than that at the crystal unit input terminal. This
leads to the conclusion that the crystal unit input voltage should not exceed that
value which would cause the rated crystal dissipation when a crystal unit having
a minimum value of resonance resistance is in circuit. Taking R r min as 1/9
Rr max gives the permissible input voltage as:
Vmax =
i ~PCMAX
. Rrmax
(7-74)
This, however, neglects the non-linear behavior of the amplifier input resistance
at the relatively large signal levels that will occur in practice. This will increase
the average amplifier input resistance and produce a more equitable division of
the signal between the crystal unit and the amplifier input resistance.
The permissible input signal voltage will be larger than that given by
Equation (7-74) by a factor of perhaps 2. The only adequate way of ensuring
that crystal overdrive does not occur is to measure the crystal unit voltage.
Normal voltmeter methods are not suitable because of the non-linear waveform
at the amplifier input point and oscilloscope measurements are to be preferred,
particularly if a differential signal can be displayed, since the voltage appearing
across the crystal can then be determined directly.
7-51.
Amplifier Characteristics
292
relating these to the amplifier input and output resistance and gain are given in
Paragraphs 3 -7 to 3-11.
The high-frequency type transistors having current gain-bandwidth
products of 100 MC or more are also suitable. These types have low ohmic
base and emitter resistance which allows the amplifier voltage--gain and input
resistance to be estimated using relatively simple formulae. Amplifier characteristics using these types of transistors are discussed in Paragraphs 3-12 to 3-25.
The preceding discussion of series oscillator design in the 90 KC to 500 KC range
may be useful when using these types of transistor.
7-52.
The process involved in arriving at a suitable set of loop gain relationships consists of assuming a set of transistor bias conditions and load resistance
and determining the power gain and input resistance. These are then related to
the crystal unit characteristics to determine the transformation ratio of the impedance transforming network between the collector circuit and the crystal unit.
From this the permissible collector signal voltage before crystal overdrive
occurs under the worst conditions can be calculated. Provided that the collector signal voltage can be held to this level in practice, the design is then suitable.
If not, the design process must either be repeated at a lower collector-emitter
DC voltage level or other means of collector signal voltage limiting must be
introduced.
The following example of a design suitable for the 16 to 30 KC frequency
range illustrates the approach.
NOTE:
For the 2N336 transistor, the following parameters are quoted at the
current and voltage levels shown in Figure 7-27.
hib
55 ohms
hob = 0.25 x 10
-6
mho
6
hrb = 700 x 10hfb = -0.99
293
r - - - - - -....----------o 20V
TP 1072-117
ohms
4
hoe = 0.25 x 10- mho
h re = 7 x 10-4
hfe = 99
Substituting these values in Equations (3-18) and (3-19) with RT
10 K gives:
Gp = 12,700
With the biasing network shown, the value of Rin is shunted by RBI and RB2 in
parallel, and with the values shown, this reduces Rin to 3.5 K and Gp to 8700.
Decreasing Gp by a factor of 2 to ensure adequate loop gain gives:
R in
G~ = G p Rin + Rr = 147 (R r = 100 K)
294
(7-75)
GI
Gp
:-
1 . RT ~ RT == 10K
(7-76)
Transformation Ratio, Tr ==
RFB
Rin + Rr
1.47 MEGO
(7-77)
14.2
(7 -78)
(7-79)
(7-80)
206 K
(7-81)
2.7 MW
(7 -82)
This gives an output voltage of approximately 5 VRMS which is larger than the
transistor is capable of giving under the assumed bias conditions, and there is
no danger of crystal overdrive. A larger power output could be obtained by redesigning the oscillator at a higher transistor dissipation level. No transformer
losses are accounted for, and, therefore, the effective load would actually be
somewhat lower than 10 K.
The impedance level seen by the crystal at the secondary terminals of the
feedback transformer is approximately:
RL
Tr
== 360 ohms
(7 -83)
295
DESIGN EXAMPLES.
7-54.
+28V
13K
lOOK
1I0MH
0
6
NOTES;
ALL CAPACITORS
IN fL F UNLESS
OTHERWISE NOTED
IE: I MA
lOOK
13K
22
0.03
0.13
22
RL
20K
296
For Ie
1 MA, VeE
3
hie = 5.5 x 10 ohms
h re
1400 x 10- 6
hfe
100
hoe
24 x 10- 6 mhos
17 K gives:
which, for RT
Gp
22,000
3.8 K
Rin
The total input resistance consists of 3.8 K and the two 100 K biasing
resistors in parallel; that is, 3.6 K. The biasing network resistance Rb reduces
the gain to:
(7-80)
204 K
and therefore:
G'
or
G'
Rin '
R rmax + R in
350
(7-81)
175
2
=
G'
~ x RT = 3 MEGO
2
(7-82)
RFB
R rmax + Rin
= 15
(7-83)
RFB
= 4
R rmax + R in
(7 -84)
297
11
Network Calculation:
2100 ohms
TV + 1
(7-85)
(7-86)
tan -1 XLeff I
rL + rs
(7-87)
I < 1 degree
Since loading effects are negligible, Equation (7-85) is justified.
There-
fore:
C
wXC
= 0.13 UF
(7-88)
CT
= wXLeff = 0.031 UF
(7-89)
298
Using
(7-90)
== 21 ohms
Q2
Xc == Xc
1 + Q2
420 ohms
Xc
:=:::;
(7-91)
Therefore:
== tan
tan
-1 Xc
I:=:::;
rs
87 degrees
-1
tan
:=:::;
-1
(7-92)
50 > 89 degrees
3 degrees
(7 -93)
(7 -94)
0.53 VRl\JI S
Vo == V x TV
(7-95)
(7-96)
== 2.2 VRMS
== 220 K
299
w
o
o
10% Change in R L on
Output Voltage
== 3%
/iVo
== l3%
l45 PPM
li Vo < 2%
<3 PPM
l 0% Change in R L on
Oscillator Frequency
PPM
Ii Vo
::s 3
CHANGE
E cc == 28V,
E cc == 28V,
E cc == 28V,
E cc . == 28V,
RL == 20K,
RL == 20K,
25C
25C
R L == 20K
R L == 20K
TA~
TA~
T A ~ 25C
T A ~ 25C
TEST CONDITIONS
10% Change of B+ on
Output Voltage
10% Change of B+ on
Oscillator Frequency
Nominal Vo
EFFECT OF
TABLE 7-10.
2999.70
./
2999,60
2999,50
_ 2999,40
~
!; 2999,30
~ 2999.20
If 2999./0
2999.00
/
V
2998.90
2998,80
55
TP'072-III
Figure 7-29.
7-55.
............
"""" "-"\
r\.
'\
284 PPM
10.1
2998,70
-45
35
-25
-15
-5
15
25
35
45
55
65
75
85
95
105
TEMPERATURE lOCI
301
6200
+2BV
33K
10K
34MH
NOTES:
ALL CAPACITORS
IN~F UNLESS
OTHERWISE NOTED
~...-ojOII---+---H
IE: I MA
15K
5100
TPI072-113
CR-50/U
Resonant Frequency:
20,403.0 CPS
Resonance Resistance;
14,000 ohms
5.5 x 10 3 ohms
h re = 1400 x 10- 6
hfe = 100
6
hoe = 24 x 10- ohms
which, for
Rr
= 10 K gives:
Gp
14,000
R in
4.4 K
The total input resistance consists of 4.4 K and the two biasing resistors
_ in parallel; that is, 3.1 K. The biasing network resistance ~ = 10 K reduce~
the gain to:
302
(7 -97)
10,700
R r max
100 K and
Rr
Therefore:
G' p
or
= G
G~p
R in
Rr max + ~n
103 K
= 320
(7 -98)
160
R FB
max +Btn
G'
T
x RT
1.6 MEGO
(7-99)
(7-100)
FB
R r max + Btn
15
(7-101)
4350 ohms
-Xc =
..
TV + 1 = 4 9
(7 -102)
(7 -103)
r------,
I
'L-..
303
/1
"
X Leff
,
= 88 degrees
r L + r s
I = tan- 1
(7 -104)
c =
8800 UUF
= 2260
UUF
(7 -105)
uJ XLeff
Rr min
It is shown previously that for Rr = 100 K, the feedback phase shift will
be less than 3 degrees. If this network is then used with a crystal with Rr = 10 K
(lowest Rr value likely to occur), this phas e shift may increase. Us ing the
parallel-to-series transforms, G and Rr min + Rin in parallel transform to:
61 ohms
Xc
Vo
86 degrees
89 degrees
Phase error
5 degrees
Xc
Therefore
:Maximum crystal dissipation will occur for Rr = 10 K (the assumed minimum value), and the permissible output voltage is determined as follows:
For a maximum crystal dissipation of 100 UW, the permissible feedback
power P FB for R in = 3.1 K will be 130 UW. Therefore, the output voltage of the
7T network must not exceed a value of:
and
JP FB x R s min -
V o max
V x Tv
5.1 VRMS
1.3 VRMS
(7 -106)
(7-107)
.,/
304
.,~.
The design evaluation data are presented in Figure 7-31 and Table 7-11.
20404
20403
20402
en
~ 2040'
>
/'
",-
............
..........
" '"
~ 20400
340 PPM
S 20399
~
20398
20397
20396
'" '\ ,
\
-55
-45
-35
-25
-15
-5
15
25
35
45
55
65
75
85
95
105
TEMPERATURE (OCI
TPt072-1I0
6
In this circuit the amplifier gain is well in excess of 10 . Consequently ,
there was no difficulty in providing adequate loop gain. In fact, it was necessary
to severely mismatch the crystal to limit the loop gain sufficiently (note the 2-K
resistor in the resistive divider feedback network,Figure 7 -32).
Other methods could have been used to give the necessary selectivity.
For example, a Wien Bridge network could have been used in place of the tuned
circuit and resistance divider network. Furthermore, because of the high available power gain, the sacrifice in output power using the Wien Bridge would not
be unduly large, since the total load resistance could be reduced appreciably by
appropriately increasing the feedback power.
Crystal Used:
T-9J
Resonant Frequency:
999.93 CPS
Resonance Resistance:
55 Kilohms
305
w
o
(j')
10% Change in R L on
Oscillator Frequency
10% Change in B+ on
Output Voltage
10% Change in B+ on
Oscillator Frequency
PPM
= < 2%
/iVo
= lO%
85 PPM
/:). Vo
3 PPM
6 Vo = 3%
~3
CHANGE
25C
25C
E cc = 28V, R L = 10K
E cc = 28V, R L = 10K
E cc = 28V, TA ~ 25C
R:I
E cc = 28V, T A
RL = 10K, T
TEST CONDITIONS
EFFECT OF
TABLE 7-11.
'3000
3300
33K
IIOMH
0.22
3000'
+28V
47
47
NOTES:
ALL CAPACITORS
IN J,IF UNLESS '
OTHERWISE NOTED.
COIL Q=&O
47
IE =0.4MA
I
'
12=3MA
TP 1072-113
giving
Ie
1 MA, Vcb
h ib
55 ohms
hfb
-0.99
h rb
700 x 10- 6
hob
Ab
714 x 10- 6
=1
5V
\' ~,
= 3 MA, Vcb = 5 V;
307
2.2 kilohms
hie
10- 3
h re
120
hfe
45 x 10 -6 mhos
hoe
Similarly, for Ie
hie
0.4 MA, V CE
5V
9.7 K
h re
1.9 x 10- 3
hfe
57
hoe
12 x 10- 6 mhos
The total load on Q2 is the load res istor (3 K), the load of the feedback
network (set at 50 K), and the coil loss resistance (35 K) all in parallel, constituting a load of 2.6 K. Us ing the parameters for Ie = 3 .MA and Rr = 2.6 K
gives the second stage gain:
G p2
and
= 15,000
R in (transistor alone)
1. 9 K
The actual input resistance of the second stage consists of R in in parallel with
7.5 K and 33 K (6.1 K) giving: ~n (actual)= 1.3 K.
This additional input load reduces the total gain of the second stage by a
factor of R + R
t )' where R is the total resistance in parallel with
in ranSlS or
Rin (transistor). Therefore, G'p2 = 0.76 x 15,000 = 11,000.
(f
Us ing Rin (actual) as the load of Q1 and the parameters for Ie = 0.4 .MA
gives a first stage gain: Gp1 = 430
and
R in (transistor) = 9.7 K
308
G' pI
5.3 K
230
j Gp
1600.
For a loop voltage gain of 1.4 (corresponding to a loop power gain of 2), the
voltage attenuation of the feedback network is:
A
1600
1.4
1150
of_~he
network is
;", 205 = 39
5.3
1150
39
30
- r--
999.950
_ 999.900
en
Q.
u
; 999.850
u
--
~ 999.800
g
II:
~
274 PPM
............
"
[~
999.750
999.700
999.650
999.600
I
-55
'11'1072 -112
Figure 7-33.
-45
-35
-25
-15
. -5
15
25
35
45
55
65
75
85
95
105
TEMPERATURE (OC)
309
i-'
c.v
10% Change in R L on
Output Voltage
10% Change in R L on
Oscillator Frequency
10% Change of B+ on
Output Voltage
10% Chinge of B+ on
Oscillator Frequency
= 5%
= 8%
I::i Vo = :i3%
50 PPM
/1 Vo
PPM
/1Vo
3 PPM
~3
CHANGE
E cc
E cc
E cc
E cc
RL
RL
3K,
TA
25C
TA~
25C
= 28V, R L = 3K
= 28V, R L = 3K
= 28V,
= 28V, T A ~ 25C
TEST CONDITIONS
EFFECT OF
TABLE 7-12.
'''~.
7-57.
3000
3300
331<
0.026
IIOMH
3000
+28V
47
47
NOTES:
ALL CAPACITORS
IN IJF UNLESS
OTHERWISE NOTED.
47
47
IEI=o.4MA
IE2=3MA
TPI012-128
T-9XY
Resonant Frequency:
2999.6 CPS
Resonance Frequency:
50 Kilohrns
311
Design evaluation data are presented in Figure 7-35 and Table 7-13.
2999.50
2999.40
2999.30
2999.20
2999.10
/'
-- .........
t.--
"'" '\
In
Q.
~
V '"
..v
"....
2999.00
.j
t;
~ 2998.90
276 PPM
~
II.
2998.80
2998.70
2998.60
2998.50
2998.40
2998.30
TPl072-I09
.<
-55
-45
-35
-25
-15
-5
15
25
35
45
TEMPERATURE lOCI
55
65
75
85
312
95
105
W
I-'
W
Vo
3 PPM
l:i Vo < 2%
115 PPM
= 6%
Vo
= 11%
<3 PPM
CHANGE
10% Change in R L on
Output Voltage
10% Change in R L on
Oscillator Frequency
10% Change of B+ on
Output Voltage
10% Change of B+ on
Oscillator Frequency
EFFECT OF
25C
1\s:::l
R L = 3K,
E cc = 28V,
E cc = 28V,
E cc = 28V,
RL = 3K
R L = 3K
TA ~ 25C
25C
TAs:::$
R L = 3K,
TEST CONDITIONS
SECTION 8
TRANSISTOR ANTI-RESONANT OSCILLATOR DESIGN
8.1
The anti-resonance crystal unit lends itself to use in the circuits shown
in Figure 8-1. In Figure 8-1 (a) the amplifier output resistance and load can be
considered as reflected in parallel with the amplifier input by the impedance transforming network consisting of C 1 and C Z' The effective capacitance of C 1 and Cz
in se"ries operating in conjunction with C3 then transforms the combined input and
output resistance of the amplifier to a suitable crystal unit terminating level. The
amplifier is required to have a nominal zero phase shift, and the active device
configuration is. usually either an emitter follower or a cathode follower.
In Figure 8-1 (b) the crystal unit operates as the inductive element of a
network of the type analyzed in Paragraph 1-10, where the impedance transforming action is discussed in detail. In this circuit the amplifier is required to
have nominal phase inverting properties and the active device configuration is a
grounded emitter trans is tor.
1T
A useful variant of this circuit is obtained by interposing a resistor between the 1T network and the amplifier output as shown in Figure 8-1 (c). The major
advantage of this circuit relative to that of Figure 8-1 (b) is the increased power
output obtainable for comparable crystal unit loading or, alternatively, the reduction in loading that can be achieved for comparable output power levels. An
analagous variant of the circuit of Figure 8-1 (a) can also be obtained by interposing a resistor between the amplifier output and the junction of the impedance
transforming capacitors C1 and CZ'
The circuits of Figure 8-1 (b) and (c) appear to be most suited to transistor amplifier designs when the loading of the crystal unit by the amplifier is considered, and these are the circuits selected for discussion. The circuit of Figure
8-1 (b), which will hereafter be referred to as the "basic" Pierce oscillator, is
most suited to low power output applications where the output power required is
of the order of 1 to 5 MW. This condition is imposed jointly by crystal unit loading
considerations and feasible transistor DC current and voltage requirements. This
circuit is therefore limited to such applications as, for example, a receiver
mixer injection signal source.
The circuit of Figure 8-1 (c), which will be referred to as the "isolating
resistor" Pierce oscillator, is suited to both low and high power output applications, having the capability (if required) of giving an output of at least ten times
the crystal unit dissipation rating. This may be advantageous in certain circuits
such as, for example, transmitter applications.
When the basic Pierce and the isolating resistor Pierce oscillators are
compared for low power applications, the former has the advantage of requiring
one less trimming capacitor than the latter, but at the higher frequencies this is
314
AMPLI FIER
10
Gv
--
_,-CI
<P ::::: 0 0
<'
;>
::: ~C2
--
(0)
AMPLIFIER
Gv
4> ::::: 180 0
').R L
10:
::r:
:::::
').
<
- .....
(b)
AMPLIFIER
Gv
:(
"A"
v
10:
4>:::::180
>
<)R
L
<)
<
( c)
::: ~
:::::
TP 1072-96
Figure 8-1.
315
316
.......
-'I
Temperature
Range
(0C)
to
to
to
to
to
to
to
20
20
20
20
20
20
25
-55
-55
-55
-55
-55
-55
-55
to
to
to
to
to
to
to
+105
+105
+105
+105
+105
+105
+105
0.005
0.005
0.002
0.0025
0.005
0.005
0.005
625
625
175
60
175
120
65
0.8 to 20
0.8 to 20
0.8 to 20
3 to 20
4.5 to 5.5
+70 to + 80
+80 to + 90
+70 to + 80
+70 to + 80
0.5
(65 to nC)
0.002
0.002
0.001
0.002
0.00008
625
625
600
40
100
0.8
0.8
2.9
3
3
4
10
to 20
to 20
to 15
to 175
to 20
to 25
to 25
to 25
to 25
to 17
to 20
to 20
Equivalent
Resistance
Frequency
Range
(MC)
Overall
Frequency
Tolerance
(%)
5 and 2.5
5 and 2.5
5 and 2.5
5
10 and 5
10 and 5
5
10 and 5
5
5
2.5
Dissipation
Rating
(MW)
32
32
32
32
32
32
32
30
30
30
30
32
Loading
Capacitance
(PF)
7
7
7
7
4
7
7
7
7
7
7
12
Max
Co
(PF)
HC-30/U
HC-6/U
HC-6/u
HC-6/u
CR-62/U
CR-68/U
CR-71/U
HC-6/u
CR-36A/u
CR-27A/U
CR-64/U
CR-33A/U
CR-78/u
HC-6/U
HC-25/U
HC-18/U
HC-6/U
HC-18/u
HC-17/U
CR-58A/u
CR-69/U
CR-66/U
HC-6/u
Crystal
Holder
Type
CR-18A/U
Crystal
Unit
Type
700
. I
f-
600
500
..
400
f-
.,"E
cr
300
200
I
I
100
~ CR -6i'u
v1'\
.1--0: v
1/
1/
1/
I,
i
I
! !
\
~
a
0.1
TP1072-97
0.9
FREQUENCY (MCI
10
20
100
318
Figure 8-30
8-3.
Value of X
CL
The actual anti -resonance frequency f~ of the crystal unit and loading
capacitance combination is determined by the value of C L, the loading capacitance.
In view of this critical relationship, it is desirable to know the effect of small
changes in CL on f~. f~ is also a function of R1, L1, C1, and Co, and since a
mathematical solution requires a knowledge of the values of these parameters
which requires experimentation, it is simpler to experimentally determine the
CL -f~ relationship directly. Tests were made on a number of CR-18A/U units
using a CI Meter, and the results are shown in Table 8-2.
In Table 8-2 the asterisks denote that these crystals were artificially
constructed "worst case" units, with the crystal equivalent resistance increased
to a value of Re max by means of a series resistor. The range of values shown
for the 20-MC crystal is due to a measurement discrepancy. The value depended
on the sequence in the series circuit of the added resistor, the loading capacitor,
and the crystal unit. This range of frequency values for the 20-MC "worst case"
319
f~
TABLE 8-2.
Re (Ohms)
Change in fa (PPM)
for 1-PF Change in
CL (32 PF Nominal)
Change in f~ (PPM)
Per Percent Change
in CL
230
600
35
14
24
60
2.7
13
2.7
20
2.7
*20
20
12 - 21
4 - 7
Crystal Unit
Frequency (MC)
*'
* Artificially constructed
'Worse-Case" Units
unit is of doubtful accuracy. A value of 8 to 12 PPM would probably be the correct range for a true ''worst case" crystal. At the lower frequencies the added
resistors had no influence on the frequency change.
These results show that the change in anti -resonance frequency of a
CR-18A/U crystal unit varies from 1 PPM per percent change in CL at the lowfrequency end of the range to probably 3 PPM per percent change in CL at the
high-frequency end of the range. For frequencies above 3 MC, the relationship
appears to be constant at about 3 PPM percent change in CL.
:
In practice CL consists of a network of three capacitors plus the amplifier input capacitance and, in the case of the basic Pierce circuit, the amplifier
output capacitance. Above 3 MC it is therefore necessary that the capacitance
presented to the crystal unit by this network should not vary by more than, say,
1 or 2 percent due to all causes if the oscillator frequency tolerance is not to
unduly exceed that of the crystal unit. The input capacitance of transistor
amplifiers is quite variable, both between individual transistors and with tem. perature. It is. therefore necessary that the physical capacitance placed in
parallel with the amplifier input should be as large as possible so that the percentage variation of the whole is minimized.
In the vicinity of 1 MC a threefold reduction in frequency sensitivity
occurs and a corresponding relaxation in the tolerance of C L is possible for
the same oscillator frequency stability.
320
8-4.
In the Pierce type oscillator the crystal unit acts as the inductive element of a 17 network of the type discussed in Paragraph 1-10. One of the important characteristics governing the operation of the crystal 17 network is the ratio
XLeff
of - - where:
Re max
X Leff
Xe - XC,e - Xcs
(8-1)
The maximum value of XLeff is Xe , the crystal unit equivalent series reactance
"
XLeff.IS -R-Xe .
an d , t h ere f ore, th e maXImum
pOSSI"ble va1ue 0 f -R-emax
emax
The behavior of
Xe
Xe
Other crystal unit types have essentially the same R
characteristic.
emax
8-5.
321
30
1\
25
\
\
\1\
\
20
QJI
\1\
~
a::
\5
\
I
\0
'"
r-.'r-., ':\,
\\ \
\\
\.\.\\.\
r--\
00 .1
O.B
10
20
100
FREQUENCY (MC)
TPI072-99
frequency to be heterodyned is often fed to the base of the mixer transistor and
the oscillator injection frequency to the emitter at a 150- to 300-MV RMS level.
The local oscillator injection power required to give efficient frequency conversion
is approximately 1 MW, a power level within the capability of the basic Pierce
oscillator. This is probably the greatest single application of low power crystal
oscillators, and the following discussion is directed to this usage. It is not
convenient at this point to justify these statements; this is reserved for Paragraph 8-14 where an illustrative example is given.
8-6.
Design Approach
~~ degradation
considerations dictate that the oscillator external load RL must be several times
322
I---
:r---10~
AMPLIFIER
GAIN: -G y
RL
<
<
:::;:::
::: ~
(0)
B+
~---H(- - - - - OUTPUT TO
...----4.......-...1
TP 1'072-100
HOt----t...--,
LOAD
(b)
323
1
I
.1_
'T"-jX cs
1
(a)
X'
J
R'
0---4,t-.....' VVV'''"----'\I\I'..
I
1
I
_.1.
..1_
- jX cT ':-
T'-jX Cs
o
TP 1012-101
(b)
324
8-6 (a) into the series circuit shown in Figure 8 -6 (b). Re and (Xe - Xc.e) can
then be compared with Xl and R~ to determine the changes incurred and,. in
particular, the
..M..-
degradation suffered.
dX e
r
R r , (Xe - XC.t), and R e so that suitable approximations can be made in the
analysis. The characteristics of the CR-18A/U crystal unit are typical of the
other types, and analyzing the effect for this crystal unit gives results that are
applicable to the others. The CR-18A/U crystal unit Xe is the reactance of a32
PF capacitor and varies from 6250 ohms at 800 KC to 250 ohms at 20 MC. The
value of XC.a.. is dependent on the
~:f:
Crysta.l.
dissipation and feedback network voltage attenuation ratio together dictate small
~Leff
XCCb' [1 + (
X~b~ ) 2]
r2
XcCp) gives:
(8-3)
325
R ~ will have its minimum value at the highest frequency. For transistors with.
XCb'
fT's greater than 200 MC, ~ at 20 MC typically has a value greater than 1.
Therefore, R ~ is equal to or greater than XC r at 20 MC and, since XCb ~ is an
R'
Xc r
> 8 (Xe -
Xc()
Xc r
at 20 MC
Xc.Q.?
R r > 8 (X e -
R r > 30 (Xe -
at 20 MC
Xc.cl
at 800 KC
Omitting R r from the network shown in solid lines in Figure 8-6 (a)
results in the following expression for the impedance Z r of the network:
. Xc
J
ZI
= -
1+j
[1 + J. Xe R- xC.c,.lJ
(X
_ XCn _ Xc )
,-c..
Re
326
(8-4)
( 8-5)
(X e - XC,e) or Remax .
XC
H' e ':::: R e ( X
Therefore:
_ Xc .r- Xc
'.
r
(8-6)
Substituting 0.125 for X ex- XC..l from the previously estimated relative values
Cr
(8 -8)
r+
The unity terms in both numerator and denominator are small relative to the
other terms and can be ignored. Therefore:
Xl '::::::
For
Xe - XCi...
Xc
(8 -9)
327
(8-10)
That is, for the assumed circuit conditions, the effective reactance of (X'e - XC..O
is increased by 14 percent due to the presence of Cr' At lower frequencies the
effect is reduced, amounting to 'an increase of 7 percent in (Xe - XCi) at 800 KC
for the relative circuit values previously quoted.
8 -9
Effect of Rr
Rr . Re
Z'
Xc")]
.c..
XCl:)
(8-11)
(8-12)
R' e
But:
(8-13)
and:
(8-14)
Therefore:
(8-15)
328
;:go] "
1. 6 Re max
dXe
(8-16)
XLeff
R emax
+(X
(8-17)
XI = (X e - XCV
HI :=:::; R
e
e
[1 j~: ~ ~~)2J
(1 _Xe - XC~)2
(8-19)
XC r
Xl:=:::;
(8-20)
7T
gt
that of the crystal unit. As stated previously, the numerical values used in this
calculation are extreme, and the degradation is not likely to be quite so severe.
However, it is still likely to be larger than desired, and methods of minimizing
the effect are required.
329
8-10.
(8-21)
330
(0)
RL . Ro(p)
RL
TP 1072-102
Figure 8-7.
+ Ro(p)
Jx'
R'
(b)
true since the higher amplifier voltage gains are required at the low end of the
frequency range where the crystal unit impedance is large compared to the transistor parallel input resistance. The amplifier parallel input resistance is then
usually less than 3.6 Remax and the ratio of XCs to Rin(p) is governed by phase
angle limited operating conditions; that is, XCs equal to or less than 1/6 Rin(p).
It was shown in Paragraph 3 -24 that the voltage gain-parallel input resistance
product of a transistor amplifier is practically constant independent of the emitter
degeneration employed. Consequently, the introduction of an emitter degeneration resistor increases Rin(p) to the same extent that it decreases the amplifier
voltage gain. Therefore, provided Rin(p) remains less than 3.6 Remax ' the
increase in Rin(p) allows a similar increase in XCs which, as shown by Equation
(1-84), will result in a decrease of the 11 network voltage attenuation comparable
to the decrease in amplifier voltage gain.
At the higher frequencies of the range, the crystal unit impedance is of
the same magnitude as the amplifier parallel input resistance, and the 11 network
attenuation and the amplifier voltage gains required are of the order of 10 to 20.
331
Reference to the amplifier voltage gain plots shown in Figure 3 -6, 3':"7 and 3-8
shows that this order of voltage gain can easily be achieved at frequencies in the
vicinity of 20 MC using a large amount of emitter degeneration.
The advantages gained from using emitter degeneration are:
(a)
(b)
(c)
(d)
(8-22)
GVL = GV . A'V
where A
332
XLeff
Remax
For
For
= 1,
VOmax
0.45 VRMS
XLeff
= 3,
R emax
XLeff
= 6,
Remax
VRMS
Vomax
= 1. 9 ,VRMS
XLeff
R emax
For
--
XLeff
Remax
1,
VOmax
= 3. 5
VRMS
2,
VOmax
VRMS
5.6
333
8-11.
Behavior of
Rrr
and RT as a Function of
Re
Remax
and
XLeff
Remax
~.
construed as a plot of
R7T
emax
Remax
[ 1 + (XLeff
R
'
Be
emax
max
BeBe
y]
(8-24) .
R 7T
RL
RT
R emax
Re max
RL
R emax
Re
+
max
(8-25 )
Rrr
R emax
1
"I
--,
\
10
"
O.B
..
_-,'I
5 __ .
.. ,'. _.-
"._,
0.6
., -, 'j: .
0.4
;!a:
,.
0.2
,-
.,,'','.', U:
'~-";lc.I:'I"
.:,1,'",'
.I=tJi i -:=F'~IT,::
,r.:t-~Il.
I. ~,-=l:f':
I,:
.
I
!
1'111
~I'r
'I:
1"'IriJ,
II
:1 ,.'
XCT
-R
,,:
"
, i l "I
I~
I-II;I 3.1-:1
~I':I",i '
'"
;
-il-
I I I
Ii
II,
I i:i
"
Ii;i
Ittl
1-",',1
0.1
O.OB
0,06
0.04
-, .
-i
"
~:r.-,""
,~~:~j~!
!:!,.,:,~C:::,.,I':'
_ ._!_ :
r
""
'-~:~+'=-mj:i'
~
,j-
"i,
~i{,=
,
'T '"
,.,' .~ '.,1
,/'I-:I,:-:l'i[,'1 'Ii'
,~ ':i'~;J:I:HII
-1-;
."-"~'- !-+el
I,i
'I -,
',I' "l.
t ::"=I=t-"~
-In 11
+ -~i
I"
"
I'
,',
;1
'ii.:.
I:
'
I
,,0.02
. r .,.
i ''-lJ'.:.:''..1--'"'l.l'~J.::......L.l..' U-'..LL
i LL'--'..
1 .l.LU~.LLLll...LJ 0.01
.1 L..LL.L.J..LLLLLlL:.Ll.i~'.l!:.L
Hj-.!..,u."l.l'.:.I'.:.Irr~" '!LLU-:.LLILlL'.!..,'L'L'Lll!.!.LL!.1:.L
'l..!..l.LIJ.l.U.Wl..:.Ll..l.l.ll.l
,I
.2
_3.4 _5.6.7 .B9 I
2
3
4
5 6 7 B 910
20
30 40 506070B090100
XLIII
TP 1072-103
Rima.
XCT
XLeff
.~
335
The ratio of
RT
Re
XLeff
as a filllction of
using
as a paraRTmin
Re max
R emax
meter is plotted in Figure 8-9 which shows that for all values of XLeff greater
"
Remax
than 2, the total oscillator resistive load will vary over a range of approximately
3 to 1 with the likely crystal unit He spread of 9 to 1. For lower values of
:Leff the range of variation of RT will be smaller, having a range of approxiemax
XLeff
mately 1. 9 to 1 for R
= 1. However, this ignores the effect of the reactive
emax
component of the 11' network input impedance.
:3,-----,-------,,-------,------r-----,
XL eft = :3
Re mall
21----1-~+---.,1-------.,1__--~------I
l:
I-'"E t-x---~----+--~~-+----+--------I
a:: I- ....b...!!!. = I
a:: Re mall .
0.2
0.4
TP 1072-104
Figure 8-9.
336
0.6
0.8
Ra
Ramall
Behavior of
RT
RT
mIll
as a Function of
He
Rrr
for XLeff ratios larger than 2 for all values of ~ , becomes com~m~
~m~
parable with
Rrr
X~ff
for R
ratios much below 2 as . Re
approaches unity.
emax
m~
For example, for the condition :Leff = 1, the amplifier total load must have
emax
a phase angle of -45 degrees to compensate for the 45-degree "excess" phase
lead between 11 network input and output voltages due to Remax. The magnitude
of the total amplifier load impedance is, therefore, 0.7 RTmin when Re equals
Remax, resulting in a variation of total load impedance magnitude of 2.6 to 1
with Re variation.
In the oscillator circuit in Figure 8-5 (b) the function of the resistor from
B+ to collector is to parallel-feed power to the collector. However, insofar as
11 network loading is concerned it must be regarded as part of the oscillator load
and will consume a portion of the available output power in proportion to its size
relative to the true load. Unless an abnormally high supply voltage source is
available, the supply of the collector-emitter DC voltage, plus a sufficient
emitter-ground voltage to give adequate operating point stability, generally
requires the feed resistor to be comparable with the effective external oscillator
load R L .
One effect of this is the reduction in actual oscillator output power incurred. In the frequency range up to 10 MC where 10 MW crystal units are
available ,this is of no consequence for the chosen application since a total output power of approximately 3 lVIW is obtainable without overdriving the crystal
unit. Upwards of 2 MW could therefore be dissipated in the feed resistor while
still leaving sufficient output power for mixer-driver applications. Above 10 MC
crystal unit dissipation rating is 5 MW, and the possible output power is then less
than 2 MW for the specified 11 network loading. The relationship between the
values of feed resistor and RL are then more critical unless increased 11 network
loading is allowed.
337
. I
. .
XLeff
For any gIVen value of R
' the total load impedance has its mini.
emax
mum value when Re equals R e
. The resistive component R T . for a given
max
mm
X Leff ratio can be obtained by substituting Re
for Re in Equation (8-24) to
~
.
max
max
.
Rrr .
Rrr .
obtain R mm and by then substituting R mm into Equation (8-25) to obtain
emax
emax
RTmin
RTmin
XLeff
. The plot of R
as a function of R
is given in Figure 8 -10.
He max
emax
emax
.
XLeff
For ratIos of -R-- greater than 3, the total load impedance is essentially
emax
RT
. , but for lower ratios of :Leff the total load impedance must have a
mm.
em ax
relatively large parallel capacitive reactance component. This capacitive component is necessary in order to give a phase lag of amplifier output voltage relative
to the amplifier input voltage in compensation for the "excess" phase lead in the
rr network due to R e . The excess phase lead in the rr network is:
I
= tan
-1
Re~ax
XLeff
-I
e =
-tan
but:
(8-26)
(8-27)
-1
-tan- 1
bT
gT
RTmin
XT
(8-28)
where gT and bT are the total load conductance and susceptance, respectively,
and RTmin and XT are the corresponding parallel impedance components.
Therefore:
R emax
RTmin
=
XT
XLeff
- RTmin
Tmin R
1+j
Tmin
XT
(8-29)
That is:
(8-30)
339
30 : l:
..
'E ~
I-
..
II:
o
~
I-
II:
I..
c
"jE
..
II:
XL,,,
Re mo.
T"072-I07
r'--~-
RTmin
XLeff
IZTminl
Figure 8-10.
and
as Functions of
Remax
R emax
RTmin
Substituting from Equation (8-29) for
i
I
RTmin
XT
gives:
RTmin
ZTmin
-1
(8-31)
1 + j Remax
XLeff
.'
j 1 + (Remax)
2
XLeff
340
(8-32)
ZTminl
XLeff
Figure 8-10 gives a plot of the ratio of R
. as a function of R
emax
T mm
X Leff
.
. falls substantially below RT . for R
ratIOs of
mIn
mm
emax
2 or less.
VCE
(8-33)
where VCE is the transistor collector emitter DC voltage and IC is the DC collector current. Equation (8-33) is based on the assumption that the negative
peak collector voltage swing drives the transistor into the saturation knee. This
condition does occur and is the means normally employed of providing hard
limiting.
Since the value of ZTmin' determines the required transistor bias conditions and is therefore a design factor, it is convenient to relate it to Remax'
Multiplying the values of IZTminl in the plot of Figure 8-10 by the corresponding
RT mIn
.
values of
8-14.
RT
.
IZT .
mm results in the curve of
mm shown in Figure 8-10.
~max
~max
~Leff
emax
approaches and decreases below 1. Consequently, in the region where high power
output is obtainable from this circuit, the transistor DC collector current requirement is increased in order to provide the necessary signal current for the reactive
part of the load.
341
Re max
is then less than 1, and consequently the basic Pierce oscillator can only be
employed efficiently under low output power conditions. This example shows
the effect under the most favorable circumstances. At higher frequencies
Hemax .is considerably smaller, requiring higher current, lower voltage conditions for high power output.
At the higher frequencies of the range, the minimum usable value of
XLeff
is further limited by amplifier output voltage limiting considerations.
Remax
Equation (1-113) relates the permissible output voltage to PCMAX, Remax , and
XLeff. At a frequency of 20 MC the equivalent resistance and dissipation rating
of a CR-18A/U crystal unit are 20 ohms and 5 MW, respectively. Substituting
into Equation (1-113) gives:
Va
342
max
= 0.45 VRMS
XLeff
Re max
= 1
3,0
2,0
\.0
\
0,5
"
2
12
10
14 '
TP 1072-105
VO max = 1
VO max
XLeff
R emax
To provide a limiting action, the transistor DC collector emitter voltage VCE should be approximately equal to the peak collector voltage swing.
X Leff
Therefore, the use of low -R-- ratios requires VCE values in the 0.6 to 1.5 V
emax
range. The performance of high frequency transistors is degraded at low collector
e~itter voltage levels, Ccb' increases and f T decreases, making this type of oper-
ation undesirable.
~eff
343
current, and the transistor type. In order to optimize the design it i"s therefore
necessary in the preliminary stages of the desi~ process to make several sets
of calculations to determine the most suitable
Leff ratio for the particular
Remax
application. Once this selection is made, a series of calculations then leads to
a final design.
One of the basic assumptions used in the design procedure is that emitter
degeneration will be employed .because of the advantages previously noted. The
minimum value of the unbypassed emitter resistor should not be less than 20 or
30 ohms for best results.
Step 1
Determine the crystal unit power rating, maximum equivalent resistance,
and Xe (the crystal loading capacitor reactance XC~) from the crystal unit data
sheet. Using the three succeeding design examples as a guide to the range of
values of : Leff likely to be most applicable at various frequencies in the range,
emax
tabulate the following 1Tnetwork and amplifier characteristics for various values
of XLeff :
.
Remax
(a)
RL
R emax '
RL
(b)
(c)
R emax
R
emax
in Figure 8-8.
(d) . R Tmin ; obtained from Figure 8-10 and the known value of R emax
(e)
IZTmin I'
Remax
344
(f)
(g)
(h)
fT (typical)
Most data sheets give curves of constant fT with VCE and IC variaion.
In some cases these do not cover operation at sufficiently low VCE and
IC values, and extrapolation may again be necessary.
(c)
BVCEO
Any values of Vomax (peak) obtained in Step 1 which are larger than
0.5 BVCEO cannot be used because of the possibility of voltage breakdown on the positive peak of the collector voltage swing.
(d)
Ccb'
(e) rbb
(8-35)
345
where:
( 8 -36)
R emax
:s; 3.6,
calculate:
(8-38)
For
Rin(p) - > 3.6, calculate:
--=-==_.1::..._-'
R emax
XC
s = JO.1
R emax . Rin(p)
(8-39)
(8-40)
where
1 +
--1....
Xc T
346
(8-41)
".
XLeff
On the basis of the tabulated data, select a SUItable R
ratio for
emax
the design. Selection should be based on the following considerations:
(a)
The loop voltage gain calculated in Step 3 must be at least 1.3 and
preferably greater, particularly at frequencies above 5 or 10 MC
where the transistor amplifier voltage gain may begin to fall, causing a reduction in the loop voltage gain below that estimated. The
experimentally derived curves of Figures 3-6, 3-7, and 3-8 indicate the extent of this effect, for several types of transistors. An
excessive loop voltage can be ignored at this point, since corrective
measures can be employed later.
(b)
~ Leff
X Leff
Re~laxl
1
(r + r )
TeE
(8-42)
347
'(8-43)
(8-44)
(8-45)
Rin(p) ::;
(8-46)
1
XC(p)
(8-47)
r
XC(p)
: : ;r- -
rbb'
(8-48)
(8-49)
rE
(h
times the slope of the collector characteristics
a the given working point)
348
(8-50)
(8-51)
(8-52)
(8-53)
Calculate the transistor base bias resistor values using either the method given
in Paragraph 3-26 or any other preferred method. From the values of the
biasing resistors obtained,
calculate:
...
..,:
(8-54)
Calculate the combined input resistance of Rin(p) and Rb(p) in parallel from
Equation (8-55):
R"
in(p)
Rb(p) . Rin(p)
Rb(p) + Rin(p)
(8-55 )
349
---_.
.J
= XeS
(8-56)
. dVL (calculated)
Xct
= XLeff
+ X'C
(8-57)
value[final~eS~l~~dJ'
1 + -'""""----'-"::;...
Rr . Remax
R'emax
(8-58)
= 1 _( Xe - Xc-l\2 .
XC r
")
(8-59)
X' =
XI -
X'cs
x,
Cs
R'emax
The
1T
A' V -
X'c S
--~-
X' - Xi C
S
RL
Re'max
1+--.
XI
- X I
Xc
C
T
350
(8-60)
L
where Xc
XC'
Compare A' y with Ay . _ _
S . If the difference between A I y and
XC'
XCs
A y . - XS is less than 10 percent, the effect on the loop voltage gain will be
Cs
small and can be neglected. If not, the value of (XC'S) should be adjusted and
R'emax' XI, and A 'YT recalculated until this order of agreement is obtained.
It is desirable that the value of XCS finally arrived at should not exceed that
calculated in Step 3 on the basis of crystal loading considerations.
Step 6
Calculation of remaining component value s.
(a)
1T
Network Components
Cs =
e
X.
Cs
(8-61)
CL
(8-62)
Cs (physical)'c= C s
(8-63)
Cin(P)
(8-64)
.~8-65)
1.';1
Xc
XCT is obtained from the curve of ---.I plotted in Figure 8-8 at the appropriate
X
R
R Leff for the known value of R, (R L or R L and Ro(p) in parallel).
emax
(8-66)
351
C is the net 11 network input capacitance,and allowance must be made for the
T
amplifier output capacitance Co(p) and for tuning out the parallel feed inductor.
A suitable value of inductance is chosen for the collector circuit.
Calculate its reactance XA . Determine the capacitance CA that will
resonate with L at the design frequency.
(8-67)
Then C T (physical)
(b)
C T + CA - Co(P)
(8-68)
,E
,
+r
VBG - 0.7
~,
(8-69)
IE
capacitor should not be greater than one-tenth the value of the parallel
combination of r e + rE and R E ; that is:
(8-70)
and
X
C
= -X x CL
E '
C
352
(8-71)
8-16.
DESIGN EXAMPLES
353
8-17.
Crystal Characteristics:
xe
CR-18A/U.
6250 ohms
Remax =
625 ohms
P CMAX =
10 MW
Network Characteristics:
X
Leff
R emax
omax
(RMS)
omax
peak
1 ,
625
2.7
1.7
4.7
750
0.53
3.5
1.5
937
6.5
4.1
4.4
1300
1.1
4.5
6.3
1250
12.3
7.7
4.3
2100
1.9
5.6
7.9
354
RTmin
(ohms)
XLeff
(ohms)
,!t~"
X
The working point ,is selected at
Cb'E,
(PF)
XCb'E
12
(K)
r
XCb'E
17
54
0.003
Xc
r
(PF)
2.7
2, VCE
R emax
r
(ohms)
Leff
= 7 V,
X
~b'E . r
'i(X(b' E'f
Rin(p)
~O
600
=4
IE
.,
MA
CdJ
Xc(p)
(K)
(K)
Xc(P)
67
13.5
0.004
r
(K)
Rn
Rr
R o(p)
C o(p)
(K)
(K)
(K)
(PF)
74
160
180
115
=14
b2
7.5 K
K
Rb(p) = 4.9 K
R' \n(p) = 530 ohms
Loop gain reduction required, so no action taken.
Reducing loop voltage gain to 2;
X'C
= 59
ohms
X - Xc = 1309 ohms
e
:2.
R'
emax
= 625 ohms
7T
network attenuation.
355
Cin(p)
10 PF
C (physical) = 3400. PF
4940 ohms
Xc
CL--
41 PF
1150 ohms
174 PF
500 UH
X A = 2.5 K
C
= 80 PF
C T (physical) = 250 PF
R E -- 2 K
Xc
CE
= 3.6 ohms
=
0.05 UF
356
Crystal Units
(CR-18A!U)
Parallel Resonant
Frequency (MC)
Re
(Ohms)
0.799993
570
0.799998
590
0.800006
560
0.799999
630
RL :
7.5K
7.51<
41PF
..----4-----4~HDI---4II......-
.....
240PF
3100PF
13K
0.05
UF
TPI072-I06
Effects of
+15% B+ Change on
Oscillator
Frequency
Vo
< 1 PPM
~Vo = +17%
-20% B+ Change on
Oscillator
Frequency
Vo
< 1 PPM
avo = -18%
10% Change in R L
on Oscillator
Frequency
Vo
< 1 PPM
~Vo = 3%
-55 C to +105 C
Change in T a on
Oscillator
Frequency
Vo
14 PPM
AVo = 10%
< 2 PPM
Contribution of
Oscillator Circuit to
Frequency Deviations in
Temperature Te st
Transistor Interchange
(8 transistors)
Frequency
Vo
< 1 PPM
AVo < 1%
Frequency
Mis correlation
Vo
10 PPM
/:aVo = 5%
357
8-18.
Crystal Characteristics:
X e = lOOO,ohms
R emax =
P CMAX
60 ohms
10 MW
11 Network Characteristics:
R Tmin
XLeff
(ohms)
Vomax
(RMS)
Vomax
peak
0.42
2.45
3.5
1.2
5.6
(ohms)
180
28
1. 7
4.2
440
300
79
4.7
4.1
1180
Leff
Remax
IC
(MA)
VCE
hFEmin
T
(MC)
re
BVCEO
Ccb'
(ohms)
rbb'
20
300
15
2.8
60
15
300
15
60
GVL
Rb'E
Leff
R emax
GV
(ohms)
Approx.
Rin(p)
Xc
Rin(p)
R emax
S
(ohms)
AV
45
690
750
12.5
67
0.089
112
560
620
10
61
0.05
5.6
= 5, VCE = 5V, IC = 5 MA
358
2.1
54
0.026
0.007
620
Cr
r
Xe(p)
XC r
(ohms) XC(p) (PF) (K)
1700
0.032
3.5
9.2
RD
Rr
Ro(p)
(K)
(K)
Co(p)
(PF)
240
140
85
5.6 K
R b2
22
4.5 K
Rb(p)
550 ohms
R" in(p)
22 ohms
Cs
320 ohms
Xe-XCi
R l emax = 60 ohms
330 ohms
X'
C r and R
1450 PF
Cin(p)
12 PF
680 ohms
Xc
1.-
CL
X
CT
300 ohms
CT
107 PF
10 DR
CA
C T (physical) =
RE =
X
47 PF
314 ohms
100 PF
200 PF
2K
=
3.5 ohms
CE
C E = 0.01 DR
359
Re
Crystal Units
(CR-18A/U)
Parallel Resonant
Frequency (MC)
4.999956
16
4.999924
15
4.999973
24
4.999952
60
(Ohms)
+15VDC
r-------tl~-___t..--------_o
5.6K
47PF
'--+--~.......-IHOI---1ll---'
1500PF
20PF
IBOPF
22K
2K
360
Effects of
+15% B+ Change on
Oscillator
Frequency
Vo
< 1 PPM
DVo = +15%
-20% B+ Change on
Oscillator
Frequency
Vo
< 1 PPM
AVo = -20%
10% Change in R L
on Oscillator
Frequency
Vo
< 1 PPM
t:.V 0 = 6%
-550 C to +105 0 C
Change in Ta on
Oscillator
Frequency
Vo
12 PPM
AVo = 10%
< 2 PPM
Contribution of
Oscillator Circuit to
Frequency Deviations in
Temperature Test
Transistor Interchange
(8 Transistors)
Frequency
Vo
1 PPM
t:.V 0 = 2%
Frequency
Vo
1 PPM
t:.V o = 16%
361
8-19.
Crystal Characteristics:
CR-18A/U
X e . == 250 ohms
R emax
P
20 ohms
==
CMAX
5 MW
Network Characteristics:
X Leff
X Leff
Remax
(ohms)
R emax
60
28
120
110
RL
R Tmin
RL
Vomax
Vomax
(RMS)
peak
KA
(ohms)
IZTI
(ohms)
560
4.2
148
140
1.4
2200
4.1
550
550
1.9
2.7
(ohms)
Transistor Characteristics:
X
Leff
R emax
C
(MA)
VCE
hFEmin
T
(MC)
10
1.3
20
2.5
15
Loop Gain (r
X
30 ohms):
Rb'E
250
2.5
60
250
60
Rin(p)
R emax
GV
(ohms)
15
680
740
37
52
560
620
30
Cb'E
362
bb
(ohms)
R emax
e
(ohms)
1f,p rox.
Th e work"mg pom
. tIS c h osen a t R
X Le ff
emax
cb
(PF)
in(p)
(ohms)
Leff
Xc
S
(ohms)
A
V
GVL
38
0.15
2.3
35
0.071
3.7
6.
Rb'E' r
(PF)
XCb'E
(ohms)
r
(ohms)
r
XCb'E
(X Cb'E)2
Rin(p)
(ohms)
18
445
55
0.12
0.15
535
Ccb
(K)
2
XC(p)
(ohms)
-360
0.15
X Cr
RD
Ro(p)
Co(p)
(K)
(K)
(K)
(PF)
1.7
240
9.3
3.6
14
4.3K
R b2
51 K
2.5 V, VBG
8 V.
Then a
~VBG
of less than
giving:
4K
R" in(p)
475 ohms
= 15 ohms
Then:
x - Xc
'1
135 ohms
Cs
AJ V
AV .
X'cs
XCs
147 ohms
132 ohms
0.03
0.031
15 PF
Cin(p)
115 ohms
CJ
70 PF
117 ohms
XCT
CT
68 PF
6 UH
XA
C
C T (physical)
750 ohms
=
11 PF
::::::
70 PF
R E = 1.5K
Xc
3.5 ohms
CE = 2200 PF
364
Crystal Units
(CR-18A/U)
Re
Parallel Resonant
Frequency (MC)
(Ohms)
20.000270
20.000600
20.000400
20.000200
20.000000
20
+ ovec
r - - - -.......- -......- - - - - - - - - O
4.3K
68PF
'---""""'--.......-1 HOI---+---.
5.IOPF
20PF
62PF
51K
0.003
UF
TPI072-122
Figure 8-14,
365
Effects of
+15% B+ Change on
Oscillator
Frequency
Vo
< 1 PPM
AVo = +15%
-20% B+ Change on
Oscillator
Frequency
Vo
< 1 PPM
t.Vo = -23%
10% Change in R
L
on Oscillator
Frequency
Vo
< 1 PPM
AVo = 3%
-55CC to +10SOC
Change in T a on
Oscillator
Frequency
Vo
25 PPM
~ Va = 10%
<2 PPM
Contribution of
Oscillator Circuit to
Frequency Deviations in
Temperature Test
..;'
366
Transistor Interchange
(8 Transistors)
Frequency
Va
5 PPM
AVo = 4%
Frequency
Vo
5 PPM
26%
8-20.
Referring to Figure 1-17 (the circuit used to determine the loading effect
of the 1T network driving source) if R is regarded as a resistor interposed between
the output of an amplifier and the reactive part of the 1T network, the resulting
circuit is shown in Figure 8-15. The consequence of viewing the circuit in this
way are:
INPUT
Re, jX e
R
A
vV
OUTPUT
c}J~D'
JI
AMPLIFIER
Vo ~ R
L
">~
::: ::
CT
'~T'
::::~
TPI072-121
\-_- .-
_'
__
-'"---
'367
0_
cs
XLeff
(8-72)
K A . X Leff
where the value of Xc for the given 'TT network loading and phase angle limiting
S
cand 1't"Ions IS:
1/6 Rin(p) for Rin(p)
or
[
~ 3.6
Re max
(8-73)
He max
1+(:.!....
. ....t)2
r
f
e
T
r
(f)2
- 1 + hFEmin . rE f
(8-74)
(8-75)
The amplifier gain at frequencies up to the cutoff frequency f V is:
GV =
368
(8-76)
(8-77)
= 3. 8
XLeff
emax
jp CMAX
(8-79)
For the CR-18A/U crystal unit which has a 10 MW dissipation rating between
0.8 and 10 MC and a 5 MW rating between 10 and 20 MC, Equation (8-79) can be
restated as:
(a)
Below 10 MC
V omax
(b)
X Leff
0.37 R
emax '
. (8-80)
R emax
Above 10 MC
vomax
= 0.26
X Leff
(8-81)
R emax
At frequencies of 0.8, 5, and 20 MC, the values of V 0 max obtained by substituting for R e max in Equations (8-80) and (8-81) are:
0.8 MC;
Vomax
9.2
X Leff
R emax
VRMS
369
8-22.
5 MC;
V
;::::: 2.9
Leff VRMS
omax
Remax
20 MC;
(c)
~'e will then be increased together with ~n(p. This will allow an
increase in XCS resulting in a decrease in fee~back network attenuation. However, a large value of hFE min makes the amplifier input
resistance frequency-dependent at a lower frequency (see Equation
(8-74). Therefore, at frequencies above say 4 or 5 MC, no advantage
is conferred by using a transistor with a h FE min greater than 20.
(d) If high power output is desired at the low end of the frequency range,
a transistor with a high collector-emitter breakdown voltage will be required. At these frequencies the oscillator power output capability is
determined by the transistor breakdown voltage and dissip~tion ratings.
At higher frequencies the permissible crystal 17' network input voltage
is usually the factor that limits the collector signal voltage, and high
values of collector-emitter breakdown voltage are not then required.
370
In general, the higher the oscillator power output, the more stringent will be the transistor amplifier requirements. The following design examples will serve as a guide to the design limitations imposed
by transistor characteristics.
(b)
(c)
o = 0.7
BV CEO
2.8
(8-82)
371
The loop voltage gain for the "worst case" design will subsequently be
fixed at a value of from 1.3 to 2, and under these conditions the amplifier operation approaches Class AB, the collector signal swinging between collector
saturation and 2 V C E in a reasonably sinusoidal manner. Therefore, the DC
collector-emitter voltage will be approximately:
V CE =
0.7 BV CEO
2
(8-83)
(8-84)
where V CC is the available supply voltage. Lower values of V CE than those
calculated from Equation (8-83) or (8-84) can of course be used. However, this
will reduce the oscillator power conversion efficiency, since, for a given power
output, the collector current and hence the circuit dissipation will increase.
The amplifier is then designed in a similar manner to a Class A power
amplifier. The maximum allowable collector current is obtained from the previously calculated maximum transistor dissipation rating at the highest operating
ambient temperature as:
P
I
C max
Dmax
(8-85)
VCE
A small safety factor is desirable to allow for power supply variations, and I C
should be, say, 10 percent below the value calculated.
The maximum amplifier output for a "worst case" design will approach
50 percent of the transistor dissipation; that is:
(8-86)
If this is larger than required, the DC collector current can be reduced accord-
ingly. P T max should, however, be larger than the desired power output since
it also includes the feedback power. A suitable estimate for the feedback power
at the low end of the range is 10 to 20 percent, increasing to 20 to 40 percent at
20 Me.
372
Rr=
(8-87)
~eff
~"
(8-88)
max
X Leff
2.8 . V0 max per unit --=-=~
R e max
(8-89)
V
per unit
Leff
o max
R e max
tion (8-88) or (8-89) is a suitable value to assume initially for the purpose of
calculating the oscillator loop gain; this value may then be increased if the loop
gain obtained for the desired bias conditions is excessive.
373
re
U:
r')
(8-91)
(8-92)
374
(8-93)
where
Calculate:
(8-94)
and
The next step in the design procedure depends on the relative values of
fV and the design frequency. If the value of ~n(p) is reduced say more than 20
percent by the frequency dependent factor, the transistor is operating near to or
above its transconductance cutoff frequency f'V/2. The amplifier voltage gain
will tten be below its low frequency value. A second check can be made by calculating the value of X Rr
~n(p)
6
<
375
(8-96)
KA . X Leff
where KA is given in Figure 8-8.
The loop voltage gain is then:
(8-97)
If the loop voltage gain is less than, say, 1. 5 at low frequencies or less than 2
at frequencies where the voltage gain is a rough estimate, the design is probably
not feasible. In any case, it is desirable to build a breadboard circuit to determine the actual voltage gain for the calculated biasing and load conditions. Little
additional work is entailed if the breadboard layout is adaptable as the oscillator
prototype chassis. Several transistors should be tested to ensure a representative sample. At this point the procedure divides, depending on the loop gain
obtained using the lowest measured voltage gain.
(a) If the loop voltage gain is greater than 1. 3, the design is feasible.
It is desirable to include some emitter degeneration in the amplifier
circuit, and its effect on the voltage gain can be determined as follows.
At frequencies where the amplifier voltage gain is essentially independent of frequency, the effect of emitter degeneration can be determined by substituting r e + rE for re in Equation (8-93). At higher frequencies it is advisable to measure the voltage gain as a function of rEo
The new value of ~n{p) is then calculated substituting r e + r E for
rein Equation (8-94) and the new values of XCS and AV determined
using the equations previously given.
(b) If the loop gain calculated using the lowest measured voltage gain
is less than 1. 3, the design is not feasible and must be repeated. The
alternatives are then to use a better transistor (in general, a transistor with a higher h FE min or BVC EO at low frequencies; higher f T
above 10 MC) or accept a power output reduction. For the latter course
the loop voltage gain can be increased by increasing R T or decreasing
X Leff Increasing ~ also decreases the collector current required,
while decreasing XLeff reduces the collector-emitter voltage allowed.
The loop gain is approximately proporti.onal to the ratio of ~ to X Leff ,
and a given percentage reduction in X Leff or increase in
will result
in similar increases in loop voltage gain. Therefore, since the minimum oscillator power output is approximately proportional to V2 CE
and invers ely proportional to R T (neglecting R), the reduction in
Rr
376
The value of
V BG
bias ing network currents is a matter of choice for the des igner.
~V:GG
A small
will result in a stable transistor working point and a low value of !iJ(p)
and vice-versa.
Compare RtJ(p) with ~n(p) to determine the 1T network loading incurred.
RtJ(p) will usually be large compared to ~n~p) and can be ignored. If not, XCS
should be decreased appropriately and a corresponding amplifier gain increase
made.
Step 6, Calculation of Remaining Component Values
Calculate:
from
Xc
S
Estimate Cin(p) from the plots given in Figure 3-12 using the relative
values of transistor fT's and Cob's as a guide.
Actual
(8-98)
377
"
(8-99)
Xe
(or - - . C )
xC.t
CT
C
(8-100)
(8-101)
(8-102)
378
the low value of r e and, hence, the large C E required. The best that can then
be achieved will probably be the selection ofa value of CE that is self-resonant
at the design frequency.
The emphasis in the preceding design procedure is on obtaining a relatively high oscillator output power since this type of Pierce circuit is particularly advantageous in this application. However, this configuration need not be
confined solely to high output power designs, and it is equally valid when only a
few milliwatts of power output is required. In this case, the amplifier total load
resistance R T and hence the oscillator external load can be increased appreciably, and it is then possible to reduce the amplifier voltage gain by introducing
a large emitter degeneration resistance with a value of, say, 20 ohms or larger.
This in turn will make the amplifier voltage gain essentially frequency-independent and equal to its low frequency value up to 20 MC and also increase the amplifier input resistance and capacitance.
For low output power requirements, therefore, the stipulation of, say,
20 ohms of emitter degeneration enables the design to be determined by means of
a simple calculation. At the higher frequencies in particular, this approach is
therefore perhaps superior to the basic Pierce insofar as design simplicity is
concerned, although it does have the disadvantage of requiring an additional
tuning capacitor.
8-23.
379
8-24.
6250 ohms
625 ohms
P
10 MW
CMAX
V
per unit
omax
Leff
R emax
9.2 VRMS
CEO
380 MW
= 30 V
10 VDC
Necessary
Leff
R emax
= 1.7K
Permissible I
290 ohms
350 ohms
= 85
Typical f
r
R"
350 MC
1 ohm (r'
~.
,
;
380
38 MA (use 35 MA)
FEmin
0.3 ohm)
3 PF
ccb'
Xc
cb
r
67 K
bb
V0
'(l
~
RT
Xc
cb
(re+r bb ' )
35 ohms
in(p)
5.2 x 10
Rin(p) <
X
145 ohms
3.6 R emax
1.4
L
Rin(p)
Xes
-6
0.082
0.26
24 ohms
CS
R:
35
(1:)2
Let
170
85 ohms
r
E
0.7 ohm
Rb'e
-a o)
=
~
5 ohms
630 ohms
105 ohms
43
0.036
381
1.5
L
Biasing Network:
With a 28 VDC supply and V
CE
= 10 VDC, V
BG
18 VDC.
For ~VBG of 2.2 VDC, ta,I E ~ 12 percent. These values were' used as
an example in Paragraph 3-26 and gave:
10 K
RbI
30 K
~2
7.5 K
~(p)
R ( ) is more than 10 R.
) and can be ignored.
bp
m(p
Cin(P) ~ 200 PF
Estimated physical C s
XCi.
,C..Q..
Xc
5.5 K
= 36 PF
= 460 ohms
R
X
CE
C
382
510 ohms
0.6 ohm
0.33, UF
Parallel Resonant
Frequency (MC)
Re
(Ohms)
0.799993
570
0.799998
590
0.800006
560
0.799999
630
10K
360.0.
1.6K
39 PF
91PF
430 PF .
--...------..-'\I"vI\r"'4l~HD.-..--..,
30K
1600 PF .y,
TP 1072-120
Figure 8-16;
383
Effect of
Change
+15% B+ Change
on Oscillator
Frequency
Vo
< 1 PPM
DV 0 = +15%
-20% B+ Change
on Oscillator
Frequency
V
< 1 PPM
tV = -22%
10% Change in
R on Oscillator
L
Frequency
V
< 1 PPM
fj, V0 = 8%
Frequency
V
14 PPM
DV -= 7%
-55 C to + 105 C
Change in T on
a
Oscillator
Contribution of
Os cillato r Circuit
to Frequency
Deviations in
Temperature Test
Transistor Interchange (5 units,
retuning to maximum output)
Crystal Unit
Interchange
384
< 2 PPM
Frequency
V
0
Frequency
miscorrelation
Vo
< 1 PPM
~Vo = 1%
--
t:,V
3 PPM
= 3%
8-25.
R emax == 60 ohms
10 MW
CMAX
V
omax
per unit
x
R
Leff
emax
2.9 VRMS
==
CEO
380 MW
30 V
7.5 VRMS
3.5
R == 2.3K
Permissible I
R
==
38 MA (use 35 MA)
290 ohms
330 ohms
hFEmin == 85
Typical f T
350 MC
r e == 1 ohm (r l
0.3 ohm)
60 ohms
385
XCcb' = 10.7 K
0.8 Gv.
o
85 ohms
r
35 ohms
35
112 ohms
R.
m(p)
Xcs
A
19 ohms
0.0216
386
1 K
77 ohms
Xcs
A
0.097
G V ~ 21
GV
2
L
Biasing Network:
See 800 KC Design Example
R
R
10 K
b1
30 K
b2
7.5 K
Rb(p)
s =
The
440 PF
Cin(p) ~ 150 PF
Estimated Physical C s
Xc
C
R
X
T
T
45 PF
207 ohms
155 PF
500 ohms
CE
E
716 ohms
XC.e..
C.t
0.6 ohm
0.05 UF
387
Parallel Resonant
Frequency (MC)
R
e
(Ohms)
4.999956
16
4.999924
15
4.999973
24
4.999952
60
, . . - - - - - -. . .- - _ - - - - - - - - - -............(1+
28VDC
10K
45PF
...---.~----.....J\,/\J~HHDt---e----,
2.3K
8-50
PF
30K
150PF
220PF
510n.
TPI072~
133
Figure 8-17.
388
Effect of
Change
< 1 PPM
bV0 = +17%
+15% B+ Change
on Oscillator
Frequency
V
-20% B+ Change
on Oscillator
Frequency
V
AV
10% Change in
R on Oscillator
L
Frequency
V
< 1 PPM
AVo = 7%
Frequency
V
11 PPM
AVo = 5%
-55 C to +105 0 C
Change in T on
a
Oscillator
Contribution of
Oscillator Circuit
to Frequency
Deviations in
Temperature Test
Transistor Inter:change (5 units,
retuning to maximum output)
Crystal Unit
Interchange
< 1 PPM
= -21%
< 2 PPM
Frequency
V
< 2 PPM
~V < 1%
0
Frequency
miscorrelation
Vo
bV
2 PPM
= 14%
389
'\
8-26.
250 ohms
20 ohms
emax
5 MW
CMAX
X
V
per unit
Leff
omax
R
emax
1.16 VRMS
380 MW
BVCEO = 30 V
At the transistor bias levels used in the previous examples, the amplifier is working well above the cutoff frequency at 20 MC. At IE = 30 MA the
voltage gains with 500-ohm and 1-K amplifier loads were 45 and 50, respectively.
Referenc~ to Table 3-6 shows that Rin(p)is approximately 70 ohms under these
conditions; giving AV ~ 63. The loop gain is therefore inadequate. The loop
gain can be fncreased by either decreasing X Leff or increasing R . ExperiT
mental data showed that a voltage gain of 100 was obtainable when R T = 820
ohms and IE = 12 MA. Then:
10 V
XLeff
8.6
Remax
R = 4.4 K
RL
1K
hFEmin = 75
Typical f
390
340 MC
2.4 ohms
13.4 ohms
1.9
30 ohms
20
Rb'E
2400 ohms
Measured G
59 ohms
(f:)2
R
in(p)
Xes
0.3 ohm
0.019
VL
For r
90 ohms
Rin(p)
Xes
r'
33 x 10-4
1700 ohms
58 ohms
BG
For:
= 2.2 V
2.6
1.6
391
Then:
&B
I' B
0.77
I'
12
1.06x75
but:
B
0.15 MA
Therefore:
I
0.39 MA
1
0.24 MA
2
and:
~1
34 K
~2
75 K
Rb(p)
23 K
~-b
With thi~ value of loop gain the physical value of Cs is undesirably low
and some improvement was obtained by reducing XCS and the loop gain. For
XCS = 40 ohms, G V = 1.2. This low value is permissible because of the
L
200 PF
c.m (p )
~
~
75 PF
Estimated Physical C s
Xc
C.a"
Xc
392
38 ohms
210 PF
163 ohms
CT
R
X
1.5K
CE
C
= 49 PF
:=::::
3.3 ohms
2400 PF
Parallel Resonant
Frequency (MC)
Re
(Ohms)
20.000270
20.000600
20.000400
20.000200
20.000000
20
33K
2.7UH
IK
3.9K
+28 vee
Io.05uF
210PF
.-....---+....I'\f"v'\r--4lHHDt---e------,
2-20
PF
75K
47 PF
75PF
1.5K
TPI072-134
393
Change
+15% B+ Change
on Oscillator
Frequency
V
-20% B+ Change
on Oscillator
Frequency
V
2 PPM
t"V 0 = -31%
10% Change in
R on Oscillator
L
Frequency
V
Frequency
V
25 PPM
~Vo = 5%
-55 0 C to +105 C
Change in Ta on
Oscillator
6 Vo
Contribution of
Oscillator Circuit
to Frequency
Deviations in
Temperature Test
Transistor Interchange (5 units,
retuning to maximum output)
Crystal Unit
Interchange
< 2 PPM
Frequency
Vo
Frequency
miscorrelation
V
0
394
1 PPM
= +21%
< 1 PPM
6V0 = 10%
6V0
7 PPM
= 23%
8-27.
lK
60 ohms
P
CMAX
10 MW
X Leff
R emax
2.9 VRMS
Necessary
3.5 VRMS
5 VDC
X Leff
R emax
R = 740 ohms
Permissible I
R
R
h
Typical f T
~bbr
28 MA (use 21 MA)
350 ohms
re
240 ohms
FEmin
20
~
300 MC
1.2ohms(rr~Oohm)
60 ohms
. 395
2.5PF
13 K
1.2 ohms
r
r
r
e
42
25 ohms
18 ohms
15
(f~)2
2.8 x 10- 4
Rin(p)
78 ohms
Xes
A
V
G
13 ohms
0.025
1. 05
The loop gain is inadequate. However, since the design frequency is close to
f V and output phase angle conditions determine the value of Xes' the amplifier
voltage gain-input resistance product of the amplifier can be increased sufficiently using emitter degeneration.
396 ,
For
4 ohms
110 ohms
39 ohms
7.5
170 ohms
Xcs = 28 ohms
The amplifier will now be operating below f
G
Vo
and:
= 27
_.'---""'-'-
0.0525
1.4
5 VDC, V BG is approximately 15 V.
Then:
RbI
R
b2
Rb(p)
~(p)
2.5 K
= 15 K
2.2 K
397
R:;
150 PF
Estimated physical C s
XC.(
850 ohms
C)
38 PF
Xc
C
R
Xc
110 ohms
T
290 PF
720 ohms
E
E
CE
398
R:;
0.5 ohm
0.05 UF
Parallel Resonant
Frequency (MC)
Re
(Ohms)
4.999956
16
4.999924
15
4.999973
24
4.999952
60
I_
3S0.n
2.4K
750.n
39PF
8-50
PF
300PF
~ ..---+.JV'V~HHO
15K
0.05
UF
0.01 UF
........-~
510PF
S80.n
TPI07 -119
399
Change
+15% B+ Change
on Oscillator
Frequency
V
< 1 PPM
6 Vo = +16%
-20% B+ Change
on Oscillator
Frequency
Vo
< 1 PPM
V
6 o = -23%
10% Change in
R L on Oscillator
Frequency
V
< 1 PPM
6 Vo = 5%
Frequency
V
12 PPM
6.vo = 7%
-55 C to +105 0 C
Change in Ta on
Oscillator
Contribution of
Oscillator Circuit
to Frequency
Deviations in
Temperature Test
Transistor Inter-change (8 units,
retuning to maximum output)
Crystal Unit
Interchange
< 2 PPM
Frequency
Vo
Frequency
miscorrelation
V
0
400
< 1 PPM
6.Vo = 4%
6.V
2 PPM
= 6%
8-28.
250 ohms
20 ohms
emax
PCMAX = 5 MW
X
V
- per unit
Leff
omax
R
- emax
1.16 VRMS
Transistor Characteristics:
At the transistor bias levels used in the example of Paragraph 8-27, the
amplifier is working well above the cutoff frequency at 20 MC. Experimental data
shows that the loop voltage gain margin is insufficient. Increasing RT to 500 ohms
gives a voltage gain of 50 at an emitter current of 10 MA. The design calculation
is then as follows:
BVCEO
15 VDC
Necessary
5 VDC
X Leff
R emax
4.3
1.2K
880 ohms
20
Typical f
r
300 MC
110 ohms
15 ohms
401
AV
G
VL
O.042
= 2.1
3 ohms
Let
Measured
G
30
115
Rb'E
130 ohms
Rin(p)
16 ohms
XCS
A
GV
0.047
1.4
Bias Network:
For a 20 VDC supply and VC
tion I:!J.V BG = 2 V is satisfied for:
E
5 VDC, V
BG
5K
30 K
~(p)
4.3 K
500 PF
402
0.013UF
Parallel Resonant
Frequency (MC)
R
e
(Ohms)
20.000270
20.000600
20.000400
20.000200
20.000000
20
+20VDC
5.1 K
2.3UH
910.0.
54PF
O.05UF
. - . . . - -..........JV'J"v--1IHHDI----e---,
1.2K
2N706A
2-20
30K
91PF
220PF
PF
0.01
1.5K
UF
TPI072-IIB
403
Change
+15% B+ Change
on Oscillator
Frequency
Vo
< 1 PPM
t:,.V o = +15%
-20% B+ Change
on Oscillator
Frequency
V
!:No
10% Change in
R on Oscillator
L
Frequency
V
< 1 PPM
~Vo = 6%
Frequency
V
25 PPM
tlV = 8%
-55C to +105 C
Change in T a on
Oscillator
Contribution of
Oscillator Circuit
to Frequency
Deviations in
Temperature Test
Transistor Interchange (8 units,
retuning to maximum output
Crystal Unit
Interchange
404
-2 PPM
= -23%
< 2 PPM
Frequency
V
3 PPM
6.V = 7%
Frequency
miscorrelation
V
8 PPM
6V = 28%
8-29.
No design work has been carried out in this frequency range, and the
following discussion should be regarded as a suggestion of how the design process devised for the 0.8 to 20 MC range may be adapted to produce suitable
designs in a part of this range.
The maj or characteristics of the military type anti-resonance crystal
units applicable to the 16 KC to 500 KC range are given in Table 8-3. There
are no military anti"-resonance crystal units below 16 KC, but crystal units
having characteristics similar to those presented in Table 8-3 for the range
from 1 to 16 KC are obtainable.
Comparison of the characteristics presented in Table 8-3 with those
previously given for the 0.8 to 20 MC range shows that in the 90 to 500 KC range the
crystal unit impedance levels are increased by roughly one order of magnitude
and the dissipation rating reduced by a factor of 5 relative to those in the 0.8 to
2 MC range. And below 100 KC the relative impedance levels are increased by
about 2 orders of magnitude while the dissipation rating is comparably decreased.
This in general means that the permissible rr network input signal voltage is
comparable to that applying in the 0.8 to 20 MC range.
The range of values of the ratio R
e
is somewhat wider, ranging
e max
from 40 to 2.5 in the frequency range of 1 to 16 KC, 4.5 to 0.89 in the 16 to 100
KC range, and 18 to 1.9 in the 90 to .500 KC range.
The increase in the crystal unit impedance level also causes a similar
increase in that of the rr network and, since the input resistance of a common
emitter amplifier at these frequencies is essentially the same as that obtaining
at the lower frequencies of the 0.8 to 20 MC when using transistors with current
gain-bandwidth products of 100 MC or more, an increase in the rr network attenuation results. However, the rr network input impedance is also increas ed, in
turn increasing the amplifier load impedance level, resulting in an increased
amplifier voltage gain. These tend to compensate to a great extent as shown by
the following partial design calculation for a 5.00-KC basic Pierce oscillator.
The crystal characteristics are
Re max = 8.5 K, PCMAX = 2 MW, X e
1.9.
405
II'-
0':>
16
100
200
250
860
500
500
-40
-40
-40
-40
-30
-40
-55
to
to
to
to
to
to
to
+70
+70
+70
+70
+75
+85
+90
Temperature
Range
(0C)
0.015
0.012
0.01
0.02
0.01
0.01
0.015
(%)
.'
~ (.
70
70
70
80
to
to
to
to
*Special Applications
*80 - 200
90 - 250
200 - 500
*500
80
80
80
90
."
0.002
0.003
0.002
0.001
1
16
*80
90
*80
*200
200
Frequency
Range
(KC)
Overall
Frequency
Tolerance
I
5 to 6
4.5 and 5
5.3 to 8.5
3
200
110 to 90
5 to 6
5 and 5.5
3
5.3 to 8.5
5.3 to 8.5
Equivalent
Resistance
(Kilohms)
2
2
2
0.5
0.01
0.1
2
2
2
2
2
(MW)
Dissipation
Rating
32.
32
20
32
20
20
32
20
45
20
20
Loading
Capacitance
(PF)
CR-29A/U
CR-42A/U
CR-47A/U
CR-57/U
HC-21/U
HC-13/U
HC-6/U
HC-6/U
HC-13/U
HC-21/U
HC-13/U
HC-16/U
HC-6/U
HC-6/U
---
--CR-38A/U
CR-15B/U
CR-37A/U
CR-43/U
' CR-46A/U
CR-63A/U
Crystal
Holder
Type
Crystal
Unit
Type
-.J
For
X Leff
Re max
1, X
Leff
8.5 K, R L
23 K, KA
4.7,
407
SECTION 9
VACUUM TUBE ANTI-RESONANCE OSCILLATOR DESIGN
9-1.
INTRODUCTION
tween the 1T network and the amplifier output, as shown in Figure 9-1(c). One
advantage of this circuit relative to that of Figure 8-1(b) is the increased output
power that can be obtained for a comparable crystal unit loading or, alternatively,
the reduction in loading that can be obtained for comparable output power. However, the major advantage in tube oscillators is the larger allowable plate signal
voltage in this circuit. Over a substantial portion of the frequency range the
characteristics of crystal units are such that, in the circuits of Figure 9-1(a)
and (b), it is necessary to limit the plate signal voltage to less than 10 VRMS in
order to avoid exceeding the crystal unit dissipation rating. This is difficult to
achieve with conventional tubes if the tube is to provide the limiting action, without sacrificing the desirable characteristics of the amplifier. In the circuit of
Figure 9-1(c) the allowable plate signal voltage is approximately doubled relative to that of the other two and therefore gives considerable relief in this respect.
This subject is dealt with in more detail in the subsequent discussion.
The circuits of Figure 9-1(a) and (b) are often referred to as the Pierce
type os cillator after their originator. In order to distingUish them from the circuit of Figure .9-1(c), which is a variant of these circuits, they will be referred
to here as the "basic" Pierce oscillator and the circuit of Figure 9-1(c) will be
referred to as the "isolating resistor" Pierce oscillator.
408
AMPLI FIER
lC3
Gv
_,-CI
4l ::::: 0
~r;;
~
~
.>
:::::::C2
CJ
- .....
(0)
AMPLIFIER
Gv
~ :::::180
>
<:> RL
<:>
<
10:
::::r:
:::::::
- .....
(b)
AMPLIFIER
Gv
:~O:
AA"
,v V
~::::: 180 0
>
<:>R L
>
::~
:::::::
--
( c)
TPI072-96
409
9-3.
The available crystal unit types and their more pertinent characteristics
are given in Table 9-1. More detailed information is contained in MIL-C-3098,
Supplement 1. With the exceptions of the CR-33A/U and the CR-71/U, these are
all fundamental mode crystal units having similar characteristics in those frequency regions where overlap occurs. The CR-33A/U is a special application
unit which should not be used in new military equipments without govermnental
. permission (see Table 1-5).
The CR-71/U is a fifth overtone unit intended for use in high-precision
crystal oscillators. This type of oscillator requires special circuit provisions
such as close tolerance crystal unit temperature control, automatic gain control
to maintain crystal dissipation virtually constant, and well regulated supply voltage. This type of operation is beyond the scope of this discussion, and this crystal unit is only included to give complete coverage of the crystal unit types
available.
Below 2.9 MC for wide temperature applications there is no real choice
of crystal units available to the designer. The CR-18A/U and CR58A/U units
have identical performance characteristics, and the. sole difference is in the
holder pin-size. Above 2.9 MC for wide temperature range applications, there
is a choice of three overall frequency tolerances: O. 002 percent (CR-69/U),
0.0025 percent (CR-66/U), and 0.005 percent (CR-78/U, CR-18A/U, and CR64/U). The CR-66/U gives a 2-to-1 improvement in overall frequency tolerance
over the other types above 3 MC. However, greater care is required in its
manufacture, and a higher cost can be expected.
410
"'"
I-'
I-'
(0C)
Temperature
Range
Overall
Frequency
Tolerance
(%)
to,20
to 20
to 20
to 20
to 20
to 20
to 25
-55
-55
-55
-55
-55
-55
-55
to +105
to +105
to +105
to +105
to +105
to +105
to +105
0.005
0.005
0.002
0.0025
0.005
0.005
0.005
0.8 to 20
0.8 to 20
0.8 to 20
3 to 20
4.5 to 5.5
to +80
to +90
to +80
to +80
0.5
(65 to 77C)
+70
+80
+70
+70
0.002
0.002
0.001
0.002
0.00008
625
625
600
40
100
625
625
175
60
175
120
65
to 175
to 20
to 20
to 15
to 20
20
20
25
25
25
to 25
to 17
to
to
to
to
to
Equivalent
Resistance
0.8
0.8
2.9
3
3
4
10
Frequency
Range
(MC)
5 and 2.5
5 and 2.5
5 and 2.5
5
10 and 5
10 and 5
5
10 and 5
5
5
2.5
Dissipation
Rating
(MW)
32
32
32
32
32
32
32
30
30
30
30
32
Loading
Capacitance
(PF)
7
7
7
7
4
~.
7
7
12
7
,7
7
Max.
Co
(PF)
CR-27A/U
CR-36A/U
. CR-62/U
CR-68/U
CR-71/U
CR-18A/U
CR-58A/U
CR-69/U
CR-66/U
CR-78/U
CR-64/U
CR-33A/U
Crystal
Unit
Type
HC-6/U
HC-6/u
HC-6/U
HC-6/U
HC-30/U
HC-6/U
HC-17/U
HC-18/U
He-6/U
HC-25/U
HC-18/U
He-6/U
Grystal
Holder
Type
Among the temperature controlled units, the CR-62/U gives the best
overall frequency tolerance. However, its comparatively low operating temperature only allows its use in applications where the ambient temperature does not
exceed approximately 65 0 C. The higher temperature types can be used in
ambient temperatures of up to approximately 75 0 C, but at the expense of a
doubling of the overall frequency tolerance.
The crystal unit maximum equivalent resistance varies considerably as
a function of frequency, as shown in Figure 9-2 for the CH-18A/U and the CH64/U types. These plots are also representative of He max in the other available
types. The minimum value of equivalent resistance likely to be encountered is
perhaps 1/9 He max'
These units are designed to operate in conjunction with either a 30 or 32
PF loading capacitance, depending on type. The magnitude of this value of capacitive reactance Xc L is therefore equal to the inductive reactance of the crystal
unit X e at its operating frequency. This is an important design parameter, and
the variation of X e or XCL across the frequency range is given in Figure 9-3 for
future reference.
700
600
"""
500
I
400
"o
a:'"
300
I
I
I
200
I,
--.
i I
100
....". CR -6,1J
.--- V
~
V
V1\
! ! I
v \
~
a
0.8
0.1
TPI072-97
Figure 9-2.
412
2
4
6
FREQUENCY (MC)
10
20
100
nrni=fT~'.'
'I
:+~ I-!_
l1~t~
. ~Ei'F
f--
-+
l---
-'-!-
.,--:--
.j} m--f~
--'-- -
~-:r
~:Ft
_11.,
+-,
32PF
2.0 :'.L;
CI>
)(
a:
0.
....J
U
)(
I.El-l- - - - - -
0.8mmtlt
0.4
0.2
0.5
TPI072-98
Figure 9-3.
1.0
2.0
3.0
4.0 5,0
10
20
30
40 50
FREQUENCY(MC)
~apacitor
The actual anti-resonance frequency fla of the crystal unit and loading
capacitance combination is critically determined by the value of CL. In practice,
a part of CL is contributed by the amplifier portion of the oscillator circuit, and
this part varies in response to changes in the circuit operating conditions. It is
therefore desirable to know the sensitivity of the anti-resonance frequency to
changes in C L in order to assess the precautions to be taken to hold the change
of f~ to a suitable value. This relationship was determined experimentally for
several CH-18A/U crystal units using a CI meter, and the results are given in
Table 9-2. It appears from these results that, over the greater part of the frequency range, a change of fla of 3 PPM per percent change in C L can be expected.
This appears to decrease by a factor of 3 at the very low frequencies of the range.
The asterisks in Table 9-2 denote simulated 'worst-case" crystal units
where the equivalent resistance is made up to the maximum value He max by the
addition of a series resistance. At the lower frequencies this had no noticeable
effect on the frequency change obtained, but at 20 MC a marked increase resulted.
However, the introduction of a series resistance when testing with the CI meter
at this frequency is rather cumbersome since the loading capacitor is in the form
of a plug-in unit into which, in turn, the crystal is designed to plug. Adding
413
He (Ohms)
Change in fa (PPM)
for I-PF Change in
C L (32 PF Nominal)
Change in fa (PPM)
Per Percent Change
in CL
230
600
35
14
24
* 5
60
2.7
13
2.7
20
2.7
*20
20
12 - 21
4 - 7
Crystal Unit
Frequency (MC)
414
He max
30
1\
1\
25
1\
f\
\
20
1\\
\\
,.,1
x a:
\\
15
\
\\
10
"\'\\.'\,,"\\, 1\\
00 .1
0.8
10
20
100
FREQUENCY (MC)
TPI072-99
Xe
R e max
Crystal Unit
9-4,
Oscillator Configuration
The relatively low allowable crystal unit drive voltage and the inherently
large linear signal handling capabilities of a vacuum tube amplifier make the
design of a basic Pierce type oscillator difficult at all but the lowest frequencies
415
(~~~,y]
(9-1)
The characteristics of the CR-18A/U crystal unit are representative of the other
applicable crystal types, and substituting the values of PCMAX and Re max given
in the specification sheet into Equation (9-1) for various values of
~Leff
e max
re-
800 KC
5.6
12.7
2 MC
V1TA (RMS)
3 MC
5 MC
10 MC
20 MC
8.5
6.3
2.5
1.6
10.5
7.5
4.8
3.0
1.9
8.4
6.. 3
4,0
2.6
10
10.5
7.8
4.9
3.2
10
4.5
4.1
13
20
7.0
.
XLeff
The largest ratios of R
for which values of V1T A are given approach
X
e max
the ratios of Replotted in Figure 9-4 and are therefore representative of
emax
the maximum usable values, since XLeff is always smaller than X e . Therefore,
the largest values of V1TA given in any column of Table 9 -1 is indicative of the
maximum allowable plate signal voltage at that particular frequency. In the
range up to 10 MC, therefore, the permissible plate signal voltage is approximately 8 to 10 VRMS. Above 10 MC, this decreases further due to both PCMAX
and Re max decreasing, and at 20 MC the allowable plate signal voltage is
reduced to 4 VRMS. The relatively large DC plate voltage levels required in
conventional vacuum tubes rriakes-it difficult to bias the tube so that limiting
holds the plate signal voltage to these levels. To do this it is necessary to
416.
operate the tube under very low DC :plate voltage condition~ ~here the variability
of characteristics between individual tubes of the same type is likely to be large.
At all frequencies, therefore, the basic Pierce circuit will require critical amplifier biasing if conventional tubes are employed. It does not appear
possible to determine the bias conditions that will be required from data sheets,
and consequently the design approach must be largely experimental. This is not
a desirable basis on which to develop a design procedure.
The alternatives are:
(a)
(b)
To use low voltage tubes where the ratio of plate bias voltage to
signal voltage will be reduced, resulting in good limiting at these
levels.
I
(c)
Voltage Gain
The small signal voltage gain of a tuned-plate grounded-cathode triode amplifier is:
417
TP 1072-135
where j.J. is the tube amplification factor, Rp the plate resistance, and RT is the
total plate circuit resistance.
b.
Input Impedance
418
,...-----I
Cpg
.L;
'j'
I
TPI072-136
The input
admittanc~
YM
(1"': Gv ) . j W Cpg
(9-6)
When the plate voltage is in phase opposition to Vin, Gv isa real negative
quantity and the amplifier input admittance due to feedback is then:
YM
(9-7)
IGv I (cos
+ j sin
)] . j
IGvl (1 + j ) jWC pg
W C pg
less~
(9-8)
(9-9)
where is in radians.
419
Equation (9-9) shows that when the plate signal deviates from phase
opposition to Yin, a parallel input resistive component RM appears across the
amplifier input, in addition to the capacitive component. The value of this resistance is:
=
RM
(9-10)
Therefore:
XCM
RM ;::::, (radians)
(9-12)
Output Impedance
The crystal 17 network analysis of Section 1 gives the following relationships between the 17 network parameters for the specified crystal unit loading
conditions.
The voltage attenuation is:
AV
Xcs
KA . XLeff
(9-13)
where
.:;i
= 1 +
420
XCT
He
max
XLeff
(9-14)
The value of the isolating resistor R relative to the crystal unit maximum
equivalent resistance Re max is:
R
Re max
XLeff
R e max
-1
(9-15)
Xc S' the reactance of the 11 network capacitor appearing at the amplifier input,
is related to the amplifier input resistance by the smaller of the values of the
following equations:
(9-16)
or
(9-17)
where Rin is the resistance appearing in parallel with the amplifier input terminals. The transition condition from Equation (9-16) to (9-17) is Rin > 3.6
He max R in can always be made greater than 3.6 Re max' and the re fo re
Equation (9-17) is the one to be employed.
The maximum allowable plate signal voltage before crystal unit overdrive
occurs is:
XLff j,
Vo max ~ 3.8 R
"I/P CMAX . Re max
e max
The values of KA, R
(9-18)
R
XCT
,and
R are shown in Figure 9-7 as functions of
emax
XLff
He max
9-7.
There are several factors which dictate the usable range of 11 network
impedance ratios. Of major importance are the conditions imposed by the requirement that the oscillator frequency tolerance should not be significantly
larger than the crystal unit tolerance if the circuit is to perform to its best
advantage .~nother requirement is to ensure that the crystal unit dissipation
does not exceed its rating. Conflicting with the latter is the condition that the
plate signal voltage will need to be a minimum of, say,10 V RMS and preferably
much largerbecause of the difficulty of providing amplifier limiting at lower
levels. Thirdly, the network component values must be such that its input
impedance (which for the given loading conditions lies in the range of R to 1. 3 R
for all values of XLff/Remax ) should provide a suitable load for the tube. If
the oscillator external loading is negligible, this simply means that R, which
will then essentially constitute the entire amplifier load, should be sufficiently
421
0.8
<l
"
0.6
0.4
CT il,
it:C.":.:::i,
HI'~fCll,,'
~l' l,'-~-I'I'
:.:.If..:r-t Ij N~!
:1", ""1
"
liil I , ' X
-,R;-I
I
o
," 1""" I'",',1,11,
, ' : TIT
'.a~9 . ~ , .', ',' -, ~,'
"._,., - ~- - , - - - - ~~
-
=I":'
1,',
.---
,:Trll
II
",,' .
"
I'
Ii IT!
,,' ,,':"'L~.~:;U<
.5:.
'i',
~IH;' ::;I=lliti'; ~i
'-1-1
-1-'
"i-L !,
;:i
III'
':
",-:-11
,I"
(I
JflP" ~.I
I' I
'::i
I'.
".
ifw= ~ii
1--+-:
I
!II' HH H1'\o'"
".11."
,I
I I
III
1'\;"0
"
,'11, ,1'1,'
ir ':1: -+--.-1-'-"
I
:~-'-'-I-;
',~
0.1
i-!
)(~Ia:
','-;-0 ,HI
:.0""".'1,
.....
"
.. '-:-' i
cal
ii: i:I,'tH
'I
I,i:
<l
+ t-: .'
"Ie
','
0.08
006
.C: ..
TP1072-103
. ,and
e.max
XCT
as Functions of
XLeff
Re max
large that an adequate loop gain is obtained . If tbe external oscillator loading is
heavy, however, arid a large output power relative to the crystal unit dissipation
is required, the value of R must be large relative to RL to provide the necessary
degree of power division between load and feedback network.
422
(9-19)
Equation (9-18) was derived assuming that the 1T network drive voltage would
remain constant independent of the value of the equivalent resistance of the
crystal unit in circuit. This is not the case in practice, for a reduction of Re
results in a decrease in the 1T network attenuation which causes a larger amplifier drive signal. Due to the non-ideal limiting characteristic of the tube, this
in turn causes an increase in the plate signal voltage. For the given loading
conditions, a maximum crystal unit dissipation occurs when the crystal equivalent resistance is approximately 1/3 Re max and, consequently, when the
plate signal will be larger than for a worst-case design. In addition variations
in the limiting characteristics between individual tubes, in oscillator loading,
and in power supply voltages may also cause increases in the plate signal
voltage. Judging from experimental results, a 50 percent increase due to all
causes may occur, and a suitable value of Vo max to use in Equation (9-19) to
determine the minimum usable XLeff ratio is 15 V RMS, giving:
Re max
XLeff
Re max
~ -~rp=C=M=A=X=='=R=e=m=a=x=
(9-20)
9-4. Comparison of these values with the plot of Regiven in Figure 9-4
e max
shows that over the greater part of the frequency range the latter values are
considerably larger and allow considerable choice in the selection of the value of
"-.
:Leff . At' 20 MC, however, the two ratios are equal, resulting in an impractie max
cal condition. It is then necessary either to use another means of limiting such
as a diode to attempt to obtain tube limiting below 10 V signal leveLor resort to
a modified approach,which will subsequently be described, to arrive at a feasible
design.
423
(MC)
He max
(ohms)
(MW)
Minimum
X Leff
Re max
0.8
625
10
1.6
575
10
1.7
150
10
2.1
4+ to 5 MC
60
10
"3.3
7+ to 10 MC
24
10
8.2
10+ to 15 MC
22
12
15+ to 20 MC
20
12.6
Frequency
9-8.
424
Re
If)
XC T
(9-22)
R, XC..L' and XC'T consist wholly of physical components and can therefore be
made as stable in value as required, but He and that part of XCS contributed by
the amplifier are variable with crystal unit and tube changes and can consequently
change the value of the right-hand side of Equation (9-22). To maintain oscillation, this will then require a similar change of Xe which can only occur if the
frequency of oscillation changes. Reference to Table 9-3 shows that over most
of the frequency range the effect of a 1 percent change in CL (and hence Xe )
causes a frequency change of approximately 3 PPM. It is therefore desirable
that the variation of C s and Re should not, at the most, result in a total change
of Xe of more than, say, 4 percent if the increase in overall oscillator tolerance
due to this cause is to be comparatively small.
To determine what is involved in meeting this requirement, it is necessary to consider the worst possible effects on the circuit of changing a crystal
unit o,r. a tube. If crystal units ranging over the extremes of characteristics
are inserted in the circuit, the crystal equivalent resistance may possibly vary
over a 9 -to -1 range. One effect of this will be to vary the attenuation of the 11
network which will then cause a compensating change of the amplifier voltage
gain in order to maintain unity loop gain. This, in turn, will cause a change in
the Miller effect input capacitance of the amplifier and, consequently, in Cs .
The change in the 11 network attenuation between extreme values of Re will be
from 2 to 3 times, arid eM will vary accordingly by a similar amount.
The effect of the variation of ~ on oscillator frequency can be studied
and an estimate of the possible oscillator frequency shift obtained by assigning
values to XCS relative to Xe and determining the required amplifier gain, as, suming XCL to be zero, KA = 4, and CL = 32 PF. Then, assuming a typical
value of C pg of 2 PF and an amplifier voltage gain variation of 3 to 1, approximate values of CM for the extreme amplifier gain conditipns can be calculated.
From this, the required change of Xe and the resultant oscillator frequency
change can be obtained, assuming a 3 PPM frequency change for a 1 percent
change in Xe . The equations used in these calculations are:
425
(9 -23)
Xe
Cs = XCs . XCL
Xcs
AV
G'v
KA . XLeff
(9-24)
XCs
4 . XLeff
(9-25)
(9-26)
AV
where G \r is the actual amplifier voltage gain under operating conditions when
limiting is occurring.
CM (max) = G \r
Cl\I (min) =
C pg
ClII (max)
3
(9-27)
(9-28)
These calculations are given in tabular form in Table 9-5 (a) and show
that for the assumed conditions, the variations of Xe to be expected range from
4.5 percent for XCS = 0.5 Xe and G \r = 4,to 1. 8 percent for XeS = 0.1 X e and
G\r = 36, corresponding to oscillator frequency changes of perhaps 14 and 5 PPM,
respectively.
The set of values for XCS equal to 0.1 Xe are close to the practical minimum obtainable since an operating amplifier voltage gain of 36 corresponds to a
required small signal gain of about 50. This approaches the maximum gain
obtainable, disregarding all other requirements. Other aspects which reduce
the voltage gain of the amplifier have to be considered, and the values for XCS =
0.2 Xe, G V = 16, where the frequency change is approximately 9 PPM, are
therefore more representative of what can be achieved in practice with this configuration.
An improvement in the constancy of XCS together with a beneficial reduction in the required amplifier voltage gain can be obtained by introducing the term
Xc.L' This is shown in Table 9-5 (b) where calculations similar to those given in
Table 9-5 (a) but introducing values of XC. are presented. These show that the
required voltage gain is then markedly reduced while the changes in Xe caused by
variations of XCl\I are, in the majority of cases, decreased by an order of magnitude or more.
426
N
-'l
Xe
0.33
0.25 X e
320
320
Xe
0.1 X e
Xe
Xe
0.4
0.6
0.5
0.8
Xe
Xe
0.2
0.1 X e
Xe
0.2
0.1
32
16
160
0.2 X e
0.65 X e
0.25 X e
Xe
Xe
160
Xe
0.4
Xe
0.5
0.4
128
0.1 X e
8
1.6
128
0.25 X e
16
3.2
2.66
72
0.25 X e
1.33
96
0.11 X e
36
0.56 X e
320
96
Xe
Xe
0.33
0.9
0.33 X e
32
24
16
0.34
16
12
0.33 X e
160
128
96
64
max
Xe
Xe
Xe
Xe
~~)
0.1 X e
0.8
0.75
0.67
0.5
(PF)
Xe
XLeff
21.3
10.7
5.3
5.3
2.7
2.7
10.7
2.1
5.3
1.77
5.3
1.1
2.7
0.89
2.7
5.3
48
24
(b)
21.3
16
10.7
5.3
- 6CS
~G'V
315
299
155
149
126
122.7
94.2
90.7
272
138.7
112
85.3
58.7
(PF)
Cs
= 2 PF,
6CS
(PF)
10.7
5.3
2.7
min
CM (PF)
Xe
. 0.2
Xe
XC,t
0.5
XCS
Cs
G'v
(a)
.
Xkff
AssumptIOns: KA = 4 (R
> 3), Xc = 0, C L = 32 PF, C pg
emax
1-.
0.004 X e
0.014 X e
Xe
Xe
0.007 X e
0.007 X e
0.002 X e
0.207 X e
0.107 X e
0.102 X e
0.214
0.254
Xe
6
0.006
9.
11
13
14
(PPM)
~f
~e
--x. e
0.02 X e
0.011 Xe
Xe
Xe
0.261 Xe
0.336
0.35
0.286
Xe
Xe
Xe
0.031 Xe
0.018 Xe
0.042
Xe
0.036
0.045
(~Xe)
Xe
Xe
0.231 Xe
0.118 Xe
0.372
0.545
XCs +~XCs
6XCS
TABLE 9-5. CALCULATION OF OSCILLATOR FREQUENCY SHIFT DUE TO MILLER CAPACITANCE CHANGE
The va;iations of He will also cause changes in the term (1 +" ~), gIvmg
rise to a further variation in the right-han~ side of Equation (9-22). The extent
of this effect can be determined from the plot of
R
given in Figure 9-7.
.
Re max
.
R e max
ThIS plot shows that
R
has values of 0.13, 0.07, 0.02, and 0.009 for
<
e max
vary over a 9-to-l range, these values are indicative of the total fractional
change in the term (1 +
~e)
XLeff
lL
"-e max
~)XCT s;
(9-29)
1.13 XLeff
where
XLeff =
The value of (1 +
Xe - XC.. - XCs
term
(9-30)
decreases with in-
~Leff
max
6, the effective change in XCT is 0.9 percent and the reqUired change
.
in Xe is 0.45 percent. This effect is therefore relatively small in the majority
of cases relative to that caused by the variation of. C M .
=
428
'.
plate circuit tuning capacitance large relative to the tube capacitance, and by'
ensuring that the Q of the circuit is low. Except for these precautions, therefore, the effect of tube variations need not be considered.
The sense of the miscorrelation errors can be determined in the following way. A decrease in He causes an increase in XCS and a resultant increase
in Xe and oscillator frequency. It also causes a decrease in the term (1 +
~),
"'-,,-
Re max
XCT
1+ R
(9-31)
XLeff
R e max
where is in radians.
429
"
XCT
XLeff
Reference to column 2 of Table 1-7 shows that the term - R
Re max
in the denominator of Equation (9-31) is ,always less than 0.33 for all values of
XLeff
Re max , and therefore the 11 network phase angle expression can be crudely
approximated as:
XLeff
~ Re max
XCT
Re max
XCT
- R
(9-32)
He max
XLeff
R e max
(9-33)
!::AX Leff
=
XLeff
~CT + XCT
R
Re max
(9-34)
But
!::AXe
XLeff
=
Xe
!::AX Leff
(9-35)
Therefore:
~e
Xe
(~~ff)2
XLeff
Xe
XC T
-- +
R
Re max
He max
Xe
1
XCT
(9 -36)
The fractional change in Xe for a given phase angle is, therefore, directly pro.
XLeff
portlOnal to -X;-, and the smaller the value of XLeff is relative to X e , the
smaller will be the resulting oscillator frequency change due to a change in the
loop phase shift.
430
Xe
XLeff
Xe
R e max
(approximately 10 degrees)
.6X"e
Xe
t:..f
(PPM)
(%)
0.9
20
0.76
0.9
10
1.5
0.8
20
0.68
10
1.4
0.6
12
0.51
0.6
1.0
0.4
10
0.7
0.4
1.4
0.2
0.85
0.2
1.7
0.1
0.85
0.8
9-10.
431
is therefore:
y
where
==
RT +Rp
RT .R p
+ j
==
RT + R p
"RT' Rp
+j
(WC - w~)
WC [1
- (:0)2 ]
(9-37)
Wo
= LC
(9-38)
R
RT + R
:=:= RT .
p .
C[1 _" (w o )2 ]
W
(9-'39)
==
17
(9-40)
That is, the plate circuit Q should not be greater than 17 if the oscillator miscorrelation error is not to increase unduly due to temperature effects in the
plate tank circuit. This is close to the upper limit if compensation techniques
are not to be used, and a preferable value would be, say, 10. This would then
make the selection of the tuning elements uncritical.
Operation of the tank circuit under low Q conditions often requires that
the tuning capacitance be relatively small. If it is made too small, however, the
variations of output capacitance between tubes will introduce a miscorrelation
error. A total tuning capacitance of around 15 to 20 PF appears sufficient to
swamp these variations adequately and can be considered as a suitable minimum
value.
432
9-11.
The effect of the Miller capacitance CM on the value of Cs has been previously discussed in detail, and attention is confined here to the relationship
between XCS' Rg , and RM. From Equation (9-17) the value of amplifier input
resistance that will cause negligible crystal unit loading is:
2
10 Xcs
~n ;::: R e max
(9-41)
--g
2
30 XCs
(9-42)
He. max
This component can then be ignored, and the condition placed on RM is that:
2
RM ;:::
10 Xcs
(9-43)
Re max
Or, substituting for RM into Equation (9-12), the allowable amplifier phase
angle is:
~
XCM . He max
(9 -44)
10 Xcs
For the majority of designs the allowable amplifier phase angle dictated
by oscillator miscorrelation will be smaller than the value given by Equation
(9-44). In some cases, however, this may not be the case, and the plate circuit
loaded Q will then need to be reduced accordingly to meet this requirement if
the crystal unit loading due to RM is to be negligible.
9-12.
Reference to. the fourth line of Table 9-5 (a) shows that for XCS = 0.2 Xe
and Cpg = 2 PF, G\r is 16 and the expected change of frequency due to changes of
Cs is approximately 10 PPM. This is indicative of the total frequency shift ex,
433
value of XCT' therefore, the resultant frequency change will be less than 3 PPM
and, because this change is in the opposite sense to that caused by changes in
CS' it will tend to reduce rather than increase the frequency shift.
This expected total frequency miscorrelation of approximately 10 PPM
is confirmed by experimental results obtained for oscillators operating under
these conditions, which show miscorrelations of from 4 to.7 PPM for a 3-to-1
range of values of Re. This can be expected to double for the assumed 9-to-1
range of Re.
For these conditions the required closed loop amplifier voltage gain is
16, requiring a small signal amplifier gain of 20 or more to ensure oscillation.
This is within the capabilities of the high~, low Rp tubes, and this set of oscillator relationships is therefore practicable.
In many applications an overall oscillator frequency tolerance of 60
PPM will be adequate, and this will be possible in a circuit having the relationships given in the fourth line of Table 9-5 (a~ using a crystal unit with a 50
PPM overall frequency tolerance. This approach results in a simple design
procedure which is applicable at all frequencies of the range, except possibly at
the very highest frequencies where the limitations placed on the amplifier plate
signal voltage may cause difficulties.
If the required overall oscillator frequency tolerance lies between 35
and 50 PPM, this can be obtained .with the basic approach at frequencies above
3 MC using the 25 PPM tolerance CR-66/U or CR-69/U crystal units. But if a
smaller tolerance approaching more closely that of the crystal unit is required,
it will be necessary to introduce the series capacitor C. into the design. The
design procedure is then complicated by the addition of another variable, and
this can probably best be treated as a modification of the basic approach; the
basic design first being determined to serve as a starting point, followed by a
modifying process to introduce the component changes necessary to reduce the
frequency miscorrelation. This is the approach subsequently adopted. This is
also the approach to be adopted below 10 MC if for some reason an intermediate
~ triode is preferred for the design. In this case C.L is used in order to reduce
the 7T network attenuation to a value compatible with the available amplifier
voltage gain.
9-13.
Select the crystal unit type on the basis of its overall frequency tolerance,
noting that the overall oscillator tolerance can be expected to be from, say, 3
PPM to 10 PPM larger depending on the sophistication of the final design.
434
The values of Xes and XC,.e. are selected as 0.2 X e (C s = 160 PF) and 0,
respectively. If a closer oscillator frequency tolerance than the selected crystal unit tolerance 10 PPM is necessary or an intermediate ~ tube is to be used,
this will only be a preliminary selection. Calculate:
X
Leff
X Leff
R
emax
X e - Xc S
0.8 X
0.8 X
(9-45)
(9-46)
Re max
Ii>
V o max
Leff .;
2.5 R max
P CMAX . R e max
e
(9-47)
XLeff
3
R e max
(9-48)
1T
R emax
(9-49)
11
Leff! \
+ R e max)
(9-50)
Leff
will be approximately
435
(c)
The
j.L
From the tube characteristic curves given in the data sheet, determine
a suitable working point and the total plate load ~ which will result in an ampli- .
fier small signal voltage gain of from 20 to 24, using the formula:
436
(9-51)
Several possible plate voltage and grid bias points will probably have to be investigated before a suitable operating point is found.
TABLE 9-7
TYPICAL TRIODE CHARACTERISTICS
TUBE TYPE
l\>
Ip
(K)
(MA)
16
20
24
27
38
55
70
3.6
4
7
4.7
10
8.5
28
10
8.5
2
9
5
16
17
17
18
21
28
39
47
55
10
2
8
4
7
8
7
7
8.5
60
60
57
14
6
9
3
8
5
70
58
0.8
Cgp
Vp
(PF)
100
100
30
100
100
180
150
1.3
1.5
1.7
1.3
1.2
1.6
1
4
23
11
11
9
5
9.5
9
12
140
180
250
150
70
100
100
150
180
1.5
4
1.4
3.2
1.5
2.7
1.3
3
1.5
100
110
150
1.6
0.9
0.4
100
1.4
Sub-Miniature
5977
*6111
*5798
5718
5635
6169
6112
11
Miniature
6072
*5687
6135 (6C4)
6350
*5963
5844
*5964
*5965
6193
6201
(12AT7)
6CW4
6ES4
5751
(12AX7)
!
/
*Dual Triodes
437
The worst-case design plate voltage swing, and hence the tube operating
point, can be estimated with reasonable accuracy from a load line with a slope
of -Ry drawn on the plate characteristic of the tube if the plate voltage negative
peak swing is more than, say, 20 volts. The expected peak negative voltage
swing is then the voltage difference between the quiescent plate bias point and
the intersection of the load line, with the plate characteristic curve for VG equal
to O.
The positive plate voltage swing will be of similar amplitude due to the
action of the plate tank circuit and, since the limiting is only slight in a worstcase design, the plate RMS voltage is approximately 0.7 times the negative peak
swing. When designing for lower plate signal voltages, the accuracy with which
the plate voltage swing can be estimated decreases rapidly. The tube operating
conditions determined as described above should then only be regarded as an
approximate indication of where the tube should be operated. In all probability
it will then be necessary to experimentally adjust the tube bias conditions to
obtain the reqUired plate signal voltage.
At design frequencies above 10 MC it will probably be necessary to confine attention to the region of plate voltages of 70 to 120 VDC and grid bias voltages in the vicinity of -1 VDC, the former being dictated by the signal limiting
requirements and the latter by the need to minimize R in order to obtain the
. d gam.
.
P
reqUIre
The value of ~ must, of course, be smaller than R FB for a feasible
design and should be much smaller if high oscillator power output is desired.
The value of the external oscillator load resistance reflected into the plate circuit is:
(9-52)
Vo
PL = R
(9-53)
438
(9-54)
Minimum
.Re max
Xe
(9-55)
Re max
Xe
'
will be 0.125 and therefore for Cpg values
rx
V
=
.-Q
~.
(9-56)
This is the maximum value of ~, and smaller values are permissible if increased amplifier voltage is found to be necessary during the design evaluation.
The minimum value of RK is determined by considerations of the tube dissipation. It is desirable that the tube should not be damaged if oscillation ceases due
either to a crystal unit failure or to the withdrawal of the crystal unit from the
circuit. ~ should, therefore, always be sufficiently large to ensure that neither
the maximum plate current nor dissipation ratings are exceeded under quiescent
conditions.
The resistance appearing at the cathode of the tube is ~ in parallel with
the cathode input resistance of the tube. The value of the latter is:
439
(9-57)
x__ ~ ~
50
(9-59)
-J.{
,The value of the capacitor placed in parallel with the amplifier input to
give a total Cs equal to 160 PF is approximately:
I
Physical
(9-60)
Construct a breadboard circuit of the oscillator using the calculated component values.
440
Table 9-5(b) gives sets of data for various relative values of XCi inchiding the predicted frequency shift in parts per million. To design this type
of oscillator it will be necessary to perform similar but extended calculations
H
to give the values of H, the predicted frequency change due to the term (1 + He),
and the allowable plate signal voltage, to arrive at a suitable set of 1T network
relationships.
441
there is a wide choice in the selection of the ratio ~Leff . Above 10 MC, howX
max
ever, the minimum value of R Leff dictated by plate signal voltage consideraX
e max
,
tions approaches He e
and the series capacitor cannot then be used to demax
crease the frequency miscorrelation except by lim.iting the plate voltage swing
to less than 10 VRMS. It will then probably be necessary to introduce a limiting circuit to prevent crystal overdrive. One circuit which is suitable for this
purpose consists of a diode connected as shown in Figure 9-8. The diode is
reverse-biased by the voltage drop across the resistor R( and only conducts
when the instantaneous signal voltage equals the reverse bias voltage. When
conduction occurs, the diode loads the amplifier heavily, stabiliz ing the signal
amplitude. The diode reverse-bias voltage should therefore be approximately
equal to the reqUired peak signal voltage.
DIODE
SUPPLY
VOLTAGE
TPI072-93
442
9-14.
.9-15.
Re max
P CMAX
C
Xe
Xe
Re max
X Leff = 4K
Xc
CT
40 PF
lK
S
Tube Characteristics, 12AT7
443
32 K
Xc
R FB = 43 K
= 800 ohms
T
T
= 40 PF
Re max
P
CMAX
X Leff
R e max
5MW
Vo max
C L = 32 PF
Xe
Xe
R e max
= 10
8 V RMS
R = 6K
250 ohms
R
12.5
FB
Xc
X Leff
200 ohms
Xc
50 ohms
= 8K
200 ohms
T
C = 40 PF
T
S
Tube Characteristics, 6CW4
444
9-18.
XLeff
= 0.4
Xe
= 424 ohms
Xc S
Xc T
= 0.4
Xe
Vo max = 15 V Rl\tIS
75 PF
8.4
10.7 K
R FB = 14 K
1 PPM
445
9-19.
I\J
At the extreme high frequencies of the range only the very low
tubes
having Rp's below, say, 8 K are suitable for use in an oscillator designed according to the basic design procedure. Higher Rp tubes, when operated with plate
voltages below 100 VDC (which appear necessary to provide the required limiting), are forced to operate under low current and hence high ~ conditions. It is
then usually impossible to obtain the required amplifier gain because of the low
feedback network input resistance, unless the external oscillator loading is
negligible.
If it is desired to use such a tube at these frequencies, it is possible to
incre~se
the allowable plate signal voltage by increasing the values of Rand XCs
calculated in the basic procedure while decreasing X Leff , thereby maintaining
the 17 network constant. The resulting benefits are twofold. The allowable plate
signal voltage is increased which, in turn, allows the DC plate voltage and current to be increased, decreasing Rp. The feedback network ,input resistance is
increased, thereby reducing its loading effect. The disadvantage is that the
oscillator overall frequency tolerance is increased due to the increase in XCS'
The justification "for this approach is as follows: Reference to Equation
(1-108) shows that the allowable 17 network input voltage may be expressed as:
Vomax
2JR . P CMAX
(9-61)
X2Leff
CS
= ---
X Leff
R e max
X
Leff + R
Remax
_.=.:::=.::-
446
(9-62)
XLeff
But
is the input resistance of the 'TT network ~ min as viewed across
Be max
CT(see Paragraph 1-16) when X Leff is 3 or larger.
R emax
Therefore:
~min
(9-63)
!\rmin + R
The 7T network attenuation calculation can now be conveniently treated in two
parts and the effects of changing R readily appreciated.
Equation (9-61) gives the allowable 7T network input voltage when Rrr
equals R. That is, when He is less than Re max and, consequently, when the
loop gain is much greater than 1. Because of the non-ideal limiting action of
the tube, it is therefore necessary to introduce a correction factor for a worstcase design. The allowable plate voltage is then:
V omax = 1.4./R . Pc
(9-64)
MAX
The remainder of the design process is the same as for the basic design'
procedure, except that the plate circuit loaded Q may be dictated by the value of
RM' The following examples illustrate this approach.
9-20.
9-21.
CMAX
If X
Leff
X
CS
Cs
20 ohms
32 PF
5 MW
250 ohms
loon
80 PF
Leff
Re max
Xc
7.5
7T
T
T
= 150 ohms
53 PF
. = 1.1K
mm
Let R
10 K, then AV
11 K, V
o max
10 V RMS.
447
1J
CMAX
If X
Leff
Xc
5 MW
100 ohms
Xc
C s = 80 PF
Re max
= 32 PF
e = 250 ohms.
X Leff
= 53 PF
R 7T min = 1.1K
= 7.5
Let R = 10 K, then: Ay
= 150 ohms
T
15'
FB
= 11 K, Y '
o max
10 Y RMS.
448
9-23.
The five oscillators for which evaluation data are presented are those
designs given as examples of the basic design procedure. The external effects
for whichcdata are given are:
(a)
(b)
(c)
(d)
Crystal interchange
17
449
input impedance and low allowable crystal dissipation. The three 20-MC oscillator design examples are intended to show the relative circuit design requirements when using moderately high and low plate resistance triodes at this frequency and also to show some of the possible compromises in design. The design
procedure is such that there should be no difficulty in developing similar designs
at frequencies other than those for which test data were obtained.
Fixed capacitors were used in these evaluation oscillators. In practice
a small variable capacitor would form part of Cs to facilitate the initial adjustment of the oscillator.
Certain general conclusions can be drawn from the evaluation results:
(a)
450
(b)
(c)
The effect of the oscillator circuit other than the crystal on the
oscillator overall frequency tolerance with temperature change is
less than 3 PPM for the five oscillators evaluated. This level of
performance was obtained without applying any special precautions with regard to the plate circuit tuning, other than ensuring
low loaded Q.
(d)
9-24.
In view of the frequency errors indicated in (b) and (c), the oscillator overall frequency tolerance is likely to be no more than 10
PPM greater than that of the crystal unit.
This design was performed before the design procedure was finalized,
and the value of R employed is larger than that obtained in the design calculation.
X2
Leff
max
fier small signal gain to 28. The tube DC operating conditions were the same,
and the increase in gain was obtained by using a total load resistance of 14 K,
giving RL = 15 K. All other aspects of the evaluation oscillator are the same as
given in the design example, except that the allowable worst-case design plate
signal voltage is increased to 47 VRMS due to the increase in R. The evaluation
data presented should therefore be indicative of the performance expected of an
oscillator constructed according to the design example.
.He
The major difficulty occurring in the design evaluation was due to the
poor quality of the available crystals. These all exhibited large variations of
Re when subj ected to temperature changes. The effect was so bad when they
were used as worst-case units that oscillation ceased due to insufficient loop
gain as the temperature was increased or in some cases decreased, depending
on which crystal unit was in circuit. Having determined that the .effect was not
due to the remainder of the oscillator circuit, qualitative temperature tests were
run to determine the variation of R e occurring. These tests showed that the
crystal Re's were increasing almost 100 percent; that is, approximately 200 to
300 ohms. In the temperature tests, the crystal units were already padded until
their effective R e was 580 ohms (Re max)' and this additional increase in crystal.
R e therefore represented an increase of apprOXimately 30 percent. This also
represented a change in loop gain of at least 30 percent, a sufficient change to
cause the oscillation to cease.
The best of the crystals was used to obtain the temperature curves shown
0
in Figure 8-28. Oscillation ceased at approximately+65 C, but the curve shows
sufficient agreement with those obtained at other frequencies with crystal units not
having the marked variation in Re with t~~[:>er~j:\Jr_e,thatit is possible to predict
451
PARALLEL RESONANT
FREQUENCY (MC)
Re (ohms)
(1)
1.000003
270
1.000003
580
(3)
0.999999
220
(4)
1.000003
250
+ 200
,.....------------1~----------------
VDC
* DENOTES
VALUES
MEASURED
AT I MC
IIOK*
1/2 12AT7
0.01 UF
200K
15PF
0.1 UF
40PF
(MEASURED)
129PF
(MEASURED)
TP 1072-137
452
Change
Test Conditions
+15% B+
Frequency
Change on
Vo
Oscillator
1 PPM
I:. V0 = +22%
RL
= 15
K, Ef
= 6.3
-20% B+
Change on
Oscillator
Frequency
VO
1 PPM
AV 0 = -35%
RL
= 15
K, Ef
= 6.3
10%
Change in
Ef on
Oscillator
Frequency
Vo
1 PPM
liVo = 3%
RL
= 15
K,
10%
Change in
R on
L
Oscillator
Frequency
Vo
1 PPM
6.V 0 = 12%
Ef
= 6.3
~b
= 200
V, ~b
= 200
-55 C to
0
+105 C
Frequency
Change in
Vo
T A on
Oscillator
"
Ef
= 6.3
V, Ebb
= 200
V, R L
= 15
453
Tube No.
Oscillator Frequency
(MC)
Output Voltage
1.000002
37
1.000002
33
1.000002
40
1.000002
38
1. 000001
42
1. 000001
38
1. 000001
42
1.000002
39
Crystal No.
Crystal
Frequency (MC)
Oscillator
Frequency (MC)
Error
(PPM)
Output
Voltage
1.000003
1.000006
+3
52
.1.000003
1.000002
-1
37
0.999999
1.000004
+5
52
1.000003
1.000004
+1
": 52
~~-
454,
i-""'
.. ~
~DERIVED CRYSTAL
1.0000101-"--,,r!-- CHARACTER ISTIC U
l-r
1.000000 fC=""-:OO""..ld'-+---+--+--+-
-__
10N
~PM
"""---
)0
~,r'\.
I'"'\.
"'''''l,~.,\-+--+----,r--+--+--+--t--+-'''---1
. 'ill\...
"\
CRYSTAL EXTERNAL
TEMPERATURE
-f-CHAMBER
-+-+--f!l~,\~-,"-t'-~-+- TO
."
f--l~--+-6-=-pJC:PM;:;:::::t:=:~l---!-=---+__
-~r:--'~""~
"~-.,~;=~~==:~,,~~~~-=-t-:.-:.~I-_--~
.
.i.
40PPM
---~
'It.
-
iQ999990~~-~-~-~-~1~--+--+-~~~~-+--+-_t-~-~~
"'' -'
-55
TP 1072-138
-35
-15
+5
+25
+45
+65
~'
+85
+105
PARALLEL RESONANT
FREQUENCY (MC)
He
(ohms)
(1)
4.999956
16
(2)
4.999924
15
(3)
4.999973
24
4.999952
60
"
455
r------------.....----------------+
150 VDC
*DENOTES
VALUES
MEASURED
AT 5MC
70UH
1I'212AT7
O.OIUF
I-IIPF
20K
IIOPF
40PF
O,02UF
TP 1072-139
4.999943 MC
Test Conditions
Frequency
Vo
<1 PPM
~.vo = +10%
RL
= 9. 3 K, Ef = 6. 3 V
Frequency
V
<1 PPM
AV 0 = -27%
RL
= 9.3
<1 PPM
AVo = 3%
RL
= 9. 3 K,
10%
Change in Frequency
R L on
Vo
Oscillator
< 1 PPM
AVo = 10%
Er = 6. 3 V,
Ebb
= 150
-55 0 C to
0
+105 C
Change in
TA on
Oscillator
<11 PPM
AVo = 3%
Ef
= 6.3 V,
~b
= 150
V, R L
-20%
B+ .
Ch
ange on
Oscillator
10%
Change in
Ef on
Oscillator
456
Change
Frequency
Vo
Frequency
Vo
K, Ef
= 6.3
E1Jb
= 150
= 9. 3 K
Nominal V0
4.999943 MC
Change
Test Conditions
<2 PPM
Tube No.
Oscillator Frequency
(MC)
4.999942
25
4.999943
23
4.999948
23.5
4.999946
24.5
4.999942
28
4.999944
25
4.999946
27
4.999950
25
Output Voltage
Crystal No.
Crystal'
Oscillator
Frequency (MC) Frequency (MC)
Error
(PPM)
Output
Voltage
4.999956
4.999970
+3
28
4.999924
4.999935
+2
28
4.999973
4.999991
+4
27
4.999952
4.999942
-2
24
fucreasing C
457
I
4.999970
4.999960
~ 4.999950
)-
z 4.999940
U.I
::::I
4.999 930
~ 4.999920
r---
<[
~ 4.999910
Ul
'"
- --- -I.
CRYSTAL EXTERNAL
TO TEMPERATURE
CH,MBER
3.4PPM-
23 PPM
/
I
I-
LL
o 4.999900
..L..
\-\
\
---- ----W
7PPM
'"
4.999880
4.999870
-55
-35
-15
Figure 9-12.
25
........
"'- -..../
45
65
85
Re (ohms)
(1)
20.000270
(2)
20.000600
(3)
20.000400
(4)
20.000200
20.000000
20
CRYSTAL UNITS
(CR-18A/U)
458
I
I
TP 1072-140
<
4.999890
9-26.
4.999980
105
+ 75
r-------'------~~-----------...,.....----
*DENOTES
VALUES
MEASURED
AT 20 MC
RL
6.2K* 300
PF
VDC
6K*
..---+---..-,t----J\.NV~-_iDt-----0.01 UF
160K
40PF
1-11 PF
118PF
TPI072-141
19.999910 MC
hange on
Oscillator
-20% B+
Change on
Oscillator
Test Conditions
Change
I Frequency
V
0
Frequency
Vo
1 PPM
AV 0 = +31%
RL
= 6. 7 K,
-1. 5 PPM
AV 0 = -44%
6.7 K, E
f
6.7 K,
Ef
= 6. 3
6. 3 V
10%
Change in Frequency
Vo
Ef on
Oscillator
1.5 PPM
AVo = 6010
RL
10% R
L
Change on
Oscillator
Frequency
Vo
1 PPM
AVo = 6010
Ef
= 6.3
V, ~b
= 75
-55 0 C to
+105 0 C
Frequency
Change in
Vo
T A on
Oscillator
25 PPM
AV 0 = 9010
Ef
= 6. 3
V, Ebb
= 75
V, RL
~b =
75 V
= 6. 3
459
Change
Test Conditions
2 PPM
Tube No.
Oscillator Frequency
(MC)
19.999910
19.999918
9.6
19.999900
8.8
19.999910
8.6
19.999925
8.6
Output Voltage
Output
Voltage
Crystal No.
Crystal
Frequency (MC)
Oscillator
Frequency (MC)
20.000270
20.000230
-2
10 V
20.000600
20.000610
10 V
20.000400
20.000350
-2.5
10 V
20.000200
20.000200
10 V
20.000000
19.999910
-4.5
8V
460
20.000500
20.000400
20.000300
. /.....
""'- "-
20.000200
I.
'\
\
~ 20.000000
49 PPM
~ 19.999 900
loJ
19.999800
\
'\.
a:
.....
19.999700
19,999600
'"
'''-.
19.999 500
T
19.999400
4 prPM
.i
-55
7PPM
-35
-15
+5
r--+25
TEMPERATURE (DEGREES
TP 1072-142
Figure 9-14.
../
CRYS11lL REMOVED
FROM TEMPERATURE
CHAMBER
'\....
..l
9-27.
'\
20.000100
g
loJ
+45
+65
+85
+105
CENTIGRADE)
PARALLEL RESONANT
FREQUENCY (MC)
Re (ohms)
(1)
20.000270
(2)
20.000600
(3)
20.000400
(4)
20.000200
20.000000
20
461
* DENOTES
VALUES
Rl
51<*
330
MEASURED
101<*
PF
AT 20 Me
.......-.........----4I--...JV'V\r......----tD~0.03 UF
200K
53PF
HIPF
62 PF
TPI072-143
10%
Change in
Er on
Oscillator
10%
Change in
R on
L
Oscillator
Test Conditions
Change
<1 PPM
= +29%
R L = 5.1 K, Ef = 6',3 V
Frequency
Vo
-1 PPM
b,V 0 = -45%
R L = 5.1 K, Ef = 6.3 V
Frequency
Vo
<1 PPM
b,V 0 = 3. 5%
Frequency
Vo
~Vo = 3.5%
~V
R L = 5.1 K, ~b
<1 PPM
,
Ef = 6.3 V,
~b
= 100 V
= 100 V
-55 C to
+105 0 C
Change in
TAon
Oscillator
462
Frequency
Vo
24 PPM
AVo = 11%
Nominal Vo
19.999890 MC
Change
<2 PPM
Test Conditions
Output Voltage
19.999890
11.4
19.999880
13.4
19.999890
12.2
19.999890
12
19.999890
11.8
Tube No.
Crystal No.
Crystal
Frequency (MC)
Oscillator
Frequency (Me)
Error
(PPM)
Output
Voltage
20.000270
20.000260
-1
12.9
20.000600
20.000630
+2
12.9
20.000400
20.000400
20.000200
20.000230
+2
12.9
20.000000
19.999890
-6
11.4
13
2_6_t_o_4_5_MW
463
20.000400
20.000300
20.000200
/'
I-"""
..,
.............
..
"r-.. '\
20.000100
CRYSTAL EQUIVALENT
'\
20.000000
-19.999900
u
>= 19.999800
u
z
IU
519.999700
'\
\.
IU
e: 19.999600
19.999500
-35
-15
+5
TEMPERATURE
TP 1072 - 144
Figure 9-16.
+25
+45
+65
+85
/
+105
I DEGREES CENTIGRADE)
464
"
"-~- . /
19.999400
-55
9-28.
48P~
RESlST~NCE=Rema~ = 20 OHMS
PARALLEL RESONANT
FREQUENCY (MC)
Re (ohms)
(1)
20.000270
(2)
20.000600
(3)
20.000400
(4)
20.000200
20.000000
20
+100 VDC
4 UH
RL
22K* 300
PF
*
.--4-.......--1I--...JVV\r.....10K
*DENOTES
VALUES
MEASURED
AT 20 Me
...-iO~--
1/212AT7
_-----_+_
0.005UF
1-11 PF
300K
52 PF
53PF
O.005UF
TPI012-145
Change
Frequency
V
-20%
B+
Ch
Frequency
ange on
V
Oscillator
0
Test Conditions
<1 PPM
/i.V 0 = +26%
R L = 23 K, Ef = 6.3 V
-1 PPM
AV 0 = -35%
R L =23K, Ef =6.3V
10%
Change in
Ef on
Oscillator
Frequency
Vo
<1 PPM
AV o < 2%
RL
10%
Change in
R L on
Oscillator
Frequency
Vo
1 PPM
AVo = 3%
E f =6.3V,
26 PPM
AVo = 1l%
-55 0 C to
+105 0 C
Frequency
Change in
Vo
TA on
Oscillator
= 23
K,
~b
= 100
~b=lOOV
465
Nominal V
Effect Of
Change
3 PPM
Tube No.
Output Voltage
19.999990
10.3
20.000000
19.999990
9.2
19.999960
10
20.000030
12.8 .
19.999960
10.1
19.999960
' 11.1
19.999990
10.3
Crystal
Frequency (MC)
Oscillator
Frequency (MC)
Error
(PPM)
Output
Voltage
20.000270
20.000260
-1
12.8
20.000600
20.000630
+2
12.9
20.000400
20.000400
12.9
20.000200
20.000200
12.8
20.000000
19.999990
-1
10.2
466
20.000600
20.000500
20.000400
~ i'...
r--,
'"
20.000300
20,000200
r\
20.000000
>-
19.999900
51PPM
::::l
CJ
~ 19.999800
LL
19.999700
19.999600
19.999500
-55
TP 1072-147
l\.
20.000100
"\
-35
-15
I\.
'\
"-
"\
I~
+5
+25
+45
+65
TEMPERATURE (DEGREES CENTIGRADE)
+85
y
+105
No de!?ign work has been carried out in this frequency range, and the following discussion should be regarded as a suggestion of how the design process
devised for the 0.8 to 20 MC range may be adapted to produce suitable designs
at these frequencies.
The major characteristics of the military type anti-resonance crystal
units applicable to the 16 to 500 KC range are given in Table 9-8. There are no
military anti-resonance crystal units below 16 KC, but crystal units having
characteristics similar to those presented in Table 9-8 for the range from 1 to
16 KC are obtainable.
Comparison of the characteristics presented in Table 9-8 with those previously given for the 0.8 to 20 MC range shows that in the 90 to 500 KC range
the crystal unit impedance levels are increased by roughly one order of magnitude and the dissipation rating reduced by a factor of 5 relative to those in the
0.8 to 2 MC range. And below 100 KCthe relative impedance levels are in. creased by about 2 orders of magnitude while the dissipation rating is comparably
467
en
00
16
100
200
250
860
500
500
-40 to +70
-40 to +70
-40 to +70
-40 to +70
-30to+75
-40 to +85
-55 to +90
Temperature
Range
(0C)
0.015
0.012
0.01
0.02
0.01
0.01
0.015
(%)
70
70
70
80
to
to
to
to
*Special Applications
*80 - 200
90 - 250
200 - 500
*500
80
80
80
90
0.002
0.003
0.002
0.001
1
16
*80
90
*80
*200
200
Frequency
Range
(KC)
5 to 6
4.5 and 5
5.3 to 8.5
3
200
110 to 90
5 to 6
5 and 5.5
3
5.3 to 8.5
5.3 to 8.5
Equivalent
Resistance
(Kilohms)
2
2
2
0.5
0.01
0.1
2
2
2
2
2
Dissipation
Rating
(MW)
32
32
20
32
20
20
32
20
45
20
20
Loading
Capacitance
(PF)
HC-13/U
HC-21/U
HC-13/U
HC-16/U
HC-6/U
HC-6/U
CR-38A/U
CR-15B/U
CR-37A/U
CR-43/U
CR..:.46A/U
CR-63A/U
HC-21/U
HC-13/U
HC-6/U
HC-6/u
---
---
CR-29A/U
CR-42A/U
CR-47A/U
CR-57/U
Crystal
Holder
Type
Crystal
Unit
Type
Overall
Frequency
Tolerance
TABLE 9-8.
decreased. This in general means that the permissible 1T network input signal
voltage is comparable to that applying in the 0.8 to 20 MCrange.
The range of values of the ratio Xe/Remax is also comparable to that
applying in the 0.8 to 20 MC range, although somewhat wider, ranging from 40
to 2.5 in the frequency range of 1 to 16 KC (assuming C L == 20 PF), 4.5 to 0.89
in the 16 to 100 KC range, and 18 to 1. 9 in the 90 to 500 KC range.
Judging from scattered measurements, the sensitivity of the anti-resonance frequency to percentage changes in the loading capacitance value is decreased by a factor of 2. This, and the wider crystal unit tolerance,should permit some relaxation of the permissible relative values of CM and C S ' all other
things being equal. However, the relative value of C L to C pg is decreased,
which will tend to increase the effect of changes in CM, offsetting these beneficial effects. It appears likely, therefore, that the 1T network proportional
values used in tl~e basic approach in the 0.8 to 20 MC range are probably suitable
in this range.
In certain frequency ranges the ratio of Xe/Re max is less than 3, and
the feedback network input resistance then falls below 1.33 R, in the worst case
approaching a value of R. When Xe/Re max is less than 3, the oscillator load
should therefore be calculated using this latter value.
The 1T network will also frequently be operating under output phase angle
limiting conditions rather than crystal unit loading conditions, and calculations
of Rg based on both Equations (9-16) and (9-18) should be made and the highest
value selected.
Three partial design calculations are presented for what- appear to be the
worst conditions. These indicate that amplifier voltage gains of 24 to 28 will be
necessary at these particular frequencies. In the two lower frequency examples,
it is also necessary to limit the plate signal voltage to approximately 7 VRMS
for a worst-case design. It should be practicable to achieve both the voltage
gain and required limiting by using, say, a 12AT7 tube at a DC plate voltage level
of perhaps 80 V and at a current level of less than 1 MA.
The following calculations are in similar form to those presented for the
basic design approach. Values of KA , RL,and X CT are derived from the plots
of Figure 9-7.
469
9-30.
=
For
500 K,
CMAX = 10 UW, C L = 20 PF
X
e
R e max
2.5
_
X Leff
0.2 X e - lOOK, C s = 100 PF, R
= 2,
emax
XCS
400 K, K A = 4.3, AV
X Leff
Rg
9-31.
600 K, X
-1
10.7VRMS, V omax
= 375 K, C T
CT
7VRMS,
27 PF, Required G
24.
0.1 MW, C L
20 PF, X e
100 K,
= 1.
For
100 PF . X Leff
0.8,
XCs = 0.2 X e = 20 K, C s =
, R e max .
X Leff = 80 K, K A = 4.9, A -1 = 19.6, R = 160 K, R FB
V
Vomax
:::::0
7 VRMS, Rg
120 K, X
CT
:::::0
160 K,
51 K,
39 PF,Required G V = 28.
9-32.
For
17 ~6, R = 60 K, R FB
V omax
:::::0
60 K, Vomax = 23 VRMS,
14 VRMS, Rg ~ 19 K, X
CT
Required GV = 25.
470
:::::0
K A = 4.4,
11.6 K, C T
28 PF,
SECTION 10
BIBLIOGRAPHY
Oscillators
Buchanan, J. P., Handbook of Piezoelectric Crystals for Radio Equipment Designers; WADC Technical Report 56-156, Philco Corp.
Hafner, E., "Analysis and Design of Crystal Oscillators"; TR-2474,
USAEL, Ft. Monmouth, N. J.; May 1964
McSpadden, W., Transistor Crystal Oscillator Circuitry, Final Report,
Contract No. DA-36-039-SC-72837, Motorola Inc.
Stewart, J. L., "Parallel-Network Oscillators"; Proc. IRE, Vol. 43,
. pp. 589-595; May, 1955.
Sulzer, P. G., "High-Stability Bridge-Balancing Oscillators"; Proc.
IRE, Vol. 43, pp. 701-707; June, 1955.
Warner, A. W., "High-Frequency Crystal Units for Primary Frequency
Standards"; Proc. mE, Vol. 40, pp. 1030-1032; September, 1952.
Warner, A. W., "High-Frequency Crystal Units for Primary Frequency
Standards"; Proc. IRE, Vol. 42, p. 1452; September, 1954.
Talekar, V. L., Unified Treatment of Common Feedback Oscillators;
Journal of Electronics and Control, Vol. 12, No.5, p. 433-440; 5 May 1962.
Bangert, R. H., Frequency Temperature Compensation Techniques for
Quartz Crystal Oscillators; Final Report, Contract No. DA36-039-SC-90782,
Bendix Corporation (Also further reports under Contract No. DA36-039-AMC02282 (E)).
Gruen, H. E. and Plait, A. 0., A Study of Crystal Oscillator Circuits,
Final. Report, Signal Corps Contract No. DA36-039-SC-64609, Armour Research
Foundation.
Anderson, F. B., "Seven-League Oscillator"; Proc. IRE, Vol. 39,
pp. 881-890; August, 1951.
Bechmann, R., "Improved High-Precision Quartz Oscillators Using
Parallel Field Excitation"; Proc. IRE, Vol. 48, pp. 367-368; May, 1960.
471
472
Lea,N., "A Quartz Servo Oscillator"; Proc. IRE, Vol. 46, pp. 18351841; November,1958.
Makow, D. M., "Novel Circuit for a Stable Variable Frequency Oscillator"; Proc. IRE, Vol. 44, p. 1031; August, 1956.
Pettit, J. M., "Ultra-High-Frequency Triode Oscillator Using a SeriesTuned CircuW'; Proc. IRE, Vol. 38, p. 633; June, 1950.
Post, E. J. and Pit, H. F., "Alternate Ways in the Analysis of a Feedback Oscillator and its Applications"; Proc. IRE, Vol~ 39, pp. 169-173;
February, 1951.
Reich, H. J., "The Use of Admittance Diagrams in Oscillator Analysis";
Proc. IRE, Vol. 41, pp. 522-528; April, 1953.
Reich, H. J., "Cathode-Follower-Coupled Phase-Shift OSCillator";
Proc. IRE, Vol. 43, p. 229; February, 1955.
Sann, Klaus H., "Phase Stability of Oscillators"; Proc. IRE, Vol. 49,
pp. 527-528; February, 1961.
Shaull, J. M. and Shoaf, J. H., "Precision Quartz Resonator Frequency
Standard"; Proc. IRE, Vol. 42, pp. 1300-1306; August, 1954.
Sherman, J. H., Jr., "Designing Crystal-Controlled Oscillator Circuits";
Proc. IRE, Vol. 43, p. 1531; October, 1955.
Spears, R. A., "Crystal Oscillator (thermal compensation)"; British
IRE Journal, Vol. 18, pp. 613-620; October, 1958.
Quartz Crystal Parameters
473
Bechmann, R., "Frequency-Temperature-Angle Characteristics of ATType Resonators Made of Natural and Synthetic Quartz "; Proc. IRE, Vol. 44,
pp. 1600-1607; November, 1956.
Balloto, A., "The Effect of Load Capacitors on the Frequency of Quartz
Crystals"; USAEL, Ft. Monmouth, N. J.; February, 1965.
Bechmann, R., "The Linear Piezoelectric Equations of State"; Post
Office Engineering Department (Great Britain), Res earch Report No. 13465
(CRB Ref. No. 53/1999); May 14, 1953.
Bechmann, R. and Ayers, S., "Mechanical and Electrical Behaviour of
Piezoelectric Crystals "; Post Office Engineering Department (Great Britain),
Research Report No. 13772 (CRB Ref. No. 54/1253); October 9, 1953.
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