Lecture21 Multistage Amplifiers

EE105 Fall 2014
Microelectronic Devices and Circuits

Prof. Ming C. Wu
[email protected]
511 Sutardja Dai Hall (SDH)
Lecture21-Multistage Amplifiers
Terminal Gain and I/O Resistances of BJT Amplifiers

Common Emitter (CE)
AV ,t =
Common Collector (CC)
gm RL
1+ gm RE
AV ,t =
RL
1
+ RL
gm
Ri = r + ( +1)RE
Ro = "#ro (1+ gm RE )$%
Ri = r + ( +1)RL
AI,t =
Ro =
Without degeneration:
Simply set RE = 0
r + Rth
1 Rth
+
1+
gm
Common Base (CB)
AV ,t = gm RL
1
gm
Ro = !"ro (1+ gm RE )#$
Ri =
AI,t 1
AI,t = +1
For the gain, Ri, Ro of the whole amplifier, you need to include voltage/
current dividers at input and output stages
Terminal Gain and I/O Resistances of MOS Amplifiers

Common Source (CS)
AV ,t =
Common Drain (CD)
gm RL
1+ gm RS
AV ,t =
Ri =
Ro = #$ro (1+ gm RE )%&
Ri =
AI,t =
Ro =
Common Gate (CG)
RL
1
+ RL
gm
AV ,t = gm RL
1
gm
Ro = !"ro (1+ gm RE )#$
Ri =
1
gm
AI,t 1
AI,t =
Without degeneration:
Simply set RS = 0
For the gain, Ri, Ro of the whole amplifier, you need to include voltage/
current dividers at input and output stages
Summary of Single-Transistor Amplifiers

BJT
Ideal
Voltage
Amplifiers
Common
Emitter
Common
Emitter
with Deg.
Common
Collector
Common
Base
Ri
Moderate
Large
Large
Small
Ro
Large
Very Large Small
Large
AV
Large
Moderate
~1
Large
Small
Moderate
Large
Large
Common
Source
Common
Source
with Deg.
Common
Drain
Common
Gate
fH
MOS
Ideal
Voltage
Amplifiers
Ri
Very Large Very Large Large
Small
Ro
Large
Very Large Small
Large
AV
Moderate
Small
~1
Moderate
fH
Small
Moderate
Large
Large
Need for Multistage Amplifiers

Typical spec for a general purpose operational amplifier
Input resistance ~ 1M
Output resistance ~ 100
Voltage gain ~ 100,000
No single transistor amplifier can satisfy the spec
Cascading multiple stages of amplifiers to meet the spec
Usually
An input stage to provide required input resistance
A middle stage(s) to provide gain
An output stage to provide required output resistance
It is important to note that the input resistance of the follow
-on stage becomes the load of the previous stage
A 3-Stage ac-coupled Amplifier Circuit
MOSFET M1operating in the C-S configuration provides high input

resistance and moderate voltage gain.
BJT Q2 in a C-E configuration, the second stage, provides high
gain.
BJT Q3, an emitter-follower gives low output resistance and buffers
the high gain stage from the relatively low value of load resistance.
A 3-Stage ac-coupled Amplifier Circuit
Input and output of overall amplifier is ac-coupled through capacitors C1 and C6.
Bypass capacitors C2 and C4 are used to get maximum voltage gain from the two
inverting amplifiers.
Interstage coupling capacitors C3 and C5 transfer ac signals between amplifiers but
provide isolation at dc and prevent Q-points of the transistors from being affected.
In the ac equivalent circuit, bias resistors are replaced by RB2 = R1||R2 and RB3 = R3||R4
dc Equivalent Circuit
Transistor Parameters
M1 : Kn = 10 mA/V 2 , VTN = 2 V , = 0.02V 1
Q2 : F = 150, VA = 80V , VBE = 0.7V
Q3 : F = 80, VA = 60V , VBE = 0.7V
Q - Points
M1 : (5.00 mA, 10.9 V)
Q2 : (1.57 mA, 5.09 V)
At dc, the capacitors isolate each

individual transistor stage from the
others. Thus, the bias point for each
transistor may be found using the
single transistor analysis methods
already discussed.
Q3 : (1.99 mA, 8.36 V)

Small - Signal Parameters
M1 : g m1 = 10.0 mS, ro1 = 12.2 k
Q2 : g m2 = 62.8 mS, r 2 = 2.39 k,
ro2 = 54.2 k
Q3 : g m3 = 79.6 mS, r 3 = 1.00 k,
ro3 = 34.4 k
ac and Small-Signal Equivalent Circuits
ac Equivalent
Small-signal Equivalent
Input Resistance and Voltage Gain

Av = Avt3 Avt2 Avt1
Rin
RI + Rin
Avt1 =
v2
= g m1 RL1 = 0.01S (0.478k) = 4.78
v1
v1 = vi
Rin
1M
= vi
= 0.990vi
RI + Rin
10k + 1M
RL2 = RI 2 Rin3 = RI 2
RI1 = 620 17.2k = 598

RI 2 = 4.7k 51.8 = 4.31k
[r + (
3
o3
+ 1) RL3 =3.54k
Avt2 =
v3
= g m2 RL2 = 62.8S (3.54k) = 222
v2
Avt3 =
( o3 + 1) RL3 = 0.950
vo
=
v3 r 3 + ( o3 + 1) RL3
RI 3 = 3.3k 250 = 232

RL1 = RI1 Rin2 = 598 r 2 =598 2390 = 478
Rin = RG = 1M
Av = Avt3 Avt2 Avt1

10
RG
= +998
RI + RG
Output Resistance
Ro3 =
r + Rth
1 Rth
+
1+
gm
Rth = RI 2 || ro2 = 4.31k || 54.2k = 4k

1
4k
+
= 12.6 + 50 = 62.6
79.6mS 80
= RE 3 || Ro3 = 3.3k || 62.6 = 61.3
Ro3 =
Rout
11
Current and Power Gain
The input signal current delivered to the amplifier

from source vi is
ii =
vi
= 9.90x10 7 vi
RI + Rin
Current Gain:
Ai =
io
= 4.03x10 6 (132 dB)
ii
Voltage Gain:
Av =
vo
= 9.98x10 2 (60 dB)
vi
and the signal current delivered to the load resistor is

io =
Power Gain:
vo
Av
998vi
= v i =
= 3.99vi
RL 250 250
AP =
Po voio
=
= Av Ai = 4.02x10 9 (96 dB)
Pi
viii
12
Input and Output Signal Range
For the first stage: v1 0.2 (VGS VTN ) vi
0.2 (1+ 2 ) V
= 0.202 V
0.99
For the second stage: vbe2 = v2 = Av1v1 5mV

v1
For the third stage: vbe3
vi
Overall:
5mV 5mV
1.05mV
=
= 1.05mV vi
= 1.06 mV
Av1
4.78
0.99
A A ( 0.990vi )
v3
= v1 v2
5mV
1+ gm3 RL3
1+ gm3 RL3
1+ gm3 RL3
5mV = 92.7 V
Av1 Av2 ( 0.990 )
vi min ( 202mV,1.06mV, 92.7V ) = 92.7V

vo Av ( 92.7V ) = 998 ( 92.7V ) = 92.5 mV
13
SPICE Simulation Circuit
14
SPICE Simulation Results
Av = 1000
fL = 500 Hz
fH = 500 kHz
15

vin = 100 V
16

vin = 750 V
17
Short-Circuit Time Constant Estimate for fL

An estimate for the lower cutoff frequency for an amplifier
with multiple coupling and bypass capacitors is given by the
sum of the reciprocals of the "short-circuit" time constants:
1 n 1
fL
2 i=1 RiS Ci
where RiS is the resistance at the terminals of the ith capacitor
with all the other capacitors shorted.
18
C1: R1S = RI + RG = 1.01 M

C2 : R2S = RS1 RiS1 = RS1
1
1
= 200
= 66.7
gm1
0.01S
C3 : R3S = RD1 + RI1 RiB2 = RD1 + RI1 r 2 = 620 +17.2k 2.39k = 2.72 k
2.39k +17.2k 0.620k
r 2 + Rth2
= 1.5k
= 19.2
o2 +1
151
C4 : R4S = RE 2 RiE 2 = RE 2
C5 : R5S = RC + RI 2 RiB3 = RL + RI 2 r 3 (1+ gm3 RL3 )

R5S = 4.7k + 51.8k 1.0k"#1+ 0.0796S ( 232)$% = 18.9 k
C6 : R6S = RL + RE 3 RiE 3 = RL + RE 3
R6S = 250 + 3.3k
r 3 + Rth3
o3 +1
1.0k + 51.8k 4.7k

= 315
81
19

fL
1
1
1
1
1
[
+
+
+
2 1.01M ( 22 F ) 66.7 ( 22 F ) 2.72k ( 22 F ) 19.2 ( 22 F )
+
1
1
+
] = 511 Hz
18.9k ( 22 F ) 315 ( 22 F )
fL
fH
20
10

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EE105 Fall 2014

Microelectronic Devices and Circuits

Terminal Gain and I/O Resistances of BJT Amplifiers

Common Collector (CC)

Common Base (CB)

Terminal Gain and I/O Resistances of MOS Amplifiers

Common Drain (CD)

Common Gate (CG)

Summary of Single-Transistor Amplifiers

Very Large Small

Very Large Very Large Large

Very Large Small

Need for Multistage Amplifiers

A 3-Stage ac-coupled Amplifier Circuit

MOSFET M1operating in the C-S configuration provides high input

A 3-Stage ac-coupled Amplifier Circuit

At dc, the capacitors isolate each

Q3 : (1.99 mA, 8.36 V)

ac and Small-Signal Equivalent Circuits

Input Resistance and Voltage Gain

RI1 = 620 17.2k = 598

RI 3 = 3.3k 250 = 232

Av = Avt3 Avt2 Avt1

Rth = RI 2 || ro2 = 4.31k || 54.2k = 4k

Current and Power Gain

The input signal current delivered to the amplifier

and the signal current delivered to the load resistor is

Input and Output Signal Range

For the first stage: v1 0.2 (VGS VTN ) vi

For the second stage: vbe2 = v2 = Av1v1 5mV

vi min ( 202mV,1.06mV, 92.7V ) = 92.7V

SPICE Simulation Circuit

SPICE Simulation Results

SPICE Simulation Results

SPICE Simulation Results

Short-Circuit Time Constant Estimate for fL

Short-Circuit Time Constant Estimate for fL

C1: R1S = RI + RG = 1.01 M

C5 : R5S = RC + RI 2 RiB3 = RL + RI 2 r 3 (1+ gm3 RL3 )

1.0k + 51.8k 4.7k

Short-Circuit Time Constant Estimate for fL

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