Tda8359 PDF
Tda8359 PDF
Tda8359 PDF
DATA SHEET
TDA8359J
Full bridge vertical deflection output
circuit in LVDMOS
Product specification
Supersedes data of 13 March 2000
Filed under Integrated Circuits, IC02
2002 Jan 21
Philips Semiconductors
Product specification
TDA8359J
FEATURES
GENERAL DESCRIPTION
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VP
supply voltage
7.5
12
18
VFB
2 VP 45
66
Iq(P)(av)
during scan
10
15
mA
Iq(FB)(av)
during scan
10
mA
Ptot
10
1000
1500
mV
Io(p-p)
3.2
1.8
Flyback switch
Io(peak)
t 1.5 ms
storage temperature
55
+150
Tamb
ambient temperature
25
+85
Tj
junction temperature
150
ORDERING INFORMATION
TYPE
NUMBER
TDA8359J
2002 Jan 21
PACKAGE
NAME
DBS9P
DESCRIPTION
plastic DIL-bent-SIL power package; 9 leads (lead length
12/11 mm); exposed die pad
VERSION
SOT523-1
Philips Semiconductors
Product specification
TDA8359J
BLOCK DIAGRAM
handbook, full pagewidth
GUARD
VP
VFB
GUARD
CIRCUIT
M5
D2
D3
M2
Vi(p-p)
D1
VI(bias)
7 OUTA
INA 1
M4
Vi(p-p)
INB
VI(bias)
INPUT
AND
FEEDBACK
CIRCUIT
FEEDB
M1
OUTB
M3
TDA8359J
5
MGL862
GND
PINNING
SYMBOL
PIN
DESCRIPTION
handbook, halfpage
INA
INB
VP
OUTB
ground
GND
VFB
output A
OUTA
GUARD
guard output
GUARD
FEEDB
feedback input
FEEDB
INA
input A
INB
input B
VP
supply voltage
OUTB
output B
GND
VFB
OUTA
TDA8359J
MGL863
2002 Jan 21
Philips Semiconductors
Product specification
TDA8359J
FUNCTIONAL DESCRIPTION
Guard circuit
Vi(dif)(p-p) = Io(p-p) RM
Vi(dif)(p-p) = VINA VINB
The output current should not exceed 3.2 A (p-p) and is
determined by the value of RM and RCV. The allowable
input voltage range is 100 mV to 1.6 V for each input. The
formula given does not include internal bondwire
resistances. Depending on the values of RM and the
internal bondwire resistance (typical value of 50 m) the
actual value of the current in the deflection coil will be
approximately 5% lower than calculated.
Flyback supply
( V FB V loss ( FB ) V Z ) R D1 R CV1
R CMP = ----------------------------------------------------------------------------------------------------------( V FB V loss ( FB ) I coil ( peak ) R coil ) R M
where:
Vloss(FB) is the voltage loss between pins VFB and OUTA
at flyback
Rcoil is the deflection coil resistance
VZ is the voltage of zener diode D4.
Protection
The output circuit contains protection circuits for:
Too high die temperature
Overvoltage of output A.
2002 Jan 21
Philips Semiconductors
Product specification
TDA8359J
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VP
supply voltage
18
VFB
68
Vn
DC voltage
68
pin OUTB
VP
0.5
VP
pin OUTA
In
note 1
DC current
pins OUTA and OUTB
3.2
1.8
20
+20
mA
+200
mA
mA
latch-up current
500
+500
5000
+5000
Ptot
10
Tstg
storage temperature
55
+150
Tamb
ambient temperature
25
+85
Tj
junction temperature
150
note 5
Notes
1. When the voltage at pin OUTA supersedes 70 V the circuit will limit the voltage.
2. At Tj(max).
3. Equivalent to 200 pF capacitance discharge through a 0 resistor.
4. Equivalent to 100 pF capacitance discharge through a 1.5 k resistor.
5. Internally limited by thermal protection at Tj = 170 C.
THERMAL CHARACTERISTICS
In accordance with IEC 60747-1.
SYMBOL
PARAMETER
Rth(j-c)
Rth(j-a)
2002 Jan 21
CONDITIONS
in free air
MAX.
UNIT
K/W
65
K/W
Philips Semiconductors
Product specification
TDA8359J
CHARACTERISTICS
VP = 12 V; VFB = 45 V; fvert = 50 Hz; VI(bias) = 880 mV; Tamb = 25 C; measured in test circuit of Fig.3; unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VP
7.5
12
18
VFB
note 1
2 VP
45
66
Iq(P)(av)
during scan
10
15
mA
Iq(P)
no signal; no load
45
75
mA
Iq(FB)(av)
during scan
10
mA
1000
1500
mV
Inputs A and B
Vi(p-p)
note 2
VI(bias)
note 2
100
880
1600
mV
II(bias)
source
25
35
Io = 1.1 A
4.5
Io = 1.6 A
6.6
Io = 1.1 A
3.3
Io = 1.6 A
4.8
3.2
adjacent blocks
VI(bias) = 200 mV
15
mV
VI(bias) = 1 V
Outputs A and B
Vloss(1)
Vloss(2)
Io(p-p)
output current
(peak-to-peak value)
LE
linearity error
Voffset
offset voltage
note 3
note 4
20
mV
Voffset(T)
40
V/K
VO
DC output voltage
Vi(dif) = 0 V
0.5 VP
Gv(ol)
notes 7 and 8
60
dB
f 3dB(h)
open-loop
kHz
Gv
voltage gain
note 9
Gv(T)
104
K1
PSRR
80
90
dB
2002 Jan 21
note 10
Philips Semiconductors
Product specification
PARAMETER
TDA8359J
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Flyback switch
Io(peak)
t 1.5 ms
Vloss(FB)
note 11
1.8
Io = 1.1 A
7.5
8.5
Io = 1.6 A
Guard circuit
VO(grd)
IO(grd) = 100 A
VO(grd)(max)
18
IO(grd)
output current
10
2.5
mA
Notes
1. To limit VOUTA to 68 V, VFB must be 66 V due to the voltage drop of the internal flyback diode between pins OUTA
and VFB at the first part of the flyback.
2. Allowable input range for both inputs: VI(bias) + Vi < 1600 mV and VI(bias) Vi > 100 mV.
3. This value specifies the sum of the voltage losses of the internal current paths between pins VP and OUTA, and
between pins OUTB and GND. Specified for Tj = 125 C. The temperature coefficient for Vloss(1) is a positive value.
4. This value specifies the sum of the voltage losses of the internal current paths between pins VP and OUTB, and
between pins OUTA and GND. Specified for Tj = 125 C. The temperature coefficient for Vloss(2) is a positive value.
5. The linearity error is measured for a linear input signal without S-correction and is based on the on screen
measurement principle. This method is defined as follows. The output signal is divided in 22 successive equal time
parts. The 1st and 22nd parts are ignored, and the remaining 20 parts form 10 successive blocks k. A block consists
of two successive parts. The voltage amplitudes are measured across RM, starting at k = 1 and ending at k = 10,
where Vk and Vk+1 are the measured voltages of two successive blocks. Vmin, Vmax and Vavg are the minimum,
maximum and average voltages respectively. The linearity errors are defined as:
Vk Vk + 1
a) LE = -------------------------- 100 % (adjacent blocks)
V avg
V max V min
b) LE = ------------------------------- 100 % (non adjacent blocks)
V avg
6. The linearity errors are specified for a minimum input voltage of 300 mV (p-p). Lower input voltages lead to voltage
dependent S-distortion in the input stage.
7.
V OUTA V OUTB
G v ( ol ) = ------------------------------------------V FEEDB V OUTB
V FEEDB V OUTB
G v = ------------------------------------------V INA V INB
10. VP(ripple) = 500 mV (RMS value); 50 Hz < fP(ripple) < 1 kHz; measured across RM.
11. This value specifies the internal voltage loss of the current path between pins VFB and OUTA.
2002 Jan 21
Philips Semiconductors
Product specification
TDA8359J
APPLICATION INFORMATION
VP
RGRD
4.7 k
VFB
GUARD
VP
VFB
GUARD
CIRCUIT
Vi(p-p)
C1
100 nF
C2
100 nF
M5
D2
D3
VI(bias)
M2
0
D1
I I(bias)
7 OUTA
INA 1
RCV1
2.2 k
(1%)
I i(dif)
M4
9
INPUT
AND
FEEDBACK
CIRCUIT
RL
3.2
2.7 k
I I(bias)
CM
10 nF
M1
INB 2
RCV2
2.2 k
(1%)
M3
Vi(p-p)
TDA8359J
VI(bias)
5
GND
2002 Jan 21
FEEDB
RS
MGL864
OUTB
RM
0.5
This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in
_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in
white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
VP
VFB
GUARD
CIRCUIT
Vi(p-p)
C3
100 nF
M5
D2
VI(bias)
C4
100 nF
VFB = 30 V
C2
220 F
(25 V)
D4
(14 V)
D3
RCMP
680 k
M2
0
D1
7 OUTA
INA 1
C6
2.2 nF
RCV1
2.2 k
(1%)
TV SIGNAL
PROCESSOR
M4
INB 2
C7
2.2 nF
9 FEEDB
INPUT
AND
FEEDBACK
CIRCUIT
RCV2
2.2 k
(1%)
2.7 k
deflection
coil
5 mH
6
(W66ESF)
RM
0.5
M1
CD
47 nF
RD2
1.5
4 OUTB
M3
TDA8359J
Vi(p-p)
VI(bias)
RS
RD1
270
Philips Semiconductors
GUARD
8
C1
47 F
(100 V)
2002 Jan 21
VP = 14 V
RGRD
12 k
5
GND
MBL364
Product specification
TDA8359J
fvert = 50 Hz; tFB = 640 s; II(bias) = 400 A; Ii(p-p) = 290 A; Io(p-p) = 2.4 A.
Philips Semiconductors
Product specification
TDA8359J
RM calculation
V i ( dif ) ( p p )
R M = --------------------------Io ( p p )
Ii1(p-p)
handbook, halfpage
II(bias)
0
INA
C6
2.2 nF
RCV1
2.2 k
TV SIGNAL
PROCESSOR
INB
C7
2.2 nF
RCV2
2.2 k
Ii2(p-p)
MBL366
II(bias)
0
EXAMPLE
Measured or given values: II(bias) = 400 A; Ii1(p-p) = Ii2(p-p)=
290 A.
The differential input voltage will be:
V i ( dif ) ( p p ) = 290A 2.2k ( 290A 2.2k ) = 1.27V
2002 Jan 21
10
Philips Semiconductors
Product specification
Table 2
Calculated values
SYMBOL
L coil
x = -------------------------R coil + R M
The flyback supply voltage calculated this way is
approximately 5% to 10% higher than required.
UNIT
V
7.8
0.02
0.000641
VFB
Psup
PL
30
8.91
V
W
3.74
Ptot
5.17
tvert
x
where:
VALUE
14
VP
RM + Rcoil (hot)
R coil + R M
V FB = I coil ( p p ) ------------------------- t FB x
1e
Heatsink calculation
The value of the heatsink can be calculated in a standard
way with a method based on average temperatures. The
required thermal resistance of the heatsink is determined
by the maximum die temperature of 150 C. In general we
recommend to design for an average die temperature
not exceeding 130 C.
EXAMPLE
I coil ( peak )
P sup = V P ----------------------- + V P 0.015 [A] + 0.3 [W]
2
( I coil ( peak ) )
P L = -------------------------------- ( R coil + R M )
3
120 40
R th ( h a ) = ---------------------- ( 4 + 2 ) = 7 K/W
6
The heatsink temperature will be:
Example
Table 1
TDA8359J
Application values
SYMBOL
Icoil(peak)
VALUE
UNIT
Icoil(p-p)
1.2
2.4
A
A
Lcoil
Rcoil
RM
5
6
0.6
mH
fvert
tFB
50
640
Hz
s
2002 Jan 21
11
Philips Semiconductors
Product specification
TDA8359J
SYMBOL
EQUIVALENT CIRCUIT
INA
300
MBL100
INB
300
MBL102
VP
OUTB
GND
VFB
OUTA
4
MGS805
2002 Jan 21
12
Philips Semiconductors
Product specification
SYMBOL
TDA8359J
EQUIVALENT CIRCUIT
GUARD
300
MBL103
300
FEEDB
MBL101
2002 Jan 21
13
Philips Semiconductors
Product specification
TDA8359J
PACKAGE OUTLINE
DBS9P: plastic DIL-bent-SIL power package; 9 leads (lead length 12/11 mm); exposed die pad
SOT523-1
q1
non-concave
x
Eh
Dh
D
D1
A2
q2
L2
L3
L1
9
e1
Z
e
w M
bp
0
5
scale
10 mm
v M
c
e2
e1
e2
L1
L2
L3
6.2
14.7
3.0 12.4 11.4 6.7
3.5
3.5 2.54 1.27 5.08
5.8
14.3
2.0 11.0 10.0 5.5
4.5
3.7
2.8
q1
q2
v
0.8
0.3 0.02
Z(1)
1.65
1.10
Notes
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
2. Plastic surface within circle area D1 may protrude 0.04 mm maximum.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
98-11-12
00-07-03
SOT523-1
2002 Jan 21
EUROPEAN
PROJECTION
14
Philips Semiconductors
Product specification
TDA8359J
SOLDERING
Introduction to soldering through-hole mount
packages
Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 C, contact may be up to 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods
SOLDERING METHOD
PACKAGE
DIPPING
DBS, DIP, HDIP, SDIP, SIL
WAVE
suitable(1)
suitable
Note
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
2002 Jan 21
15
Philips Semiconductors
Product specification
TDA8359J
PRODUCT
STATUS(2)
DEFINITIONS
Objective data
Development
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Qualification
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS
DISCLAIMERS
2002 Jan 21
16
Philips Semiconductors
Product specification
2002 Jan 21
17
TDA8359J
Philips Semiconductors
Product specification
2002 Jan 21
18
TDA8359J
Philips Semiconductors
Product specification
2002 Jan 21
19
TDA8359J
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: [email protected].
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
753504/25/02/pp20
Jan 21