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GE Medical Systems STENOSCOP 2 STENOSCOP Plus
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SUMMARY
21 STENOSCOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1
22 IMAGER 16 OR 22 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 43
23 MEMORIES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 71
31 GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1
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REVISION HISTORY
Summary
i to ii 3
Revision history
iii to iv 3
Chapter 1
Table of contents
1 . i to 1 . ii 3
1 . 1 to 1 . 2 3
Chapter 2
Table of contents
2 . i to 2 . iv 3
2 . 1 to 2 . 122 3
Chapter 3
Table of contents
3 . i to 3 . iv 3
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TABLE OF CONTENTS
None.
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MD10 MDn
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CHAPTER 2 THEORY
TABLE OF CONTENTS
21 STENOSCOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1
!# & )% !
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!# # " )%* &
!
' "$! $! #! !
!# # #! &
!
!# # #! &
!
! $ & # !
!#
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!
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22 IMAGER 16 OR 22 CCD FOR STENOSCOP 2 6000/9000 . . . . . . . . . . . . . . . . . . . . . 2 . 43
221 PRESENTATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 44
222 II TUBE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 49
223 EHV POWER SUPPLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 51
224 OPTICAL SYSTEM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 52
225 CCD MODULE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 53
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"#%!
234 MDA MEMORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 94
%#!&%!
!& $%!
% $%!
24 MONITOR DISTAR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 109
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2 THEORY
21 STENOSCOP
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Module 8
Module 2
Module 7 Module 3
Module 6
Module 4
Module 5
Module 1
Module 9
9TR1
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211 GENERALITIES
2111 IDENTIFICATION
The electronic circuits in the mobile intraoperative radiology system are grouped together in
the modules identified as follows:
BP = Pushbutton
C = Capacitor
D = CR = Diode, thyristor or rectifier bridge
DS = Light
E = Test point
F = Fuse
G = Logic circuit
K = Relay
L = Coil
M = Motor
A = OP = Operational amplifier, FET switch voltage regulator
Q = Transistor
R = Resistor
S = SW = Switch
B = TB = Terminal board
T = TR = Transformer
W = Jumper
PL = Plug
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The SEXP signal is generated on PWB 3A19 commande SCR2 output a18 schematic
reference 35B.
3A12.a14 21B
In front of 3A12.a14 terminal, SEXP signal has the index of the terminal where the signal is
generated : 3A19.a1835B
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The general power supply comprises the transformers 9TR1 and 5TR1 which supply the
voltage needed by the various subassemblies of the HF mobile unit.
The secundary winding 67 supplies the 27V for memory (DR4/MD10) and Xray lamp.
The secundary winding 2123 supply Carm up/down motion circuit and Imager
system (module 8).
POWER ON SEQUENCE
The system is switched ON by pressing 9Sm1.
When 9Sm1 is depressed, 9TR1 transformer is supply through resistor 9R1 and 9R2 (current
limiter).
9K1 relay is energised through 9F2 fuse, safety plug bridge 9PL13233, delay system (M)
and 9A1.F31 fuse.
After the delay, 9K1 switch ON and supply 9TR1 through its contacts.
CONNECTOR SAFETY.
If the plug 9PL1 is removed , 9K1 relay is deenergised.
The contact 2122 (3C) of 9K1 supplies 9A1.K26. The contact of 9A1.K26 apply 220V on
the auxiliary coil of 9Sm1 which opens its contacts.
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ILLUSTRATION 11 ILLUSTRATION 12
DIAGRAM OF THE MODULATOR SIMPLIFIED DIAGRAM
CR1 CR1
C2 CR2 CR2
L1 L1
Vz
1 2
VA
1 Vc
L3 L3
C3 CR5 C CR5
CR6 2 CR6
1
+
Cf RL Cf RL
ILLUSTRATION 13
THYRISTOR VOLTAGE AND CURRENT CURVES
Vc
ICR6
ICR5
ICR5
t
t0 t1 t2 t3 t4 t5
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THEORY
In alternate operation, capacitors C2 and C3 are in parallel, as they have a common terminal
and the two other terminals are separated by a DC voltage Va.
For a description of operation, (see figure 12), where C is equal to the sum of C2 and C3.
Suppose at the start that capacitance C has a charge voltage Va (0 V at terminal 2 and Va at
terminal 1) and capacitance CF has a charge voltage Vz, which must respect 0 < Vz < Va/2.
The value of CF will be very high in relation to C.
Suppose that the HV transformer ratio is 1 and that Va = 500 V and Vz = 100 V.
At t0, CR6 is made to conduct; capacitor C therefore discharges through the HV transformer
primary, coil L3 and CR6.
Capacitor Cf voltage remains almost constant throughout conductance of CR6.
The polarity of this voltage is therefore positive at terminal 1 and negative at terminal 2.
Capacitor discharge is consinusoidal and corresponds to equation
VC = VZ + (Va Vz) cos t/LC.
At t1 (figure 13), capacitor voltage tends to invert, diode CR5 conducts and keeps voltage
from reaching the capacitor terminals. Through conductance of CR5, voltage Vz is applied
directly to the terminals of coil L3, and since Vz is practically constant, current decrement in
CR6 will be linear.
Vz.Idt
t2
t0
i. e. 1/2 C. Va2
If the power supplied to the secondary is less than that absorbed by charge RL, the voltage
at Cf terminals decrements.
To respect the operating condition 0 < Vz < Va/2, the only way to change the HV is to change
the inverter control pulse rate frequency.
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ILLUSTRATION 14 ILLUSTRATION 15
DIAGRAM OF THE MODULATOR SIMPLIFIED DIAGRAM
CR1 CR1
C2 CR2 CR2
L1 L1
Vz
1 2
VA
1 Vc
L3 L3
C3 CR5 C CR5
CR6 2 CR6
1
+
Cf RL Cf RL
ILLUSTRATION 16
THYRISTOR VOLTAGE AND CURRENT CURVES
Vc
ICR6
ICR5
ICR5
t
t0 t1 t2 t3 t4 t5
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REALISATION:
Capacitance C will be selected so that the inverter can supply its nominal power under
any circumstances.
However, this has a disadvantage: at low consumption levels, inverter control frequency is
low, which generates high residual HV ripple.
To get around this, two groups of capacitances are used, selected as function of the charge.
At low charge, group 4C2 and 4C3 of 2 x 2 F is always selected. If the charge increments,
a second group, 4C1 and 4C4 (2 x 5 F), selected by 4CR4, is added to the first. These two
groups offer the choice between 4 F and 14 F.
CAUTION:
Lamp 4DS1 comes on when the inverter is energized.
If the modulator is deenergized, lamp 4DS1 remains on while the capacitances discharge
into resistor1R3, indicating that the voltage at the terminals of these capacitances is still
dangerously high.
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PRESENTATION
The Xray head consists mainly of the following elements:
D a VHV transformer with its filter and a rectifier circuit
D a filament heating transformer
D an Xray tube
D two heat switches
D overvoltage protection spark gaps.
These components are inside the XRay head and are lubricated in an oil bath.
The assembly also includes divider circuit 6A1 outside the head.
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SAFETY
Spark gaps are provided in the XRay head in order to short circuit the VHV if 6A1.PWB
(Diviseur) is disconnected or if a default of ground continuity appears.
Damages of VHV propagation are so avoided if connexion failure or error of maintenance
operation occurs.
The 6Sa1 switch opens its contact when temperature rises up to 70o C.
SEC BELLOW signal is connected to 3A19 PWB (SCRcontrol) and stops the inverter
operation.
The 6SaTh2 Thermal switch opens its contact when temperature of the XRay head rises
up to 50o C.
The signal TH switch ON the temperature displays on the control console through 3A7
AD/kV PWB and switches over the FLUORO 500W to FLUORO 154 W on 3A9 PWB
consigne kV/mA (except in E.R. mode).
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VHV REGULATION
When selecting the KV data, A114.8 (C) supplies a voltage reference
kV * + (consigne kV * 1) x1.1
to the input of comparator A122.2.
20 20
The signal kV * and KV composite being different, the signal DEM X permits the oscillator
20
to operate.
When the HV increases to reach kV * = KV composite, the A122 switches and the signal
20
DEM X generated is transmitted to the card 3A19 SCR to request the first oscillator
operation cycle stop.
Comparator A102 compares the KV composite and the actual kV
20
A KV therefore appears at the output of the A102.
This is transmitted to the memory A97 when signal PRI is active and after the time
constant 1.1 x R81 x C82 c.a.d. 13 s after a current thyristor stops.
The D kV then supplements the kV *, which results in the reference at the input to A122
20 20
being increased.
There is disequilibrium and the signal DEM X disappears, which authorises the oscillator
to function until the new equality KV composite = kV * ) D kV
20 20
Each reduction in KV composite due to consumption of the tube appears on the memory
C 137 at the input to A102.
This changes the D kV which will be transmitted to the memory between two thyristor
20
conductions.
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OPERATING SAFETY:
Circuit A114.A permanently compares the output of A114.B with the kV reference.
20
In normal operation, the output of amplifier A114.B must always be less than the
kV reference.
20
If a fault in the regulation circuit causes the opposite to occur comparator A114.A flips
and blocks A114.B, i.e. DEM X.
arcing SAFETY:
The output of A312 is connected to A46.3 which detects a sudden VHV variation.
The output of A46 then triggers monostable G32.
The output of G32 sends signal TROU CLQ used by the hysteresis safety of SCR PWB
3A19 and SCR control.
Counter G31 counts to 4 VHV leakages and then sends the INT 4CLQ signal, used to
shutdown the inverter by SCR PWB 3A19.
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Command OX is sent to memory interface PWB 3A1 (in memory option configuration)
if switch S76.A is opened.
If this is the case, command OX returns via PWB 3A1 to command bistable
(G114.AG117.B).
The bistable flips and sends a preset command via amplifier (Q235) and isolating
transformer (TR248), provided that the following conditions exist:
120 kV =1,
INT 4CLQ = 1,
STOP mAs =_ 1,
SEC BELLOW = 1.
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GENERATION OF CLOCK:
The output signal of G128 constitutes the basic clock used in the synchronization of
inverter
operation, i.e. thyristors 4CR1, 4CR6 and the voltage regulation carried out by PWB
3A12.
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TIMER DISPLAY
The reference clock signal PRX CP is supplied by kV/mA PWB 3A12
The 50 Hz frequency is at first divided by 50 (counters G143 and G144), which gives
a 1 Hz signal, input to 4bit counter G158. The output of counter G158 is decoded by
G184 to supply the 7segments display DS15.
After 10 seconds, G158 sends a pulse to G159, counting tenths of seconds. G159 counts
to 6 (corresponding to 1 minute) and sends a pulse to G160, which totalizes minutes.
After 10 minutes, G161 receives a pulse from G160, and totalizes tens of minutes.
Zero reset is by pressing key Sm19 of the mobile system control console. This generates
an active signal to the RESET inputs of the counters.
The purpose of this ABC hysteresis is to make an AUTO kV reference by using the ABD
20
control signal output from the TV camera in order to use the correct kV to obtain an optimum
TV image.
The ABD control signal output from the TV camera is connected to the + input of A82
comparator. The input of A82 is connected to potentiometer R65 (video image reference).
The output of A82, i.e. ABD is connected to A74B through R66 potentiometer (system
gain) and after to an integrator circuit A73, C72 and R60 (phase loop).
A74.B does not permit the ABD to pass unless it greater or lower than a threshold
determined by the hysteresis R67. A121.B.C
When ABD control signal is not present, the system is calculated to provide a kV reference
20
equal to 2V (= 40 kV reference).
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The main purpose of this board is to generate the kV (kilovolt) reference in automatic or
manual mode.
Key Sm49 (hand symbol) on the control console is used to select operating mode.
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Pin 13 of G150 (CLOCK INHIBIT) is held to 1 logic through R80 and inhibits the
counting sequence.
When a PB selection mode is pressed, logic state of G150 output (0V) is applied through
the PB on pin 13 of the counter (CLOCK INHIBIT).
This 0V logic state permits the counting sequence: clock pulses on pin 14 generates
counter evolution until the output corresponding to the pressed BP rises to 1 logic state:
clock INHIBITS input rises to 1 and so inhibits count: the counter is locked on this
position until an other PB is pressed.
The 300 kHz clock needed for G150 to operate is taken from ADC converter G90 on the
same board.
These two clocks are for the operation of the kV/mA reference PWB 3A9. They allow
mA and mAs references to be incremented at two different speeds.
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G122.A pin 1 flips to 1: switching ON of PB Sm35 light and selection of the opening
reference of the camera iris.
The TH signal on G130D.12 pin cancel HIGH DEFINITION FLUORO mode when the
thermal switch of the XRay head opens.
The HLC information is also connected to G66 and G65 EPROM in order to select the
correct kV/mA ratio curve.
The data mA value according to kV value depends of mode selection and safety of the unit:
AUTO FLUORO mode
HIGH DEFINITION FLUORO mode
ER mode (Electronic Radiography)
Thermal safety of the XRay head not actuated (TH)
The AUTO signal (1 logic) is present on Preset input (1) of G90 and G89: G90 and G89 are
transparent and data of G66 are converted to analog form by G99 (DAC) to make up the
FLUORO mA reference.
MANUAL MODE
When mode operation is switched from AUTO mode to MANUAL mode, the last mA
value according to kV value is memorised in G90 and G89 counter: preset input from 1 to
0 logic state.
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The output of G135 and G134 is also connected to G120 and G121 EPROM
through G119.
G121 provides:
information for the displays
logic signal for the selection of high or low value integrator
3 signals min or max values
FC01 : FLUORO minimum mA
value 0,1 mA
FCO : RAD mAs minimum
value 0,16 mAs
FCGR : RAD mAs maximum
value 160 mAs
The data corresponding to this rate operation are compared by G87, G88 with mA bus
(G90G89 outputs counters).
If the two values are equal, counting UP sequence is inhibited and automatic counting
DOWN sequence is automatically operated if mA bus is upper than the limitation.
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REALISATION
Capacitances C3 and C4 are located in module 5 of the mobile system. The +175 V dc
supply is generated by the secondary of 5TR1. Protection is provided by an 8 A fuse.
The control pulses are sent by FILAMENT HEATING PWB 3A26 and are transmitted by
resistor R27.
The positive peaks are detected by CR25 and cause Q21 and Q20 to conduct.
The negative peaks are detected by CR24 and cause Q15 and Q11 to conduct.
Lowvalue resistors R7 and R8 (O.15 ohm), in the transmission circuit of the output
transistors, are used to retrieve the current data in the final stage. This data is used as
reverse feedback by the current limiters on PWB 3A26 and the control circuits of
PWB 3A26.
The output transistors are protected against overvoltage by diodes CR3 and CR14.
SAFETY
Two safety network are provided in order to prevent abnormal operation of tube heating
during +/ 12V power supply variation (switching ON or OFF sequence of the unit or
default on +/ 12V power supply)
V+
Q20
Heating transformer
Control pulses primary
A B
+ +
Q11
C3 C4
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The kV data generated by the ADkV PWB 3A7 on the kV bus is converted to analog
form by circuit G68. This voltage is called kV/20 and is sent to the kV/mA regulation
PWB 3A12.
Two groups, of two 4bit comparators each, monitor of the kV reference on the bus:
one group (G18 and G19) has an input B wired for 40 kV.
The kV bus value is sent to input A. If A < B, comparator output A < B is activated and
used to generate the FC40 signal. This signal then inhibits kV reference decrementation
by ADkV PWB 3A7,
the second group of comparators (G21 and G20) has an input B wired for 110 V.
The kV bus value is sent to input A. If A > B, the comparator output A > B is activated
and is used to generate the FC110 signal.
This signal then inhibits kV reference incrementation by ADkV board 3A7.
The kV bus addresses the kV value decoding memory G67 (EPROM). The four data bits
of G67, 04 to 07, are decoded by G22 (BCD/decimal decoder) to make up the
mA/radiography references for filament heating PWB 3A26.
These references correspond to the 6 mA values allocated to 6 voltage ranges.
kV DISPLAY
G67 transforms the kV bus into two BCD buses (for unit and tens display).
G22 detects the 1 of the 100th and the kV ranges.
mA/mAs DISPLAY
The G120 output is divided into two BCD buses, which assume mA or mAs reference
display according to the mode selection: FLUORO or RAD.
The decimal point (range of displayed value) and upper value of the display are controlled
by G121 output through transistors network according to the mode operation selected:
FLUORO or RAD.
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EXPOSURE PB
The Xray request is performed by 2 PB: 2A1.Sm7 and 2A3.Sm26.
The PB leds are switched ON by 3A12.G74, 3A7.Q140, R154 and R155.
05 MIN. TIMER
The basic clock signal is supplied by the oscillator G69, adjustable by R217 to 50 Hz.
This signal comprising PRX..CP is directed to the timer PWB 3A5 to display the timer
value, and to the counter assembly (G37, G36, G38) to increment up to the following
values:
RX LAMP
The lamp 9DS1 is lighting when XRays are generated in RAD or FLUORO mode.
Signal PRX causes 3A12 Q625 conduction through G74 and energises 9A1.K37.
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COLLIMATOR ROTATION
The collimator rotation is ensured by 7M1 motor.
A 12V voltage is applied on 7M1 motor by 2A3 Sm11 for CCW rotation.
SHUTTERS OPERATION
Two possibilities are available:
Image intensifier 16 cm: 1 field
Image intensifier 22 cm: 2 fields
16 CM IMAGE INTENSIFIER: 1 FIELD
When unit is provided with a 16 cm I.I, the 7M5 motor is not present on the
collimator ASM.
On the 3A3 PWB, the switches S501.A and B are open: Z information is to 1 logic
(112.E G165.A pin 6 to 1 and pin 4 to 0)
Closing and opening movements are controled by reversing motor power supply polarity
(Q218 = +12V and Q211: 12V)
After decoding, these signals switch the push pull stage output to + 12V or 12V, if the
following conditions are present:
limit switches not reached FCSC1(FLUORO) and FCGR1 (RAD)
Controls compatible with operating mode selection (FLUORO or RAD).
The 2 limit switches permit to identify the maximum opening positions in FLUORO
mode (FCSC1) and RAD mode (FCGR1).
These 2 limit switches permit to identify the maximum opening positions in FLUORO
mode and RAD mode.
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AUTOMATIC PREPOSITIONNING
When unit is switched from RAD mode to FLUORO Mode, the shutters of the collimator
are automatically positionned in FLUORO mode in order to limit the XRay emission at
the FLUORO size (FCSC1 and FCSC2 actuated).
On the other hand, when unit is switched from FLUORO mode to RAD mode, the
shutters opening must be manually controlled.
The LEDS of the 2 PB 2A3Sm14 and Sm16 are flashing and RAD opening is completed
when LEDS flashing is stopped. (FCGR1 and FCGR2 limit switches reached).
Opening and closing shutters sequence are identical with the II 16 cm operation.
When ZOOM function is selected, Z signal is 1 Logic and the shutters close automatically
until limit switches FCSC1 and FCSC2 are reached (ZOOM size).
AUTOMATIC PREPOSITIONNING
BP LEDS flashing and prepositionning sequence are identical with 16 cm I.I sequence.
RAD MODE
16 cm or 22 cm imager
RAD = 1 and RAD = 0 informations, after decoding, control the motion out the field of the
XRay beam limitation device: motors are always supplied in order to maintain the limitation
in place.
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FLUORO MODE
16 cm imager
RAD = 0 and RAD = 1 informations control the 7M4 motor: 16 cm field limitation is
positionned and limits the XRay beam to the imager size.
Motor is always supplied in order to maintain the limitation device in place.
22 cm imager
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COLUMN MOTORISATION
The column motorisation is performed by a DC motor 1M1.
The UP motion is controlled by the BP 2A3.Sm23 or 2A1.Sm5 which energises the
relay 1A1.K34
The DOWN Motion is controlled by the BP 2A3.Sm22 or 2A1.Sm9 which energises the
relay 1A1.K44.
A motion request energises the relay K6 through D3 or D4 diode and supplies the motor.
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Blank page
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Dual MONOSTABLE
16 15 14 13 12 11 10 9
4538 Vcc
C R/C CD +TR TR Q Q
T = RX X CX
C R/C CD +TR TR Q Q
GND
1 2 3 4 5 6 7 8
X X 1 1 1 1
1 : High level 0 : Low level X : Dont care
RA
7 3
RB Pin 1 : Ground
6 555 2 : Trigger
2 5 3 : Output
C 4 : Reset
8 : Vdc
4
Borne 4
T = T1 + T2 = 0.693 ( RA + RB ) C
3 T1 = 0.693 ( RA + RB ) C
T2 = 0.693 ( RB ) C
T1 T2
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GENERAL
Integrated circuit CMOS 4538
The 4538 circuit includes 2 independent monostables whose time constants are
determined by an external RC circuit
Each monostable can be triggered on the rising or falling dege of a pulse, according to
the input chosen.
outputs 4 and 12 rising edge
inputs 5 and 11 falling edge
The 4013 circuit includes 2 identical D FLIPFLOPs each having independent inputs of
set, reset, clock, data and 2 outputs Q and Q.
The logic level present at the input D (5 or 9) is transferred to the output 0 (1 or 13)
during the positive transition of the signal clock (inputs 3 or 11).
MEMORY SIGNALS
Signals MG+ and MF+
The signals MG+ and MF+ manage the technique of working of the memory
(FLUORO, PULSED FLUORO, E.R.).
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Signal MEMO +
This signal indicates the end of digitalization or the authorization of treatment (filtering).
The signal is maintained at 0 logic during the time of establishment and stabilization of
the video signal.
In PULSED FLUORO, the signal is also managed by the times T2 and T5.
Signal VISU +
This signal indicates to the memory the presence of RX or of a sequence during which RX
pulses are emitted.
The signal is at 1 logic for the whole time of an RX request in NORMAL FLUORO or
PULSED FLUOTO, but will return to 0 logic in E.R. mode at the end of the single RX pulse.
Signal X PERM
This end of exposure generated by the memory reduces the time of RX emission to the
minimum necessary to obtain a correct picture.
Signal A/B
This signal indicates that the memory is in mode 2 pictures and makes the rotation of the
monitors return to the initial position.
MONOSTABLES
5 monostables are present on the PWB 3A1
T1 (206AG117B)
This time allows the picture to stabilize in AUTO mode. It can be adjusted by R151.
It can be shortened by the signal HYST (not active in this version).
T1 is deleted if the RX control is released.
T2 (207AG117.A)
This time is fixed and is used as safety timer of the duration of RX necessary for
processing the picture (16x40 ms = 640 msec).
It is shortened by the signal X PERM from the memory.
T2 is used in ER Mode and during the first impulse in PULSED FLUORO mode.
T2 is deleted if the RX control is released.
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T3 (207BG115.A
This time is fixed and is used to prolong the RX emission in NORMAL FLUORO so as to
allow the memory to finish the acquisition of a correct picture.
It is generated each time the order OX is delete by an origin other than that of the signal X
PERM of the memory.
T4 (204AG120A)
This time is adjustable and is used from the second impulse of PULSED FLUORO
onwards.
It can be shortened by the signal HYST (not active in this version) and remains active
after the release the signal 0X to permet the acquisition of a correct picture given by the
last impulse of R
T5 (205AG120B)
This time is fixed and is used as safety timer for the duration of RX necessary for the
processing of the picture from the second impulse of the PULSED FLUORO sequence
onwards
It can be shortened by the signal X PERM.
It is not influenced by the release of the order OX, so as to permit the memory to acquire
a correct picture.
PULSED FLUORO CADENCER
T6 (202AQ110A)
The time T6 is generated by a multivibrator type 555. This time determines the cadences
of the RX pulses in PULSED FLUORO mode.
The multivibrator is triggered at the end of the time T1 and synchronized by each pulse
T4 this makes it possible to have a constant time between each pulse.
The integrated circuits G119.A and G82.8 (203A) prevent the emission of an additional
impulse when the BP RX is released.
SIGNALS OX AND OX*
The treatment of the signal OX and OS* is prvbided by the D FlipFlop
G103.B (204C).
The purpose of this circuit is to:
wait for the state of permission X PERM
prevent the release of OX* during the sequence of PULSED FLUORO and ensure that the
end of each impulse of RX is generated by the signal X PERM.
Take account of the signal T
T: this signal is generated at the level of the PWB 3A3 DIAPHRAGM if a change of field
occurs in the 22 cm ampli (normal field to magnify or vice versa).
This signal is used to drop the order OX and recommence the sequence with a new phase
of automatic search for the kV/mA instructions.
The signal HOLD kV frees the automatic mechanism during the time T1.
The purpose of the D FLIPFLOP G 103.A (202C) is to maintain the RX emission if
the signal T occurs during the pulse.
ORDER X OUT
NORMAL FLUORO MODE
As soon as BP RX is pressed, OX OUT passes to 1 logic.
When the BP RX is released, OX OUT is released when the time T3 has expired.
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HOLD KV
The purpose of this signal is to free the search kV/mA circuit during the time T1 in PULSED
FLUORO mode.
In the other modes of working, automatic radioscopy is active all the time.
PULSED FLUORO
OX IN
3A1.a17
T1
E123
E124 T2
T6
E121
E126 T4
T5
E127
OX OUT
3A1.a15
T1+T2 T4+T5
STOP DSM
E49
VISU
E58
MEMO
E59
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22 IMAGER 16 or 22
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221 PRESENTATION
The Heads of the Imageur 16 CCD* for Stenoscop and the Imageur 22 CCD* for Stenoscop
6000/9000 are compact, integrated units of attractive design (Ill. 21, 22, and 23),
comprising the following components:
D Cover panels,
D Mechanical mount (Ill. 22 and 23: Item 1),
D Xray II tube (Ill. 22 and 23, Item 2):
Imageur 22 Stenoscop CCD = TH9438HXH560
Imageur 16 Stenoscop CCD = TH9449HPH506 or TH 9466 HPH506
D High voltage power supply (Ill. 22 and 23, Item 3):
Thomson TH7191
D Optical assembly with integrated motordriven Iris (Ill. 22 and 23, Item 4),
D CCD sensor module (Ill. 22 and 23, Item 5),
D Video processing module (Ill. 22 and 23, Item 6, and Ill. 24), including:
Compact rack (Item 1),
Backpanel board (Item 2),
CCD Power Supply Board (Item 3),
CCD Video Board (Item 4),
CCD Interface Board (Item 5).
D Lead counterweight (Ill. 22 and 23, Item 7),
D Dose rate preamplifier (Ill. 22 and 23, Item 8).
* chargedcoupled device.
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ILLUSTRATION 21
OPERATIONAL FLOWCHART
II
HV POWER
SUPPLY
BOARD
INTERCONNECTION
IMAGEUR MODULE
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ILLUSTRATION 22
IMAGEUR 22 CCD FOR STENOSCOP
4
7
3
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ILLUSTRATION 23
IMAGEUR 16 CCD FOR STENOSCOP
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ILLUSTRATION 24
VIDEO PROCESSING MODULE
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222 II Tube
Type
Operating Principle
The II tube changes the xray image into a high intensity image with excellent contrast.
The relief information revealed by the radiation which travelled through the patient, first
passes through the tube input window, which is made up of aluminum foil with very low
absorption and very low diffusion properties. The relief information is then absorbed by the
detector screen behind the input window.
The detector screen changes the xray photons into luminous photons. A photocathode
attached to the detector screen is energized by these luminous photons and produces
electrons.
These electrons are then accelerated and focused by electrical fields. The electrons strike a
fluorescent screen (P20 type), forming a high intensity inverted image which is smaller than
the image entering the tube (ratio of 1:9).
The gain in brilliance is obtained from the energy of the accelerated electrons and from the
reduction of the image produced.
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TABLE 21
Normal Mode:
At center 46 42 48 lp/cm
At 70% of diameter 44 42 lp/cm
At 93% of diameter 42 40 44 lp/cm
Mag 1 Mode:
52
At center lp/cm
50
At 70% of diameter lp/cm
48
At 93% of diameter lp/cm
Typical MTF at the center
Normal Mode:
2 lp/cm 97 87 90 %
5 lp/cm 88 76 80 %
10 lp/cm 69 54 60 %
20 lp/cm 33 19 25 %
Mag 1 Mode:
2 lp/cm 97 %
5 lp/cm 90 %
10 lp/cm 73 %
20 lp/cm 40 %
Protection against xrays and the magnetic field in the Imageur is provided by a lead casing
combined with metal foil having high magnetic permeability.
Note: II tubes have an automatic getter pumping device; this avoids the formation of an ion spot
which could cause loss of resolution and contrast. When the tube has not been in service
for a long time, it is necessary to allow it to regenerate. If the vacuum in the II tube is not
correct (getter current above 1 A), a red LED indicator light on the side of the CCD
Interface Board lights up. This light also goes on briefly when power to the Imageur is
switched on.
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D The II tube HV power supply unit is designed for use with TH 9438 HX H560 (22 cm) or
TH 9466 HP H506 (16 cm) or TH 9449 HP H506 (16 cm) tubes.
D The unit is 010 V programmable. The potentiometers for adjusting this voltage are located on
the edge of the CCD Interface Board (R1 thru R9).
D The high voltage values VG1 (HV), VG2 (HV) and VG3 (HV) are obtained using the low control
voltages vg1 (LV), vg2 (LV) and vg3 (LV) on the basis of the following relationships:
22 cm 16 cm
VG1(HV) 40 VG1(HV) 40
vg1 (LV) volts + 1 ) vg1 (LV) volts + 1 )
34.5 34.5
VG3(HV) 1300
vg3 (LV) volts + 1 )
1300
Note: On 16 cm Imageur units, the G2 electrode of the II tube is connected to the G3 output of the
EHV power supply.
Note: The 9466 or 9449HP H506 II tube does not have the G3 electrode.
G1 controls the uniformity of focusing.
G2 controls focusing at the center.
G3 controls the diameter of the entry field (for 22 cm only).
FIELD TEST
LOW VOLTAGE
NORMAL MAG1 MAG2 POINT
vg1 R1 R2 TP4
22 cm vg2 R4 R5 TP3
vg3 R7 R8 TP2
vg1 R1 TP4
16 cm
vg2 R7 TP2
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GE Medical Systems STENOSCOP 2 STENOSCOP Plus
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Specifications
The new optical design from Rodenstock uses a single short focal lens working in
demagnification mode. The lens is common to all the image intensifiers; only the
demagnification factor is different, allowing several different mechanical adaptations. This
optical coupling mode provides an excellent MTF. The lens includes a motorized iris with
position repeater by potentiometer.
D Focusing,
D Centering,
D Image alignment.
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CAUTION An Imageur CCD Stenoscop cannot be modified on site from 50 Hz/625 lines to
60 Hz/525 lines.
D A Sony Board carrying the CCD sensor and its electronic control system.
D An Interface Board to which the CCD module is fitted. This Board includes connectors and
interfacing circuits.
These two Boards are paired (adjusted together).
There are two versions of this Board (they are not interchangeable).
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The Sony CCD module settings are made in the factory and need not be changed.
If a replacement is made, the gain setting only should be checked (R1 on the CCD module).
See Job Card RG 352.
D The Power Supply Board uses the 24V voltage supplying the II assembly to provide the three
different voltages required to operate the rack boards:
+5 V
+15 V
15 V
D This function is mainly performed by the PS1 DC/DC converter, which has the following
specifications:
Input voltage: 18 V to 36 V (dc)
Output voltage: +5 V (max. 5 A) 1 %
+15 V (max. 1 A) 1%
15 V (max. 1 A) 1 %
Max. power: 55 W
D Protection on the 24V supply side is provided by Fuse F1 (2AT).
D Switch S1 is used to switch off the entire II assembly (including the EHV power supply and the
dose measurement preamplifier).
D LED DS1 indicates presence of the 24 V voltage,
LED DS2 indicates presence of the +5 V voltage,
LED DS3 indicates presence of the +15 V voltage,
LED DS4 indicates presence of the 15 V voltage.
D The Board also includes a thermal safety device designed to warn the user when the temperature
inside the casing becomes too high. This device consists of a buzzer (LS1) linked to a temperature
sensor (V3) which is placed in contact with the housing of the DC/DC converter (PS1). This is
a strictly passive device which does not inhibit operation of the Imageur. Sensor V3 supplies a
voltage of 10 mV/C. The reference voltage for the V2 comparator is defined by the R5/R6 bridge
and is selected so that the buzzer is activated when the temperature reaches 80C.
227 CCD Video Board
The detailed block diagrams of the subfunctions are given in Ills 27 thru 212.
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A1 Manual Gain: The gain is set at a specific value using Potentiometer R1.
A2 Automatic Gain: The level of the video signal is held constant by means of a control loop.
The regulation circuit uses the ABD signal. Generation of this signal is described in
Para 1275.
Before the variable gain stage, during the vertical return, pulses (VTEST) are added to the
video signal with amplitude proportional to the ABD signal. The gain control circuit
responds only to the amplitude of the VTEST pulse. These pulses are sampled by U5 in each
frame using the STEST command. The direct current voltage supplied at the output of U5 is
used to control FET Q3 which is set up as a variable resistor via Amplifier AR6.
The ABD signal remains constant and the video gain is fixed for as long as the generator can
provide regulation. As soon as the generator reaches its limit, the amplitude of the ABD
signal decreases and at this point, the variable gain control comes in to keep the amplitude of
the VTEST pulses obtained from the ABD signal constant.
Max. gain = x 5
Max attenuation = 2
The AGCVALID signal is used to switch from Manual Gain to Automatic Gain (see Ill27).
Automatic Gain Mode is possible only if the following conditions are satisfied:
In order to preserve data which are present in areas of glare, video processing includes a
threeslope gamma correction function with HLDE (High Level Detail Enhancement) to
obtain a gamma value of around 0.45.
Gamma circuit improvement (Dynamic Gamma) can be selected by Jumper X2. The
principle of this circuit is as follows:
D Given Vo as the video level on uniform image at the Do nominal dose. If the video signal includes
levels where V 10 Vo, the gamma factor is equal to 0.45.
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D A peak detector made up of AR3, D3, C27, R62 and R63 measures the peak value of the video
signal and adjusts the gamma setting control. When the video level decreases, gamma correction
is reduced and this causes an improvement in contrast, especially on low dynamic images. The
signal provided by the peak detector is sampled at field frequency by U3 and the SAMPLE
command.
Note: Dynamic Gamma is active in Fluoroscopy Mode only.
The video output stage includes two operating modes, which can be selected using
Jumper X4:
The Average Brightness Detection (ABD) signal obtained from the CCD module video
signal output is used by the generator to regulate luminance in Fluoroscopy Mode.
The video signal sampled prior to automatic gain control is first amplified by AR7 (5 to 6
gain), and then clipped by Q26, Q27 to a level twice the nominal dose.
A threshold circuit made up of AR10 is used to exclude all portions of the video signals with a
level below the threshold defined by the R11 setting from the measurement window. The
circuit is used to eliminate the harmful effect of the collimation shutters, barite, etc., on
regulation.
The sampled video signal goes to the AR8 integrator, which is reset for each field by the reset
signal.
The logic signal defining the measurement window (corrected for dark areas) goes to a
second AR8 integrator, identical to the first one, which provides data proportional to the area
of the measurement surface.
The ABD signal is the result of the division by U10 of the integrated video signal by the
integrated measurement window to the size of an average value video signal. This signal is
sampled at field frequency by the Sample signal.
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It is used:
D Synchronization signals used in the Video Board for video processing purposes (see Timing, Ill.
213 and 214).
D Test signal generator CAL GAIN signal which is used to perform calibration without xray
generation.
The test signal is made up of a uniform white square and a black porch. The test signal
level can be adjusted using R10.
2 . 57
REV 3
BPG1
ILLUSTRATION 25
BLOCK DIAGRAM
Gamma ON/OFF GAMMA
CAL AGC VALID X3 ON
GAIN CAL
BPG1
SIGNAL X1 10V
BXRAY ON D Q AGC VALID R9
U2OFF
Normal CLK DELAY
10V
T/H Gamma +10V
GE Medical Systems
BCLTV
VIDEO IN TP2 Gamma Dyn/Normal X2
Preset
J2 Gain THRESHOLD 2
L1, C7 POST
Q20, Q21 L2, C19, C20 AGC PEAK U3
R1 Rejector VIDEO
+ Lowpass DETEC
R2 U1 14 MHZ AR1 AR2 Q5
Clipping Filter S/H AR3 THRESHOLD 1
Fluoro
AR3, D3, GAIN = 0.15
Rad C27, V Ref=1.8V
R62, R63
Q19 R8
PREAGC
Video CLP 1A CLP 2A
CI SAMPLE
OFFSET BLACK LEVEL
V TEST X9
Q26, Q27 Q15 AR11 GAMMA OUT R3
Q5 Q6 Q10 Q12
Clipping AR4
L4 Q11 Q13
Max R7 R46
Gain Q9
CLP 1A GAIN=1.9
CSYNC HLDE
AGC Valid L TEST
U11
OFF
CCD CBLK
MODULE ON
S TEST TP3
White Clipping X5 U7
J3
Steno +
CSYNC H
AR6 S/H AR6 Q6
2 . 58
AR8 U10 Q7
THRESHOLD 1 THRESHOLD 2 B29/J1 R/F G X4
PRE AGC AR7 U5 1 GAIN = 1.15
s A V Ref = 1 V 2 GAIN = 3.53
Video 15V 15V
GAIN=5.6 U9
Q14 U6 AGC VALID VIDEO OUT
VD A R4
HD RESET S/H U7
(VDCAM) (HDCAM) CLP 1A B MANUAL AUTO R16
R5 Offset
GAIN GAIN
s B AGC VALID Clamp
Clipping SAMPLE
AR10 AR8
V Ref R14
AGC VALID BP G1
R11 Phase Blanking H CLP 1A
BLK LEVEL Q25 AGC WIND
THRESHOLD AR9 R15 CLP 2A
Clipping RAZ
Calibration signal VIDEO CONTROL
Comparator LowPass amplitude SAMPLE
AGC WIND Filter Inverter R10 SIGNALS VD
H CENTERING U17 (SEE TIMING L TEST
COMPARATOR Calibration signal DIAGRAMS)
H/V REC width S TEST
Hysteresis
R17 VISU AGC WINDOW CAL GAIN SIGNAL
V CENTERING X8 X1
R/F Calibration ON/OFF AGC VALID, AGC VALID
AGC Window ABD Gain AR9
X6 ABD T/H
R6 Steno
Comparator CBLK AR9
GAIN = 3
U16, U17
U17
CIRC_BLK
R16
Circular Blanking Offset R13
CCD INTERFACE
STENOSCOP 2 STENOSCOP Plus
asm 826 921 P635
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ILLUSTRATION 26
CCD VIDEOBLOCK DIAGRAM
CBLK
VIDEO
IN Preset Gain Black Level
Auto Gain
VIDEO
OUT
LOW-PASS GAMMA
FILTER
V TEST
BLACK
LEVEL AGC WIND
THRESHOLD
L TEST
AGC/ABD
WINDOW AGC VALID
1V
ABD Gain
ABD
-s B OUT
A S/H
RAZ B
A GAIN=-1
-s
SAMPLE
GAIN=6 VIDEO ABD offset
SAMPLING
COMPARATOR
REC
OUT
HD RAZ
VD SAMPLE
CIRC BLK L TEST V Ref
BX RAYON S TEST
BCLTV CAL TEST SIGNAL
CONTROL
BPG1 CLP1A
SIGNALS
BLACK LEVEL CLP2A
THRESHOLD
AGC VALID, AGC VALID
CBLK
BPG1
T/H
2 . 59
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ILLUSTRATION 27
CCD VIDEO VIDEO INPUT AMPLIFIERBLOCK DIAGRAM
CAL
GAIN CLP2A
Signal
CI
OFFSET
AR11
PRE-AGC
Video
Max DYNAMIC
Gain R7 CLAMP
V TEST
STEST
AR6 AR6
- S/H +
U5
U6 AGC VALID
MANUAL AUTO
GAIN GAIN R5
V Ref
2 . 60
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ILLUSTRATION 28
CCD VIDEO DYNAMIC GAMMABLOCK DIAGRAM
(,,( '
% &
"
&
&
(,,(
$
(,,(0--./,(+ '
$"#
"
#$ $
! #
& $"#
&/)*&
"
"
"
#
! ! %$
"
$"# ! ! $"#
& &
2 . 61
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ILLUSTRATION 29
CCD VIDEO VIDEO OUT AMPLIFIERBLOCK DIAGRAM
AR4
Q10 Q12 R3
GAMMA OUT Q11 Q13 BLACK LEVEL
GAIN=1,9
CLP1A Q9
CBLK
+ J3
Steno 1 VIDEO
CSYNC _ OUT
B29/J1 X4
R/F 2 1 GAIN= 1.15
2 GAIN=3.53
R4
Offset
ILLUSTRATION 210
CCD VIDEO SIGNAL GENERATION
BPG1
D Q DELAY
BX RAYON AGC VALID
CLK
T/H
VD
BCLTV
2 . 62
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ILLUSTRATION 211
CCD VIDEO AVERAGE BRIGHTNESS DETECTIONBLOCK DIAGRAM
AGC/ABD
WINDOW
AR7 U10
AR8
PRE AGC
Video -s A
AGC VALID
GAIN=5.6 U9
A
RAZ S/H
B
Q14 Q16
CLP1A U7
-s CLIPPING B V Ref = 1 V
SAMPLE
AR8
L TEST
V TEST
White clipping X5 U7
ON OFF
CHOPPER
U11 AR9
AGC Valid
CLIPPING
LOW-PASS FILTER
INVERTER
GAIN=3
Offset R13
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ILLUSTRATION 212
CCD VIDEO CONTROL SIGNALSBLOCK DIAGRAM
R16
Clamp
R14
BPG1
Phase Blanking H CLP1A
CLP2A
R15
RAZ
Calibration signal SAMPLE
width VIDEO CONTROL
SIGNALS VD
R10 (SEE TIMING DIAGRAMS,
Calibration signal ILL. 1-12, AND 1-13) L TEST
amplitude S TEST
CAL GAIN SIGNAL
X1
AGC VALID, AGC VALID
Calibration ON/OFF
T/H
A22/J1
CIRCBLK
A6/J1
BPG1
X7
BLANKING COMPOSITE
GO TO BLACK ON/OFF SIGNAL CBLK
X8 GENERATION
AGC WINDOW ON/OFF
A28/J1
HDCAM
A29/J1
VDCAM
AGC/ABD WINDOW
2 . 64
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GE Medical Systems
ILLUSTRATION 213
2 . 65
#"
$%#"
#""#"
#""#"
REV 3
GE Medical Systems
Black pixels
VIDEO IN
HD CAM
MONO 1
MONO 2 (X1 in B)
MONO 2 (X1 in A)
2 . 66
STEST (X1 in A or B)
BLK
CLP1A
A1 Interface,
A2 Remote control of the EHV power supply,
A3 Iris servocontrol,
A4 Generation of circular masks (for Stenoscop application only).
2281 Interface
The interface manages and adapts the remotecontrol commands coming from the
Stenoscop:
On the Imageur for Stenoscop, the Iris remains in the fluoroscopy position during a
Radiography exposure (Jumper X1 in M position).
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The EHV power supply control voltages are adjusted by Potentiometers R1 and R9 located on
the edge of the Board.
In Radiography Mode, the Imageur housing returns to Normal Mode, irrespective of the
status of the Mag commands.
The DS1 LED lights up if the vacuum is insufficient (getter current > 1 A).
The CCD Interface Board contains the servocontrol circuits for the motordriven Iris.
Three Iris value settings are available, and these are determined by the status of the A0 and A1
inputs of Analog Switch U6:
A0 0 1
A1
0 DOSE 1 DOSE 2
1 Radiography Radiography
The position of the Iris and the corresponding adjustment potentiometers (R10 thru R12) is
indicated by LEDs DS2 thru DS4.
When Switch X5 is set in the P position, it is used to open the Iris in the position corresponding
to Dose 1 when the REC1 signal goes to 0. This is used to increase the dynamics of the video
signal when the generator can no longer provide regulation.
This function can only be active in Automatic Gain Mode (AGC VALID signal on 0). When
the Iris has switched over, it retains its position until the next fluoroscopy (Circuit U12).
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The line integrator is made up of Operational Amplifier U12 and the R/C components
associated with it. It is reset by the HDCAM signal and a part of the U7 analog switch. Its
output supplies a parabola signal at line frequencies aligned on a direct current voltage equal
to +3 V.
The field integrator is made up of Operational Amplifier U10 and the R/C components
associated with it. It is reset by the VDCAM signal and the other part of the U7 analog switch.
Its output supplies a parabola signal at field frequencies aligned on a direct current voltage
equal to +3 V.
The two parabolas are added together using Potentiometer R15 to adjust the H/V ratio. The
diameter of the video mask is adjusted using R16, and the diameter of the ABD sampling
window is adjusted using R17.
For R/F applications, Jumper X7 is in F position and Jumper X8 is in H position. In this case,
the circular masks are provided by the digital CCDMT Board.
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23 MEMORIES
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This device operates in real time on the digitised signal from the A/D converter.
The transfer function is a temporal lowpass recursive filter.
As an approximation, the operation is as follows: at every image (every 40 ms in CCIR or 33 ms in EIA), each
memory pixel is replaced by the sum of the 1n fraction from the input pixel and the 1 1n fraction
from the previously stored pixel.
This algorithm requires an image buffer of adequate depth in order to alleviate rounding errors when
evaluations fractions. The DR4 buffer holds 524.288 12 bit words.
The n coefficient can be chosen among the following values: 1, 2, 4, 16.
It corresponds to an artificial lag in the image quantified by a time constant of n images (n times 40 or 33 ms)
in the image sequence.
When n is 1, the image is transferred as is without filtering. The recursive filter is off in this case.
The noise reducer includes a so called movement detector, aimed at accelerating the filtered image update
when large level variations are encountered. This feature realises for each pixel the optimal tradeoff
between the wanted noise reduction and the undesirable image lag observed on a moving scene.
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2314 FIFO
This device is able to accumulate several digital pixels (up to 128) and to deliver them back as doublepixel
(16 bits) bursts at 14.75 MHz.
This results locally in time into a twofold multiplication of the transfer speed.
This is required by the main memory, also called frame buffer, which should be able to store image (write
bursts) while outputting a previously stored image (read bursts).
The main memory is implemented with three standard 4 Megabit DRAM components, totalling 1.5
Megapixels.
Thanks to the FIFO that accelerates the input data flow, it is possible to use conventional DRAM in Page
Mode access instead of more expensive VideoRAM.
The frame buffer can perform write while read access at video speed. This means, for instance, that a
visualised live image is a readout image stored during the previous frame.
The memory is able to store 576 x 576 (CCIR) or 576 x 488 (EIA) areas coming from the centre of the input
video signal. There is room for storing four images (1.572.864 > 4 x 576 x 576).
During an edgeenhance operation, the video transfer through the memory is interrupted, and a special way
to handle the frame buffer takes place.
This device scans the memory in order to extract eight pixels within a 3 x 4 neighbourhood, then writes back a
resulting pixel into the memory. This operation is not performed in real time: it lasts approximately 0.4 s.
However, the image appearance is not altered, because visualised images are held in the display buffers
during computation.
The neighbourhood of the implemented convolution is as follows:
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There are three enhancing strengths: low, medium and high. The choice is performed by dipswitches. The
low enhancer is selected by default (factory preset).
The high enhancer is too energetic for practical use.
Each pixel getting out of the edge enhance is the weighted sum of 8 incoming pixels.
The multiplying coefficient, or weights, are above pictured in relation with the geometrical location of the
pixels.
If the image is uniform, pixels are not altered. On the other hand, short term spatial variations are
emphasised.
Overflow phenomenon can arise in case of image with highly contrasted contents. This is absorbed by an
adequate black or white saturation circuit.
Image are transferred from the frame buffer towards a given display buffer in real time (40 ms or 33 ms).
This transfer is optionally performed with a vertical or horizontal image inversion.
There are two display buffers, rather independent each other, each implemented in a 4 Megabit VideoRAM
(256 k x 16).
Each of them is able to store a full image.
The buffers are called A and B, and are the sources of the video outputs A and B respectively.
When the write process into a buffer is made permanent, a direct live image is displayed through the buffers.
The main function of the display buffer is the FlickerFree image display.
The pixel data rate at the buffers output is 29.5 MHz in FlickerFree mode and 14.75 MHz otherwise.
The FlickerFree operation is selected simultaneously for the two buffers.
There is no dedicated display buffer for the hardcopy output, as hardcopy is used for very short periods of
time.
However, the hardcopy output is always 50 Hz (CCIR) or 60 Hz (EIA) without flickerfree display.
This means that even when A and B outputs are selected as flickerfree, it is still possible to share the A
buffer to generate a non flickerfree image sent to the hardcopy device.
The system performs a two second snapshot.
The Xray image can be visualised in a live manner only on the A screen.
The indicator inserter is responsible for the generation of status and image indicators as described in the
document relating to the operator interface.
This blocks frontend is a digital mixer fed with digital images from the A and B buffers.
It drives a triple D/A converter delivering three outputs: screen A, screen B and hardcopy.
The hardcopy port permanently exhibits a non flickerfree synchronisation signal (50/60 Hz).
Each output is available on shielded metal BNC connector for EMI/RFI compatibility.
The functionality of the three outputs is detailed below.
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In principle, the A screen displays the A buffer, and the B screen displays the B buffer.
The hardcopy output temporarily displays the A buffer.
During hardcopy cycle (2 seconds), A and B screens are erased, and the hardcopy output delivers the A
buffer contents in 50/60 Hz.
If the flickerfree mode is installed, the A and B outputs lack the flickerfree synchronisation signal for this
while.
For each video output, an artificial black pedestal is inserted, corresponding to the black level digitised at the
input level. Both are adjusted together by means of a single trimmer between 0 and 50 mV.
The video output amplifier gain is fixed in such a way that full scale data correspond to a 700 mV
peaktopeak amplitude, which ensures input to output level matching.
By choosing a nonzero black level (for example the factory preset value of 15 mV), the A/D digitiser is
constrained to ignore any component of the signal between the blank level and 15 mV.
The imagers video camera may exhibit some base noise outside the image intensifier area. This noise is
cancelled at the memory input.
In doing so, the input and output signal are identical from the blank level to 715 mV, except for the initial
15 mV. Above 715 mV, clipping occurs.
The heart of the control block is an 8 bit microcontroller (PIC from Microchip).
Its program is stored internally, and makes use of a data table residing in a 16 kByte external EPROM.
The microcontroller takes commands from two sources: the RX Control connector linked to the
Stenoscops Xray interface, and the IR Remote (female DB9) connector linked to the remote control
receiver.
The RX connector is actually double: a male DB15 is compatible with the DSM interface, and a female DB15
is compatible with the DR interface.
The microcontroller drives all the control bits scattered in the systems logic circuitry, and implements the
operator interface and the Xray generator interaction.
An acoustic buzzer is provided to signal errors.
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D Input timing,
D Output timing.
The video data flow is successively timereferenced to each of them.
The input part, the noise reducer, the FIFO and the memory are referenced to the input timing.
It consists of a pixel clock at 14.75 MHz and an interlaced format. The clock is phaselocked to the camera
input video timing.
Display buffer readout, character insertion and output video reconstruction are referenced to the output
timing.
If FlickerFree operation is not selected, the output timing is simply derived from the input timing (pixels at
14.75 MHz).
If FlickerFree operation is selected, the output timing is locked by means of a second PLL to the camera
input video timing.
This second loop operates at 29.5 MHz.
When no camera video signal is applied, the input timing is generated by the PLL VCO freerunning at a
constant control voltage.
An internal reference is derived with some 5 % accuracy.
The output secondary PLL is locked on this reference.
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This device operates in real time on the digitalized signal coming out of the converter.
It makes a temporal lowpass recursive filter.
For each image (every 40 ms in CCIR or 33 ms in EIA), each memory pixel is replaced by the
sum of the ratio 1/n of the input pixel and the ratio 11/n of the pixel previously stored.
This algorithm requires a image buffer ( 524.288 x 12bits words).
The n coefficient can be chosen among 1,2,4,6,8,15 and infinite value.
For n=1 means that the transmission is done without filtering (OFF).
For n= infinite means that the picture is frozen in the buffer, and therefore it is used as the 7th stored
image.
This mode is selected by the micro controller which drives the user interface.
The noise reduction has a movement detection which accelerates the update of the filtered image
when large level variations are encountered.
The system is conceived to realise, pixel by pixel, a best compromise between the requested
noise reduction and the picture remanence on a mobile object.
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The goals of this circuit is first to allow the functionment in real time of the edge enhancement.
This last one works by convolution of 3 close pixels on 4 continuous lines.
But in a interlaced system, 2 lines physically close are in fact on 2 different frames.
That makes impossible a correct convolution in real time.
Such a converter needs a image buffer. It is implemented in a 512 kBytes FRAME MEMORY
which includes a digital sequential input and output on 8 bits.
The input/output processes are asynchronous each other, this allows to create a video format less
constraining that the CCIR/EIA format sampled at 14.75MHz.
At the converter output, the pixels are present by pair: 16 bits.
The pair includes a pixel from a frame and another one from the previous frame, so 2 superposed pixels.
The frequency used to superpose the pixels is only 6,25 MHz, which makes easy the main image
memory implementation (Frame Buffer).
Each pixel going out of the enhancer is the sum of the product of the 8 incoming pixels.
The multiplying coefficients are in relation with the geometrical location of the pixels as
described in the table. If the image is uniform, the pixels are not modified.
But the local variations in the contrast are accentuated.
The overflow which could be met in case of strong variations (very sharp edge) are
absorbed by a saturation circuit for such black or white level.
The edge enhancement, situated on the main memory data bus, is applied on an image coming either
from the N.R. circuit or from the memory.
The images are not stored with the edge enhancement.
The edge enhancement is activated by a key on the remote control.
The edge enhancement in real time is possible (25 or 30 images/sec.).
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The image under a progressive format sampled at 6.25 MHz, must be transferred to the
visualisation buffers.
This operation is submitted to strong constrain mainly due at the Flicker Free display.
To avoid uncompleted frame refresh with 100Hz live images, the period of time during which a
frame can be transferred is short and accurately included in the video sequence.
The horizontal and vertical flybacks are done during this transfer.
The progressive/interlace circuit is able to sent alternatively the odd or even frame to the
display buffers in less then 10mS (8.3 mS in EIA ), with a sample frequency of 25 Mhz.
Before being written in the visualisation buffer, the image is sent to a circuit in which the
black or transparent circle is added. In this same circuit the image can be replaced
by a grey scale pattern.
The visualisation of the black circle is set by a dip switch.
It is inserted inside a square of: 576x576 pixels (CCIR)
576x488 pixels (EIA)
It is possible to distinguish the live picture behind the black circle with the edge of this one still visible.
This possibility called Transparent mask allows the centering of the image.
There are 2 display buffers which are quiet independent each other, each made with a Video
RAM (4 Mbits VRAM).
They are able to store a complete image and they are called buffer A and B.
These buffers display the image A and B on the screens.
When one buffer is in the permanent Write mode, the live image is displayed through the buffers.
The different functions of the Display buffers are:
Flicker Free display
Zoom
Centring before A/B display.( 2 images on the same screen)
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Like there are 2 display buffers, there are also 2 character generators.
They must be able to display the characters on a flicker free image or a no flicker free image.
That means that if a image is displayed with the characters in F.F. on monitor A and it is possible
to print the same image on a hard copier.
During 2 seconds, exposure time, the screen A is blanked and the buffer swaps to a CCIR timing
to furnish at the hard copy output a 50Hz video and then comes back to a F.F. display.
During these operations, the B buffer stays unchanged.
The output block includes a digital mixer of the buffer outputs A and B.
It supplies a triple digital to analog converter which has 3 screen ouputs:
screen A, screen B and Hard copy output (no flicker free).
A/B mode: when selected, the ouputs A and B display the same image coming from
the A buffer for the left part and from the B buffer for the right part.
The hard copy ouput displays temporally the same composite image.
The hardcopy port permanently exhibits a non flickerfree synchronisation signal (50/60 Hz).
During the reprography, monitors A and B are blanked.
Black level: there is an artificial black level for each video outputs equivalent at the
digital black level at the input.
Both signals are simultaneously adjustable between 0 to 50mV by a trimmer.
The video outputs gain is fixed in order to get a digital scale of 700mV peak to peak.
With a no null value for the black level ( i.e.: 15 mV standard value), the digitalizer is
constrained to ignore the signal between the suppression level and 15mV.
Like this, the input and the output signals are perfectly superposable between
the suppression level and 715mV, excepted the 15mV close to the black.
The signal over 715mV is clipped.
The heart of this block is a microcontroler 8 bits. Its program is included in an 64kBytes EPROM.
It receives its commands from the RX Control ( DB15) connected at the Stenoscop
RX interface and the I.R. Remote (DB9) connector connected at the Infra Red receiver.
It furnishes all the control bits for the memory logic and implements the operator
interface and the interactions with the generator.
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The input and the noise reduction are driven by the input timing, a 14.75 MHz clock and an interlaced format.
The memory ( frame buffer) in the Read or Write mode is driven by the progressive processing timing.
The pixels transits two by two at 6.25 MHz with a non interlaced format.
The main frequency is 50 MHz, the edge enhancement frequency.
This clock is locked by a second phase loop on the camera synchronisation.
The circle and pattern insertions are driven by the interlaced processing timing.
The pixels are present at 25 MHz and the format is interlaced.
This timing uses the same 50 MHz clock as here upper described.
The reading of the display buffer, the indicators insertion and the video reconstruction are driven by the
output timing.
If the display is not flicker free, the ouput timing is derived from the input timing (14.75 MHz).
If the display is flicker free, the timing is derived from a third phase loop locked on the camera
synchronisation.
The flicker free phase loop oscillates at 29.5 MHz or 31.5 MHz depending of the blanking selection
(Distar compatibility).
Each display buffer can select independently its output timing as a flicker free (29.5/31/5, interlaced)
or a no flicker free(14.75 MHz, interlaced).
If there is no video signal at the memory input, the 50 MHz clock is generated by a quartz.
A divider furnishes a stable 64uS reference which takes place of the video signal.
The phase loop is locked on this reference, as well as the flicker free phase loop.
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CAN
IR / Keyboard
Program
Interface
Flash
(RS232)
128 K x 8
CAN capable
Sequence SIMM Microcontroller DSM Xray
DRAM P1284 Port
4 M x 32 Inteface
(16 MB) CAN
Port
DRAM Development
1 M x 32 Data Bus 32 bits Port
(4 MB) HARD COPY
VCR Control
Boot FLASH Or Terminal VCR OUT
128 K x 8 Fifo A SFS (RS232)
SFS
& MONITOR A MONITOR B
Address
Interpol
Resident FLASH GT
1 M x 16 Acq Rvw
(2 MB) Microcontroller
Am29240 Triple
6 images FNR 32 bit / 20 MHz 8 bit Video
Buffer FNR
D/A Converter
Module 16
NR
Flash Port Clock
Module16 Acq Generator A B 50 100 50 100
FLASH
2 M x 16
(4 MB) Acq Fifo B
Edge Overlay
16 images Fifo
Enhancer Rvw Rvw
C, D PTI Doubler
A A
Module 96
A
LUT
Module96 Delay
FLASH Lines PTI Doubler
12 M x 16 B
(24 MB) EE
Rvw B B
96 images Acq
Image
Module 96
8 bit CAMERA
Clamping Parameter
Video A/D Clock
Module96 Permanent SRAM Buzzer
Converter VCR IN Calendar
FLASH 32 KB
12 M x 16
(24 MB) Black
96 images Flash Data Level
16 bits Adjust
Video Timing
MDn Block Diagram
50 / 60 Hz Euresys s.a.
100 / 120 Hz Revision 2
September 1997
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2332 Interfaces
CAMERA is the video input BNC terminal receiving a composite (luminanceonly) signal
from the Xray CCD camera. The camera input port conforms to CCIR (625 lines, 50 Hz) or
EIA (525 lines, 60 Hz) analogue video standards. The sampling rate is 14.75 MHz for both
CCIR and EIA standards. Digitizing is performed with 8 bitresolution (256 gray levels) for
576 pixels per line. 576 lines are acquired in CCIR mode and 480 lines are acquired in EIA
mode. Pixel are square (1H / 1V) in CCIR and affect a 1H / 1.18V aspect ratio in EIA.
An antialiasing analogue filter is provided for correct digitization (not shown in the
diagram).
The synchronization is extracted from the input and a clamping circuit is applied to restore the
blanking level to a known DC value. The video gain is fixed and the offset level is adjusted by
means of an internal trimmer potentiometer. The adjustment range is 0 to 50 mV. The factory
setting is such that the digital value 0 is obtained for a black level setup of 15 mV, and the
digital value 255 is obtained for a white level of 715 mV above the blanking level. The
adjustable black digitization level is coupled to a black setup insertion circuit at the output.
This offset compensation scheme is identical to the one used in DR4 and DR7/MD10.
A video signal coming from a VCR through a dedicated Svideo connector (VCR IN) can
be substituted to the camera signal. Only the central square part of the VCR signal is digitized.
HARD COPY and VCR provide the same video signal on two distinct BNC connectors.
In most cases, this signal will exactly reflect the A image (including graphics). If needed, the
source for HARD COPY and VCR can be switched to the B image.
The A and B images (including graphics) are frequency doubled to build two 100/120 Hz
images delivered through the MONITOR A and MONITOR B output port for
visualization purpose. 50 / 60 Hz format can be generated at these outputs as well.
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DC supply
A DC power supply should be allowed to have its negative terminal connected to the system
ground, all three GND pins being used. The positive voltage terminal should be connected to
AC1, all pins used.
2333 Description
Images are internally coded as arrays of 576 x 576 x 8 bits. In case of EIA, only 488 lines are
used. Internal 8bit wide data paths transport digital video at 10 Megapixels/s in a
noninterlaced (progressive) fashion. This progressive format applies to busses noted GT
(Geometric Transform), NR (Noise Reduce) and EE (Edge Enhanced). These busses are
isolated from the microcontrollers data bus by means of FIFOs. The data bus groups four
pixels for a 32bit width. The instantaneous peak data rate on the data bus is 80 Megapixels/s.
Images are stored in the flash memories as blocks of 262 144 bytes (218). However, a full size
CCIR image is 331 776 bytes (576 x 576). It has been chosen not to store the part outside the
radiology circle.
The theoretical lowest byte count for a circle limited image is x 2882, i.e. 260 576.
MDn include a dynamic random access memory (DRAM) storage area of 2 Megabytes. This
makes possible to locally hold up to six 576 x 576 images. However, this DRAM also contains
data and program information for the local micro controller. This reduces the number of areas
available for image storage to four (4 x 576 x 576 = 1 327 104).
One of these areas is used as an intermediate storage buffer delivering data to the SFS (see
4.4, Geometrical Transform). Three of them are available as a queue of three buffers
delivering data to / from the flash memory array.
In addition, an area of 2 x 165 888 bytes is reserved for overlay storage (576 x 576 4 bit
nibbles).
The technology used to achieve permanent storage is called Flash Memory. A flash
memory is the modern evolution of the EPROM (Erasable Programmable Read Only
Memory), except that erasing and programming are performed electrically without removing
the component out of a socket.
Reading from a flash memory is fast: less than 100 ns per byte.
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Before writing new data at a given flash memory location, it has to be erased firstly. However,
it is not possible to erase a single byte individually. This is done on a block basis, a block being
64 KB long. Erasing a block is done in 1 second. Writing a full block can be done in 65 536 x
6 s = 0.4 second, but this is theoretical limit.
A circle limited MDn image is stored in 4 blocks (64 KB x 4 = 262 144 bytes). The
component chosen to implement storage has a capacity of 1 MB (Intel 28F008S5),
containing 16 blocks each. A single component is able to hold 4 images.
The Basic Unit uses two of those components, allowing a theoretical capacity of 8 images.
However, the components are also used for firmware storage, leaving space for 6 stored
images.
It is possible to erase and write both components simultaneously. The time to store one image
is:
This explains why it is not possible to reuse the 6 images stored in the resident flash for MD6
for MD16 and above.
Basically, the performance is the same when one or two Module96 is inserted. However, it
will be possible to arrange the memory organization in such a way that successive images are
not stored in the same set of 4 components. A Module96 is effectively made of
24 components, or 6 sets of 4 components. Because of this it will be possible to overlap
erase/write operation for two successive images in different components.
However, it is impossible to predict the way the storage area will be organized after a number
of store, retrieve, lock, and delete operations. Thus, for MD112 and MD208, the storage time
of 2 second should be considered as a limit. In most cases, storage time of 1 second or less
will be obtained.
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Endurance
A given flash memory location is guaranteed for 100 000 erase/write cycles. This limit is not
sharp, but rather statistic in nature. Intel does not provide a clear explanation of how this limit
should be understood, and what is likely to happen after the wearout time of the
component.
A device able to store n images will be able to perform n x 100 000 image storing operation
during its live. The number n should be carefully evaluated. If some image positions are
locked for a while (instructed not to change over successive Xray acquisitions), the
effective number of images participating in the rotation of the stored set of images is reduced
from the total capacity.
Nevertheless, let us evaluate the endurance of MDn for n = 6, 16, 112, 208. According to GE,
a typical operational year is as follows:
D MD6 12 years
D MD16 33 years
D MD112 233 years
D MD208 433 years
The problem of the locked positions is only an issue for the MD6.
A continuous progressive video data flow is obtained at the bilinear interpolator output from
the combination of a square of four adjacent pixels in the source image space. The source
image is held in the SFS or static frame store, which is a SRAM (Static Random Access
Memory) based memory array able to store a full 576 x 576 image.
The subpixel resolution of the interpolator is 1/8 of a pixel. The interpolation process
preserves the 8bit resolution of the images.
The destinationtosource address transformation law is linear, which allows any rotation,
scaling and offset transformation without geometrical alteration. The rotation resolution
(minimal amount of rotation) is selected by firmware. The hardware does not impose a
limitation in this respect. The coordinate addresses of the source image are expressed in
20 bits.
The geometric transformer is equally used for rotation and for smooth zooming and scrolling.
The computation is the same as the one used in MDA.
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The noise reducer implements the GE proprietary recursive filtering algorithm using a
hardware table to compute the increment brought to the local frame store. This is illustrated
by the following drawing:
INPUT 8 +
Sub
9 LUT 12 +
tractor
12 +
576 x 576 x 12
8 Frame Store
The table is firmware downloaded, enabling any time constant and any motion detection
factor. Refer to the document 337/93 of Mr. J. Bossaert from GE.
The device uses a local frame store, working as a video delay line. This buffer is built with
dynamic RAM. The noise reducer operates on a progressive digital video data flow.
The edge enhancer uses a 3 x 4 convolution kernel with fixed coefficients. The figure below
illustrates the location of the programmable coefficients in the matrix.
0 0.25 0
0 0.25 0
The operator works in real time. The 8bit accuracy is preserved throughout the process. A
companion static RAM is used as a delay line generator. The edge enhancer operates on a
progressive digital video data flow.
The computation is the same as the one performed in DR4 and DR7/MD10 devices.
The progressive data flow is converted to a 50/60 Hz interlaced format by means of a PTI
(Progressive To Interlace) circuit based on field memory devices (FRAM). A PTI is able to
hold a full video frame (576 x 576), and there are two of them. The PTI are the place where the
A and B images are individually stored between Xray acquisition or flash memory storage
recall.
A PTI is 12 bit wide, making possible to store both the 8 bit image and its accompanying 4 bit
overlay.
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Overlay and image data are effectively mixed in a programmable fashion thanks to a 12 bit to
8 bit LUT.
Rising up the field frequency from 50/60 Hz to 100/120 Hz is performed through frequency
doubling circuits based on field memory devices (FRAM). Two of them are provided, one for
each output channel.
2334 Operation
This device used for image rotation and/or zoom works in two steps: filling a dedicated high
speed static RAM buffer (called SFS, Static Frame Store) from the DRAM, and reading the
buffer while generating from the bilinear interpolator a regular progressive video data flow at
10 MHz representing the transformed image.
The two steps are mutually exclusive in time. The filling step is called SFS and lasts 7 ms
maximum.
The extracting step is called PCC (Progressive Compute Condition) and lasts 33 ms
(576 x 576 x 100 ns). The real time arithmetical operators work at this speed, namely the
noise reducer and the edge enhancer.
When acquisition is in progress, both steps are alternately performed. The total time being
less than 40 ms (duration of a video image), real time operation is possible.
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When performing Xray acquisition for processing, storage and display, the multiplexers
shown in 2, Block Diagram, are set in the Acq position. The hardware architecture is then
configured to realize the following data flow:
Image Rotation
FIFO A
DRAM INTER
CAMERA INPUT SFS FNR
332 KB POL
MD6 :
FLASH
4 x 262 KB
FLASH
FIFO B ARRAY
EDGE
A A MONITOR A
ENHANCE
OUTPUT
Overlay
PTI LUT MONITOR B
Central FIFO C
Lateral FIFO D
DRAM
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When reviewing previously stored images for processing and display, the multiplexers
shown in 2, Block Diagram, are set in the Rvw position. The hardware architecture is then
configured to realize the following data flow:
MD6 :
FLASH
4 x 262 KB
FLASH
ARRAY FIFO B
EDGE
MD16 : 4MB FLASH DRAM
ENHANCE
PORT 3 x 332 KB
MD112 : 28 MB
MD208 : 52 MB
FIFO A
DRAM INTER FNR
SFS A A MONITOR A
332 KB POL (Disabled)
Lateral FIFO D
DRAM
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2341 Introduction
This document describes the image acquisition and real time processing part of the SODA
(Surgical Open Digital Architecture) system.
Physically, it consists in two PWB (Printed Wiring Board) to be inserted into a PC.
The MIDAS board conforms to the PCI (Peripheral Component Interconnect) standard.
The AVIAS board is an ISA (Industry Standard Architecture) compatible item.
AVIAS implements the video acquisition part, consisting mainly in analogue components.
AVIAS stands for: Acquisition Vido pour lArchitecture Soda (Video acquisition for the
Soda architecture).
MIDAS implements the digital image processing part, including the PCI interface to the PC.
MIDAS stands for: Manipulation dImages Digitales pour lArchitecture Soda
(Manipulation of digital images for the Soda Architecture).
This board does not require direct PCI communication. Thus an ISAcompliant solution is
chosen in order to spare a PCI slot in the PC. In fact, only power supply voltages are drawn
from the connector.
System connections to the outside world are made through AVIAS by means of a 37 pin DB
connector.
AVIAS and MIDAS are coupled each other by a short ribbon cable. This cable transfers
digital video input and output signals as well as control information.
MIDAS is PCI compliant, and is able to act as a bus master to transfer video data in real time to
and from the PC memory.
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50/60 Hz 12 bits
Y 100 Hz
EXTERNAL Control Interlacer to
Frequency D/A
10 bits 10 10 MONITOR B
INPUT/ Status 8 Output B Doubler Converter
Video Timing 8
OUTPUT LUT
Generator Y 100 Hz
50 / 60Hz 12 bits
10 Frequency 10
D/A
Test 100 / 120 Hz to Doubler Converter MONITOR A
Signal 10 bits
Generator Output A
LUT
10
Hard Copy Y 50 Hz HARD COPY
D/A
Source 10 Hard Copy
CAMERA Converter Output Y
10 bits 10 Selector
Y Selector
Input 10 bit to
Selector A/D 10 8 bits
Y Converter input
LUT
C
FROM TO VCR
VCR VCR Y
Output
Y Selector C
C
AUX
Euresys s.a.
AVIAS Block Diagram Revision 4
December 1996
In the above drawing, Y designates a luminance signal and C designates a chrominance signal.
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One of those three analogue sources is selected for acquisition. A fourth source is selectable
for internal test and calibration purposes.
An antialiasing analogue filter is provided for correct digitisation (not shown in the diagram).
Sampling rate is 14.75 MHz for both CCIR and EIA standards. Digitising is performed with
10 bits resolution (1024 grey levels), and immediately transformed to 8 bits (256 grey levels)
by means of the input LUT. The 10 bit digitiser guarantees a 1/4 LSB nonlinearity at 8 bits,
instead of an 1 LSB error if a 8 bit digitiser was used.
The input LUT is used to implement high resolution gain and offset correction in the digital
domain, as well as optional gamma correction.
Two video channels are generated, named A and B. Each of them is defined on 8 bits and
supplemented by a 4 bit graphic overlay information. This allows up to 15 overlay grey
levels, including superwhite levels. The video and graphics mixing operation is made by
means of two output LUTs, delivering 10 bit signals.
The output LUTs are used to implement high resolution gain and offset output calibration in
the digital domain, as well as windowing control.
The TO VCR and HARD COPY output ports are independently fed from the A image
(luminance only) or from the AUX input port (colour possible for TO VCR).
In most cases, HARD COPY will exactly reflect the A image (including graphics). If
desired, the luminance AUX input can be output for hard copy.
The A and B images (including graphics) are frequency doubled to build two 100/120 Hz
images delivered through the MONITOR A and MONITOR B output port for
visualisation purpose.
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The VCR video format conforms to the SVideo standard, i.e. same as usual CCIR or EIA
with a additional separate analogue channel for encoded chrominance.
Avias supports a number of connection to other item of the Xray chain, namely:
There are 11 digital inputs: CW_A, CCW_A, CW_B, CCW_B, RX_ON, MEMO, VISU,
MG, MF, EXT1, EXT2.
All these outputs are EMI/ESD protected. In the active state, AUX and XPERM provide a to
+12V control voltage under approximately 500 W. In the inactive state, they are at high
impedance. They are intended for connection to 4.7 kW resistor to ground.
PRINT1 and PRINT2 are low impedance output (approximately 50 W) with a programmable
level of 0, +5, 5 or +12 V.
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23426 Connector
1
GND_AUX
20 RX_ON
2
AUX
21 CW_A
3
EXT1
22 CCW_A
4
EXT2
23 CW_B
5
CCW_B
24 GND_CAM
6
CAMERA
25 VISU
7
MG
26 GND_IN
8
MEMO
9
27 MF AVIAS
XPERM
10
28 GND_CTO REAR CONNECTOR
C_TOVCR
29 GND_YTO
Y_TOVCR
11 DB37, Female
30 GND_FRM
12
FRMVCR
31 GND_YAX
13
Y_AUX
32 GND_CAX
14
C_AUX
33 PRINT2
15
GND_P2
34 PRINT1
16
GND_P1
35 HARD_COPY
17
GND_HC
36 MON_B
18
GND_MB
37 MON_A
19
1GND_MA2V
All ground terminals are effectively connected together. Video signal are intended for twisted
pair connection to an intermediate connection panel. Ribbon cable with twisted pair is
recommended. Cable length should be absolutely limited to 50 cm.
23427 Power
+5 V, 750 mA
+12 V, 300 mA
12 V, 85 mA
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32 32
32
16
Image Bus FIFO Mask Source
Bus FIFO Bus FIFO
Euresys s.a.
MIDAS Block Diagram Revision 3
July 1996
Images are internally coded as arrays of 576 x 576 x 8 bits. In case of EIA, only 488 lines are
used. Internal 8bit wide data paths transport digital video at 10 Megapixels/s in a
noninterlaced (progressive) fashion. The data bus groups four pixels for a 32 bit width. The
instantaneous peak data rate on the data bus is 80 Megapixels/s.
Image are transferred through the PCI interface as four 8bit pixels per 32bit word.
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Image rotation,
Recursive noise filtering with motion detection,
Peak opacification.
After application of these operators, the image is ready for one or several of the following:
The memory is organised as 512 k x 32bit words, each word holding four 8bit pixels (in
case of image usage).
The general purpose storage resource is unified. This means that the management software
can freely assign memory areas for specific purposes within a single memory space.
D Image A
There is no special memory buffer for the video A output. This image is originated from the
general purpose memory area. The standard size for A images is 576 x 576 x 8 (CCIR) or 576
x 488 x 8 (EIA).
D Image B
Half of the video RAM area (256 K x 16) generates the video B output. The local micro
controller sees 16 bit words as two 8 bits pixels. The standard size for the B image is 768 x 576
x 8 (CCIR) or 768 x 576 x 8 (EIA), which fits inside the 512 KB area.
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D Overlay A and B
The second half of the video area (256 K x 16) generates the overlay data for A and B images.
The local micro controller sees 16 bit words as four 4 bits graphic pixels. The standard size for
the overlay images is 768 x 576 (CCIR) or 768 x 576 (EIA). Overlay A and B are independent
each other.
D Flash memory
This is a onboard reprogrammable memory to hold the operating software of the local micro
controller.
Following frontend process or PC disk review, images can be further processed in real time
in the following way:
The zoom feature is forbidden for live images. Only locally stored images (from a previous
acquisition session or from the PC disk) can be zoomed.
Some resources shown in the MIDAS block diagram are shared, and cannot be utilised
together in a given mode. This chapter clarifies the systems operation in each mode.
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D Acquisition mode
This mode is used to acquire, process and display on screen A the X Ray image.
Geometric Transformer NR / PK
as Frame Store
Image Rotator
Image Storage Area
8
16 16
Input Video
Input Static
In Source Buffer Ping 8
Selection RAM Bilinear 8 Noise Reducer
and 8 32 32 Frame Interpolator Peak Opacifier
8
FrontEnd Processing
8
Image
Bus FIFO
32
Write Image
Buffer
PCI
32 Interface
with FIFO
PC Memory
8
Output LUT
Programmable 50/60 Hz Frequency
Image Storage Area 8 Edge 8 8 & 10 Doubler 10
Subtractor Enhancer Interlacer Graphic Mixer
Read Mask Mask
Buffer 32 8
Bus FIFO
BackEnd Processing Screen A
Video Reconstruction
Euresys s.a.
Soda Acquisition Data Flow Revision 2
August 1995
The static RAM frame store and the bilinear interpolator combination is used as an image rotator. Two image
zones are used in front of the frame buffer in a pingpong way to guarantee an artefactfree rotated image, while
deinterlacing the image.
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D Review mode
This mode is used to extract images from the PCs memory and apply to them the backend
processing chain.
PCI
PC
Buffer Ping
Image
PC Memory Interface 32 32 Bus FIFO 8
with FIFO PC
Buffer Pong
Programmable Edge
8 8
Source
Image Storage Area Enhancer
Subtractor Bus FIFO
Read Mask
Buffer
Mask
32 Bus FIFO
8
BackEnd Processing
Image Storage Area
Display Image
32 Buffer 32
Geometric Transformer
as
Interpolated Zoomer
8
Static
RAM 8
Bilinear 50/60 Hz Output LUT
Frequency
Frame Interpolator 8
Interlacer
8 & 10 10
8 Doubler
Store Graphic Mixer
8
Screen A
Video Reconstruction
Euresys s.a.
Soda Review Data Flow Revision 2
August 1995
The static RAM frame store and the bilinear interpolator combination is used as an image
zoomer. Two image zones are used in front of the frame buffer in a pingpong way to
guarantee an artefactfree zoomed image.
The abovementioned combination is shared with the acquisition mode image rotator, which
prevents the zoom operation during acquisition.
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D Compute mode
This mode shows how to use the architecture to implement an image transformation from
memory to memory. This is a way to use MIDAS as a software controlled image manipulation
accelerator.
Euresys s.a.
Soda Compute Data Flow Revision 2
August 1995
NR / PK
Geometric Transformer Frame Store
8 16 16 Image Storage Area
Image Storage Area
PCI Static
RAM 8
Bilinear PCI
PC Memory Interface 32
From PC
32 8 Noise Reducer 8 Image 32 To PC
32 Interface PC Memory
Image Buffer Frame Interpolator Peak Opacifier Image Buffer
with FIFO Store
8 Bus FIFO with FIFO
8 Programmed
for No Operation
Image Storage Area
PCI
Programmable Edge Source To PC
Image Storage Area Subtractor 8
Enhancer
8 32 Image Buffer 32 Interface PC Memory
Bus FIFO with FIFO
PCI
PC Memory Interface 32 From PC
Image Buffer
32 Mask 8
Bus FIFO
with FIFO
Programmed
for No Operation
The upper part of the flow diagram allows geometric transformation from memory to
memory. The lower part can be used for edge enhancing an image. The architecture can be
programmed for concurrent existence of both data paths, but not necessarily for concurrent
operation.
D Sequencing consideration
This device used for image rotation and/or zoom works in two steps: filling a dedicated high
speed static RAM buffer (called SFS, Static Frame Store, 512 KB) from the memory, and
reading the buffer while generating from the bilinear interpolator a regular data flow at
10 MHz representing the transformed image.
The two steps are mutually exclusive in time. The filling step is called SFS and lasts 7 ms
maximum. The extracting step is called PCC (Progressive Compute Condition) and lasts
33 ms (576 x 576 x 100 ns). All real time arithmetical operators work at this speed, namely the
noise reducer / peak opacifier, the programmable subtractor and the edge enhancer.
When acquisition is in progress, both steps are alternately performed. The total time being
less than 40 ms (duration of a video image), real time operation is possible.
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D Geometrical transformer
A continuous progressive video data flow is obtained at the bilinear interpolator output from
the combination of a square of four adjacent pixels in the source image space. The source
image is held in the static frame store.
The subpixel resolution of the interpolator is 1/8 of a pixel. The interpolation process
preserves the 8 bit resolution of the images.
The destinationtosource address transformation law is linear, which allows any rotation,
scaling and offset transformation without geometrical alteration. The rotation resolution
(minimal amount of rotation) is selected by software. The hardware does not impose a
limitation in this respect. The coordinate addresses of the source image are expressed in 20
bits.
Input 8
9 16
Sub
tractor
LUT + Output
8 16 8(MSB)
+ Adder
16
+
8(MSB) 16 16
576 x 576 x 16
Frame Store
The device uses a local frame store, working as a video delay line. This buffer is built with
dynamic RAM. The 16 bit depth is not required by the arithmetics, but is merely a matter of
hardware opportunity, especially considering the peak opacification function.
The peak opacification function is simply a maximum / minimum function of the incoming
pixels compared to a previously generated peak buffer. The idea is to use the 16 bit local frame
store as two 8 bit frame stores: one for noise reduction, one for peak holding. In this mode, the
possible noise reduction factors are limited because of arithmetic rounding errors, but this is
not a practical limitation. The following drawing illustrates this combined operator.
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Input 8
9 8
Sub
tractor
LUT +
8 8
+ Adder
8
+ Carry
8
+ 8 Output
8(MSB) 8 576 x 576 x 8 8 8 8
Sub
NR Select
tractor 8
Frame Store 8
8 576 x 576 x 8 8
PK
Frame Store
D Programmable subtractor
The programmable subtractor uses programmable lookup tables to perform greylevel
transformations. The heart of the device is a 11 bit high speed adder preceded by two
logarithmic transformers (mask and image) and followed by an exponential transformer.
Variable weighting coefficients (e.g. for landmarking) are achieved by including a
multiplying factor before logarithmic transformation in the input lookup tables. In
particular, direct transmission of the image (no mask) is possible.
The 8 bit accuracy is maintained thanks to the additional three bits in the transformed data. A
model of the logarithmic subtractor is presented below.
D Edge enhancer
The edge enhancer uses a symmetrical 5 x 5 convolution kernel with four independent
coefficients. The figure below illustrates the location of the programmable coefficients in the
matrix.
LogMask
8 LUT
11
Mask
256 x 11
+
AntiLog
12 LUT 8
Adder Output
4096 x 8
LogImage
8 LUT 11
Image
256 x 11
+
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C4/4 C4 C3 C4 C4/4
C4 0 C2 0 C4
C3
C2 C1 C2 C3
C4
0 C2 0 C4
C4/4 C4 C3 C4 C4/4
The operator works in real time. The 8 bit accuracy is preserved throughout the process. The
coefficient are defined (with sign) with an 8 bit accuracy.
C1 = 1 + 7 / 16 F
C2 = 1 / 8 F
C3 = 3 / 32 F
C4 = 1 / 16 F
D Interpolated zoom
A smooth zooming device is included, using the same hardware circuit as the image rotator.
Zoom factors can be selected in the range 1 to 8 (linear enlargement). Non integer zoom
factors are supported.
Refer to the geometrical transformer description for details about interpolation.
D Graphics insertion
Two dedicated 4 bit graphic planes are included in the system. It covers a full 768 x 576
(CCIR) or 768 x 488 (EIA) area, making it possible to draw graphics outside the central
square.
The graphic planes are filled by the onboard microcontroller according to commands sent
through the PCI bus.
Mixing the graphic information with the video image is made through a programmable
lookup table, which gives a total freedom to the software to define a comfortable number of
grey level in creating characters and geometrical items. Note that superwhite levels can be
assigned to some overlay codes.
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D LUT processing
The above mentioned graphic insertion table can also be used for LUT processing, such as
windowing.
The 8 bit accuracy is maintained at the table input and output.
D PCI interface
The PCI interface acts as a slave or a master device to the PCI bus. It includes two 32 byte
FIFO, one for reading and one for writing. As such, the PCI interface is able to reach the PCI
bus top speed when bursting data to or from the agent controlling the PCs memory.
With a well behavioured PC, reaching the real time speed to memory is achievable. The
minimal average speed required is no more than 2 Megawords per second (four pixels are
grouped inside a 32 bit word). The absolute maximum speed of the PCI bus is 33 Megawords
per second. The video transfer represents a 6 % bandwidth consumption over the PCI bus.
PCI operation requires a non volatile memory to conserve configuration information. This
memory is implemented in a reprogrammable serial memory.
Plugandplay capability as required by the PCI specification is implemented.
D Local microcontroller
A local RISC based microcontroller (AMD Am29240 at 20 MHz) is included to perform the
following main tasks:
General management of the overall MIDAS and AVIAS Boards operation, in particular a
number of timing dependant critical interactions,
Generation of DMA memory addresses for data transfer over the local 32 bit data bus,
Management of PCI cycles,
Access to the screen B and overlay plane.
The Am29240 is able to manage four DMA channels at memorys full speed. This capability
is extensively used to transfer data to and from arithmetical operators, as well as to and from
the PCI interface.
Arithmetical operation occurs at an regular data rate of 10 MHz (PCC, or Progressive
Compute Condition). The DMA channels are able to sustain this speed for several
simultaneous transfers. FIFO are incorporated to decouple the burst based accesses through
the data bus from the internal regular data flow of the PCC.
23438 Power
+5 V, 2.2 A
+12 V, 100 mA
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24 MONITOR DISTAR
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BLOCK DIAGRAM
H. YOKE
LIGHT FR
SENSOR W3 W2
BOARD
CONT 12V
W7 120/100 Hz NC BR 0V NC
W8 GND
J1 1 2 3 4 5 6
NC
1 2 3 4
1
1 2 3 4 5 J4 C VID
2
J1 H. COIL GND 3 W4 W2
V. INP 4 1 VIDEO IN
W3 W1
J7 OUT IN 2 GND
1
V. COIL J2 1
2 2
J2 CONT. 3 F1 8
10K
4 K 7 CRT
J5 J1
FOCUS 4
DEFLECTION BLK 6 W11 G2 3
YOKE
HS 5 W5 G1 2
BOARD G1 4 W6 F2 1
0V 3 W7
0V 2
5V 1 W9 VIDEO GND
J6
W2
BOARD TB1
FOCUS
G2
2 3 4 5 6 7
27V
HPV 0V J2
95V W5
0V W6
H.V. 6.3V W8
L.V.
POWER +12V W7
POWER
SUPPLY NC W9
SUPPLY
W2 W1 GP1
VAC
ANODIC V
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a) Composite video
Amplitude 1 V
Horizontal synchronism 31,25 Khz
Vertical synchronism 100 Hz
b) Composite video
Amplitude 1 V
Horizontal synchronism 31 Khz
Vertical synchronism 120 Hz
The two different standards can be selected through a switch placed in the rear part of the
monitor.
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J2/7
95V
W2 W5
VAC J2/2
GND
W1 W6
INPUT
FILTER J2/3
25V
POWER
STAGE
GP1 J2/5
12V
W7
To
J2/1
W8
6.3V VIDEO Board
DEFLECTION Board
NC
W9
PWM
STENDUP 62V
R59
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(DIAGRAM 541550)
The low voltage power supply provides the voltages needed for scanning and for the
video amplifier.
It is composed of a flyback switching power supply and a standup DCDC converter.
The first stage of this power supply provides the following voltages:
The board also provides an auxiliary voltage of about 28 V which, by means of the DCDC
converter, is raised and adjusted to 62 V to obtain horizontal scanning.
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W2
25V
TO CRT
POWER ANODIC
VOLTAGE
CONTROL H.V.
H.V.
W3 TO VIDEO
FROM GND G2
D.B.
R13
PROT
H.V.
W1 RX
PROT
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The board of this power supply is enclosed into a metal box and partly filled with resin.
The power supply is powered with a voltage of about 27 Vdc and provides an anode
voltage of 19 KV with maximum current of 800 A and an auxiliary polarization voltage
for the CRT of about 800 V.
This power supply is controlled by an H.P.V. signal coming from the deflection board.
The H.P.V. control turns off the high voltage power supply when one horizontal or
vertical scanning is missing.
The high voltage power supply is also provided with an over voltage protection which
goes into operation when anode voltage reaches 20 KV.
This protection is necessary against Xray emission.
The network protection is composed of V2, Q1 and Q4.
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The deflection board produces horizontal and vertical scanning, the blanking signal,
static and dynamic focus and the polarization of G1 for the CRT.
The composite video signal is divided into vertical synchronism and horizontal synchronism
by the integrated circuit U9.
Both synchronisms are processed by the integrated circuit U2 which provides a horizontal
driver to produce flyback voltage and horizontal scanning by means of the transistor Q5,
the diode D5 and the mosfet Q4.
A set of analog switches (integrated circuit U3) is used, by means of a voltage control on
connector J7/1, to select the adjustments for scanning at 100 Hz or at 120 Hz.
The voltage control on connector J7/1 must be 12 V if the selected frequency is 120 Hz and
0 V if the selected frequency is 100 Hz.
The static focus is obtained with rectified flyback voltage and can range from about
0 V to 700 V.
The parabolas of dynamic focus are amplified by transistors Q9 and Q10, while the
integration of the vertical frequency ramp is performed by transistor Q7.
The couple of transistors Q6 and Q8 are used as pushpull stage for the vertical centering.
The integrated circuit U11 is used to drive the vertical and horizontal blanking, while Q11
is the transistor which amplifies the blanking bringing it to about 27 V on grid G1 of the CRT.
The integrated circuit U8 performs an AND function of the vertical and horizontal scanning
and produces the H.P.V. protection signal for the high voltage power supply.
Through Q8 this same signal is used to 0pen Q14 when the monitor is turned off.
On the deflection board the integrated circuit U5 produces a voltage of 5 V to supply TTL
integrated circuits.
Regulator U12 is used for vertical linearity at 100Hz and 120 Hz.
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The video amplifier includes a preamplifier U1 and a final stage in the cascode
configuration with transistors Q1 and Q2.
The integrated circuit U2 produces the clamp pulse which allows to stabilize the voltage
level at 50 mV.
The voltage of G2 is stabilized at about 670 V by means of a series of zeners and capacitors.
The amplifier can provide a dynamics of about 60 V before reaching saturation.
Saturation is controlled by the integrated circuit U3.
The group D1, C24 and R55 is used as a limiter of beam current.
Current is limited to about 700 A for a blank page brightness of about 500 Cd/sqm.
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This board allows the control of the light sensor by means of the integrated circuit U2.
This control is possible through a comparator stage to turn on the green LED and two
amplifier stages to control contrast and brightness.
SW1 allows selection between 100 Hz and 120 Hz.
SW1 must be on 12 V for a frequency of 120 Hz and on 0 V for a frequency of 100 Hz.
This board includes a resistor which is sensitive to light, connected to the amplifier placed
on the selection board.
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TABLE OF CONTENTS
31 GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1
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Purpose: MEASUREMENT OF DENSITY AND
RESOLUTION UNIFORMITY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 115
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3 . iv
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
31 GENERAL
CAUTION :
2) When a PWB is placed on an extender board, check the continuity of the earth connection with the extension
wire supplied. The omission of this earth connection causes malfunction of the unit.
NOTE : With the exception of the adjustments which are part of the replacement of the Xray head, of the fila-
ment heating PWB 3A26, or of the timer PWB 3A5, all potentiometers have been calibrated in the factory and
do not have to be readjusted. A recalibration might be necessary in the case of the replacement of a component
on site. Before adjusting a potentiometer, check that the corresponding procedure is at hand.
In this case, follow the procedure described below for the respective adjustment.
Subsystem D/R sheets RGm sheets RGe sheets RGe sheets LA sheets DI sheets
DAP 40 41 240
(40 49) (140 149) (240 249) (340 349) (440 449) (540 549)
* ( ) : reserved numbers
3.1
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
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3.2
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
3.3
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REV3 asm 826 921 P635
Blank page
3.4
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Time: Manpower:
SECTION 1
NECESSARY REPLACEMENT
None.
SECTION 2
EQUIPMENT REQUIRED
SECTION 3
SAFETY PRECAUTIONS
SECTION 4
PRELIMINARY OPERATIONS
3.5
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 5
PROCEDURE
Check that the interface signals coming from the Stenoscop reach the II assembly.
5.1 XRay ON
1. Connect the multimeter between TP7 (B XRAY ON) and TP1 (ground).
2. Restore power to the Stenoscop.
3. Check the TP7 voltage: 0 V 50 mV.
4. Run a fluoroscopy sequence. The voltage in TP7 should shift to +5 V 50 mV, and the image should
be visible on the monitor.
5.2 CLTV ON
1. Remove power from the II assembly (S1/CCD power supply in OFF position)
2. Replace the CCD Interface Board in the rack.
3. Reset the S1/CCD power supply to the ON position.
SECTION 6
IMAGEUR ALIGNMENT
1. The optical centering adjustments are preset at the factory. Any readjustment should be done only in
case of abnormal functioning. If necessary see Job Card RG 351.
2. Alignment of the Imageur with the longitudinal axis is preset at the factory. In case of a problem, see
Job Card RG 254 of this document.
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GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 7
OPERATIONAL CHECK
1. Check the Dose 1/Dose 2 commutation on the CCD Interface Board by pressing the HLC pushbotton
on the Stenoscop Control Console.
Dose 1 = DS2 ON,
Dose 2 = DS3 ON.
2. Check the field controls.
a. Normal.
b. Magnifier 1 (22 cm only).
3. Check the ABD window adjustment: 50% of the usable diameter of the image.
3.7
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Blank page
3.8
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Time: Manpower:
SECTION 1
NECESSARY REPLACEMENT
None.
SECTION 2
EQUIPMENT REQUIRED
SECTION 3
SAFETY PRECAUTIONS
SECTION 4
PRELIMINARY OPERATIONS
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GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 5
PROCEDURE
D The Imageur 16/22 Stenoscop CCD can operate at two different dose rates (Dose 1 and Dose 2),
corresponding to the two positions of the Iris (Iris 1 and Iris 2, respectively).
D The Imageur CCD is preset in the factory for the following dose rates:
TABLE 1 .108 R/hr
mR/mn 22 cm 16 cm
Dose 1 (low)
Dose 2 (high)
1.8
3.5
3.3
6.7
.210 R/hr
5.2.2 Dose 2 Adjustment (high dose)
3 . 10
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
7. Run a fluoroscopy sequence under conditions to obtain the specified Dose 2 dose rate.
8. Adjust the R11/CCD Interface Board so that the voltage between TP1 and TP7, on the CCD Video
Board, is equal to 2.1 V 50 mV.
1. In manual fluoroscopy, adjust the fluoroscopy constants so as to obtain the specified Dose 1 dose rate
at the Imageur entry. The kV value must be as close to 75 kV as possible.
2. Check the voltage between TP1 and TP7 on the CCD Video Board. When the desired
Dose 1 value has been reached, this voltage should be 2.1 V 50 mV. If not, Iris 1 (corresponding to
Dose 1) must be readjusted.
3. Run a fluoroscopy sequence under conditions to obtain the specified Dose 1 dose rate.
4. Adjust the R10/CCD Interface Board so that the voltage between TP1 and TP7, on the CCD Video
Board, is 2.1 V 50 mV.
Note: Regardless of the values of the doses adjusted, the following must always be true:
Dose 1 < Dose 2 (low dose < high dose).
5.2.4 Check
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GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
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3 . 12
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Time: Manpower:
SECTION 1
REPLACEMENT
None.
SECTION 2
EQUIPMENT REQUIRED
SECTION 3
SAFETY PRECAUTIONS
SECTION 4
PRELIMINARY OPERATIONS
None.
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GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 5
PROCEDURE
Note: In order to avoid oscillations when starting the fluoroscopy sequence, the automatic mode begins
only after an adjustable time delay has elapsed.
This delay is preset in the factory at 750 ms.
XRAY ON
AGC VALID
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GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Time: Manpower:
SECTION 1
REPLACEMENT
None.
SECTION 2
EQUIPMENT REQUIRED
SECTION 3
SAFETY PRECAUTIONS
SECTION 4
PRELIMINARY OPERATIONS Turn off FNR (frame averaging)
3 . 15
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 1
ABD Window
Opaque shutters
6. Adjust R11, on the CCD Video Board, to blank the shutters on the image.
The image should become:
ILLUSTRATION 2
This adjustment must be made with great care: R11 must be set so that the
CAUTION shutters are on the limit of disappearing.
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GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Time: Manpower:
SECTION 1
REPLACEMENT
None.
SECTION 2
EQUIPMENT REQUIRED
SECTION 3
SAFETY PRECAUTIONS
SECTION 4
PRELIMINARY OPERATIONS
None.
SECTION 5
PROCEDURE
Note: This operation is normally done at the factory and should be redone only if an abnormallity is
detected.
1. Remove the cover from the optical unit.
2. Loosen the three attachment screws securing the lens support to the II tube.
3. Adjust the direction of the image by turning the lens support. At the same time, check that the image
is correctly centered in the circular blanking window by producing sweep reversals.
4. Retighten the three attachment screws of the lens support.
5. Put the the cover back in place on the optical unit.
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REV3 asm 826 921 P635
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3 . 18
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Time: Manpower:
SECTION 1
REPLACEMENT
None.
SECTION 2
EQUIPMENT REQUIRED
SECTION 3
SAFETY PRECAUTIONS
SECTION 4
PRELIMINARY OPERATIONS
None.
SECTION 5
PROCEDURE
1. Connect an oscilloscope probe to TP3, on the CCD Video Board (video output).
2. Place a 2mm copper attenuation filter on the diaphragm.
3. Run a fluoroscopy sequence in Automatic Mode under nominal conditions. Check the appearance of
the video signal at TP3/CCD Video Board, in Automatic Mode and Manual Mode (see Ill. 1).
3 . 19
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 1
A = 300 20 mV
B = 50 5 mV
C C = 250 20 mV
TP3
CCD Video Board Black level
B Blanking level
Under nominal conditions, the average video levels at various points in the Imageur are (see Ill. 2):
ILLUSTRATION 2
TP2
CCD Video Board D
5.1 The Imageur Steno CCD is equipped with a video test signal generator, which, if necessary, provides
a standard signal that can be used to make all video adjustments.
3 . 20
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 3
TP3
CCD Video Board C C = 250 mV
B
B = 50 mV
A
A = 300 mV
To use the test signal generator:
5.2 Do not readjust the video settings (gain, offset, black level, gamma, etc.), except if there is a fault.
These adjustments are made at the factory with specialized tooling.
5.3 The operating conditions which enable the gamma correction adjustments are:
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GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
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3 . 22
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Time: Manpower:
SECTION 1
REPLACEMENT
None.
SECTION 2
EQUIPMENT REQUIRED
SECTION 3
SAFETY PRECAUTIONS
SECTION 4
PRELIMINARY OPERATIONS
None.
3 . 23
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 5
PROCEDURE
Measure the dose in Automatic Mode under norminal conditions (75 kV, 2 mm copper).
If the dose measured is within the allowable tolerence (nominal dose +20%/0%), the procedure is complete.
If the dose has increased to above 20%, the II tube conversion factor has decreased significantly since the
previous check. Modify the iris aperture as described below.
5.2 Procedure
Preliminary: Check the offset and the ABD gain, with the test signal:
4. Check the ABD level between TPI and TP7 on the CCD Video board : 2.1 v "20 mv. If not repeat the
gain adjustement using R6/CCD Video board, so as to obtain the required value.
5. Set X1/CCD Video in the A position and reconnect the plug at J2/CCD Video.
6. Connect a multimeter between TP1 and TP7 on the CCD Video Board.
7. Select Manual Mode on the generator.
8. Open Iris 2 to maximum by rotating R11 on the CCD Interface Board fully cw.
9. Without making an exposure, check that the voltage between TP1 and TP7 on the CCD Video Board
is 0 V "20 mv. If not repeat the offset adjustment (refer to Job Card RG 250, Para 5.1).
10. Under nominal conditions (75 kV, 2mm copper), adjust the mA value to obtain nominal Dose 2.
3 . 24
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
11. Read the voltage between TP1 and TP7 on the CCD Video Board under these conditions. Three
situations may arise:
a. Voltage exceeds 4.2 V
The value read shows by how much the conversion factor is above the minimum value (2.1 V) to
provide nominal illumination for the CCD sensor when the iris is open.
The value represents the iris aperture margin. For example, a voltage of 6.3 V indicates that the
conversion factor could still decrease by a factor of 3 before the iris must be opened.
Adjust Iris 2 followed by Iris 1 (refer to Job Card RG 250).
3 . 25
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Blank page
3 . 26
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 1 This proceedure is only for checking to see if your HV is in range for
SUPPLIES VG1, VG2, VG3. Use your IET sizing gauge and adjust voltages
according to the notes on the next page.
None.
SECTION 2
TOOLS
D Digital voltmeter.
D II Tube Technical Specifications.
D Funk 23 Test Pattern.
D Oscilloscope, 20 MHz minimum bandwidth.
SECTION 3
SAFETY PRECAUTIONS
All the necessary operator and equipment safety precautions must be taken, including most importantly:
3 . 27
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 4 To unblank CCD circle move jumper A3X8 to "H" position. This
PREREQUISITES ensures the circle you see on the monitor is the II output phosphor.
The adjustments described in this Job Card should be performed when replacing:
D II tube.
D EHV power supply.
D CCD Interface Board.
1. Remove power from the Stenoscop or from the board cage.
2. Remove the board cage cover.
3. On the CCD Interface Board, turn the R1 thru R9 potentiometers fully counterclockwise (min. control
voltage). Don't do this step
SECTION 5 Use I.E.T. sizing gauge instead of this procedure (9" II normal =210mm
PROCEDURE 6" (mag) = 152 mm) (6" only = 144mm).
D High voltage measurement with an EHV measurement box is not necessary for EHV power supply
adjustment. box = hv probe
D The following equations are used to calculate VG1 (HV), VG2 (HV) and VG3 (HV) high voltages
from vg1 (HV), vg2 (HV) and vg3 (HV) low voltages:
TABLE 1
D Low voltages are adjusted on the CCD Interface Board using the R1 thru R8 potentiometers.
D Voltages VG1 (HV), VG2 (HV) and VG3 (HV) are those indicated in the Inspection Acceptance
Report for the II tube.
D Restore power to the Imageur Chassis.
D Adjust the low voltages according to the following table:
To calculate 9" VG3 = (3.03-1)(1300) + 1300 = 4.01kv (this equates to 3.03 volts at tp2)
3 . 28
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
TABLE 2
See Illustration 5.
FIELD TEST
Low Voltage
NORMAL MAG1 MAG2 POINT
vg1 R1, Item 9 R2, Item 10 TP4, Item 5 Tp1=
22 cm vg2 R4, Item 12 R5, Item 13 TP3, Item 4 Gnd
9" normal
6" mag vg3 R7, Item 17 R8, Item 16 TP2, Item 3
vg1 R1, Item 9 TP4, Item 5
16 cm
vg2 R7, Item 17 TP2, Item 3
6"
D The test points are on the CCD Interface Board. Make measurements between the test points in the
table and ground, located at TP1 on the CCD Interface Board.
Note: VG1 controls focusing uniformity.
VG2 controls center focusing.
VG3 controls the entry field diameter (on Imageur 22 cm only).
D On the 16cm versions, low voltages for Magnifiers 1 and 2 must be set at minimum.
D Adjustments can be optimized. Begin by adjusting VG3 (entry field diameter R7 and R8, Imageur
22 cm only) because this adjustment affects the other voltages.
D The center focusing adjustment (VG2) can be optimized on the oscilloscope with the following
procedure:
1. Connect an oscilloscope probe at TP3/CCD Video Board (video output).
2. Place a Funk 23 Test Pattern on the input window of the Imageur (bursts in the vertical direction on the
screen), and run a fluoroscopy sequence at 50 kV with open field.
ILLUSTRATION 4
video outputtp3/ccd video board
set wedge at a
45 degree 9" fov = 1.5 lp minimum
angle from 6" mag = 2.0 lp minimum
vertical to avoid
alaising
10 ms/div A
3 . 29
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
TABLE 3
TH 9438 HX H560 (22cm) Tube
Normal Magnifier 1 Magnifier 2
VG1
100 to 300 V 100 to 300 V 100 to 300 V
VG2 500 to 1100 V 500 to 1100 V 500 to 1100 V
VG3
VG4
3.0 to 4.5 kV
2.5 to 3.0 kV
6.0 to 8.0 kV
2.5 to 3.0 kV
10.0 to 12.5 kV
2.5 to 3.0 kV
VG5
30.0 kV 30.0 kV 30.0 kV
TABLE 4
TH 9466 or 9449 HP H506 (16cm) Tube
Normal
VG1 50 to 150 V
VG2 1.8 to 2.3 kV
VG3
VG4 2.5 to 3.0 kV
VG5 30.0 kV
3 . 30
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 5
ccd interface board
3 . 31
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
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Blank page
3 . 32
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
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SECTION 2
TOOLS
SECTION 3
SAFETY PRECAUTIONS
D Take all usual safety precautions for electronic board manipulation (i.e., mats and bracelets to protect
against electrostatic discharge).
D Read the safety precautions concerning xray equipment.
SECTION 4
PREREQUISITES
These adjustments are performed when replacing the compact optics/CCD Module (consisting of the CCD
Sensor Board and Interface Module Board) assembly.
Note: The two boards comprising the CCD Module are coupled. They must be replaced together.
3 . 33
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 5
PROCEDURE
5.1 Configuration
Display centering pattern from MDA.
Check that Jumper X1 (Ill. 9, Item 1) is in the V1 position on the CCD Module.
5.2 Adjustments
D The mounting ring on the II tube (Ill. 9, 10, 11, and 12, Item 1).
D The upper part supporting the CCD Module (Ill. 9, 10, 11, and 12, Item 2).
Loosen
1. Check that the three ring mounting screws are tight (Ill. 9, 10, 11, and 12, Item 3). Do not tighten the
three screws (Ill. 9, 10, 11, and 12, Item 4) securing the upper part of the optical system to the mounting
ring. illustrations at end of this job card
2. On the CCD Interface Board, turn R16 completely clockwise to open the circular blanking window to
its maximum, and turn Potentiometer R10 and R11 completely clockwise to open the Iris wide.
Optional: opening iris decreases depth of field, A high depth of field (small iris opening) will make focus look good when it is not optimized
3. Place a nonmetallic rule on the II tube input window, perpendicular to the Carm.
To ensure the CCD is note rotated.
4. Run a fluoroscopy sequence using minimum parameters. Center the image in the memory display
window by using the mounting assembly of the optical system upper part. At the same time, ensure that
the image in the patient axis is correctly aligned by running a sweep reversal: The image of the rule
must remain vertical on the screen.
5. Once the centering and orientation correctly adjusted for all sweep reversal positions, tighten the three
screws (Ill. 9, 10, 11, and 12 Item 4).
5.2.2 Focusing
1. This adjustment must be performed with open Iris for good accuracy (on the CCD Interface Board, turn
Potentiometers R10 and R11 fully clockwise).
2. Connect an oscilloscope probe to TP3/CCD Video Board (video output).
3. Loosen the locking screw (Ill. 10 and 12, Item 5) on the adjustment ring (Ill. 9, 10, 11, and 12, Item 6).
4. Place a Funk 23 test pattern on the input window of the II tube, with the bursts perpendicular to the
Carm. Rotate 45 degrees to prevent aliasing
5. Run a wide open fluoroscopy with minimum parameters.
3 . 34
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 6
10 ms/div A
50 mV/div
CAUTION The adjustment ring locking screw (Ill. 10 and 12, Item 5) and must be
correctly tightened to avoid any play in the optical system.
1. Circular Blanking:
Adjust the circular blanking window so that it is flush with the useful image of the output window of the
II tube. To do so, use the following potentiometers (see Illustration 13):
R13 = Horizontal centering (Item 31),
R14 = Vertical Centering (Item 30),
R15 = Horizontal/Vertical Ratio (Item 29), Roundness
R16 = Diameter (Item 28). Size
3 . 35
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 7
0.4 A
1. Prerequisite
CCD module gain should have been set to minimum by turning R1 to extreme clockwise.
Do not put any fantom on the positioner. for R1 see illustration 14 item 7
Open the Xray collimator to irradiate the full 22 cm field.
Select 40 KV mA minimum.
2. Connect an oscilloscope probe to TP2/CCD Video board and synchronize it to display an horizontal
lign corresponding to the center of the image. Tp1 on interface board = GND
3. Run a fluoroscopy while gradually increasing Xray parameter, until the video signal reaches the
clipping threshold, as shown on illustation 8 the video signal begins to saturate. flatten
The video level obtained in these conditions is called A.
3 . 36
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 8
Clipping threshold
video starts to
flatten (lab value
was 600mV your A
value may differ B
Increase gradually
KV mA
parameters = radiation
4. Run a second fluoroscopy sequence while gradually decreasing the paramaters to obtain a value
of B = 0.8 x A. 0.8(600) = 480mV
5. Adjust R1/CCD module (Ill. 14, Item 7) to obtain a video signal equal to 1.2 V 50 mV in
these conditions. adjust so 480 mV increases to 1.2 volts
Note: The maximum useful level generated by the CCD module is considered to be equal to 80% of the
clipping threshold, as the CCD sensor is no longer linear when reaching this saturation level.
Do RG 353 ( video board adj), RG253 (black level threshold) first. Then do dose adjust.
5.2.5 Dose Adjustment
3 . 37
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 9
compact optics imageur 22 steno CCD
Loosen all three screws
for image centering.
ILLUSTRATION 10
compact optics imageur 22 STENO CCD
Item 5 lens locking screw
P1
5
3 . 38
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 11
compact optics imageur 16 steno CCD
ILLUSTRATION 12
compact optics imageur 16 steno CCD
5 P1
1
3 . 39
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 13
ccd interface board
3 . 40
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 14
chip module ccd
V2
V1
TP1 TP3
X1
J2 TP4
TP6
TP5
J1
TP7
TP2
R1
TABLE 1
ITEM
Fuses None
Leds None
3 . 41
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Blank page
3 . 42
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 1
SUPPLIES
None.
SECTION 2
TOOLS
D Digital multimeter.
D Two copper plates, 175 x 175 mm, 1 mm thickness.
D Radcal 2025AC dosimeter.
D Ionization chamber 20 x 5 60.
D II Tube Technical Specifications.
SECTION 3
SAFETY PRECAUTIONS
D Take all usual safety precautions for manipulation of electronic boards (i.e., mats and bracelets to
protect against electrostatic discharge).
D Read the precautions necessary when working near xrays.
SECTION 4
PREREQUISITES
The adjustments described in this Job Card should be performed when replacing:
D II tube.
D EHV power supply.
D CCD Interface Board.
1. Remove power from the Imageur.
2. Remove the board cage cover.
3. On the CCD Interface Board, turn the R1 thru R9 potentiometers (Ill. 15, Items 9 thru 17) fully
counterclockwise (min. control voltage).
3 . 43
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 5
PROCEDURE
5.1 Configuration
* Inactive
5.2 Adjustments
EHV Adjustment:
D The command voltages of the EHV power supply must be adjusted on the new CCD Interface Board.
Perform the adjustments as shown on Job Card RG 350.
D Perform the checks on the interface functions with the Stenoscop (see Job Card RG 250 para. 5 & 7).
Dose Adjustment:
D This is carried out via the CCD Interface Board, and must also be readjusted (see Job Card RG 251).
3 . 44
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ILLUSTRATION 15
ccd interface board
3 . 45
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
TABLE 2
CCD INTERFACE
ITEM
L R/F
32 X1 IRIS COMMAND M Steno
T R/F
22 X2 COMMAND DOSE SELECTION U Steno
A Norm
21 X3 H SWEEP REVERSAL PRESET B INV
C Norm
19 X4 V SWEEP REVERSAL PRESET D INV
P ON
24 X5 IRIS/REC Q OFF
SwitchesJumpers
Sw tchesJumpers
R ON
23 X6 AREC OUT S OFF
E Steno
26 X7 ABD WINDOW MODE F R/F
G Steno
25 X8 CIRCULAR BLANKING MODE H R/F
J SAS
20 X9 PG INPUT SELECTION K ADVX
V Anamorphote lens
7 X10 IRIS SELECTION W Compact lens
2 DS1 (red) II tube vacuum default
38 DS2 (green) DOSE 1
Leds
36 DS3 (green) DOSE 2
34 DS4 (green) DOSE RAD.
09 R1 VG1 N
10 R2 VG1 Mag 1
11 R3 VG1 Mag 2
12 R4 VG2 N
13 R5 VG2 Mag 1
14 R6 VG2 Mag 2
17 R7 VG3 N
16 R8 VG3 Mag 1
15 R9 VG3 Mag 2
37 R10 IRIS 1
Potentiometers
Potent ometers
35 R11 IRIS 2
33 R12 IRIS RAD
31 R13 H CENTERING
(not used in RF versions)
ANALOG WINDOWS
30 R14 V CENTERING
29 R15 H/V
CIRCULAR
28 R16 BLANKING
DIAMETER
AGC WINDOW
27 R17 DIAMETER
18 R40 BPG2 DELAY
3 . 46
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
ITEM
1 TP1 0V
3 TP2 VG3
4 TP3 VG2
5 TP4 VG1
TP5 Iris command
TP6 REC 2
Test points
po nts
TP7 B XRAY ON
TP8 B CLTV
TP9 BPG1
TP10 BPG2
6 TP11 VD
8 TP12 HD
3 . 47
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REV3 asm 826 921 P635
Blank page
3 . 48
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
SECTION 1
SUPPLIES
None.
SECTION 2
TOOLS
SECTION 3
SAFETY PRECAUTIONS
D Take all usual safety precautions for manipulation of electronic boards (i.e., mats and bracelets to
protect against electrostatic discharge).
D Read the precautions to take when working near xrays.
SECTION 4
PREREQUISITES
These adjustments are made when replacing the CCD Video Board.
SECTION 5
PROCEDURE
5.1 Configuration
3 . 49
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
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TABLE 1
X3 E Gamma in ON Mode
X7 P Go to Black in ON Mode
X9 T AGC activated
1. Connect an ocilloscope probe at TP11/CCD Inteface Board (VD 20 ms/div): synchro principal time
base. Skip steps one and two
2. Connect an oscilloscope probe at TP12/CCD Interface Board (HD 10s/div).
Put the CCD Video Board on an extension board and perform the following checks:
ILLUSTRATION 16
clamp pulse
Adjustment: If necessary, use R16/CCD Video Board (Ill. 25, Item 22).
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Test Point: TP35/CCD Video Board TP35 = Solder dot on video board
see illustration 25 further on in this
Duration: B = 40 1 s
job card
ILLUSTRATION 17
Test signal
can be hard
to sync on
B
Adjustment: If necessary, use R15/CCD Video Board (Ill. 25, Item 25).
ABD Window
1. Open the video mask to its maximum (R16/CCD Interface Board completely clockwise).
2. Run a wide open fluoroscopy, with open shutters.
Test Point: TP3/CCD Video Board
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ILLUSTRATION 19
Horizontal blanking
Note: Replacement Boards are preset for 625 lines/50 Hz. Adjustment must be redone for 525 lines/60 Hz.
3. Adjust the circular blanking and the ABD window. Refer to RG 351, paragraph 5.2.3.
These are adjusted in the factory. They can be controlled easily from the test signal generator on the Board.
ILLUSTRATION 20
test signal level
Adjustment: If necessary, use R10/CCD Video Board (Ill. 25, Item 23)
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ILLUSTRATION 21
preset gain and blAck level
B R1 = 250mv
C R3 = 50 mv
D
Adjustment: If necessary, use R1/CCD Video Board (Ill. 25, Item 10) to adjust
Preset GainB and R3/CCD Video Board (Ill. 25, Item 13) to adjust Black Level C.
b. Check the D Synchronization level (nonadjustable).
D = 300 20 mV (Ill. 21).
ILLUSTRATION 22
AGC gain
Adjustment: If necessary, use R5/CCD Video Board (Ill. 25, Item 6).
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4. ABD Offset
a. Connect a voltmeter between TP1 and TP7/CCD Video Board.
b. Do not reconnect the coaxial cable to J2/CCD Video Board.
c. Place the X1/CCD Video Board switch in the A position.
d. No video signal is fed to the CCD Video Board input. Under these conditions, check the offset of
the ABD signal, without running an xray:
Test Point: TP1TP7/CCD Video Board
Level: 0 20 mV
Adjustment: If necessary, use R13/CCD Video Board (Ill. 25, Item 3).
5. ABD Gain Abd gain sets preamp video (100mv) and monitor video (250mv) equal to2.1 vdc
a. Put the X1/CCD Video Board switch in the B position.
b. The video signal now reenters the CCD Video Board. Under these conditions, check the ABD
signal.
This level is sent to the steno "at proper
Test Point: TP1TP7/CCD Video Board brighness" telling the generator that the abc is
Level: 2.1 V 50 mV satisfied.
Adjustment: If necessary, use R6/CCD Video Board (Ill. 25, Item 5).
ILLUSTRATION 23
gamma (input test signal)
Adjustment: If necessary, use R10/CCD Video Board. cal generator output level
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Adjustment: If necessary, use R9/CCD Video Board (Ill. 25, Item 20).
Readjust the level of the test signal with the nominal value.
Test Point: TP2/CCD Video Board
Level: A = 100 5 mV
Adjustment: Use R10/CCD Video Board (Ill. 25, Item 23).
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ILLUSTRATION 25
ccd video board
R179
R
TP35 solder dot
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TABLE 2
CCD INTERFACE
ITEM
A = NORMAL
26 X1 VIDEO INPUT MODE B = CALIBRATION
C = DYNAMIC
18 X2 GAMMA MODE D = NORMAL
E = ON
19 X3 GAMA F = OFF
G = R/F
16 X4 VIDEO OUTPUT MODE H = STENO
I = ON (NORMAL)
Switches 27 X5 ABD CLIPPING MODE J = OFF (CALIBRATION)
L = STENO
28 X6 ABD OUTPUT MODE M = R/F
P = ON
21 X7 X7 GO TO BLACK MODE Q = OFF
R = OFF
19 X8 ABD WINDOW DISPLAY S = ON
T = ENABLED
17 X9 X9AGC U = DISABLED
Leds none
10 R1 Gain Preset (Fluoro)
09 R2 Gain Preset (Rad)
13 R3 Video Setup
14 R4 Video Offset
06 R5 AGC Gain
05 R6 ABD Gain
20 R9 Gamma
Potentiometers
Potent ometers
23 R10 Test signal level
12 R11 Black level threshold
02 R12 AGC Delay
03 R13 ABD Offset
24 R14 H Blanking
25 R15 Test Signal
22 R16 Clamp Pulse Width
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ITEM
11 TP1 0V
08 TP2 Video IN (low bandwidth)
15 TP3 Video OUT (low bandwith)
TP4 ABD video integrator OUT
TP5 ABD window integrator OUT
TP6 ABD divisor OUT
07 TP7 ABD OUT
TP8 Post AGC video OUT
TP9 Black level threshold ref
04 TP10 AGC VALID
Test points TP11 Video preamp OUT
TP12 Post AGC Video OUT
TP13 Gamma peak detection OUT
TP14 Gamma threshold OUT
TP15 Gamma out
TP16 AGC command OUT
TP17 T/H OUT
TP18 REC OUT
TP19 ABD Video IN
TP20 Video OUT (high bandwith)
TP21 Clamp pulse OUT
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SECTION 1
SUPPLIES
None.
SECTION 2
TOOLS
SECTION 3
SAFETY PRECAUTIONS
Take all usual safety precautions for electronic board manipulation (i.e., mats and bracelets to protect
against electrostatic discharge).
SECTION 4
PREREQUISITES
SECTION 5
PROCEDURE
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Perform the adjustments described in Job Card RG 351 , par. 5.2.1 and 5.2.2. Make sure the Iris is open
before starting.
With the Iris still in the open position, optimize the EHV settings, especially the center focusing (vg2).
5.4 Dose
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Time: Manpower:
SECTION 1
NECESSARY REPLACEMENT
None.
SECTION 2
REQUIRED EQUIPMENT
SECTION 3
SAFETY PRECAUTIONS
SECTION 4
PREREQUISITES
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Time: Manpower:
D No video mask.
No image. D No fluoroscopy symbol.
No Defective monitor(s).
Yes
Video signal at DSM output?
Defective DSM/Monitor
No video connecting cable
Yes
Video signal at DSM input?
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Check Fuse F1 on
Yes CCD Power Supply
Board
Fuse F1
Yes
OK?
Check Imageur/Stenoscop
No Interface cable.
Check 24V Power Supply
Replace F1. on Stenoscop.
Find cause of F1 burnout Check Switch S1/CCD
Power Supply Board
Fuse Yes
F1 burnout
again?
No Replace CCD
Power Supply
Board.
DS1/CCD No
Power Supply
lit?
Yes
Observe composite
blanking signal on
TP36/CCD Video.
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No
Observe CCD Video Board video input Imageur/Stenoscop interface is
signal in TP2/CCD Video during a Fluo- malfunctioning.
roscopy exposure. Check Go to Black command
(Pin 18 on the Imageur interface
cable).
This command must not be at
Logical State 0 in Fluoroscopy.
Video signal Yes
present?
Replace CCD
No Video Board.
END
C D
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C D
Video Yes
Yes CIRC BLK
signal present? permanently at
Logical State 1?
Replace coaxial
No Turn R16/CCD Interface
cable between
CCD Module and No Board completely clockwise.
CCD Video Board. If no image appears, replace
Disassemble optical Check BLK signal CCD Interface Board.
system/CCD module at TP31/CCD Video.
assembly. Observe
video signal in
TP3/CCD Module.
Yes
BLK at Logical
Yes Video State 1 permanently?
signal present?
Check HD (A28)
No and VD (A 29) signal at
No J1/CCD Video Board
Replace CCD
Video Board.
Yes
Signals OK?
No No
Yes Iris OK? Signal OK? Yes
Yes
Replace
Replace EHV Replace ribbon cable
CCD/optical Replace optical system/
Power Supply. between CCD Module
system CCD Module assembly.
and backpanel.
assembly.
END
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Time: Manpower:
Yes
Video signal
present?
Replace CCD
No Video Board.
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Yes Video
signal present?
Replace coaxial
No
cable between
CCD Module and
CCD Video Board. Disassemble optical
system/CCD module
assembly. Observe
video signal in
TP3/CCD Module.
Yes Video
signal present?
No
No
Yes Iris OK?
Yes
Replace
Replace EHV CCD/optical
Power Supply. system
assembly.
END
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Yes
Image sharper?
Yes No
Image OK?
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No
24 V OK?
Yes
Check 24 V power
supply on Stenoscop.
All voltages in No
compliance?
Yes
Readjust voltages in
question.
Yes
OK after adjustments?
No END
Unable
No to readjust the voltage Yes
in question? (It stays at
0 V for example.)
CAUTION:
On the 22 cm, Vg2 is adjusted
using R4 and R5.
On the 16 cm, Vg2
is adjusted using R7.
B A
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B A
No
No
Cable OK? Still unable to
adjust the voltage?
Yes
Yes
Replace cable.
Replace the CCD Interface
Board.
Check II tube high voltage
cable connectors.
No
High voltage cable
connectors OK?
Replace connectors or
redo cabling with the Yes
faulty connectors.
Yes No
OK ?
No
Voltage OK?
Yes
Replace the EHV Power
Supply.
Replace the II tube.
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Time: Manpower:
Open Imageur
rear cover
No Yes
Is DS1 red LED
lit or flashing?
No
Connections OK?
No Yes
OK ?
Replace END
Voltage stable? II tube.
No Yes
Replace Replace
CCD Interface EHV Power
Board. Supply.
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Time: Manpower:
No
Check the video
See LA 456 adjustments using the test
signal (see Job Card
RG 353, Para 5.2.4).
No
OK? Readjust.
A B
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A B
Make compliant.
Check operation of
LEDs DS1 and DS2 on
CCD Interface Board:
Check interface
Dose 1 Mode = DS2 lit,
on Stenoscop unit.
Dose 2 Mode = DS3 lit.
Yes
Adjustments OK?
Yes
No Imageur No
No operates correctly?
LEDs operated
OK?
Replace Compact Yes D
Optics/CCD Module
Replace the CCD assembly.
END
Interface Board. Yes
No Jumper,
cable and connections
OK?
Yes
Make the cable compliant.
Yes No
OK?
END C
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C D
Iris locked? No
(with power supply Adjustments OK?
Yes switched off)
Yes
No
Make
Attempt to unlock Iris by compliant.
directly manipulating gears.
Check for sticky areas and
correct operation of Iris.
Check that aging of II
tube is not the prob-
lem.
No
OK ?
No
OK ?
END Yes Check CCD Video
Board
Check operation of Iris motor. adjustments (see
Disconnect connector at END Job Card RG 353
J3/CCD Interface Board. Para. 5.2).
Send +5 V to motor terminals
(with both polarities).
No Yes
Adjustments OK?
No
Motor runs?
END
Replace the CCD
Video Board.
Replace Compact
Yes
Optics/CCD Module
assembly.
Replace the CCD
Interface Board.
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Time: Manpower:
No Image present?
(glare)
Yes
See LA 451
Display the ABD window by putting
X8/CCD Video Board in S position.
No Mask displayed?
(50% of useful
Image.)
A
Yes
Yes
OK after
adjusting? Yes
No END
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Yes
Signal OK?
No
Replace the CCD Video Board.
Check configuration of
Jumper X7 on CCD Interface
Board (X7 must be on E).
No
Configuration
OK?
Put X7 on E
Yes
Yes
OK?
END
No
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B
No
No Yes
Signal present?
Ok after Yes
adjustments?
No
END
Replace the CCD
Interface Board.
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d. 3 . 85
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Time: Manpower:
SECTION 1
SUPPLIES
None.
SECTION 2
TOOLS
SECTION 3
SAFETY PRECAUTIONS
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Options
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Time: Manpower:
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Time: Manpower:
The Laptop is connected on the MDA memory throught the COM5 port and this in the terminal mode.
Cable number 3 must be choosen in the RS232 spider cable (4 outputs); this one is set on COM5
Open the TERMINAL window of the Laptop which is situated in the ACCESSORY group.
Configure the settings of the TERMINAL mode as described here after:
1. Settings
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2. Terminal emulation
3. Terminal preferences
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4. Communications
When the settings are ended, save the file given in the MDA name.
This file will be recalled each time that a terminal connection will be done on the MDA memory.
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SECTION 5
PROCEDURE FOR WINDOW 95
The Laptop is connected on the MDA memory through the COM5 Port and this is in the terminal mode.
Cable number 3 must be chosen in the RS232 spider cable (4 Outputs); this one is set on COM5
Open the TERMINAL window of the Laptop which is situated in the ACCESSORY group.
Press <OK>
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Press <OK>
DATA BITS : 8
PARITY : NONE
STOP BITS : 1
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Time: Manpower:
SECTION 1
SUPPLIES
None.
SECTION 2
TOOLS
FE Laptop
Null modem cable
SECTION 3
SAFETY PRECAUTIONS
1. Take all usual safety precautions for manipulation of electronic boards ( i.e.mats and bracelets to
protect against electrostatic discharge)
2. Read the precautions to take when working with Xrays.
SECTION 4
PREREQUISITES
1. See Job Card DI 571 for Laptop settings in Terminal mode Enlarge terminal
2. The Laptop must be connected and the Terminal mode selected. window to full size
SECTION 5 For version 4.11 software
PROCEDURE 3 1 2
On the MDA memory, select the Service menu by pushing on System SetUp key then Permanent Data .
The following screen will be displayed.
This needs to be
clarified for all other
software versions.
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MAIN MENU
ERROR LOG
Then the displayed log can be selected by hitting the correspondant letter key.
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Error code
XRay start
XRay stop
End of quality
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Treatments modified
Set XPERM to : %d
Send LUT
Midas error on send LUT : %lx
Send NR table
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DATA BASE
Verification and correction of the data base is performed by hitting F2 key in the main menu
then F1 to launch the programm.
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That means that 4 files have been found and checked and that one of them is bad.
By hitting again F1, the programm is launched again and will automatically correct the defective file
by cancelling the defective image.
If the defective image is the only one for this patient, the patient references will be cancelled.
AUTO TEST
They are launched throught the F3 key in the main menu and then F1 key.
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When the Auto Test are ended, the following screen is displayed if all the test are OK.
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Time: Manpower:
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Time: Manpower:
SECTION 1
SUPPLIES This job card is wrong.
1) select System Setup
None.
2) select Permanent Data
SECTION 2 3) select Service menu
TOOLS 4) Enter password "PEGASE"
None.
5) select Image Quality Pattern
SECTION 3
PROCEDURE
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CENTERING
Select Pattern then Centering .
Following pattern is displayed on A monitor.
Check and if necessary readjust the ABD window size in order to match with the central
circle. See RG XX for window sizing.
Check and readjust the picture centering. See RG254 of the SM and RG351 of this ASM.
CAUTION : do not exit from the centering pattern menu during Xray else the memory
will reboot.
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DENSITY
Select Density
The monitor screen displays a pattern including two squares.
Density of the internal square can be modified by hitting the arrow keys.
Density valuues are displayed on EL display.
Density values raise by step of 17 pixels from 0 to 255
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GLOBAL
Select Global
The monitor screen displays a pattern including different squares with
different densities.
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Time: Manpower:
SECTION 1
TOOLS REQUIRED
Standard tool kit.
Funck pattern type 23
SECTION 2
PRELIMINARY PRECAUTIONS
1. Set the unit with II top side
2. Do not rotate the image when making FTM measurement
3. Noise reduction (FNR) must be set at 16
4. Read the safety precautions concerning Xray systems.
SECTION 3
PROCEDURE
1. Set a 1mm copper plate over the Xray tank and the Funck pattern with 0.6 L/cm or 1.2 L/cm area
centered over the image intensifier.
2. Select Auto fluoro on the Stenoscop console.
3. Select the Service menu by hitting the following keys:
SYSTEM PARAMETER PERMANENT DATA SERVICE MENU
4. Enter the password PEGASE in capital letter.
5. Select Image quality menu.
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6. Select FTM
7. Monitor A screen displays 3 different ROI and the following screen is displayed on the EL.
Move the selected ROI to the white part of the picture (see ill.1).
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FTM
FE ID:
SYST ID:
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16 cm FIELD 50 55
22 cm FIELD 12 15
16 cm FIELD 20 25
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Time: Manpower:
SECTION 1
TOOLS REQUIRED
Standard tool kit.
MS3 leeds pattern
SECTION 2
PRELIMINARY PRECAUTIONS
1. Set the unit with II top side
2. Do not rotate the image when making measurement
3. Set the noise reduction to level 16
4. Open the collimator blades full size
SECTION 3
PROCEDURE
1. Select the Service menu by hitting the following keys:
SYSTEM PARAMETER PERMANENT DATA MENU SERVICE
2. Enter the password PEGASE in capital letter.
3. Select Image quality menu.
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16 cm field
1. Run auto fluoro during 3 sec. with two mm copper on the Xray tank.
2. Select ROI
3. Set a 50x50 ROI
4. Check that the grey level is close 100 +/ 4
5. If the value is not correct, set the unit in manual fluoro and adjust mA to reach 100 +/ 4
4. Select UNIFORMITY
5. Select UNIFORMITY
50 Hz 60 Hz
UNIFORMITY OF DENSITY
1. Make fluoro during 3s
2. Read the values displayed on the different boxes.
Mmax Mmin
3. Check that the maximum difference between two values is : <= 20 % for 16 cm
Mmax
<= 25 % for 22 cm
22 cm field
Run the same procedure.
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UNIFORMITY OF RESOLUTION
1. Set the MS3 pattern on the II.
2. Select Auto fluoro on the Stenoscop console.
3. Make fluoro in auto mode
4. Read the values displayed on the different boxes.
5. Check that the maximum difference between two values is : (s/Mmax) (s/Mmin)
<= 40 %
(s/Mmax)
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Time: Manpower:
SECTION 1
PREREQUISITES
Errors can occur during POST ( Power On Self Test ) which is performed every time the system is
powered on. Fatal errors, which prevent the system to continue the boot process, are communicated
through a series of audible beeps. Other errors are displayed on electroluminiscent display in the
following format :
For most displayed error messages, there is only one message. If a second message appears, it is
RUN SETUP. If this message occurs, press <F1> to run BIOS Setup.
(A keyboard has to be connected on the PC memory)
Beep Codes
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Error Messages
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Error Messages
Memory Parity Error at Memory failed. If the memory location can be determined, it
xxxxx is displayed as xxxxx. If not, the message is Memory Parity Replace PC
Error????.
I/O Card Parity Error at An expansion car failed. If the address can be determined,
xxxxx it is displayed as xxxxx. If not, the message is I/O Card Parity Replace PC
Error?????.
DMA Bus Time-out A device has driven the bus signal for more than Replace PC
7.8 microseconds.
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GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
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3 . 124
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
Time: Manpower:
SECTION 1
SUPPLIES
None.
SECTION 2
TOOLS
None.
SECTION 3
SAFETY PRECAUTIONS
None.
SECTION 4
PROCEDURE
1. Switch the unit ON
2. Enter the service menu (system setup / permanent data).
3. Press the Calibrate touch screen key
3 . 125
GE Medical Systems STENOSCOP 2 STENOSCOP Plus
REV3 asm 826 921 P635
5. Hit the Calibrate soft key and follow the instructions displayed on screen.
3 . 126