Welch Allyn Atlas Patient Monitor - Service Manual 2007 PDF
Welch Allyn Atlas Patient Monitor - Service Manual 2007 PDF
Welch Allyn Atlas Patient Monitor - Service Manual 2007 PDF
Service Manual
Welch Allyn
8500 SW Creekside Pl
Beaverton, Oregon 97008
6200-43E Revision D Copyright 2007
Part No. Rev. Description ECN# Date Approved
6200-43E A New release of Atlas Service Manual 5-40429 10/99 RS/LP
6200-43E B Updated calibration procedures 5-44782 07/02 DK
Updated performance verification procedures
Updated drawing 620150 Rev B to Rev C
Updated drawing 620201 Rev A to Rev B
Updated drawing 620524 Rev A to Rev B
Added complete repair parts lists.
Added calibration date table
6200-43E C Updated to reflect changes in hardware and software 5-45730 03/03 DK
Section 2: Service
Incoming Inspection ............................................................................................................ 11
Calibration and Maintenance Schedule.............................................................................. 12
Setting Date and Time ......................................................................................................... 14
Pangea Communication Protocol ........................................................................................ 14
BP Calibration ...................................................................................................................... 14
50mmHg Calibration............................................................................................................ 17
250mmHg Calibration.......................................................................................................... 17
CO2 Reset (623xx Models Only).......................................................................................... 18
ET CO2 Calibration .............................................................................................................. 19
No-Load Battery Voltage Calibration .................................................................................. 20
Battery Voltage Calibration.................................................................................................. 21
Printer Print Adjustment ..................................................................................................... 22
Temperature Calibration...................................................................................................... 23
Calibration Date Set ............................................................................................................. 24
Explanation of an Atlas Service Screen.............................................................................. 25
Software Upgrade Procedure............................................................................................... 27
Down Loading NVRAM Files.............................................................................................. 28
The Atlas Monitor combines in one unit all the necessary measurements for patients under
anesthesia, for surgical recovery, or bed side monitoring. See Section 1, page 5 for a complete
listing of product models and options.
According to the standards of care for Nurse Anesthetists and Anesthesiologists, all patients
receiving conscious sedation are to be continuously monitored throughout the procedure and
recovery phase by ECG, SpO2, and NIBP. CO2 monitoring is a requirement during gas
anesthesia (when patient is ventilated).
The Atlas combines a CRT to display ECG, CO2, SpO2, and respiration waveforms. It utilizes
LEDs for the other numeric values to maximize visibility and viewing angle. Although not
designed to be a transport product, the monitor has an integral handle and it is small and
light enough at 13 lbs. to be easily moved.
A battery was added to enable the monitor to be used if there is a power outage or to be
unplugged momentarily when moved with the patient from the surgery room to the recovery
room. The battery was not designed to make the Atlas into a transport monitor. The Atlas
monitor should be plugged into AC as much as possible to give you the maximum battery
backup time when there is a power outage. It will maintain unit operation for up to an hour
when power is interrupted if the battery is fully charged.
IMPORTANT: For a complete description on the function and use of the Atlas, as well as user
safety warnings, cautions, and warranty information, read and understand the Atlas
Operators Manual. See the Table 1-1 below for correct Operators Manual part #.
Help Information
To assure correct operation and performance all service and repairs must be performed by
fully trained and properly equipped personnel, using genuine replacement parts and correct
procedures. Failure to do so will also invalidate the product warranty.
Agency Approvals
ETL Listed
U L 2 6 01- 1 ,
C S A C 2 2 . 2 N o . 6 01. 1
I E C 6 0 6 01- 1 , A S 3 2 0 0 . 1
I E C 6 0 6 01- 1- 2
C LI
STED US
74227
N344
Warning, Cautions and Notes
All operating and service personnel should be familiar with the general safety information
in this summary. Specific warnings and cautions will also be found throughout the opera-
tors manual. Such specific warnings and cautions may not appear here in the summary.
CAUTION
95%
Storage Humidity. Refer to technical specifications in operator's
for more details.
MAX
622SP-E1 ECG, Nonin SpO2, NIBP, Temp, Respiration, Battery, RS232, Printer
622NP-E1 ECG, Nellcor SpO2, NIBP, Temp, Respiration, Battery, RS232, Printer
623SP-E1 ECG, Nonin SpO2, NIBP, ETCO2, Temp, Respiration, Battery, RS232, Printer
623NP-E1 ECG, Nellcor SpO2, NIBP, ETCO2, Temp, Respiration, Battery, RS232, Printer
The first three digits in the product structure sequence designates the model number. The
fourth character in the sequence designates the SpO2. The fifth character in the sequence
designates if it has a printer or not. The first suffix designates the country language when
shipped. The second suffix designates the power cord shipped with the Atlas.
Second Suffix:
623xP
Date/Time
Waveform Screen
screen
Trend Advanced Configuration Screen
Screen Language
Silence duration
ECG gain
ECG lead set
ECG speed
ECG bandwidth
Set date & time
Initial pressure
MAP
Second trace selection
Advanced Temperature units
Configuration Respiration speed
CO 2 units
Date/Time
Co2 Print on alarm (only with software Rev.
Screen BB.2.2000 or higher)
Reset
Service Mode Screen
Save Verify manometer
Settings Reset to factory defaults
Battery test
Calibrate Co 2
Service Mode
Screen CRT test pattern
Printer test pattern (Models 621SP and
LED test 621NP only)
Button test
Display A/D channels *
NOTE: The Print on alarm function in Advanced configuration mode screen is only
available with software version BB.2.2000 and higher.
* NOTE: The Display A/D channels function in the Service Mode Screen only allows
you to view system information by pressing the SET button. It does not allow
you to change system settings.
622xP
Date/Time
Waveform Screen
screen
Trend Advanced Configuration Screen
Screen Language
Silence duration
ECG gain
ECG lead set
ECG speed
ECG bandwidth
Set date & time
Initial pressure
MAP
Second trace selection
Advanced Temperature units
Configuration Respiration speed
Print on Alarm (Only with software Rev.
Date/Time BB.2.2000 and higher.)
Screen
NOTE: On models 622S0 and 622N0 delete the Print test pattern function in the
Service Mode Screen. Model 622S0 and 622N0 do not come with printers.
* NOTE: The Display A/D channels function in the Service Mode Screen only allows
you to view system information by pressing the SET button. It does not allow
you to change system settings.
621xP
Date/Time
Waveform Screen
screen
Trend Advanced Configuration Screen
Screen Language
Silence duration
ECG gain
ECG lead set
ECG speed
ECG bandwidth
Set date & time
Initial pressure
MAP
Second trace selection
Advanced Print on Alarm (Only with software Rev.
Configuration BB.2.2000 and higher.)
Date/Time
Screen
NOTE: The Print on alarm function in Advanced configuration mode screen is only
available with software version BB.2.2000 and higher.
NOTE: On models 621S0 and 621N0 delete the Print test pattern function in the
Service Mode Screen. Model 622S0 and 622N0 do not come with printers.
* NOTE: The Display A/D channels function in the Service Mode Screen only allows
you to view system information by pressing the SET button. It does not allow
you to change system settings.
CO2 Sensor
CO2 SubSystem
512 X 16 Flash
Local System Bus
Address,Data,Control
Configuration Motor
EEPROM Driver Motor
General Information
Controller
Clock, Load
Strobe
SPI
Front End
Figure 1-4. Atlas System Block Diagram
Incoming Inspection
NOTE: Use the following guidelines when unpacking the monitor from its shipping carton.
2. If damage is apparent, stop unpacking the carton and contract the shipping company for
further instructions. If the carton is intact, unpack the monitor.
3. With the monitor out of its carton, check to see that all the items listed on the packing
slip are in the shipping carton. See table 2-1 below.
4. If an item is missing, first check the carton, then check with your receiving department. If necessary
contact Welch Allyn at the address and phone number shown on Section 1.
5. Clean and disinfect by following the instructions printed in the Operator Manual.
NOTE: Perform all functional tests as listed in Section 3 before and after servicing.
Operate the Atlas to verify the customer complaint before making any changes to the unit.
Call the customer if the complaint is unclear.
If the unit has caused or is suspected of having caused an injury of any type: DO NOT
DISASSEMBLE OR REPAIR THE UNIT IN ANY WAY. Contact Welch Allyn Customer
Service immediately.
2. Press CLOCK button next to power on button to check date and time. Use the far right
SELECT button to scroll. Highlight the date or time that needs changed.
BP Calibration
Required material.
1. 500cc vessel 4. Calibrated digital manometer
2. Squeeze bulb with one-way valve 5. Tubing and T fittings
3. PC with HyperTerminal 6. Serial cable
NOTE: To start HyperTerminal you must have Windows7 95 or higher installed on your
computer.
3. When you open HyperTerminal you will see a screen similar to the example in Figure
2-1. You will be prompted for a connection description. Choose any name. After you
type in a name click OK.
4. The next window you will see will be the window as shown in Figure 2-2. Click on
Connect using then click on COM1.
5. Set the port settings as shown in the example in Figure 2-3. Now click OK.
6. Connect the pressure meter, bulb, and 500cc vessel to BP port with T connectors as
shown in photograph Figure 2-4.
8. Turn the Atlas on. Start HyperTerminal on PC. Press the <Enter> key and you should see
a Pangea> prompt.
NOTE: Take no more than 3 minutes for the 50mmHg calibration nor more than 3 minutes
for the 250mmHg calibration as the Atlas will automatically, as a safety feature, open the
blood pressure valve. If this happens you will have to turn the Atlas off then back on again
and restart the calibration again.
T112854
Pressure
Meter T Fittings Calibrated 500cc Volume
Squeeze Bulb
50mmHg Calibration
1. Enter the following commands at the Pangea prompt.
Pangea> bp valve close <ENTER>
Pangea> bp safety off <ENTER>
Pangea> bp cal 5000 Do not press <ENTER> yet!
2. Raise the pressure with bulb to as close to 50.00mmHg as possible. Now press <ENTER>.
250mmHg Calibration
1. Enter the following command
Pangea> bp cal 25000 Do not press <ENTER> yet!
2. Raise the pressure with bulb as close to 250.00 mmHg as possible. Now press < ENTER >
NOTE: Make sure date and time are correct before performing the CO2 reset.
1. Turn Atlas on. Make sure the watertrap and scrubber are NOT attached to the Atlas.
2. Press the DATE/TIME button on the lower right of the monitor. The Set Date and Time
and Other Options menu will be displayed.
3. Press the CO2/RESP ALARMS Off button. The CO2 Reset screen will appear.
5. Install the watertrap to the Atlas. Install the scrubber to the watertrap.
Replace watertrap after every six hours of use. Treat watertrap and used CO2
sample lines as bio hazard material!
ET CO2 Calibration
Required material:
1. Tank of approximately 10% CO2, balance N2 (certified) Blood Gas Mixture.
2. Tubing and T connectors.
3. Watertrap and scrubber.
1. Make sure the watertrap and scrubber are not attached to the Atlas. Turn the Atlas on.
2. Place the instrument into the Service Mode by pressing the DATE/TIME button. Make
sure date and time are correct. Press the LEAD SELECT button.
5. Insert the scrubber/water trap assembly into water trap socket. The message
Enter span gas value using Set button 10% will appear.
6. Press the SET button to change the value of span gas being used. The factory default
value is 10%. Calibrate with a 8% to 12% certified CO2 concentration known to be
0.01%).
7. The message press BP Start/Cancel will appear at the bottom right of CRT. Press the
BP/Start/Cancel button.
8. If you receive a Calibration Failed message at this point, check the date. If date is
2022 or above it will fail CO2 calibration.
9. Next you will see a message Warming up. After the Atlas warms up you will see a
message Attach CO2 gas. Remove the scrubber from the CO2 water trap. Do not
remove water trap.
10. Attach the certified source of CO2 gas to the CO2 side-stream sampling tube as per
Figure 2-5 below.
Adjust Regulator to
Approximately 2 psi
Water
Trap
Vent
CO2
11. Adjust the CO2 regulator just enough to allow a small amount of gas to flow out of the
vent (approximately 2 psi).
12. Press the BP START/CANCEL button. The message: Sampling will appear on CRT.
CO2 calibration successful or CO2 calibration failed will appear on the CRT
display.
1. Remove the battery and disconnect the battery leads from the Atlas. Use the DVM to
measure across the connectors, red+ and black-.
2. Adjust the voltage to 6.85 VDC by turning potentiometer R338, located behind the right
battery jack. Turning clockwise will increase the no-load voltage and counter clockwise
will decrease the no-load voltage.
NOTE: Make sure the Atlas IS NOT plugged into AC for this calibration procedure.
4. Set the power supply to 6.8VDC " 200mV and connect the power supply to the battery
connector on the Atlas.
6. Reduce the power supply to 6.0VDC and measure the voltage at the battery connector
(at the Atlas) to the nearest 10mV.
NOTE: Do not measure at the power supply, since cable resistance will introduce error.
NOTE: XXXX represents the measured voltage in millivolts no decimal point. For
example, if you measured 6.010VDC at the battery connector, use the command power cal
6010 <ENTER>.
NOTE: ZZZZ is the raw uncalibrated reading that the instrument made.
9. Reduce the power supply to 5.6 VDC. You should soon hear the low battery alarm.
10. Measure the voltage at the battery connector to the nearest 10mV.
NOTE: XXXX represents the measured voltage in millivolts with no decimal point. For
example if you measured 5.590 volts at the battery connector, then you would enter the
command power cal 5590 <ENTER>.
NOTE: ZZZZ is the raw uncalibrated reading that the instrument made.
3. Attach an ECG simulator to Atlas and set simulator for a heart rate of 60 bpm, normal
sinus rhythm.
4. Press PRINT button. Evaluate the darkness of waveform and text printout.
5. If either need to be changed press DATE/TIME button then press LEAD SELECT button
to access Advanced Configuration menu.
6. Press SELECT button and scroll down to Printer Test Pattern. Then Press
HR ALARMS OFF button
NOTE: These two numbers are the factory defaults and are a good starting point if the sys-
tem is printing poorly or not at all.
8. The left SET button controls the waveform darkness and the right SET button controls
the text darkness.
NOTE: Pressing the SET button up will increase the number and darken the waveform
while pressing the SET button down will decrease the number and will lighten the wave-
form.
Temperature Calibration
Required Material:
1. PC with Windows7 95 or higher 4. 1/4O mono phono jack
2. Atlas serial cable 5. Soldering iron and solder
3. 1k Ohm, 1/2 watt precision resistor 6. Ohm Meter
2. Measure the resistance at the tip of the phono jack. Record that resistance reading, to two
decimal points.
NOTE: The Atlas will show a temperature reading in the temperature display.
NOTE: XXXXXX is the resistance reading you measured and recorded in milliohms at the
tip of the mono phono jack.
Example: If you measure 1000.40 ohms at the tip of the phono jack then you would type
temp cal 100040 <Enter>.
7. Wait four seconds then type: PANGEA> temp state <ENTER>. You will see a value
returned at the Pangea prompt.
8. Verify that the resistance given by the above command returns a value " 0.5 ohms.
NOTE: After calibrating the Atlas you must reset the calibration date. The calibration date
is the date you performed the calibration. The calibration date appears in the Service Mode
menu. See Figure 2-6 for an explanation of the Service screen.
NOTE: XXXX is the number of days from January 1, 1998 until the present date. See
APPENDIX E for that number or calculate manually.
Line A Indicates that the Atlas is a model 220 and that the Atlas has a printer. If the Atlas
did not have a printer then the text with printer would be absent. The date field following
indicates the date the Atlas was last calibrated.
Line B starts with a numeric sequence. The first three digits are the model number of the
Atlas. The next five numbers are the Atlas serial number. The next sequence,alphanumeric,
indicates what software version is currently loaded into the Atlas. The third sequence,
alphanumeric, indicates what version boot software is currently loaded into the Atlas.
Line C starts with the SpO2 OEM board used in the Atlas. There are two SpO2 OEM boards
used in the Atlas. One is Nellcor and the other is Nonin. The next sequence indicates the
model of the SpO2 board. The next sequence, that starts with a letter V, is the version soft-
ware used with the current SpO2 board. The date following the SpO2 software is the date
the OEM loaded the software into the SpO2 board. SpO2 OEM software can not be upgraded.
If the most current software is needed, you will need to replace the SpO2 board.
Line D is the CO2 information if your Atlas has CO2 installed. Only models 623 have CO2
installed. If your Atlas does not have CO2 installed then line D will be absent. If your Atlas
has CO2 installed then line D will start with CO2 followed by a numeric number. That
numeric value is the software loaded into the CO2 board. The next alphanumeric sequence,
starting with a V, is the version of that software. The next numeric sequence starting with
a # is the serial number of the CO2 board. The next sequence, a date, is the date the CO2
was last calibrated. The last sequence, a date, is the date the CO2 was reset. CO2 OEM soft-
ware can not be upgraded. If the current software is needed, you will have to replace the
CO2 board.
Atlas_dl.exe will also query the Atlas to determine what model number the Atlas is and
what language to download.
NOTE: Make sure you have HyperTerminal turned off or the following utility download will
not work!
1. Run the program atlas_dl.exe from the CD or copy the file to your hard drive and run the
program from there.
2. Connect the serial cable between the Atlas and the PC sCOM1 port.
5. When the file starts to download, the CRT will go blank on the Atlas.
6. After down loading is complete, check all alarm settings and all user advanced
configuration settings since these are RESET by this utility software download
procedure.
NOTE: Stop here if you are just upgrading software on a fully functional Atlas monitor or if
you have replaced the CPU board.
NOTE: If you have replaced the MAIN BOARD then you MUST continue with the next
procedure (DOWNLOADING NVRAM FILES).
NOTE: Perform the following NVRAM downloading procedure if you have replaced the
MAIN BOARD. The NVRAM resides on Main Board.
1. Once you have procured the latest Atlas Repair Software, you will be able
to run the programs straight from the CD or copy the files to your hard drive.
NOTE: Through HyperTerminal you will need to load the following files:
1. nvram_cal_init.txt
2. nvram_common.txt
3. model# of Atlas
3.1.You will load nvram200.txt if your Atlas is a model 621xx.
3.2.You will load nvram210.txt if your Atlas is a model 622xx.
3.3 You will load nvram220.txt if your Atlas is a model 623xx.
4. language.txtAny combination of or all of the following files
4.1 nvram_english.txt for the English language
4.2 nvram_french.txt for the French language
4.3 nvram_german.txt for the German language
4.4 nvram_spanish.txt for the Spanish language
4.5 nvram_potuguese.txt for the Portuguese language
4.6 nvram_italian.txt for the Italian language
4.7 nvram_chinese.txt for the Chinese language
4.8 nvram_japanese.txt for the Japanese language
5. printer.txt (if fitted with a printer), or no_printer.txt. (if not fitted with a printer)
NOTE: After loading the preceding files you, must then type the following commands at
the Pangea prompt.
1. nvram set serial xxxxx where xxxxx is the serial number of the Atlas monitor.
2. nvram write writes the information to memory.
3. hw reset performs a hardware reset.
2. Connect the serial cable between the Atlas and the PC COM1 port.
4. Turn Atlas on. You should see the Pangea prompt. See example in Figure 2-7.
5. Scroll over to Transfer and then scroll down and choose Send Text File.
See example in Figure 2-8.
6. Another window will then appear and prompt you for the location of the files. Double
left click on that folder to open that directory. You can also run these programs from the
CD. See example in Figure 2-9.
7. Once the folder is open, open the file nvram_cal_init.txt file by double left clicking on
that file or by high lighting the file and then click on the Open button. See example in
Figure 2-10.
Remember that after you have download the files in this section and you must
complete this entire Downloading NVRAM files section, that you must perform
a complete calibration on the Atlas monitor.
NOTE: After the nvram_cal_init.txt has executed you should see a Pangea screen similar to
window as shown in Figure 2-11.
8. From your pangea window choose Transfer then choose Send Text File.
9. Open the directory where the file nvram_common.txt is located or open from the CD.
10. Double left click on nvram_comm.txt file or highlight the file and then choose Open.
NOTE: After opening the nvram_common.txt file you should see a screen similar to the
window shown in Figure 2-12.
NOTE: Next you will download the model# of the Atlas by choosing only one of the three
following files.
1. If you have an Atlas model 621 then you will only download the file nvram200.txt.
2. If you have an Atlas model 622 then you will only download the file nvram210.txt.
3. If you have an Atlas model 623 then you will only download the file nvram220.txt.
11. Open the directory where the model number files are located or open from CD.
12. Open the file by double left clicking on the file that represents the model number of the
Atlas you are working on or highlight that file then choosing Open.
NOTE: After opening the Atlas model# file you should see a Pangea screen similar to the
window as shown in Figure 2-13.
NOTE: Next you will download the language(s) that you want the Atlas to store in its
Advanced Configuration menu for languages. You can have one or all the languages loaded
in the Atlas. Listed in Table 2-4 are the language(s) choices and the files you will need to
download to have the language(s) loaded in the Atlas. Each language you want loaded in
the Atlas will require that the file associated with that language be loaded.
13. Open the directory where the language files are located or open from CD.
14. Double left click on language.txt file or highlight the file and then choose Open.
NOTE: After you download a language.txt file you should see a Pangea screen similar to
Figure 2-14.
NOTE: Next you tell the Atlas if it does or does not have a printer.
1. If the Atlas has a printer you will download the file nvram_printer.txt.
2. If the Atlas does not have a printer then you will download the file
nvram_no_printer.txt.
15. Open the directory where the printer.txt files are located or open from CD.
16. Double left click on the printer file or the no_printer file or highlight the printer file or
the no_printer file and then choose Open.
NOTE: After you have downloaded the printer or no_printer file you should see a Pangea
screen similar to the window as shown in Figure 2-15.
NOTE: The next three commands will require that you actually type the command at the
Pangea prompt.
NOTE: XXXXX on line 17 is the Atlas 5 digit serial number. The serial number is located on
the bottom of the Atlas. Make sure that you have a space between the command serial and
the five numbers you are entering.
17. At the Pangea prompt type the following command nvram set serial XXXXX<ENTER>
NOTE: After you have typed the nvram set serial XXXXX command and hit ENTER you
should see a Pangea screen similar to the example in Figure 2-16.
Figure 2-16. Pangea screen after you have downloaded the nvram set serial command.
NOTE: To finish downloading the NVRAM files, type the next two commands at the Pangea
prompt.
18. At the Pangea prompt type the command nvram write <ENTER>.
Remember that after you have download the files in this section and you must
complete this entire Downloading NVRAM files section, that you must perform
a complete calibration on the Atlas monitor.
NOTE: The firmware is not up grade able on the OEM boards (SpO2 and CO2) boards. If a
higher version software is needed, then you will need to replace the OEM board.
NOTE: Review customer complaint and determine if it is safe to plug in the Atlas monitor
into AC power and if it is safe to turn on!
4. On models 622 or 623, disconnect AC cable. You should see no change except the
AC~ LED indicator will not be lit. If you see warnings of a low, very low or depleted
battery, or if the system turns off by its self, plug the Atlas back into the AC outlet and
let the unit charge with unit turned off. Repeat test in 2 hours.
2. Write down all configuration settings so that they can be reset to customer preferences
later. If you have a printer press the PRINTER button to print out customer configuration
settings.
3. Set language to your native tongue if necessary to allow you to write down the other
settings. The top item is always the language, press either SET buttons to step through
list.
4. Press TREND button to return to idle screen. Press DATE/TIME button and verify that
date and time are correct. Set date and time if necessary.
NOTE: An incorrect date may indicate a battery problem. If date was incorrect, turn off
unit, disconnect AC power cable, wait 5 minutes then reconnect the power cable. Turn Atlas
on. Check date again. If date comes back incorrect on model 621 then replace main board.
On model 622 and 623, if battery was not dead then replace main board.
6. Press DATE/TIME button then press LEAD SELECT button to access service mode
11. Press DATE/TIME button then press TREND button to access the Advanced
Configuration menu.
NOTE: We have just reset the monitor to factory defaults. Compare settings to factory
defaults appropriate for the country in Operator manual. If the factory defaults do not
match then that may indicate a memory problem. Changing only the language should not
change any of the other factory default settings.
13. Press DATE/TIME button then press LEAD SELECT button to access service mode.
15. Press BP START/CANCEL button to show test pattern. Examine display. Press any key to
end display.
16. Press Select button to highlight Printer test pattern (if fitted). Press BP START/CANCEL
button to start test pattern. Printer should print a test pattern. Press any key to end
display. Examine printout.
17. Press SELECT button to highlight LED test. Press AUTO button to turn on all LEDs.
Press BP START/CANCEL button to show automatic test pattern. Watch for a while,
look for glitches in pattern. Press SET button to go to manual mode and step through
individual segments if needed to observe a problem.
18. Press SELECT button to highlight Button test. Press BP START/CANCEL button to
start test. Press every button on system, press BP START/CANCEL button last.
Verify that buttons match up with their names and that all buttons are functional.
NOTE: If name does not correspond to the button pushed then this may indicate memory
corruption. You may need to replace the main board.
19. Press SELECT button to highlight Display A/D channels. Press SET button and write
down all values for each of the four screens for later review. Press TREND button to
return to Idle screen.
BP Test
1. Press DATE/TIME button then press TREND button to access the Advanced
Configuration menu. Press SELECT button to highlight Initial pressure. Press SET button
to change Initial pressure to 280 mmHg. Press SELECT button to highlight MAP. Press
SET button to change MAP to Yes. Press TREND button to return to idle screen.
2. Connect the BP port to the BP simulator. Set the simulator for a normal reading
(140/80, 100BPM, NSR). Press BP START/CANCEL button. Atlas should start to
pump and display a manometer value in SYSTOLIC LED. This value should track
and be very close to pressure displayed by manometer on BP simulator (if fitted).
Largest number shown in SYSTOLIC LED should be very close to the initial pressure
setting recorded above from Advanced Configuration. System should start stepping
down pressure, showing step values in SYSTOLIC LED display. It then should display
the correct SYSTOLIC and DIASTOLIC values. System may show MAP value depending
upon country language setting.
4. System should start to step down pressure, showing step values in SYSTOLIC LED and
then display correct SYSTOLIC and DIASTOLIC values. System should show MAP
value. MAP value should match what is shown by simulator.
6. Press the AUTO button. The X manual BP cycle indicator will go out and the 1 minute
auto BP cycle indicator will flash for 10 seconds. 20 seconds after the 1 minute auto BP
cycle indicator stops flashing, BP measurement starts.
9. Press AUTO button and X manual BP cycle indicator should light (not flashing).
10. Disconnect the tubing from the BP port on the Atlas. Press BP START/CANCEL
button and note the time (to the second) when the Atlas aborts the BP cycle and gives
you an alarm. It should take no longer than 1 minute. Turn Atlas off.
2. Turn Atlas on. Refer to Figure 2.1 in Section 2 for inflation setup.
5. To compare the applied pressure to the transducer readings use the following command.
PANGEA> bp press <ENTER>
6. Verify that the primary transducer and secondary transducer are within the
specifications listed in Table 3-1.
NOTE: The Atlas monitor will return a response to the computer screen as follows.
If you tested at the 50mmHg pressure you would receive a message similar to: px = 5279,
sx = 5305 x 0.01. Where px is the primary transducer and 5279 = 52.79 mmHg and sx is the
secondary transducer and 5305 = 53.05 mmHg.
BP Leak Test
NOTE: Unit must not leak more than 5 mmHg in a 15 second interval while attached to a
100cc test cavity pressurized at 50 mmHg, 150 mmHg and 250 mmHg.
Required Materials: 100cc test vessel (+10cc/-0cc), stopwatch, squeeze bulb, calibrated
manometer.
1. Connect Atlas to 100cc test vessel and calibrated manometer as shown in Section 2,
Figure 2.1.
3. Press DATE/TIME button then press LEAD SELECT button to access the Service Mode.
5. Pressurize the Atlas with squeeze bulb to 50mmHg and allow reading to stabilize.
6. Unit should not leak more than 5mmHg during this time.
Required Materials: 500cc test vessel (+10cc/-0cc), stopwatch, squeeze bulb, calibrated
manometer.
1. Connect Atlas to 500cc test vessel and calibrated manometer as shown in Section 2,
Figure 2.1.
2. Turn Atlas on. Press DATE/TIME button then press LEAD SELECT button to access the
Service Mode. Press SELECT button and choose Verify manometer.
3. Pressurize the Atlas with squeeze bulb to any pressure above 15 mmHg and maintain
that pressure during the test. Start the stop watch.
4. Verify that the valve opens and pressure drops between 155 seconds and 180 seconds.
3. Press DATE/TIME button then press LEAD SELECT button to access the Service Mode.
8. Start the stop watch when you press the SELECT button. When the SELECT button is
pressed the Atlas will start a pressure dump.
3. Press CLOCK/DATE button then press LEAD SELECT button to access Service Mode.
ECG/Respiration Test
NOTE: Simulator should support ECG impedance respiration.
1. Cycle power on Atlas, connect a 5 lead ECG cable set to the simulator. Configure the
simulator for NSR, 100 bpm and set the impedance respiration rate to 20.
2. Press DATE/TIME button then press TREND button to access Advanced Configuration
menu.
3. Press SELECT button to highlight ECG lead set and press SET button to select 5 wire.
4. Set ECG gain to Automatic, ECG speed to 25mm/s, ECG bandwidth to Monitor, Second
trace selection to ECG.
7. Press LEAD SELECT button and step through each of the lead settings.
(I,II,III,aVR,aVL,aVF,V)
8. Verify that you see a different ECG waveforms for each lead selected.
Heart Rate will go to dashes and alarms on some leads.
10. Press DATE/TIME button then press TREND button to access Advanced Configuration
menu.
11. Change Second trace selection to Respiration. Press TREND button to return to idle
screen.
SpO2 Test
1. Turn SpO2 alarms on.
3. Set simulator pulse rate to 60 beats/minute and verify that pulse rate is 60
3 beats/minute or 3%, whichever is greater.
4. Set SpO2 between 70% and 100% and verify that SpO2 is accurate 2 digits.
Temperature Test
1. Without anything connected to the temperature connector on the Atlas, verify that the
temperature LED is blank.
2. Using Table 3-2 below, connect the resistors to a 1/4 inch male mono plug and verify
temperature readings.
Table 3-2 Resistor and temperature reference.
3. Connect the temperature probe to the Atlas monitor. You should see the display read
room ambient temperature. Disconnect the probe and verify you see dashes is the
display and that there are no alarms.
2. Press DATE/TIME button then press LEAD SELECT button to access Service Mode
menu.
NOTE: These are the results from the last battery test. The Battery Low Time is the time in
hours and minutes that the battery ran in the last test until the Low Battery alarm started,
and the Battery Dead Time is the time from the beginning of the Low Battery Alarm until the
system turned itself off when the battery voltage reached the cutoff level.
NOTE: 2:08 means 128 minutes which is the default setting indicating a battery test has
never been made before.
5. Write down the Battery Low Time and Battery Dead Time.
7. The timers will begin the moment you unplug the AC cord. Leave the system on until it
powers down by itself automatically. Plug Atlas into AC and turn the Atlas on, enter the
Service Mode menu, select Battery Test again, and write down the new values. Compare
these to the previous values, and to the minimum specification:
1. Battery Low Time = 1 Hour
2. Battery Dead Time = 10 Minute minimums
2. Press PRINT button and look at waveform printout. Look for darkness, thickness of
lines, legibility of text, blurring, blooming of text.
2. Press the DATE/TIME button then press the TREND button to access Advanced
Configuration menu. Press the SELECT button and scroll down to Print on Alarm. Press
the SET button and set Print on alarm to No.
3. Connect an ECG simulator to the Atlas. Set the ECG rate on the simulator to 60 bpm,
normal sinus rhythm.
4. Press left SELECT button and the HI heart rate alarm parameter will flash. Set the high
heart rate alarm to 110 bpm on the Atlas and press the SELECT button again and the low
heart parameter will flash. Press SELECT button one more time to return to the default
screen.
6. Verify that you hear the audio alarm and that the printer is not printing.
7. Set the ECG simulator to 60 bpm and make sure that the alarm condition has cleared.
8. Press the DATE/TIME button then press the TREND button to access Advanced
Configuration menu. Press the SELECT button and scroll down to Print on Alarm. Press
the SET button and set Print on alarm to Yes.
Software/Firmware
1. Review versions written down earlier and compare to latest available. Make sure that all
components are compatible with each other. See section 2, page 26, Table 2-3.
2. Press DATE/TIME button then press TREND button to access Advanced Configuration
menu. Press SELECT button and scroll down to Second Trace. Press SET button and set
the second trace to ECG.
3. Connect ECG simulator to the Atlas. Set the ECG rate on simulator to 60 bpm,
normal sinus rhythm.
4. Verify you hear the heart rate beep at a constant high pitch.
5. Press SpO2 - + button - 8 times. Should get quieter and finally silent.
9. Press SpO2 volume button + 8 times. Should get audible tone and then louder.
11. Verify you hear audio alarm and see error message ECG Lead fault and that you see the
three LED bars flash where the heart rate was on the CRT.
13. Verify that the audio alarm stops and that the visual alarm on the CRT remains.
14. Press HR ALARMS OFF button. Connect ECG simulator to the Atlas and set simulator
to normal sinus, 60 bpm.
15. Press left SELECT button and the HI heart rate alarm parameter will flash. Set the high
heart rate alarm to 55 bpm on the Atlas and press the SELECT button again and the low
heart parameter will flash. Press SELECT button one more time to return to the default
screen.
16. Verify that you hear the audio alarm and that you see the numeric value flashing in
the upper right portion of the monitor.
17. Return the high alarm limit to 120 bpm and press SELECT button. Verify the
audio alarm should is silent and the numeric visual alarm is flashing.
18. Press SELECT button twice. Verify the numeric low alarm parameter is flashing.
19. Set the LOW alarm for 65 bpm by pressing the up SET button. Press SELECT
button.
20. Verify that you hear the audio alarm and that you see the numeric value is flashing in
the upper right portion of the monitor.
2. Press DATE/TIME button then press TREND button to access Advanced Configuration
menu. Press SELECT button to scroll down to Second Trace. Press SET button and set
second trace to respiration. Press TREND button to return to default screen.
4. Press left SELECT button three times and set the hi respiration alarm to less than 20.
Wait 10 seconds and the CRT will return to the default screen.
5. Verify that you hear the audio alarm and that the respiration numeric value on the CRT
is flashing.
7. Verify that the audio alarms are silent, the visual numeric alarm is flashing and
that the red LED in the CO2/RESP ALARM off button is lit.
9. Press left SELECT button three times to access hi respiration alarms and set hi alarm to
30.
10. Wait ten seconds and the CRT will return to the default screen.
11. Press CO2/RESP ALARM off BUTTON then press left SELECT button four times to
access low respiration alarms and set low respiration alarms to 25.
12. Wait 10 seconds and CRT will return to the default screen.
13. Verify that you hear the audio alarm and that the respiration numeric value on the CRT
is flashing.
15. Verify that the audio alarms are silent, the visual numeric alarm is flashing and
that the red LED in the CO2/RESP ALARM off button is lit.
3. Verify that you hear a pulse rate beep and that it is a different pitched tone than the
ECG pulse beep.
4. Change SpO2% setting on the simulator. Verify that tone changes pitch up or down
tracking simulator setting.
5. Press lower far right SELECT button until SpO2 LO is flashing, press right SET button
UP to change SpO2 LO setting to 99.
8. Press Alarm Volume button - eight times. Verify tones gets quieter but not silent.
9. Press Alarm Volume button + eight times. Verify the tone gets louder.
10. Disconnect SpO2 cable from simulator and verify that the visual alarm SpO2 cable
not detected is displayed on the bottom left side of CRT. Verify that you hear the
audio alarm.
12. Verify that the audio alarm sound is silent, that you do not see the visual alarm
message SpO2 cable not detected on the CRT and that the LED in the SpO2
ALARMS OFF button is on.
3. Connect ECG simulator to the Atlas. Set the ECG rate on simulator to 60 bpm, normal
sinus wave.
4. Press left SELECT button once and set the HI alarm to 55 bpm.
6. Press SILENCE button and start stopwatch. Verify that the alarm returns at 90
seconds.
CO2/RESP Test
1. Turn Atlas on.
2. Press DATE/TIME button then press TREND button to access the Advanced
Configuration menu.
8. Verify you hear the audio alarm and that you see in the visual alarm CO2 watertrap not
detected in the bottom left portion of CRT.
9. Press the CO2/RESP ALARMS off button. Verify that the audio alarm goes silent, the
visual alarm goes out and the red LED in the CO2/RESP ALARMS off button is lit.
3. Place finger over BP port. This will block the flow causing the Atlas to detect an over
pressure.
4. Verify that you hear the audio alarm, that the visual alarm Check Blood Pressure Cuff
appears in the lower left portion of the CRT and that the SYSTOLIC and DIASTOLIC
LED displays are flashing.
6. Verify the audio alarm is silent, the visual alarms have turned off and that the red LED in
the BP ALARMS OFF button is lit.
7. Press the BP ALARMS OFF button then press the BP START/CANCEL button twice.
8. Press BP START/CANCEL button and let Atlas run without anything attached to the BP
port.
9. Verify at 60 seconds that you hear the audio alarm and that the visual alarm Check
Blood Pressure Cuff appears in the lower left portion of the CRT and that the SYSOLIC
and DIASTOLIC LED displays are flashing.
11. Verify the audio alarm is silent, the visual alarms are still off and that the red LED in
the BP ALARMS OFF button is lit.
12. Press the BP ALARMS OFF button then press the BP START/CANCEL button twice.
13. Connect a BP simulator to the Atlas BP port. Set the simulator for a normal reading
(140/80, 100 bpm, normal sinus rythym).
14. Press the right SELECT button twice and the current SYSTOLIC HI alarm value will be
flashing.
17. Verify that you hear the audio alarm and that the numeric value in the SYSTOLIC LED
display is flashing.
19. Verify the audio alarm is silent, the numeric value in the SYSTOLIC LED display is still
flashing and that the red LED in the BP ALARMS OFF button is lit.
20. Reset the SYSTOLIC HI alarm to 200 (factory default). Press BP ALARMS OFF button.
21. Press the right SELECT button three times and the numeric value in the SYSTOLIC LO
alarm LED display will be flashing.
22. Press the SET button to set the SYSTOLIC BP LO alarm to 160.
24. Verify that you hear the audio alarm and that the numeric value in the SYSTOLIC LED
display is flashing.
26. Verify the audio alarm is silent, the numeric value in the SYSTOLIC LED display is still
flashing and that the red LED in the BP ALARMS OFF button is lit.
27. Reset SYSTOLIC LO alarm to 70 (Factory default). Press BP ALARMS OFF button.
28. Press right SELECT button four times and the numeric value in DIASTOLIC HI alarm
LED display will be flashing.
29. Press the SET button and set DIASTOLIC HI alarm to 70.
31. Verify that you hear the audio alarm and that the numeric value in the DIASTOLIC HI
LED display is flashing.
33. Verify the audio alarm is silent, the numeric value in the DIASTOLIC LED display is still
flashing and that the red LED in the BP ALARMS OFF button is lit.
35. Press right SET button five times and the numeric value in the DIASTOLIC LO alarm
LED display will be flashing.
36. Press SET button and set DIASTOLIC LO alarm to 90. Press BP ALARMS OFF button.
38. Verify that you hear the audio alarm and that the numeric value in DIASTOLIC LED
display is flashing.
40. Verify the audio alarm is silent, the numeric value in the DIASTOLIC display is still
flashing and that the red LED in the BP ALARMS BUTTON is lit.
Unit does not power up - AC and Power 1 Check that the CPU board is fully seated.
on LED on.
2 Replace CPU board.
3 Check for conformal coating in J4 header - replace
board if coating is found.
4 Replace Main board.
5 Replace Display board.
Unit powers up - but no image on CRT. 1 Check for conformal coating in J4 header - replace
board if coating is found.
2 Replace CPU board.
3 Check for correct installation of connection from
main board to deflection board. If installed with
pin 1 in the pin 2 socket deflection board will be
damaged. If installed with pin 1 out of socket
deflection board will be OK.
4 Replace CPU assembly.
CRT:
CRT image rotated or poor alignment. 1 Rotate yoke and/or adjust magnets.
Only see a dot in the center of the 1 Check cable from yoke to CRT board.
screen.
Only see a horizontal line in the center 1 Check cable from yoke to CRT board.
of the screen.
2 Replace Deflection board.
No image - CRT to Main board 1 Check flex-cable from Deflection board to tube.
connection OK.
2 Check high voltage anode connection.
3 Replace Deflection board.
4 Replace tube.
5 Replace CPU board.
No image - Glow at bottom of screen. 1 Check for conformal coating in J4 header - replace
board if coating is found.
2 Replace CPU board.
Motor runs or chatters - paper does not 1 Check for missing dowel pin in roller.
advance.
2 Check for missing bearings/gears.
3 Replace printer PCB.
4 Replace CPU.
Blood Pressure:
Leak test - Fails Leak Specification 1 Run individual test. If unit passes repeat all tests.
2 Check seals @ tubing in BP assembly.
3 Check for lifted pins on the CPU connector JP8.
4 Replace Check valve.
Leak test - Cant pump beyond xxx.xx. 1 Verify unit can pump beyond 300 mmHg then:
Retest.
2 If pump will not reach 300 mmHg, then:
A. Check for correct direction on check valve.
B. Check for possible leaks.
C. Check for pinched tubing.
D. Replace pump.
Manometer Accuracy - Cant pump 1 Verify unit can pump beyond 300 mmHg then:
beyond xxx.xx. Retest.
2 If pump will not reach 300 mmHg, then:
A. Check for correct direction on check valve.
B. Check for possible leaks.
C. Check for pinched tubing.
D. Replace pump.
3 Check for lifted pins on the CPU connector JP8.
Overpressure Limit - Cant pump 1 Verify unit can pump beyond 300 mmHg then:
beyond xxx.xx. Retest.
2 If pump will not reach 300 mmHg then:
A. Check for correct direction on check valve.
B. Check for possible leaks.
C. Check for pinched tubing.
D. Replace pump.
Overpressure Limit - Fails Accuracy 1 Replace Main board. Fault with pressure
Specification. transducer, amplifier, or comparator.
2 Replace CPU board.
SpO2 signal accuracy. 1 If Nellcor, check ribbon cable and harness. Replace
as needed.
2 Replace SpO2 board.
ETCO2:
Specification limits fail - Flow rate or 1 Perform calibration. If that does not fix then go to
Percentage. step 2.
2 Replace Pryon board.
Temperature:
1 Check connection - main board to temperature
jack.
2 Check pins in Temperature harness for correct
seating.
3 Replace Main board.
About Section 4
This section is a guide for disassembly and reassembly of the Atlas Monitor. Always refer to
current revision schematics, diagrams and final safety test procedures before attempting to
service this device.
Do not attempt to service this instrument unless you have received Service Training from
Welch Allyn or an authorized Training Agent, and are equipped with approved processes
and test equipment. For more information about training call the Welch Allyn Customer
Service phone number listed in Section 1 of this manual.
General:
The outside housing is removable in order to provide full access to all internal printed cir-
cuit boards and other components. Most of these are held in position with the surrounding
E-Pac foam. E-Pac foam provides shock absorption, ventilation channels, and spaces for
the components and boards. Pneumatic tubing and cables must be placed correctly in E-Pac
to avoid problems with pinched tubing.
Printer:
Print-head, printer motor, and printer roller can be replaced as necessary.
CRT:
The CRT and CRT Deflection Board are aligned at the factory and as such are replaced as a
matched set if one or the other should fail in service.
2. Battery Removal
Remove the battery connector from the
main PCB. Remove battery.
Printer Display
Cable PCB Cable
4. Printer cable and Display Cable
Removal
Remove both Printer and Display PCB
cables from the Main PCB.
7. CPU Removal
Remove the CPU from the Main PCB.
Note: Additional electrically isolated supplies are generated for patient connected circuits.
Q301
AC/DC
Converter AC+12V
+12V
Backup On/Off
Regulator Vb
Control On/Off
Circuits
+6V
AC Present
+3.3VDC
Regulator +3.3V
1. Monitors the status of the front panel ON-OFF key. If the unit is off and the ON-OFF key
is pressed, the controller will drive U10-6 high, which will enable power to the remainder
of the instrument.
2. At power up, the micro controller will drive the beeper for about 1 second.
3. At power up, the micro controller will reset Shift Register U2. This will cause the follow-
ing:
a. The front panel LED's are blanked.
b. The NIBP pump drive is placed in the off state.
4. When the unit is ON the micro controller will communicate with the system CPU. When
the front panel ON-OFF key is pressed, the CPU will store away current operating condi-
tions, then issues a command to the micro controller to shut instrument power off. U10-6 is
driven low which will remove power from the remainder of the instrument.
R314
100
d304-1
1
Vb
3
U304 VBackup
C325 R316
8 1 .047uF Lithium 100 2
u304-fb 7 VIN VOUT 5 d304-2
FDBK ERR BackupBattery
3 C322
+ C323 SHTDN + C324 .047uF
D
4.7uF 6 4.7uF R318 D304
14
GND
TAP
1
Vss
D
LP2951CD-3.3 2 13
4
D620361-MX10000
U2-Reset
On/Off Switch
Q301
MTP23P06V
L301
47uH
3 2
AC+12V +12V
4
R303
+ + C302 C303 + C304 C305 10K
C301 1uF .01uF 330uF .01uF
1
1000uF
R301
Q301-G
51.1K
U301-comp
Switcher
3
Shutdown
3
Q306
Q302-B 1 2N7002
Q302 1
C328 + R302 MMBT3904L
1uF 100K
2
Buck Converter
A buck converter is used to generate 6V from the 12VDC output of the offline switcher. The
UC3843A (U301), normally a current mode controller, is configured for voltage mode feed-
back. The UC3843A has an under-voltage lockout for Vcc<8.5V. The controller operates
such that with Vcc less than 8.5V, the reference out is 0V, and will be at 5V with Vcc>8.5V.
Then, the reference out (pin 14) can be used as an AC-ON detection signal.
The switching transistor for the buck converter is a P-Channel MOSFET (Q305). The output
drive of the controller is the wrong polarity for driving a P-Channel MOSFET in a step down
mode. Therefore, transistor Q303 is added to invert the PWM out signal. Fast turn-on of
Q305 is provided when Q303 is low, fast turn-off is though Q304 (configured as an emitter
follower). The PWM controller includes an internal 2.5V reference. Voltage regulation is
controlled with sampling resistor R304 and R305 such that Vout = 2.5V*(1+R304/R305) =
5.68V. At power down pin U301-1 (comp pin) is pulled low. This will cause U301-10 to go
low, which turns Q305 off and disables power to +6V.
Q305
MTP23P06V L302
47uH
3 2 Q305-s
filt+12V +6V
4
LC Filtered C326
.047uF D303 + C314
AC/DC converter 330uF C327
1
output Q305-g MBRS340 .047uF
R304
127K
R313
10
U301-fb Q304
MMBT3904L Q304-e
3 2 +6V Buck
R305 C313
1
R312 3
C311-1 1.96K
U301
12
11
C311 UC3843A
2200pF 3 Q303-c
2
Vc
Vcc
VFB
U301-out
Q303-b
U301-comp 1 R310
COMP
3
1.96K
14 10 1 Q303
VREF OUT MMBT3904L
PWR-GND
RT/CT ISENSE
8
9
U301-osc
C310
2200pF
R308
27.4K
U301-5
R309
5Vref
10K
ACON
GND
+ C316 C317
2 10uF .047uF
+ C315 D D
1uF D
U303
LF33CV
1 3
IN OUT +3.3V
GND
+ C319 C320
100uF .047uF
2
D D
D
The unit will operate from AC when the unit is plugged in, and switches to battery opera-
tion when AC is removed. The battery is automatically charged whenever AC is connected.
+12V DC CRT, CO2, input to isolated power supply, misc. analog circuits.
+5V DC Front panel LEDs, misc. logic.
+3.3V DC CPU board.
3.3V Backup: Real time clock and On/Off circuits.
Battery Charger: Charges SLA battery.
Note: Additional electrically isolated supplies are generated for patient connected circuits.
DC/DC Circuits
Block Diagram Q303
+12VDC
Regulator +12V
AC/DC
Converter AC+12V
Backup On/Off
Regulator Control On/Off
Circuits
Battery
Q311
AC Not Present
+5VDC
Regulator +5V
Battery D310
Charger
+3.3VDC
Regulator +3.3V
AC Present
On/Off Circuits
Backup Regulator and Micro-Controller
A 3.3V low current regulator, U307, provides power to the On/Off circuits and to the real
time clock on the CPU board. The On/Off circuitry is controlled by the micro controller
U10.
1. Monitors the status of the front panel ON-OFF key. If the unit is off and the ON-OFF key
is pressed, the controller will drive U10-6 high, which will enable power to the remainder
of the instrument.
2. At power up, the micro controller will drive the beeper for about 1 second.
3. At power up, the micro controller will reset Shift Register U2. This will cause the follow-
ing:
a. The front panel LED's are blanked.
b. The NIBP pump drive is placed in the off state.
4. When the unit is powered on the micro controller will communicate with the system
CPU. When the front panel ON-OFF key is pressed, the CPU will store away present operat-
ing conditions, then issues a command to the micro controller to shut instrument power off.
U10-6 is driven low which will remove power from the remainder of the instrument.
1. The micro controller drives U10-6 high, turning transistor Q302 on.
2. Transistor Q301 is switched on, supplying power to the PWM controller, U301.
3. The boost regulator develops 18VDC, which will switch transistor Q303 On.
On/Off Switch
4
2 3
V
Q303
U307 MTP30N06VL
8 1
1
VIN VOUT VBackup
u307-6 7 5
+ C331 3 FDBK ERR + C332
4.7uF SHTDN 4.7uF
6
2 TAP
4 SENS
D GND D
LP2951CD-3.3
D
On/Off Circuit
18V Boost - Mosfet Gate Voltage
U301-7
+Vfuse
HS301
Heatsink L301
1mH
for D301 F303 R305 U301
1 MC34063AD
6078 4Amp D302
8 U301-sw BAV99L
Q301 7 IDC
1 MPSW51A IPK 1 1 2
AC+12V ISWC +18V
2 1 3 U301-pwr 6
3 4 Vcc 2
Battery ISWE R306
3
R301 61.9K
GND
+ C304
4
Q302-c
R303 R304
51.1K 100K 3
Q302-B 1 Q302
2 MMBT3904L
+ C339
1uF
C42
.047uF
Vbackup
R22
14
1
10K U10
Vdd
Vss
(pg 1)
2 13
PIC-Data ClkIn/Osc1/RB5 RB0
3 12
On/Off-Key Clkout/Osc2/RB4 RB1
(Front Panel Key) 4 11
Vpp/MCLR/RB3 RB2 PIC-Clk
5 10
TC5/TOCK1 RC0
6 9
On/Off RC4 RC1 PIC-audio
(pg 3)
7 8
U2-Reset RC3 RC2
(To U2)
D620361-MX10000
The +12V boost circuit provides regulated 12VDC. The input to the 12V converter is either
battery or 12V from the AC/DC converter. The circuit is configured as a boost PWM using
current mode feedback. The PWM controller is a UC3843A. The controller includes an
internal 2.5V, 2% reference, and an external 5V, 2% reference. Nominal output voltage for
the boost converter is Vout = [2.5V*(1 + 173.8K/4.64K)] = 12.1V.
The UC3843A requires 8.5V minimum to power on. The maximum voltage allowed on the
switching transistor, Q305, is 15V. To meet both these requirements, the UC3843A is pow-
ered from 12.9V (+18V 5.1V zener diode D303)
When operating from battery, the converter will run at duty cycles over 50%, which
requires slope compensation for a current mode controller. Slope compensation is achieved
by summing in part of the oscillator signal (pin 4) with the current sense line.
The PWM controller is current limited on a cycle to cycle basis by monitoring the voltage on
the Isense line, U302-5. Current limit is activated when the voltage at the sense line reaches
1V. The nominal DC voltage at Isense is about 0.5V when operating from battery only, and
0.7V when operating from AC. Then, current limit is set to 5Amps when Atlas in operating
on battery and 3Amps when operating on AC.
Q303-s
+V
L303
C335 Bead
.047uF
L302-1
+12V Boost
(12.1V nominal)
3 1 U302-pwr
+18V
R308 D303
17.8K 5.1V + C306 + C310 L302
U302-fb 1uF 1000uF 22uH
11
C305 UC3843A
5600pF 3 + C311 + C312 + C313
Vc
Vcc
VFB
2
4
Q305-g
C307
3
R315
196
8
9
1
R312
C308 3.83K
2200pF 3 2 Q304-e
D312
BAV99L R317
7.5K
1 2 D312-c
AC+12V-fuse
3
Battery Charger
The battery charger is a PWM buck converter. The input to the battery charger is 12VDC
from the offline switcher. The UC3843A, normally a current mode controller, is configured
for voltage mode feedback. The UC3843A has an under-voltage lockout for Vcc<8.5V. The
controller operates such that with Vcc less than 8.5V, the reference out is 0V, and will be at
5V with Vcc>8.5V. Then, the reference out (pin 14) can be used as an AC-ON detect signal.
The switching transistor for the buck converter is a P-Channel MOSFET (Q308). The output
drive of the controller is the wrong polarity for driving a P-Channel MOSFET in a step down
mode. Therefore, transistor Q306 is added to invert the PWM out signal. Fast turn-on of
Q308 is provided when Q306 is low, fast turn-off is though Q307 (configured as an emitter
follower).
The battery charger is a current limited - temperature compensated charger. Current limit is
set to 1.5Amps. Current through the 0.1Ohm sense resistor R327 is measured with Diff-Amp
U305B. When the charger current is at 1.5Amps, feedback is controlled by Op-Amp U304A.
When the current drops below 1.5Amps, the output of U304A goes low, reverse biasing
Diode D308, and feedback will be controlled by Op-amp U304B.
Battery charge voltage is temperature compensated using Thermistor RT301, a 10K negative
temperature coefficient resistor. Voltage over temperature follows the following charge pro-
file:
Table A-1. Temperature coefficient.
Temperature Voltage Thermistor
0C 7.05V 26.9K
10C 7.0V 20.7K
25C 6.85V 10K
40C 6.7V 5.17K
50C 6.65V 3.45K
For optimum battery life, the float voltage (25C, full charge) should be set to 6.85V +/- 50mV
(6.85V +/- 0.7%). To accomplish this tight tolerance, charge voltage at room temperature
will be adjusted with potentiometer R328. Nominal charge voltage at room temperature is:
Vcharge = 5V * (1 + RA/RB) where,
5V is the reference in U303.
RA is the series/parallel combination of R335, R336, and RT301 (nominal 3.465K @ 25C).
RB is the series combination of R337and R338 (nominal 936 Ohms)
It is necessary to minimize current out of the battery when the unit is off. To reduce off cur-
rent, transistor Q309 disconnects the battery from the battery sense resistors when AC in off.
In addition, diode D307 is added to prevent current from flowing from the battery into the
battery current sense circuit, and to the output of the AC/DC converter.
F301
4Amp
Bat-fuse
Battery
To Linear Regulators
Battery
Charger Q308 L304 D307 Input to 5V and
F302 MTP23P06V 47uH R327 MBRS340T3
4Amp 0.1 3.3V linear
AC+12V
F302-2 AC+12V-fuse 3 2 Q308-d C319-1 D307-A regulators.
4
L306
C340 Bead C337 + C318
.047uF .047uF 330uF C319 + C338
Q308-g D306 1000uF .047uF
1
MBRS340T3
R326
Q307 10 R328 R329
MMBT3904L 1K 1K
3 2 Q307-e
1
R318 D305
10K C314 BAV99L R331
U303-fb .047uF U305-6
1
R325 3
1.96K 33.2K
R319
19.6K U303 R330
12
11
4
UC3843A 33.2K
2
3 6
Vc
Vcc
-
VFB Q306-c 7
U303-out
Q306-b
U303-cp 1 U305-5 5 +
COMP R323 1.96K 3 U305B
14 10 1 Q306 MC34072
VREF OUT 2MMBT3904L
8
PWR-GND
U304-1
8
4
C316 R321 D308 BAV99L
2200pF 27.4K - 2 R333
U303-ct 2 1 1 19.6K
+ 3 U304-3
U304A
R322 MC34072 C322
3
10K .047uF
8
ACON +12V
R341
10K
Ref-Batcharge
AC+12V-fuse
R342 R343
Batt-fb R339 C321 R334 2 19.6K 10K
19.6K .01uF 19.6K Q309 1
Q309-b
R339-2 MMBT3906L3
Ref-Batcharge
R343-1
R335
4.32K
4
2
R340
10K - 6 U304-6
U304-7 7 D309
+ 5 U304-5 Q309-3 BAV70L
U304B R336 RT301
MC34072 7.5K 10K
R337
8
3
RT301-1
Float Voltage 8.87K R344
t
10K 3
AC+12V-fuse Q310-b 1 Q310
ACON
Bat-Adj 2MMBT3904L
1
R338
2
1K R345
10K
3
When operating from AC, transistor Q310 is turned on, which will turn transistor Q311 off.
Power to the 5V regulator is then provided through Diode D310 from the output of the bat-
tery charger circuit. Note that this voltage tap is before the current sense resistor, then load
current on +5V does not affect the battery charger current limit circuit. When AC is
removed, the AC-On signal goes low, and Q310 turns off. The gate of Q311 is then pulled up
to 11.4V (12V Vdiode). Transistor Q311 then turns on, and the 5V regulator is powered
from the battery.
3.3VDC is derived using a three terminal regulator. The output of the 5V regulator is used to
power the 3.3V regulator. The 3.3V regulator does not have an independent shutdown, but
powers down as the 5V regulator shuts down.
+Vpump
D310
MBRS340T3 HS302
Heatsink
Batt Charger input Q312 forQ312
From Batery MTP30N06VL
Charger Circuit. 4 6078
2 3
+5V
4
3 2 + C323 + C325
Battery
100uF Q312-g 100uF
1
Q311
MTP30N06VL R346 U306
100 R348 LF33CV
1
10K 1 3
IN OUT +3.3V
C324 R347
+12V 1000pF 10K
GND
R341 C324-2 C328 + C329 C330
10K .047uF 100uF .047uF
R342 R343
2
19.6K 10K
U305-1
U305-2
To Q309 +5V Linear D D D
D
4
R343-1 Low
2 R349
Dropout 1
-
10K
1
+ 3 U305-3
5VRef
U305A
D309 MC34072
BAV70L C326 R350
8
.01uF
10K
D311
3
R344 BAV70L
10K 3 1 C327
+12V
Q310-b 1 Q310 .047uF
ACON
2MMBT3904L 3
2
AC+12V-fuse
R345
10K
The A/D converter is designed by building a pulse width modulator (PWM) and a timer cir-
cuit. The PWM runs at a 1.2KHz rate, synchronized by the A/D sync signal (NIBP-ADC-
Clock). A/D sync is low for 52.1uSec, high for 781.25uSec. Component values are selected
such that the integrator will ramp down 4.7V, and ramp up 7.83V. The voltage at the integra-
tor output (U601-1) is limited to about 5V [5V*(73.2/83.2) + Vdiode)]. Then, the integrator
starts at 5V and ramps linearly down to 0.3V.
The analog input voltage to be digitized and the integrator output are the inputs to compar-
ator U210. The output of the comparator is low at the start of an A/D cycle, and switches
high as the integrator ramp drops below the input voltage being digitized (see the timing
diagram below). A/D conversion is accomplished by measuring the width of the PWM out-
put signal. The A/D timer runs at 25.175MHz, then the A/D resolution is about 21000
counts (over 14 bits). Note that since the output of the comparator is low at the start of the
A/D cycle, a resistor divider is formed at the comparator input. This divider reduces the
Analog-In signal by 0.75% [464K/(464K+3.48K)].
R235 R237
NIBP 3.48K 464K
PWM A/D Analog-Input
U209-Out U210-2
1 A
2 14
+
R231 C219 C224 7 U210-7 4
73.2K .047uF A 1000pF 3 - 6
NIBP-PWM-ADC
8
R234 6 U210 5
3 3.48K MAX941 7
+
1 U208-1 U210-3
A A 2 U207B
-
C218 + 74HCT00
4.7uF U208A A A
R232 MC34072
4
U207A 10K
A 74HCT00 U208-2
14 A C220
1 PWM A/D
3 Converter
2 R233 .01uF
NIBP-ADC-Clock
3
7 3.48K
D201-C 2 1
A D201
MMBD1503A
U207-3
Integrator 52uSec
Input - f=1.2KHz
(U207-3) 781uSec
+5V
Comparator
Inputs
Analog In
0.31V
PWM-Out
(U207-6)
PWM-timer
NIBP Circuits
Overview - Safety:
Two pressure transducers are used, a primary and safety transducer. The primary is used to
make all BP measurements. Hardware circuits monitor the output of the primary transducer,
looking for overpressure faults. In addition, Software monitors the digitized outputs of the
primary transducer, and detects overpressure faults. The following overpressure faults are
detected in software (monitored once per second):
Software detected overpressure faults are considered application faults. The user is warned
of a fault with an audible alarm and a Check blood pressure cuff message on the CRT dis-
play. NIBP is not disabled for this type of fault. In the event of a fault, the drive signals to the
NIBP pump and valve are opened.
Two hardware faults are detected, pressure over 330mmHg (nominal trip point 314mmHg,
and pressure over 15mmHg for three minutes (13.3mmHg nominal trip point). These faults
are considered more serious (since software should have detected and corrected this condi-
tion). The user is notified with a BP SYSTEM FAULT message, and NIBP is disabled. A
redundant safety transistor is opened to ensure the NIBP pump is off and the valve is open.
The primary and safety transducer outputs are continuously digitized. The outputs of the
transducers are checked vs. each other, and if they disagree, an NIBP Fault Message is
declared and the NIBP system is disabled. The outputs of the transducers are linearly pro-
portional to the supply voltage (supply current for the safety transducer). The transducers
use unique reference voltages to ensure that a fault in one reference will not cause an equiv-
alent gain error in both transducers.
The A/D also has redundant checks. Two reference voltages (derived from the primary
transducer reference supply) are measured, and the A/D gain and zero is checked. In addi-
tion, a unique reference is digitized, and compared vs. expected results. An error in any of
these A/D measurements will again cause an NIBP Fault Message, and the NIBP system
will be disabled.
P+5V
C226 L202
.047uF Primary
Bead
Transducer
A
0mmHG = 0.5V
P201-pwr
300mmHG = 4.0V
C232
.047uF
R236
A 3.83K
3
R212
56.2K
2 P201-Out
Gain P+12V C209
and
C206 .047uF
Comp 6 P201-6 .047uF
P201 C227
XFPM-050KPGR-P1 680pF A
8
A R219
U204-3 3 1.96K
1
+
1 U204-1
PrimaryPres
A A 2
-
U204A
MC34072 C228
4
+3.3V .047uF
R213
Zero Adjust P+12V 237K R217
A
5.62K
R244
+/-20mmHg range U204-2
A
21.5K
R214 R216 C231
8
A A A A
U204-7 P+.75V
The initial accuracy of the safety transducer is very loose, in the order of +/-50%. However,
the drift over time and temperature is very good. Then, it is necessary to calibrate the output
of the safety transducer. This is done my measuring a know pressure, measuring the output
of the safety transducer, and storing calibration constants in NVRAM. A two-point calibra-
tion procedure is used. Calibration is done at the factory, and can be recalibrated in the field
if necessary.
Current Source:
Op amp U205A is configured as a current source for the Pressure Transducer, with the cur-
rent through the transducer set to 1.5mA. Nominal gain for the transducer is 300mmHg =
75mV.
Op amp U206A/B is configured as a differential amplifier, with a voltage gain of 22.5. The
output of the differential amplifier is offset by 1.2V (U205B).
P+12V
P+12V C216
Safety .047uF
C211 Transducer
A
.047uF TP226
8
A R227
8
P202-Out+ 3 5.11K
+ U206-1
U205-3 3 1
+ P202-2 SafetyPres
1 2
-
2
-
U206A R223 C214 C217
U205A MC34072 21.5K .047uF
4
MC34072 .047uF
4
P202
2
FPNS-07PGR A A
A C212 U206-2
680pF
1
P+12V
3 R224
+ -
6 1K
8
P202-Out- 5
+
7 U206-7
P202-5 6
5
-
U206B R225
R220 MC34072 1K
4
806
A
5VRef
A
P+12V
5
+
7 U205-7
6
-
C213 R222 U205B
.01uF 1K MC34072
4
A A A
Hardware Overpressure:
The output of the primary transducer is monitored for two overpressure conditions; pres-
sures in excess of 13.3mmHg (nominal) and 314mmHg (nominal) are detected. These error
conditions are transmitted to the gate array on the CPU board, and if the error conditions are
present for a long enough time period, a fault message is displayed, and NIBP is disabled
(see above for safety performance operation).
The output of the Primary Transducer drives the two comparators U203A/B. The compari-
son voltage is derived through a resistor divider chain from a 5V regulator (U201). This reg-
ulator is the supply voltage for the primary transducer, and sense the primary output is
proportional to the supply voltage, tolerance errors in the regulator are not critical.
R207
464K +3.3V
L201 C205
220uH
P+12V
R208
+12V P+12V P+5V PrimaryPres
.047uF 1.96K
R206 A
8
C229 + 1K
10uF U201 R201 U203-3 3
+
78L05 576 1
NIBP-Overpressure
8 1 U203-2 2
IN OUT -
A U203A
C203 C222 LM393
GND
GND
GND
GND
R202 .01uF
4
P+12V
C201 + C202 174
.047uF 4.7uF .047uF
R210 +3.3V
2
7
A A A
8
A 464K
A U202-3 3
+
1
P+4.25V
2
- P+12V
A R203 R211
3.32K U202A 1.96K
MC34072 R209
8
1K
A U203-5 5
+
7
NIBP-15mmHg
U203-6 6
-
U203B
C223 LM393
.01uF Over Pressure
4
P+12V
R204
150
Fault Circuit
A A
8
U202-5 5
+
7
P+.75V
6
-
C204 R205
.047uF 750 U202B
MC34072
4
A
A A
+5V +Vpump
7
8
5
6
+12V
Q202
MMDF2N02E
R242 2 4
10K
1
Q202-G
R240
10K 3
Q201-B 1 R243
NIBP-Safety
2
2 100K J201
Q201 D202 Valve+
R241 MMBT3904L BAV99L Valve- 1
10K 3 2
Pump+ 3
Pump- 4
5
D201-A
CON5
1
R246
31.6
7
8
5
6
Q203
MMDF2N02E
2 4
NIBP-Valve-Close NIBP-Pump-On
1
R247 R248
1K 1K
Note: Model 621 uses a single Mosfet for transistor Q202, with the drain connected to +6V,
and the source connected to nets Pump+ and Valve+ through a series diode.
Atlas uses a 5-inch monochrome CRT display. This CRT will display Waveform Data (ECG
and Respiration or SpO2 or ETCO2), plus Text Data (Heart Rate, Alarm Values, Trend Data,
setup, and service menus). The CRT Deflection board performs the following functions:
1. Vertical Deflection.
2. Horizontal Deflection.
3. CRT Grid Voltages.
4. Video Amplifier.
CRT Deflection is magnetic, vertical and horizontal deflection is controlled by regulating
current through the vertical and horizontal coils of the CRT Yoke. The Deflection board is
designed to the following specifications:
Vertical Amplifier:
Ramp Generator:
Vertical Sync Ramp Generator
R1
1K
U1.3 +12V
+5V
R2
7.50K
C3
750uSec .047uF
16.7mSec
8
U4A R3 3
+
23.7K 1
1 2 U4.2 2 Ramp
Vsync -
U1A
TLC272
R52 Vertical
4
74HCT04
1.96K R43 Sync 5.0V
C1
5.11K .1uF
U1.2
3.95Vpp
d6.c 2 1 2 1
D6 D1 750uSec
1N4148 1N4148
16.7mSec
A ramp generator is built from the integrator (U1A, C1, and R3). The slope of the integrator
is: V = (I*T)/C. The integrator is designed so that it ramps up 6.97V in 750uS and ramps
down 3.95V in 15.9mS. Diode D1 clips the output voltage at about 5.0V (U1-pin3 + Vdiode).
Then the ramp resets at 5.0V each cycle, and integrates down 3.95V.
Vertical Amplifier
+12V
+12V
C4 + C5 +12V
.047uF R12 22uF R19
562 3 3 562
q1.b 2 Q1 Q3 2 q3.b +5V
8 1 MPSW01A MPSW01A 1 8
R13 R18 R20
3 + 169 R15 38.3 562 169 + 5 R22
Ramp
1 q1.e 7 10K
2 - - 6
U2A R14 R21 U2B
MC34072 562 1 1 562 MC34072
4 q2.b 2 vadj 2 q4.b 4
3 3
C2 Q2 R16 10 R17 10 Q4
100pf MPSW51A MPSW51A
u2.2
Size Adjust u2.7 u2.6
R4 R23
10K 10K
R5 R6
42.2K 41.2K
u1.6
L
Vertical Yoke
4
- 6 R7
u1.7 7 41.2K
+ 5 u1.5
U1B
TLC272
8
R8
41.2K
+12V
Zero Adjust
vcadj
R9 R11
vcadj+ vcadj-
+5V
1.47K R10 1K 1.96K
Vertical Amplifier:
The Vertical amplifier will generate a linear current ramp of +/-200mA. The vertical ampli-
fier is an H-Bridge type driver. Positive current flow (deflecting the beam above the center-
line) is defined as current from +12V to Q1 to Rsense through the coil to Q4 to Ground. The
negative current path is from +12V to Q3 through the Coil to Rsense to Q2 to Ground.
The input to the vertical amplifier is the ramp voltage generated above. The objective of the
vertical amp is to match the current through the vertical coil with the input ramp control
voltage. Current through the vertical coil is monitored through the sense resistor, formed
from R15, R16, and R17. Voltage across the sense resistor is measured with the differential
amplifier U1B. This voltage is then used as the feedback voltage to the control opamp, U2A.
Zero Adjust:
The output voltage from the ramp generator is a ramp from 5.0V to 1.05V (nominal). The
center of this ramp is 3.0V. Then, the output of the current sense diff amp must be offset by
3.0V. This is accomplished with the Zero Adjust Network, Resistors R9, R10, and R11. Verti-
cal centering is then accomplished by writing a pattern to the CRT, and adjusting R10 to
center the display.
Size Adjust:
Adjusting the current through the Vertical Coil changes vertical deflection. The voltage
across the sense resistor is:
Vsense = (Vramp-Voffset) / 1.02 (1.02 is the gain of the current sense diff amp)
Current through the coil is equal to current through the sense resistor network.
coil = Isense = Vsense / Rsense
Then, adjusting the value of the sense resistor will change the current through the vertical
coil. Vertical gain is then accomplished by writing a pattern to the CRT, and adjusting R16 to
set vertical deflection.
Horizontal Amplifier:
The drive to MOSFET Q6 is AC coupled. This will prevent Q6 to be driven high in the event
of a faulty driver on the CPU board.
In order to get adequate deflection current (about +/-2.3Amps), 18.5V across the transformer
coil is necessary. A boost winding is added to the transformer, then when the voltage on
the transistor drain flys up, current flows into capacitor C11. C11 charges to a voltage deter-
mined by the turns ratio in the transformer.
Horizontal Gain:
Horizontal deflection is adjusted by changing the current through the Horizontal coil.
Changing the series inductance in the Horizontal Deflection Path modifies the current.
Increasing Horizontal gain is then accomplished by writing a pattern to the CRT, and adjust-
ing the width coil, L3.
Horizontal Centering:
Horizontal centering is accomplished by rotating magnets mounted on the CRT
Yoke assembly.
Grid Voltages:
The following voltages are developed to bias the grids on the CRT:
Grid 1: 10V to -50V DC (Brightness Adjust)
Grid 2: 350VDC
Grid 4: 0V to 350VDC (Focus Adjust)
Anode: 7.5KV
These voltages are derived from additional windings on the FBT. In addition, the supply
voltage for the video amplifier (+36VDC) is generated from a tap on the FBT.
To CRT
T1 Anode
CRT-FBT
Horizontal Amplifier
Boost
Grid Voltages
C11 +
1000uF
9
+12V 8 D3
D2 1N4935 Grid1
+Vvid Intensity
L1
+12filt 1 2 +B 10 2 Vd 1 2
47uH C15
+ MUR120 + C12 .01uF
C10 Hor 7 5 22uF R29 100K
1000uF D4 R28
1N4935 Brightness 19.6K
1K
R24 R27 Q6 C8 L2 L3
10K 10 IRF640 .022uF 15uH 15- 35uH
q5.c q6.d 1
U4B C22 R25
.022uF 215 3
3 4 C22-2 q5.b
2 Q5 L
3
Hsync
12N3904 Horizontal Yoke
R50 74HCT04
1.96K
Video Amplifier:
The CRT tube turns a dot on when video out is low (near 0V), and off when video out is high
(+Vvid = 28V). The input to the video amplifier is a digital signal (3.3V logic level) from the
uProcessor. An input of 0V turns the dot off, an input of 3.3V turns the dot on. Transistor Q7
amplifies and inverts this signal. Video out is driven low through D7, and driven high
through emitter follower Q8. .
+Vvid
Video Amplifier
C19
R36 R37 .01uF
1.96K 1.96K
3
+5V q8-b 2 Q8
1 2N3904
2 1 R41
R51 681
1
19.6K D7 q8-e
R48 1N4148 VideoOut
U4E
100
11 10 u4-6 q7-g 2 Q7
VideoIn BS170
3
74HCT04
Recorder Electronics
Overview:
Atlas includes a thermal strip chart printer (optional on Model 200 and 210, standard on
model 220). The user can print either annotated waveform data or Patient trend informa-
tion.
The main CPU controls the printer. Data timing, clock signals, and strobe widths are all gen-
erated by the FPGA on the CPU board. These signals are buffered on the recorder board
(inverter U5), before transmission to the printhead.
The converter will run at duty cycles over 50%, which requires slope compensation for a
current mode controller. Slope compensation is added by summing in part of the oscillator
signal with the current sense line.
The PWM current limits on a cycle to cycle basis. The supply will be in current limit when
the Isense line reaches 1V. Current limit is set to about 3.5 Amps from 12VDC or 5Amps
from battery.
Two control signals exist for the 24V switcher, n24Von and Rec-Supply-On. The 24V
switcher is disabled when n24Von is high. This signal is controlled by the on board PIC pro-
cessor. The switcher is held off at power up, and allowed to start after 50mSec. This is done
to reduce inrush current at power up. The signal Rec-Supply-On enables power to the print
head, and is controlled by the main CPU. Power is only applied to the print head
when the recorder is running.
RecVdc
+24V
To
Recorder R7
Motor
Power 84.5K +12V
TP10 + C4 L1
Supply 1000uF 22uH
U2-fb
+ C6 D2 Q1
R12 1uF A MBRS340T3 MTP30P06V
10K C7
.01uF TP14 Q4-D 3 2
+24V-switch
U2 4
12
11
A
UC3843A To
+5V 3 C8 R16
U2-out
TP8 + Printhead
Vc
Vcc
A VFB
2
4
1800uF R3 19.6K
1
U2-comp 1 R13 Q4-G Q4 10K
COMP 10 MTP30N06VL
TP17 U2-Ref 14 10 1 A
3
R6 VREF OUT
PWR-GND
n24VOn
Q3 RT/CT ISENSE Power
2N7002 Switch
U2-Isense
2
Switcher A
TP21 C13
8
A
A
R22
4.22K
RecVdc
R11
5.11K
Motor Driver:
Atlas uses a stepper motor to drive the paper. The microcontroller (U3) is programmed to
apply the appropriate phased signal to the motor. A quad darlington switch (U6) amplifies
the signal from the controller to signal levels needed to drive the motor. Motor speed timing
is derived from the main CPU, and transmitted to U3 on signal line U3-clk (U2-pin2).
+24V +24V
1
TP26 R33 D6
+5V C18 1.47K 27V +
.047uF U3-10 C19 C20
.047uF 47uF
3
TP1
d6-c
1
D
14
A A
1
U3 D1
27V
Vdd
Vss
U6
2 13 TP27 R34
3
ULN2065 J3
U3-clk ClkIn/Osc1/RB5 RB0 1.47K u6-3 3 2 J3-1
3 12 U3-9 u6-6 6 1B 1C 7 1
Clkout/Osc2/RB4 RB1 u6-11 11 2B 2C 9 J3-3 2
TP67 3B 3C 3
4 11 n24Von u6-14 14 16 J3-4
Vpp/MCLR/RB3 RB2 4B 4C 4
5 10 1 J3-6 5
RC5/TOCK1 RC0 CLMP1 8 u6-clmp 6
6 9 CLMP2
CON6
RC4 RC1
7 8
RC3 RC2 R35
1.47K Connector Pin #
PIC16C505 U3-8
A 1 3 4 6
TP28 phase 1 + +
2 + +
TP29 R36
3 + +
1.47K 4 + +
U3-7
Temperature Amplifier:
The printer will print darker as temperature is increased. Print darkness can adjusted by
controlling the time a dot is turned on. A thermistor is included on the printhead. This ther-
mistor is nominally 30K, and decreases as temperature increases. The output of the temper-
ature amplifier is a function of the thermistor voltage, Temp = .755*(1+R8/Rtherm). This
voltage is digitized (on the main board), and the CPU can compensate dot width in order to
maintain consistent printing over temperature.
Printhead
Temperature +5V
Amplifier
+5V
C1
.047uF
R1
51.1K
TP3 A
8
R2
U1-3 3 1K
+
1 Temp
C2 U1-2 2
-
R4 .01uF U1A
9.09K MC34072
4
TP54
A A TP6
A
U1-1
C3
R5 .01uF
1K
R8 23.7K
C5 .01uF
+5V
2
Thermistor2
D3
Thermistor 3 BAV99L
Input
1
Thermistor1
Isolation
Barrier
Patient +12V
Isolated Grounded
Circuits Circuits
D401
MBRS130T3 + C412
10uF
f+V T401-1
f+V
C409
470pf
C405 + R419 T401 +12V
C402 100uF 215 C409-1 TP449
.047uF 1
S S
TP450 5 R405
215
R419-2 2 C414 U402-ref TP451
C433 .047uF
470pf 8 T401-8 TP466
15
TP453 U402 C420
3 D405 16 .047uF
VIN
VREF
4
2
BAV99L
TP454
Q401-g
Q402-e
R407 10
SHTDWN FE-Pwr-Sync
3
D E E S
Q401 10 12
4 MTD3055V 1 2 1 U402-e 11 CA 3
13 EA OSCOUT 6 U402-rt TP455
D403 14 CB RT 7 U402-ct
IsoXfmr TP456 2 R409 EB CT TP457
3
T401-4 Q402 1 5.11K 2
f-V V+
MMBT3906L 3 U402-sen 4 1
GND
+SENSE V-
U402-1
R406 5 9
C407 MBRS130T3 0.2 -SENSE COMP C411 R410
C404 100uF
+
R408 TP458 C410 LM3524DM 2200pF 7.5K
.047uF 100 .01uF
8
Q401-s
S S
f+V
R422 +5V
10K
TP459 U410
8
R403 4N25
U401-3 3 1K R411
+
1 U401-1 iso401-a 1 6 iso401-b 5.11K
U401-2 2
-
R423 U401A 5 opto-fb
5.11K LM358
4
4
TP462 2
R404
S S
196K
TP463 TP464
R417
10K
8 1
fVcc U403-7 VIN VOUT iso+5Vdig
7 5
3 FDBK ERR
SHTDN C415 + C406 + C403
C401 6 1uF 100uF .047uF
GND
.047uF 2 TAP
SENS
S S S S
U403
4
LP2951C
fVcc
R416
8
10K R415
U401-5 5 100
+ U401-7
7
f+5V
6
-
C418 +
4.7uF U401B C416
MC34072 .047uF
4
S
S
C417 S
680pf
U407
78L05
8 1
f+V IN OUT iso+5Vdig
Isolated Supply Voltages
Regulation and Filtering
GND
GND
GND
GND
S S S
8 1
VIN VOUT s+5V
7 5
3 FDBK ERR
SHTDN f+V
U403-fb
C401 + C415
.047uF 6 1uF R416 TP460 U401B
TAP
8
2 1 C417
f-V IN OUT s-5V
3 S S
680pF S
6 IN C421 TP465
GND
7 IN
C424 IN +
1uF
.047uF
U404
5
S
79L05 S
S TP452
L401 220uH
fVcc
+ C434 + C431
10uF 10uF
S S TP468
L402 220uH
fVee
+ C435 + C432
10uF 10uF
S S
A/D Circuits
M A/D
A pulse width modulator is used as an A/D converter. The PWM runs at a 1.2KHz rate, syn-
chronized by the A/D sync signal. A/D sync is low for 52.1uSec, high for 781.25uSec. Using
the values shown, the integrator will ramp down 10.01V, and ramp up 25V. The voltage at
the integrator output (U601-1) is limited to about 5V [5V*(73.2/83.2) + Vdiode)]. Then, the
integrator starts at 5V and ramps linearly down to 5V.
The analog input voltage to be digitized and the integrator output are the inputs to a com-
parator. The output of the comparator is low at the start of an A/D cycle, and switches high
as the integrator ramp drops below the input voltage being digitized (see the timing diagram
below). A/D conversion is accomplished by measuring the width of the PWM output signal.
The A/D timer runs at 25.175MHz, then the A/D resolution is about 21000 counts (over 14
bits). Hysteresis is added to the comparator to avoid oscillations during switching. Note that
since the output of the comparator is low at the start of the A/D cycle, a resistor divider is
formed at the comparator input. This divider reduces the Analog-In signal by 0.75% [464K/
(464K+3.48K)].
U602-7
R601 fVcc f+5V
10K R608
U601-3 C603 1K
f+5V
5
6
8
680pF 14
8
2
+
R602 3 7 9 8
+ U602-3 PWM-Out
73.2K 1 U601-1 3
-
2 U602 7
-
R606 LM311 U604D
f+5V U601A 3.48K 74HCT04
4
1
R603 MC34072
4
E E
46.4K
U601-2
14 C601 fVee
PWM fVee E
11 10 U604-10
A/D-sync
R604 1000pF
A/D
3
7 10K Converter
U604E D601-2 2 1
74HCT04
E
D601
MMBD1503A
Integrator 52uSec
Input
833uSec
(U604-10)
+5V
Comparator
Inputs
Analog In
-5V
PWM-Out
(U604-8)
PWM-timer
A/D Multiplexer
The model 621 uses an 8-channel multiplexer, the model 622/623 uses a 16-channel multi-
plexer, to select the analog signal to be digitized. Control of the multiplexer is through a
serial communication channel from the main CPU. The following signals are digitized:
Ground Ground Reference for digitized signals, used in calibrating the A/D converter
ECG Amplified ECG signal
V Buffer Output of the V-lead buffer, used to determine leads off
LL Buffer Output of the LL-lead buffer, used to determine leads off
LA Buffer Output of the LA-lead buffer, used to determine leads off
RA Buffer Output of the RA-lead buffer, used to determine leads off
f1.24V Reference Voltage, used in calibrating the A/D converter
RL Output Output of the RL amplifier
Patient Temp Analog voltage representing patient Temperature (model 622/623 only)
Respiration Amplified Respiration signal (model 622/623 only)
Resp Leads Off DC impedance for respiration, used to determine respiration Leads off
(model 622/623 only).
fVee
8
E
7
9 VEE
VSS
Mux-A/D-C C
10
Mux-A/D-B B
11
Mux-A/D-A A
6
Mux B INH U609
4 4051
Resp-LdsOff X7
2 MuxB
An-Resp X6
5
1 X5
12 X4
15 X3
14 X2
VDD
13 X1 3
Patient-Temp X0 X
E
16
fVcc
fVee
8
E
7
9 VEE
VSS
10 C
11 B
6 A
Mux A INH U603
4 4051
vRL X7
2 MuxA
f+1.24V X6
5
RA X5
1
LA X4
12
LL X3
15
V+ X2
14
VDD
Analog ECG X1
13 3
X0 X Analog In
16
E
fVcc
Serial Communication
Serial data is transmitted to the isolated circuits through Optical Isolators. The following
signals are transmitted from the CPU board to the isolated circuits:
1. FE-Serial-Data: Serial Data transmitted from the CPU board to the Isolated circuits.
2. FE-Data-Clk: Serial Data Clock.
3. A/D Clk: Serial Data latch. Also used as clock for PMW A/D converter.
Serial Data is converted to a parallel format using Shift Register U605 and U606. The follow-
ing Data is transmitted from the CPU board to the isolated circuits:
iso+5Vdig
U605 16
15 VCC 14
Resp-Off QA SER FE-Serial-Data
1
SpO2-Reset QB
2 11
Sw-RespReset QC SRCLK FE-Data-Clk
3 10
Sw-RL-V QD SRCLR
4
MuxB QE
5 12
MonBW QF RCLK A/D-Clk
6 13
SW-RLD-RL QG G
7
SW-RLD-LL QH
9
QH 8
GND
74HCT595
D E
U605-out
U606 16
15 VCC 14
SW-RLD-LA QA SER
1
SW-RLD-RA QB
2 11
Mux-Lds-C QC SRCLK
3 10
Mux-Lds-B QD SRCLR
4
Mux-Lds-A QE
5 12
Mux-A/D-C QF RCLK
6 13
Mux-A/D-B QG G
7
Mux-A/D-A QH
9
QH 8
GND
74HCT595
D E
Signal Isolation
Optocouplers are used to electrically isolate signals. The following signals are transmitted
across the isolation barrier through the optocouplers:
1. SpO2 out: SpO2 serial data, waveform and status information.
Opto U411 Data from the SpO2 board to the CPU board.
2. Serial Data: Serial Control data for isolated circuits.
Opto U613 Data from the CPU board to isolated circuits.
3. Serial Data Clock:Data clock for serial control data.
Opto U612 Clock from the CPU board to isolated circuits.
4. ADC Clock Clock for PWM A/D converter, also used to latch control shift registers.
Opto U611 Clock from the CPU board to isolated circuits.
5. PWM A/D dataA/D Pulse width data.
Opto U610 Pulse width data from isolated circuits to CPU board.
6. Respiration ClockClock for Respiration drive circuit (same signal as power supply sync)
U710 Clock from the CPU board to isolated circuits (model 622/623 only).
ECG Circuits
Overview
Atlas provides a 5-wire front end, and will be compatible with both a 3-wire and 5-wire
cable. Monitor (0.5Hz to 40Hz) Extended (0.05Hz to 100Hz) bandwidth are provided. The
ECG amplifier always transmits 0.05Hz to 100Hz data to the CPU board (unless in baseline
restore mode), additional filtering for Monitor Bandwidth is implemented in software.
Defib Protect
RFI Filtering
R506 D506
10K 5.1V
+clamp 3 1
fVcc
R507
10K
-clamp 1 3
fVee E
D507
D501 5.1V
MMBD1503A
1 2
R501 R508
51.1K 10K
3
D501-3
RA To Buffer Amp
N501
LAMP NEON C501 C506
220pF 220pF
S E E
Input Buffers
fVcc Gain = 9.26
8
U501-3 3
In +
1
Out
2
-
R509
22Meg U501A R517
MC34002 10K C510
4
0.1% 220pF
R509-1
fVee
R557 U501-2
22Meg
R518
1.21K
VLdsOff 0.1%
Lead Select
fVcc
Wilson 16 U505
Network 4051
RA 13 3 mux-
VDD
RA RA X0 X
14
LA 15 X1
R529 10K aVR 12 X2
aVL 1 X3
aVF 5 X4
R530 10K V- 2 X5
4 X6
LA X7
6
R531 10K 11 INH
10 A
E
VSS
9 B
R532 10K C 7
VEE
LL
8
fVee
E
R533 10K
fVcc
U506
16
4051
R534 10K LA 13 3 mux+
VDD
14 X0 X
LL 15 X1
RA 12 X2
V+ LA X3
1
R535 10K LL 5 X4
V+ 2 X5
4 X6
R536 10K X7
6
11 INH
R537 10K 10 A
VSS
9 B
E C 7
VEE
8
fVee
E
C544
1000pF
8
3
mux- + diff-
1
2 R544 R546
-
10K 0.1% 10K 0.1%
U507A U508-3
MC34002
4
C543
fVee .047uF
fVcc
fVcc
u509-4
fVcc
8
R565
8
2
R545 3 121K
+
5 10K 0.1% 1 4
mux+ + -
7 diff+ 2 1
- SingEnd Out
6 U508A 3
- +
AD712 U509
U507B LMC7101
4
MC34002
u501-8
4
5
E
C542 fVee
fVee 220pF
fVee u508-2
R547
10K
0.1% C545
1000pF
E E
RLD Mux
U504
3 2
To RL S1 D1
1
Sw-RLD-RL IN1
RLD Amp
14 15 fVcc
To LL S2 D2
16
Sw-RLD-LL IN2
11 10 U503A R525
To LA S3 D3
8
fVee 5 V-
GND
R528 TP552
51.1K
C515 R550
8
3.3uF 19.6K
ecg-hp U508-5 5
Diff-out +
7
An-ECG
6
-
C516
R548 R549 .047uF U508B
1Meg 110K AD712 R551 C517
4
73.2K .01uF
Q504-d E
fVee
E
U508-6
3
R552
1K
Q504 1
2N7002
E
Q504-s R553
22
100K
1 Q504-g
Sw-MonBw
Q505
2N7002
3
The A/D converter will digitize the An-Temp input, along with the reference voltage and
ground. The gain of the A/D is calibrated from the reference voltage measurement, and any
drifts in the reference voltage or A/D gain are continuously compensated during monitoring.
fVcc Temperature
Amplifier
R624
8
51.1K R626
U608-3 3 1K
f+1.24V +
1 U608-1
Patient-Temp
C633 2
-
.01uF
U608A
AD712
4
E
fVee
C634 .01uF
R625
-Clamp +Clamp 1K
D602 R627 1.21K
BAV99L
1 2
0.1%
C635 .01uF
3
J601
Temp-In
2
1 C636
Temperature
CON2 Thermistor 2200pF
f+5V
PR
Right-Arm Q D
3
CLK Resp-Clk
6
CL
Q 7
D702 GND
MMBD1503A
1
1 2 E
R702 C702 R704
Resp-Off
1.96K 1000pF 31.6K
D702-3 C702-1 RespDr-
3
Left-Arm
-Clamp +Clamp
D703 R724
MMBD1503A fVcc Respiration 196K
1 2
Diff Amp Resp-DC
R707 C706 C720
8
1.96K 330pF .047uF
D703-3 U702-3 3
3
Right-Arm + U702-1
1 D705
2 MMBD354LT1 E
-
U702A
R709 AD712 R711 R715 R716 1
464K 15.8K 3.16K 3.16K
4
3
D605-C
fVee U702-2 2
fVee
E
U703-2
R717
R712 3.16K C711
D703-1
D704 1K 0.1uF
4
MMBD1503A
2 -
1 2 fVcc 1 E E
3 +
U702B U703A
R708 C707 AD712
3
8
1.96K 330pF
8
AD712
D704-3 U702-5 5
Left-Arm +
7 U702-7
6 fVcc
-
R713
4
1K
R710
464K fVee
U702-6
E
R714
15.8K
3.3uF 100K
Resp-AC U703-5 5
D605-C +
7
An-Resp
6
-
U703B
R718 R719 C713 AD712
825K 51.1K 0.1uF
4
R721
Q701-d E
fVee 316K
E
U703-6
2 R722
Q701 3 316
MMBF4393L 1 C714
.047uF
Q701-g
E E
D706
MMBD1503A
1 2
Resp-Reset
3
R723
1Meg
SpO2 Circuits
The SpO2 transducer senses oxygen content of functional arteriolar hemoglobin through the
use of light (red and infrared) passed through the sensor. The reflective characteristics of
hemoglobin at the wavelengths used allow the pulse oximetry circuits to obtain changing
saturation levels. This data is then processed to obtain the oxygen saturation percentage and
pulse rate.
Nellcor or Nonin Medical provides the SpO2 board (Nonin only for the model 621). The
SpO2 board includes amplifiers and processing, and transmits serial data to the CPU board
(Waveform data, SpO2%, and pulse rate). The Atlas monitor provides electrical isolation
(power and data) to the SpO2 board. Note that you must use Nonin probes with the Nonin
SpO2 board, and Nellcor probes with Nellcor SpO2 board.
1
J3 3V Lithium 10K
NIBP-ADC-Clock
9
1 +12V QH NIBP-Safety +5V
2 NIBP-15mmHg
U2 C23
D NIBP-Overpressure D
CON2 74HCT595 .047uF
D NIBP-Valve-Close
SPO2-Rx 2 1
D NIBP-PWM-ADC CRT Board SpO2Out
NIBP-Offset-DAC
U1A
Connector 74HCT04
+12V
D
J6
Serial I/O
1
Video-VSync
Video-HSync
2 connector
3
+5V C30 +5V
4
Video-Data 10uF
5
+3.3V
+
6 J10
1
Main PCA CON6 D 2
3
RS232-RX 12 13 Model 200 Serial I/O
C6 + Connector 9
R1OUT
R2OUT
R1IN
R2IN
8 Rx
4
5
100uF 11 14 Tx (manufacturing test
3 T1IN T1OUT 6 only) 3
J4 10 7
T2IN T2OUT 7
1 2
1 2 TP11 8
NIBP-Safety 3 4 U8-1 1
D 3 4 C+
+3.3V 5 6 NIBP-PWM-ADC TP17 U8-3 3 RJ-45
5 6 C1-
7 8 U8-4 4
7 8 C2+ D
9 10 RS232-Tx TP13 U8-5 5 U8
9 10 C2-
C2 C3 R20 NIBP-OP 11 12 PIC-Data +3.3V C29 U8-2 2 SP232ACN
11 12 PIC-Data V+
.047uF 220pF 215 13 14 RS232-Rx U7 .047uF TP15 U8-6 6
13 14 (pg 3) V-
ETCO2-Tx 15 16 SPO2-Tx AT24C02N-10SC-2.7 TP16
ETCO2-Rx 17
15 16
18 SPO2-Rx R15 TP12 TP14
Front Panel
D D 17 18
Spare-2 19 20 ADC-Clock SCD 5 1 1.96K
19 20 ADC-Clock SDA A0
NIBP-Data
NIBP-15mmHg
21
23
21 22
22
24
FE-Clock
SPI-Data-Out (pg 3)
SCL 6
SCL A1
2
3
D
C31 C32 C33 C34
D
C5 .047uF Display
0.1uF 0.1uF 0.1uF
LED-Latch 25
23 24
26 SPI-Clock
A2
TP18
0.1uF +5V Connector +5V
25 26
Video-HSync 27 28 Batt-ID 7 U7-wc +5V
27 28 WC D D
Spare-3 29 30 FE-Data 1 J8
29 30
Power-Sync 31 32 Rec-Motor-Step 3 CON14AP
31 32
Vbackup 33 34 Key-Clock 2 Key-Clock-b 2 1
Vbackup 33 34 + +
NIBP-Valve-Close 35 36 PIC-Clk R16 Key-Latch-n-b 4 3
35 36 PIC-Clk D D + + On/Off-Key
Video-VSync 37 38 Speaker-Audio R5 1.21K 3.48K U3A Key-Data 6 5
37 38 Speaker-Audio + +
NIBP-Offset-DAC 39 40 74HCT08 LED-Data-b 8 7
Page3
39 40 (pg 3) +3.3V D + +
41 42 NIBP2-PW-ADC LED-On 10 9 + C4
ac-on 41 42 + +
43 44 R6 1.21K 12 11 330uF
43 44 +5V + +
45 46 Video-Data LED-Latch-b 14 13
45 46 D + +
Key-Latch-n 47 48
47 48
49 50 Nurse-Call 4
49 50
Rec-Clock 51 52 Rec-Data-Latch 6
51 52
Rec-Data 53 54 Rec-Strobe Key-Latch-n 5
53 54 D D
ACON-LED
HRESET 55 56
55 56
SPI-data-in 57 58 SCD U3B filt+12V
57 58 +5V
59 60 74HCT08 Q1
59 60 D
MMBT3906L
Socket 30x2 9 2 3
8
LED-Data 10 R1
D D
10K
1
U3C
2 +5V 2
74HCT08 Q1-e TP19
D
12 +3.3V
11 R2
LED-Latch 13 1.96K
Q2-c TP20
U3D R3 TP21 R21
3
74HCT08 10K Q2 10K
D
Q2-b 1 MMBT3904L
ACON
ac-on
2
R4
10K Page1
C35
Speaker Drive
3
+5V 4.7uF
TP22
+
Q3
1 2N7002
PIC-Vprog
Audio-Shutdown
Rec-clock
2
TP24 TP25
TP23 4Vpp max.
Rec-Data
1
6
Rec+12V C36 J11
4.7uF R17 3 5 SP
+ 1
19.6K
2
J7 R17-1 U9-4 4 8 SM
- 3
+
1 13
Rec-Supply-On + C7 C8 U9 CON3
2 14
2
7
330uF .047uF TPA301
3 15
Rec-Motor-Step
4 16 U9-3
R18
+5V 5 17
619 C37
+12V 6 18 Print-Temp
Rec-Data-Latch 0.1uF
7 19
Rec-Strobe
8 20
Rec-Clock R19
9 21
Rec-Data 19.6K
10 22
1 11 23 1
12 24
C14 C20
.047uF .047uF CON24B C38
D
220pF
Designed
Rick Myers 3/05/99
Title
Connector Checked
Main Board - Model 200
L.Phillips 3/16/99
8
TP206 1K D 5-39934 LPP 7/9/99 LPP
NVRAM pullup
U201 R201 U203-3 3
+ 1 Add Nellcor SpO2 cabability.
78L05 576
NIBP-Overpressure
8 1 U203-2 2 F Modify RLD to reduce V-lead noise. 5-44460 LPP 3/26/02 JK
IN OUT -
U203A Improve ESU rejection.
C203 C222 LM393 Add 330uF bypass for Nellcor 506
GND
GND
GND
GND
4
C201 R202 .01uF G board. 5-44857 LPP 7/18/02 JK
P+12V
.047uF + C202 174
4 4.7uF .047uF 4
TP207
7
TP208 TP209 R210 +5V
A A A
8
464K
A
U202-3 3 P+12V
A + 1
2 P+5V
- P+12V P+5V
R203 R211 TP203 TP204
A
8
3.32K U202A 1.96K
4
MC34072 R209 5
+
8
1K 7 u207-9 9
U203-5 5 6 8
A + -
P+5V TP210 7 10
NIBP-15mmHg
U203-6 6 U208B
4
-
TP240 U203B MC34072
C223 LM393 U207C
Over Pressure A
4
.01uF 74HCT00
P+12V
R204
TP211 150
P+.75V
Fault Circuit A
U208-7 P+5V
TP212
A A
8
C226
.047uF L202 U202-5 5 12
+ 7 11
Bead
6 13
-
C204 R205
A
.047uF 750 U202B +12V +6V
4
P201-pwr MC34072 R239 U207D
A
1K 74HCT00
A
C232 R242
Primary A A
2
4
.047uF R236 10K TP213
3.83K TP214 Q202
Transducer A
3
R212 MMFT2N02EL
A
56.2K TP215 Q202-G 1
0mmHG = 0.5V 2 P201-Out R240
3
10K
Gain
3
300mmHG = 4.0V Q201-B 1 Q201 R243
NIBP-Safety
and C206 TP216 MMBT3904L 100K Q202-D
3 6 P201-6 .022uF P+12V C209 3
Comp
2
.047uF R241
C227 10K
680pF
P201
A
1
XFPM-050KPGR-P1 TP217
A
8
R219
U204-3 3 1.96K
A A + 1 U204-1 TP218
2
-
3
J201
P+5V U204A 1 2 Valve+
1
4
Zero Adjust R213 MC34072 C228 Valve-
2
P+12V 237K .047uF
3
D201-A
+/-20mmHg range D202 Pump+
4
R244 R217 BAV99L Pump-
A 5
38.3K TP219 TP220 5.62K
A
R214 R216 U204-2 CON5
8
7
8
5
6
23.7K
Q203
A/D Mux MMDF2N02E
A A A
U204-7
A
2 4
NIBP-Valve-Close NIBP-Pump-On
P+.75V
3
A
9 R248 R249
C
10 1K 1K
B
11
A
6 U209
2 INH 2
4051
4
LithMeas X7
P+12V 2
X6
P+12V C216 5
Safety .047uF TP224
Print-Temp
P4.25V 1
X5
X4
C211 P.75V 12 TP225
Transducer PrimaryPres 15
X3
X2
R235
SafetyPres 14 3.48K
.047uF
A
TP226 +5V/2 13
X1
3 U209-Out U210-2
NIBP PWM
X0 X
8
R227 R228
A
A/D Converter
8
.047uF
MC34072
A
P202 TP229
2
5
4
TP232 A
8
2
P202-Out- 5 + 7 U210-7 4
R231 C219 C224
+ 7 U206-7 3 6
73.2K .047uF 1000pF
A - NIBP-PWM-ADC
5
8
P202-5 6 R234 U210 5
- 3 3.48K MAX941
6
+ 1 U208-1 U210-3
U206B R225
4
4
R232 MC34072 TP235
A
5VRef U206-6 U207A 10K
74HCT00 U208-2
1 A A 1
C220
A
P+12V 1
3 TP236
Zero R221 R226 C215 2 R233 .01uF
NIBP-ADC-Clock
3
5
TP238
D201 Initial Date
Welch Allyn Inc.
+ A
7 U205-7 MMBD1503A
6 U207-3 Drawn Schematic: 620002.dsn
- Rick Myers 3/05/99
TP234
C213 R222 U205B Designed
3/05/99
4
Rec-Data
B See ECN worksheet 5-39456 LPP 4/27/99 LPP
Rec-Clock
Improvements for ESD
C 5-39822 LPP 6/23/99 LPP
and Fast Transients
filt+12V
Mods to U2 clock line,
D 5-39934 LPP 7/9/99 LPP
NVRAM pullup
R318
D
LP2951CD-3.3 10K
14
D D
1
U305
D
Vdd
Vss
2 13
PIC-Data ClkIn/Osc1/RB5 RB0
3 12 Page 1
On/Off-Key Clkout/Osc2/RB4 RB1
4 11
Vpp/MCLR/RB3 RB2 PIC-Clk
TP313 5 10
TC5/TOCK1 RC0
On-Off 6 9 PIC-audio
RC4 RC1
R320 1.62K
7 8
RC3 RC2 Speaker-Audio
D620361-MX10000 TP320
R319 19.6K
U2-Clk
ADC-Clock
On/Off Switch
TP316 TP317
Q301
U2-Reset
MTP23P06V
L301
47uH
3 2
AC+12V
4
TP318
R303 R314 D304
3 C302 C303 C304 C305 10K 100 MMBD354LT1 3
+ + +
1
C301 1uF .01uF 330uF .01uF d304-1 1
1000uF
3
TP319 2
VBackup
R316
Q301-G
100
d304-2 C322
BackupBattery
.047uF
+12V
R301
51.1K
+ C306 C307
330uF .047uF
3
C328-1 Q302-B 1
TP301 Q302
R302 MMBT3904L
2
C328 + 100K
TP321
1uF
Q305
MTP23P06V L302
47uH
3 2 Q305-s
+6V
4
+6V Buck
(5.68V nominal) C326 C321
.047uF D303 + C314 .047uF
1
2 330uF C327 2
Q305-g MBRS340
.047uF
R304
127K
R313
10
TP302 U302
U301-fb Q304 LM2940CT-5.0
MMBT3904L Q304-e TP303 1 3
IN OUT +5V
3 2
R305 C313
GND
1
100K R306 .047uF + C316 C317
10K D301 10uF .047uF
1
BAV99L
2
R312 3
TP304
C311-1 1.96K
+ C315
D D
U301 TP305 1uF
12
11
D
TP306 C311 UC3843A TP307
2200pF 3 Q303-c 2
VFB
Vc
Vcc
D
U301-comp 1
U301-out
R310 TP308
COMP
Q303-b
1.96K
3
14 10 1 Q303 U303
VREF OUT
Q306 MMBT3904L LF33CV
2N7002 1 3
IN OUT +3.3V
2
1
PWR-GND
GND
+ C319 C320
2
100uF .047uF
8
2
U301-osc
C310
D D
2200pF
D
R308
27.4K
1 TP310 1
U301-5
TP309
R309
10K
Initial Date
Welch Allyn Inc.
TP312 Drawn Schematic: 620002.dsn
Rick Myers 3/05/99
5Vref
Designed
Rick Myers 3/05/99
Title
ACON
Checked
Power Supply - DC/DC
L.Phillips 3/16/99
U407
78L05 A Release to Production 5-39118 JAC 3/15/99 LPP
1 8
iso+5Vdig OUT IN
GND
GND
GND
GND
C406 +
100uF C403 C430
Improvements for ESD
.047uF .047uF C 5-39822 LPP 6/23/99 LPP
2
and Fast Transients
S S S Mods to U2 clock line,
D 5-39934 LPP 7/9/99 LPP
NVRAM pullup
GND
C421 79L05 7 2 C414 U402-ref
+ IN
1uF C424 C433 TP406 .047uF
.047uF 470pf 8 T401-8
15
5
TP408 U402 C420
3 D405 16 .047uF
S S VREF
4
2
VIN
BAV99L TP409
R407 10
S SHTDWN
Q401-g
Q402-e
3
Q401 10 12
CA
TP452 L401 4 MTD3055V 1 2 1 U402-e 11 3
EA OSCOUT FE-Pwr-Sync
220uH 13 6 U402-rt
D E E S CB RT
14 7 U402-ct
fVcc EB CT
2
D403 IsoXfmr R409
Q402 1 5.11K 2
V+
+ C431 + C434 f-V T401-4 MMBT3906L U402-sen 4 1 TP412 TP413
+SENSE V-
GND
U402-1
10uF 10uF R406 5 9
-SENSE COMP
3
0.2
C407 MBRS130T3 TP414 TP415 R408 TP416 C410 LM3524DM
8
+
C404 100uF 100 .01uF
S S TP417
.047uF Q401-s
C411 R410
2200pF 10K
3 S S 3
TP468 L402
220uH fVcc
R417 +5V
fVee
10K
TP419
+ C432 + C435 TP420 U410
8
10uF 10uF R403 4N25
U401-3 3 1K R411
+ 1 U401-1 iso401-a 1 6 iso401-b 5.11K
U401-2 2
S S -
R418 5 opto-fb
5.11K U401A
4
MC34072 4
2
fVcc
R404
S S S
316K
TP405 TP421 TP422
TP407 R416 R401 C408 R402
8
4.7uF
.047uF 10K
S
C417
S S
680pf
TP411 S
2 2
Nonin SpO2
Connector
J401
1
SpO2 ESD
fVcc
J403 Ground
2
sSpO2tx iso+5Vdig
3 1
+ C419
4 2
10uF C413
Tab-.187 .047uF
CON4
S
D E
+5V
S
3
Q403
sSpO2tx 1 MMBT3904L
U411
R412 HCNW4503
2
511 R414
TP423 TP424
Q403-e iso402-a 2 8 6.19K
R421
Nellcor SpO2 10K
6 u411-6
Connector SpO2Out
3
5
C422 C423
J402 .047uF 1000pF
D E
1 2
+ +
3 4
+ + SpO2-Reset
5 6
+ +
7 8
s-5V + +
9 10
+ + s+5V
11 12
+ +
13 14
1 iso+5Vdig + + 1
C429 + C437
CON14AP .047uF 330uF
S S
C427 C428
.047uF
+
10uF
S S
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620002.dsn
Rick Myers 3/05/99
S S
Designed
Rick Myers 3/05/99
Title
Checked
Isolated Power and SpO2 interface
L.Phillips 3/16/99
fVcc
B See ECN worksheet 5-39456 LPP 4/27/99 LPP
4 4
E E E E E E E E E
RA
fVcc
V+
J501 TP501 TP503 Lead Select
CON6 R501 R561 R508 TP504 TP505 fVcc
8
19.6K 73.2K 10K
Right-Arm C501-1 C537-1 U501-3 3 TP506
1 + fVcc
1 U505
2
8
2 Wilson 4051
3 -
R509 13 3 mux- 3
4 X0 X +
N501 C501 C537 C506 TP507 22Meg U501A R517 Network RA 14 1 diff-
5 X1
4
330pF 220pF 100pF TL072 10K C510 TP508 LA 15 2 C544
6 X2 -
LAMP NEON TP509 0.1% 220pF R529 10K aVR 12 Diff Amp 1000pF
X3
R509-1 aVL 1 U507A
X4
4
fVee aVF 5 TL072 Gain = 1
S E E E X5
R557 U501-2 R530 10K V- 2
E X6
Shield 22Meg 4 R544 R546
X7
fVee 10K 0.1% 10K 0.1%
R518 TP510 6 U508-3
INH
fVcc 1.21K R531 10K 11
A
VLdsOff 0.1% 10
E B
TP534 TP511 9
C
R502 R562 R510 TP512 TP513 R532 10K C543
8
19.6K 73.2K 10K TP514 fVcc TP557 TP558 .047uF
E
Left-Arm C502-1 C538-1 U501-5 5 fVcc u509-4
+ fVee
7 TP515 E
6 R533 10K TP516 fVcc
3 - fVcc 3
8
R511 U506 R565
2
N502 C502 C538 C507 22Meg U501B R519 4051 R545 3 121K
4
LA 13 3 mux+ 5 + 1 4
330pF 220pF 100pF TP519 TL072 10K C511 R534 10K 10K 0.1%
X0 X + -
LAMP NEON TP520 0.1% 220pF LL 14 7 diff+ U508-2 2 1 diff-out
X1 -
R511-1 LL 15 6 U508A 3
X2 - +
fVee TP521 RA 12 AD712 U509
S E E E X3
4
U501-6 LA 1 TP522
U508-1
R558 R535 10K U507B LMC7101
X4
5
22Meg LL 5 TL072
X5 E
V+ 2 C542 fVee
X6
R520 R536 10K 4 fVee 220pF
X7
fVcc 1.21K fVee
VLdsOff 0.1% 6
INH
TP541 TP523 R537 10K 11
A
R503 R563 R512 TP524 TP525 10 R547
B
8
8
330pF 220pF 100pF TP531 TL072 10K C512 3.3uF 19.6K
LAMP NEON TP533 0.1% 220pF ecg-hp U508-5 5
R513-1 + 7
An-ECG
fVee 6
S E E E -
R559 U502-2 C516
22Meg R548 R549 .047uF U508B
4
TP535 TP536 TP537 1Meg 110K AD712 R551 C517
R522 73.2K .01uF
fVcc 1.21K
E
VLdsOff 0.1% Q504-d fVee
Mux-LdS-A
TP544 TP538 U508-6
E
R504 R564 R514 TP539 TP540
Mux-LdS-B
8
3
R515 TP530
2 N504 C504 C540 C509 22Meg U502B R523 2
4
2
R560 U502-6 Q504-s R553
2
22Meg 100K
1 Q504-g
Sw-MonBw
R524 Q506
1.21K 2N7002
VLdsOff 0.1%
fVcc
3
U504
3 2 TP547
S1 D1 E E
1 TP548 U503B R555
Sw-RLD-RA IN1
8
TL072 30.1K
14 15 5 U503-5
S2 D2 + f+5V
16 7
Sw-RLD-LL IN2 VLdsOff
6
TP550 11 10 -
TP545
S3 D3
R505 R566 9 C536 R556
Sw-RLD-LA IN3 f+1.24V
4
TP559
2
1 D505 10K 3 1
3 3 2 2 3 RL-mux 1 +
MMBD1503A
2 R526
- E
V-Lead Defib Protect, 10K
U503-2
TP562
4
R567
protect other inputs.
NL Initial Date
Welch Allyn Inc.
fVee Q501-G TP560 R527 fVee C514
Sw-RLD-V
1K 0.1uF Drawn Schematic: 620002.dsn
Rick Myers 3/05/99
C514-2
C546 No Load, Designed
Rick Myers 3/05/99
NL R528 TP552 Title
Allows RLD switch TP551 51.1K Checked
ECG Amp
L.Phillips 3/16/99
to V-Lead, not used. Rev
Approved Size Document Number
E Z. Psenicnik 3/16/99
C 620002 G
Release For Production
J. Bello 3/17/99
Date: Monday, August 05, 2002 Sheet 5 of 6
A B C D E
A Release to Production
U601 U602 U603 5-39118 JAC 3/15/99 LPP
fVcc
C622 + C609 C623 C624 B See ECN worksheet 5-39456 LPP 4/27/99 LPP
.047uF 4.7uF .047uF .047uF
R623
E E E E
46.4K TP625
8
5
+
Sw-RLD-V 7
6 f+1.24V
-
U607B iso+5Vdig
LM393 iso+5Vdig
4
iso+5Vdig
C629
U604 .047uF
f+5V +5V
U613
fVee Serial/Parallel TP627 R613 C641 HCNW4503
+ C631 f+5V 6.19K 0.1uF
D E
4.7uF fVcc Control Data TP602 U604A 8 2
U605 74HCT04 R625
D E
fVcc 74HCT595 10K R619
U604-1
15 14 6 619
E U604-2 2 1 U613-6
QA SER
SpO2-Reset 1 3 iso604-a FE-Data-In
R622 TP601 QB
2 11 5
46.4K QC SRCLK C634
SW-RL-V 3 10
QD SRCLR
8
4 220pF
3 QE
Sw-DiagBw 5 12 E D E
+ QF RCLK
1 6 13 TP603
Sw-MonBw Sw-RLD-RL QG G D E
2 7
- f+1.24V Sw-RLD-LL QH
U607A
LM393 9
4
TP604 QH
TP621 TP622 iso+5Vdig
TP605
D E
fVee
U605-out
U612 +5V
TP623 TP624 TP628 R615 C642 HCNW4503
U606 f+5V 6.19K 0.1uF
3 74HCT595 U604B 3
8 2
74HCT04 R626
Sw-RLD-LA 15 14 D E
QA SER 10K R620
u604-3
Sw-RLD-RA 1
QB 4 3 6 619
Mux-LdS-C 2 11 U604-4 U612-6
QC SRCLK 3
Mux-LdS-B 3 10 iso603-a FE-Data-Clock
QD SRCLR 5
Mux-LdS-A 4
QE C635
Mux-A/D-C 5 12
QF RCLK 220pF
Mux-A/D-B 6 13
QG G
Mux-A/D-A 7 E D E
QH TP606 iso+5Vdig
U605-12 D E
9
QH C637
fVee
1000pF
C628 U611 +5V
TP607 9 R628 TP629 R617 0.1uF HCNW4503
C D E
TP608 10 10K f+5V 2.15K
B D E
11 U604C
A 8 2
TP609 6 A/D Mux 74HCT04 R627
INH D E
U603 5.11K R621
U604-5
4 4051 6 5 6 215
vRL X7 U604-6 U611-6
2 3
f+1.24V X6 iso602-a FE-ADC-Clock
5 TP610 TP611 TP612 5
RA X5
1 C636
LA X4
12 100pF
LL X3
15 R605 R607
V+ X2 E D E
U603out
14 3.48K 464K
U602-2
An-ECG X1 D E
13 3
X0 X
iso+5Vdig
iso+5Vdig
TP613 fVcc
E
fVcc
U602-5
TP614
R601 fVcc f+5V
U602-7
10K R608 C632
U601-3 C603 1K TP615 .047uF
f+5V
680pF +5V
8
6
5
8
U604-8
3
TP616 2
+
R602 3 7 9 8 1 Q601
2 + E 2
73.2K 1 U601-1 U602-3 3 MMBT3904L
-
2 U602
-
2
R606 LM311 U604D R611 C621
1
4
f+5V U601A 3.48K 74HCT04 6.19K 0.1uF
4
Q601-e
46.4K 511 HCNW4503
TP630 U601-2 iso601-a 2 8
C601 fVee TP618 TP626
fVee R624
11 10
PWM E
6
U604-10 TP619 U610-6 FE-PWM-ADC
fVcc R604 1000pF 3
A/D
3
10K 5 5.11K
U604E 2 1 Converter C633
D601-2
74HCT04 100pF
D E
8
TP620 E
5 D601
+ 7 MMBD1503A
6
-
E
U601B
4
MC34072
fVee
U601-7
52uSec
Integrator
f+5V Input
781uSec
(U604-10)
+5V
Comparator
13 12
Inputs
Analog In
U604F
74HCT04 -5V
1 1
E E
PWM-Out
(U604-8)
Initial Date
Welch Allyn Inc.
PWM-timer
Drawn Schematic: 620002.dsn
Rick Myers 3/05/99
Designed
Rick Myers 3/05/99 Title
Checked
ECG A/D and Interface
L.Phillips 3/16/99
4 4
VFLS0 1 2 SRESET_n
JP8 3 4 DSCK
GND
5 6 VFLS1
GND 1 2
1 2 EKG-PWM-ADC HRESET_n 7 8 DSDI
3 4 GND
NIBP-Fault 3 4 9 10 DSDO
5 6
+3.3V_unfiltered 5 6 NIBP-PWM-ADC
7 8 GND HEADER 5X2
+3.3V_unfiltered 7 8
GND 9 10
9 10 RS423-Tx
11 12
NIBP-Overpressure 11 12 Spare-1
GND 13 14
13 14 RS423-Rx
15 16 1 - Visual History Buffer Flush Status ('823 output)
ETCO2-Tx 15 16 SpO2-Tx
17 18
ETCO2-Rx 17 18 SpO2-Rx 2 - Reset Output ('823 input)
19 20
Spare-2 19 20 ADC-Clock 3 - Ground
21 22
NIBP-Data 21 22 FE-Clock 4 - BDM Clock ('823 input)
23 24
NIBP-15mmHg 23 24 SPI-data-out
25 26 5 - Ground
3 LED-Latch 25 26 SPI-clock 3
27 28 6 - Visual History Buffer Flush Status ('823 output)
Video-Horizontal-Sync 27 28 Batt-ID
29 30
Spare-3 29 30 FE-Data 7 - Reset Input ('823 Output)
31 32
Main-Power-Sync 31 32 Recorder-Motor-Step 8 - BDM Data Input ('823 Input)
33 34 GND
Vbackup 33 34
35 36 9 - Vcc
NIBP-Valve 35 36 On-Standby-Key
37 38 10 - BDM Data Output ('823 Output)
Video-Vertical-Sync 37 38 Speaker-Audio
39 40
NIBP-Offset-DAC 39 40 Main-Supply-On
41 42
AC-On 41 42 NIBP2-PW-ADC
43 44 GND
Rec-Paper-Out 43 44
GND 45 46
45 46 Video-Data
47 48 GND
Key-Latch 47 48
49 50
RS423-CTS 49 50 Nurse-Call
51 52
Recorder-Clock 51 52 Recorder-Data-Latch
53 54
Recorder-Data 53 54 Recorder-Strobe
55 56
HRESET 55 56 SCL
57 58
SPI-data-in 57 58 SCD
GND 59 60 GND
59 60
HEADER 30x2
Test Points
1 TP58 TP59 1
TS_n PA4
1 TP60 TP61 1
TA_n PA5
1 TP62 TP63 1
2 Burst_n PA6 2
1 TP64 TP65 1
PA14 PA7
1 TP66 TP67 1
PC6 PA15
1 TP68 TP69 1
PC13 RD/WR_n
1 TP70 TP71 1
CLKOUT SPIMOSI
1 TP72 TP73 1
PC10 SPIMISO
1 TP74 TP75 1
PC12 SPISEL_n
1 TP76 TP77 1
PB16 SPICLK
TP78 1
Video-Clock-3
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620005.dsn
Jim Belesiu Mar 5, 1999
Designed
Jim Belesiu Mar 5, 1999 Title
Checked
L. Phillips 3/19/99 Atlas CPU Subsystem
Approved Size Document Number Rev
Z. Psenicnik 3/19/99
C 620005 D
Release For Production
J. Bello 3/19/99 Date: Monday, August 05, 2002 Sheet 1 of 6
A B C D E
4 4
IRQ_n[0:7]
A[6:31] GPL[0:7] CS_n[0:7]
A25
IRQ_n2 1 100 A26
P1 P100
IRQ_n1 2 99 A27
P2 P99
3 98 A28
TIN1 P3 P98
7 97 A29
TIN2 P7 P97
8 96 GPL1 D[0:31]
TIN3 P8 P96
9 95
NIBP-Fault-x P9 P95
10 U7 94 CS_n2
PA6 TDI-10 P94
11 93
PA7 P11 P93 RD/WR_n
12 EPF6016A 92 D0
Field GCLK-12 P92
13 91 D1
SPICLK GCLK-13 DEV_CLRn-91
14 90 D2 VIDEO[0:7]
ADC-Clock-x P14 P90
15 85 D3
76.8KHz P15 DEV_OE-85
16 84 D4
FE-Clock-x P16 P84
17 83 D5
FE-Data-x P17 nRS-83
18 82 D6
PB16 TMS-18 P82
19 81 D7
NIBP-Data-x P19 nWS-81
23 80 VIDEO0
PC10 TCK-23 P80
24 79 VIDEO1
3 PA5 P24 P79 3
25 78 VIDEO2
DREQ2_n P25 Cs-78
26 77 VIDEO3
DREQ1_n P26 nCS-77
27 76 VIDEO4
SDACK2_n P27 P76
28 75 VIDEO5
SDACK1_n P28 P75
29 74 VIDEO6
Recorder-Data-x P29 P74
30 73 VIDEO7
Recorder-Data-Latch-x P30 P73
31 69
Recorder-Clock-x P31 CLKUSR-69 VSYNC
32 67
Recorder-Strobe-x P32 RDYnBSY-67 HSYNC
33 66
Recorder-Motor-Step-x P33 P66 Blank
34 65
NIBP-Offset-DAC-x P34 P65 Video-Clock-3
35 64
NIBP-Overpressure-x P35 INIT_DONE-64 SPIMISO
40 63
NIBP-15mmHg-x P40 GCLK-63 CLKOUT
S7 41 62
P41 GCLK-62 Video-Clock-25
S6 42 61
P42 P61 SPIMOSI
S5 43 60
P43 P60 SPISEL_n
S4 44 59
P44 P59 Video-Data-x
S3 45 58
P45 P58 HSYNC-x
S2 46 68
P46 P68 VSYNC-x
S1 47 57
P47 P57 SPI-data-in-x
S0 48 56
P48 P56 SPI-clock-x
49 55
PA14 nCEO-49 P55 SPI-data-out-x
50 52
Key-Latch-x P50 P52 LED-Latch-x
CONFIG_DONE
51
PA15 TDO-51
nCONFIG
nSTATUS
GND-20
GND-37
GND-53
GND-70
GND-87
VCC-21
VCC-38
VCC-54
VCC-71
VCC-88
GND-5
VCC-6
DATA
MSEL
DCLK
nCE
22
39
36
72
86
89
21
38
54
71
88
20
37
53
70
87
4
5
Audio DAC Resistors
S0 R66 100K
Speaker-Audio
R125
2
1.58K S1 R67 49.9K
NSTATUS C121
PC12
VDDH S2 R68 24.9K
1
330pF
2 PC6 2
SPICLK S3 R69 12.4K
CONFIG_DONE
PC11
SPIMOSI S4 R70 6.19K
33
1
S5 R71 3.09K
R126
S6 R72 1.58K
TP80
S7 R73 787
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620005.dsn
Jim Belesiu Mar 5, 1999
Designed
Jim Belesiu Mar 5, 1999 Title
Checked
L. Phillips 3/19/99 FPGA
Approved Size Document Number Rev
Z. Psenicnik 3/19/99
C 620005 D
Release For Production
J. Bello 3/19/99
Date: Monday, August 05, 2002 Sheet 2 of 6
A B C D E
4 4
R74
VDDH R76 1 8
SCD I2CSDA
1 2 7
SCL SCL I2CSCL
5 2 3 6
SCD SpO2-Rx SMRXD2
3 4 5
SPI-data-in SpO2-Tx SMTXD2
4
VFLS0
1
10K
100
6 C54 C55 C56 C57
VFLS1 VDDH BR_n
7 330pF 330pF 330pF 330pF
DSDI
2
10 8 6.19K R127
SRESET_n R77
9
RS423-CTS
C 1 8
ETCO2-Rx SMRXD1 VDDH BI_n
2 7
ETCO2-Tx SMTXD1
3 6 6.19K R128
RS423-Rx RXD2
VDDH R103 4 5
RS423-Tx TXD2
1
PA4 VDDH BB_n
1
5 2
PA5 100
3 C62 C63 C64 C65 3.09K R129
PC12
4 330pF 330pF 330pF 330pF
PA7
2
10K
R80 VDDH TA_n
6
PC10
7 1 8 3.09K R130
NIBP2-PW-ADC RS423-CTS PC9
10 8 GPL5 2 7
Nurse-Call PB18
9 GPL4 3 6
Key-Latch Key-Latch-x VDDH TEA_n
C 4 5 MODCK (0,0) Selects 32KHz as main oscillator
NIBP-Valve PA6
3.09K R131
RSTCONF = 0 allows '823 to sample data bus during HRESET
1
100
C70 C71 C72 C73
GPL[0:7] DSCK
330pF 330pF 330pF 330pF VDDH
2
1.58K R132
IRQ_n[0:7] R82
R83
VDDH 1 8
SPI-clock SPI-clock-x ALE_B
1 IRQ_n7 2 7
SPI-data-out SPI-data-out-x
5 2 IRQ_n6 3 6 NL R133 R104 R105
LED-Latch LED-Latch-x
3 IRQ_n5 4 5
3 SPI-data-in SPI-data-in-x NL 1.58K 3
4 IRQ_n4
RSTCONF_n
1
10K
100
6 IRQ_n3 C78 C79 C80 C81 1.58K R134
MODCK1
7 IRQ_n2 330pF 330pF 330pF 330pF
2
10 8 IRQ_n1
R85 TRST_n MODCK2
9 IRQ_n0
C 1 8 1.58K R152
Recorder-Data Recorder-Data-x
2 7
Recorder-Strobe Recorder-Strobe-x
VDDH R49 3 6 R107 R108
Recorder-Clock Recorder-Clock-x
1 4 5 R151
RS423-Rx Recorder-Data-Latch Recorder-Data-Latch-x NL 1.58K
5 2 215
NIBP-Fault
1
3
SpO2-Rx 100 Video-Data Video-Data-x
4 C86 C87 C88 C89
NIBP-15mmHg
1
10K 330pF 330pF 330pF 330pF
2
2
6 C122
NIBP-Overpressure R87
7 22pF VDDH
AC-On
2
10 8 1 8
PA15 Video-Horizontal-Sync HSYNC-x
9 2 7
ETCO2-Rx Video-Vertical-Sync VSYNC-x
C 3 6
Batt-ID PC8
4 5
NIBP-Data NIBP-Data-x
VDDH R86
1
1
1 R78
NIBP-PWM-ADC 100
5 2 C90 C91 C92 C93 1 8
Rec-Paper-Out Recorder-Motor-Step Recorder-Motor-Step-x
3 330pF 330pF 330pF 330pF 2 7
PC11 Main-Power-Sync 76.8KHz
2
2
4 3 6
TMS R88 Main-Supply-On TEXP
10K 4 5
On-Standby-Key PC4
6 1 8
EKG-PWM-ADC NIBP-Offset-DAC NIBP-Offset-DAC-x
1
7 2 7 NL
Spare-3 Rec-Paper-Out PC7 100
10 8 3 6 C66 C67 C68 C69 IRQ_n0
Batt-ID
9 4 5 330pF 330pF 330pF 330pF
PB16 AC-On PC5
2
C R120
1
1 R81
100
C94 C95 C96 C97 1 8
EKG-PWM-ADC TIN1
330pF 330pF 330pF 330pF 2 7
NIBP-15mmHg NIBP-15mmHg-x
2
VDDH R16 3 6
R90 NIBP-Overpressure NIBP-Overpressure-x
1 4 5
SPKROUT NIBP-PWM-ADC TIN2
5 2 1 8
2 TS_n FE-Clock FE-Clock-x 2
1
3 2 7
BG_n FE-Data FE-Data-x 100
4 3 6 C74 C75 C76 C77
Burst_n ADC-Clock ADC-Clock-x
10K 4 5 330pF 330pF 330pF 330pF PWM Input Timer Signals
NIBP-Fault NIBP-Fault-x
2
6
Spare-1
1
7
WAIT_B_n 100
10 8 IP_B2 C102 C103 C104 C105
9 IP_B3 330pF 330pF 330pF 330pF
2
R116
VDDH R91 10K 1 8
IP_B4 Spare-1 PB19
1 2 7
IP_B5 Spare-2 PC13
5 2 3 6
IP_B6 Spare-3 PB17
3 4 5
IP_B7 NIBP2-PW-ADC TIN3
4
1
100
6 C123 C124 C125 C126
FRZ IP_B[2:7]
7 330pF 330pF 330pF 330pF
DREQ1_n
2
10 8
DREQ2_n
9
On-Standby-Key
C
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620005.dsn
Jim Belesiu Mar 5, 1999
Designed
Jim Belesiu Mar 5, 1999 Title
Checked
L. Phillips 3/19/99
I/O Filters
Approved Size Document Number Rev
Z. Psenicnik 3/19/99
C 620005 D
Release For Production
J. Bello 3/19/99
Date: Monday, August 05, 2002 Sheet 3 of 6
A B C D E
A B C D E
4 4
HRESET_n
D[0:31]
A[6:31]
1
U5
TP53 TP54
SDRAM-4Mx16
43
49
14
27
CS_n[0:7]
3
9
1
A30 23 2 D15
A0 DQ0
VccQ1
VccQ2
VccQ3
VccQ4
Vcc1
Vcc2
Vcc3
A29 24 4 D14
A1 DQ1
A28 25 5 D13
A2 DQ2
A27 26 7 D12 VDDH
GPL[0:7] A3 DQ3
A26 29 8 D11
A4 DQ4
A25 30 10 D10
A5 DQ5
A24 31 11 D9
A6 DQ6
2
GPL0 A23 32 13 D8 Boot Configuration Pull-Up: 0 1 0 0 1 0 0 1 1 1 1 0 0 0 0 0
A7 DQ7
U5-25 A22 33 42 D7 R57
A8 DQ8 (see page 4-10)
U5-35 A21 34 44 D6
A9 DQ9 100K
22 45 D5
A10 DQ10 0: internal arbitration
R153 R154 35 47 D4 19
A11 DQ11 2G
1
3 48 D3 1 1: MSR(ip) = 0, interrupt prefix is 0x0000 3
6.19K 6.19K DQ12 1G
A11 20 50 D2
BA0 DQ13 0: reserved
21 51 D1 D1 3 17 dx1
BA1 DQ14 2Y4 2A4 0: memory controller is active after reset
53 D0 D4 5 15 dx4
DQ15 2Y3 2A3 1,0: 16-bit boot device
CS_n1 19 D7 7 13 dx7
CS# 2Y2 2A2
GPL1 18 15 D8 9 11 dx8 0: reserved
RAS# DQML 2Y1 2A1
GPL3 16 39 D9 12 8 dx9 1,1: IMMR base is 0xfff0-0000
WE# DQMH 1Y4 1A4
GPL2 17 D10 14 6 dx10
CAS# 1Y3 1A3 1,1: DBGC mode
40 16 4 dx11
NC2 1Y2 1A2 0,0: DBPC mode
38 36 18 2 dx12
CLKOUT CLK NC/A12 1Y1 1A1
U5-36
37 0,0: External bus division factor
CKE
U4
VssQ1
VssQ2
VssQ3
VssQ4
Vss1
Vss2
Vss3
74AHC244
T1
R155 Boot Configuration Latch
12
46
52
28
41
54
6
VDDH 6.19K
Active during power-on
BS_AB[0:3]
VDDH
BS_AB0
BS_AB1
VDDH
FLASH-512Kx16
U6
13
37
A30 25 29 D15
A0 D0
NC3
Vcc
A29 24 31 D14
2 A1 D1 2
A28 23 33 D13
A2 D2
A27 22 35 D12
A3 D3
A26 21 38 D11
A4 D4
A25 20 40 D10
A5 D5
A24 19 42 D9
A6 D6
A23 18 44 D8
A7 D7
A22 8 30 D7 AMD N/C: 9, 10, 13, 14
A8 D8
A21 7 32 D6
A9 D9 AMD RY/BY#: 15
A20 6 34 D5
A10 D10 ----------------
A19 5 36 D4
A11 D11
A18 4 39 D3 MICRON N/C: 9, 10, 15
A12 D12
A17 3 41 D2 MICRON Vpp: 13
A13 D13
A16 2 43 D1
A14 D14
A15 1 45 D0
T2 A15 D15
A14 48
A16
A13 17 47
A17 Byte# VDDH
A12 16 14
A18 NC4
CS_n0 26 9
CE# NC1
GPL1 28 10
OE# NC2
11 15
WE# RY/BY#
12
Gnd-b
Gnd-a
SRESET_n RESET#
1
27
46
TP55
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620005.dsn
Jim Belesiu Mar 5, 1999
Designed
Jim Belesiu Mar 5, 1999 Title
Checked
Flash, SDRAM and HRESET Config Word
L. Phillips 3/19/99
A B C D E
4 4
BS_AB[0:3]
Burst_n BS_AB[0:3]
RD/WR_n
GPL[0:7]
TSIZ[0:1] GPL[0:7]
TSIZ[0:1] IRQ_n[0:7]
D[0:31] IRQ_n[0:7]
TEA_n
TA_n
TS_n
BS_AB0
BS_AB1
BS_AB2
BS_AB3
D[0:31] CS_n[0:7]
GPL7
GPL0
GPL1
GPL2
GPL3
GPL4
GPL5
GPL6
A[6:31] CS_n[0:7]
BG_n
BB_n
BR_n
BI_n
A[6:31]
IRQ_n0
IRQ_n1
IRQ_n2
IRQ_n3
IRQ_n4
IRQ_n5
IRQ_n6
IRQ_n7
TSIZ0
TSIZ1
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
CS_n0
CS_n1
CS_n2
CS_n3
CS_n4
CS_n5
CS_n6
CS_n7
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
SPKROUT
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
TS_n
A6
A7
A8
A9
TA_n
FRZ
TEA_n
BI_n
BR_n
M13
M15
M16
M14
D10
D16
D15
D14
D11
D12
D13
N15
N16
H15
H13
H14
H16
G13
G14
G16
G15
A13
A12
A11
A10
A14
A15
C13
C11
C10
C16
C15
C12
C14
K14
K13
K15
K16
B10
B12
B11
B13
B14
B16
B15
E15
E16
E13
F14
F16
F15
F13
L13
L14
L15
L16
J15
J14
M1
M2
M4
M3
D2
D9
D4
D3
N1
N2
N3
H1
H2
H3
H4
G2
G3
G4
C3
C2
K2
K3
K1
K4
B7
E1
E4
E2
E3
F1
F2
F3
F4
L1
L2
L4
L3
J2
J1
J3
J4
BG_n
BB_n
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
A6
A7
A8
A9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
BG_n
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
TA_n
BB_n
BR_n
TEA_n
TS_n
CS0_n
CS1_n
CS2_n
CS3_n
CS4_n
CS5_n
GPL_A5_n
IRQ0_n
IRQ1_n
IRQ7_n
BI_n
TSIZ1
RD / WR_n
Burst_n
SPKROUT
DP0 / IRQ3_n
DP1 / IRQ4_n
DP2 / IRQ5_n
DP3 / IRQ6_n
FRZ / IRQ6_n
UPWAITB / GPL_B4_n
CS6_n / CE1_B_n
CS7_n / CE2_B_n
RSV_n / IRQ2_n
TSIZ0 / REG_n
GPL_A0_n / GPL_B0_n
A16
BDIP_n / GPL_B5_n
E5
VDDH1
E6
VDDH2
E7
VDDH3
E8 P16
VDDH4 PA15 / USBRXD PA15
E9 R15
VDDH5 PA14 / USBOE_n PA14
E10 R14
VDDH6 PA13 / RXD2 RXD2
E11 R13
VDDH7 PA12 / TXD2 TXD2
E12 N10
VDDH8 PA9 / L1TXDA / SMRXD2 SMRXD2
F5 T9
VDDH9 PA8 / L1RXDA / SMTXD2 SMTXD2
Place VSSSYN F12 T8
3 VDDH10 PA7 / CLK1 / TIN1 / L1RCLKA / BRGO1 PA7 3
on a split G5 P8
VDDH11 PA6 / CLK2 / TOUT1_n / TIN3 PA6
G12 T6
plane beneath VDDH12 PA5 / CLK3 / TIN2 / L1TCLKA / BRGO2 PA5
H5 R6
the MPC823 PLL VDDH13 PA4 / CLK4 / TOUT2_n / TIN4 PA4
H12
section VDDH14
N14
PB31 / SPISEL_n / LCD_A SPISEL_n
P15
PB30 / SPICLK SPICLK
J5 P14
VDDH17 PB29 / SPIMOSI SPIMOSI
Attach GND and J12 T15
VSSSYN at a K5
VDDH18 MPC823 PB28 / SPIMISO
T14
SPIMISO
VDDH19 PB27 / I2CSDA / BRGO1 I2CSDA
K12 P12
single point. VDDH20 (the monster) PB26 / I2CSCL / BRGO2 I2CSCL
L5 N11
VDDH21 PB25 / SMTXD1 SMTXD1
L12 T11
VDDH22 PB24 / SMRXD1 SMRXD1
M5 T10
VDDH23 PB23 / SMSYN1_n / SDACK1_n SDACK1_n
M6 MPC823ZC R9
VDDH24 PB22 / SMSYN2_n / SDACK2_n SDACK2_n
M7 R7
VDDH25 PB19 / L1ST1 / LCD_B PB19
M8 U1 P7
VDDH26 PB18 / RTS2_n / L1ST2 PB18
M9 N7
VDDH27 PB17 / L1ST3 / LCD_C PB17
M10 R5
VDDH28 PB16 / L1RQA / L1ST4 PB16
VDDL M11
VDDH29
M12 R16
VDDH30 PC15 / DREQ1_n / L1ST5 DREQ1_n
T16
PC14 / DREQ2_n / RTS2_n / L1ST6 DREQ2_n
A7 P13
VDDL1 PC13 / L1ST7 PC13
G1 T13
VDDL2 PC12 / L1RQA / L1ST8 PC12
J16 R10
VDDL3 PC11 / USBRXP PC11
T7 P9
VDDL4 PC10 / TGATE1_n / USBRXN PC10
TDO / DSDO
RSTCONF_n
TCK / DSCK
WAIT_B_n
T4
TDI / DSDI
HRESET_n
SRESET_n
VSSSYN1
VDDSYN
PC4 / L1RSYNCA
CLKOUT
PC4
VSSSYN
EXTCLK
TRST_n
KAPWR
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
EXTAL
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
XTAL
TEXP
TMS
NC6
NC7
NC8
NC9
XFC
N13
N12
H10
H11
G10
G11
K10
K11
R12
R11
P10
P11
T12
F10
F11
L10
L11
J10
J11
D1
D5
D7
D8
D6
N9
N4
N5
H6
H7
H8
H9
G6
G7
G8
G9
A1
A2
A3
A4
A5
A6
A8
A9
C5
C4
C8
C9
C7
K6
K7
K8
K9
B1
B3
B5
B4
B2
B8
B9
B6
R1
R2
R4
R3
P1
P3
P2
P5
P4
T3
T2
T1
F6
F7
F8
F9
L6
L7
L8
L9
J6
J7
J8
J9
VSSSYN
VIDEO[0:7]
GND
2 Field 2
VIDEO7
VIDEO6
VIDEO5
VIDEO4
VIDEO3
VIDEO2
VIDEO1
VIDEO0
Blank
IP_B2
IP_B3
IP_B4
IP_B5
IP_B6
IP_B7
VSYNC
PORESET_n
RSTCONF_n HSYNC
HRESET_n
SRESET_n Video-Clock-3
XTAL
EXTAL MODCK1
XFC
CLKOUT MODCK2
EXTCLK
TEXP
DSCK IP_B[2:7]
DSDI TMS IP_B[2:7]
DSDO
VFLS0 ALE_B
VFLS1 TRST_n WAIT_B_n
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620005.dsn
Jim Belesiu Mar 5, 1999
Designed
Jim Belesiu Mar 5, 1999 Title
Checked
L. Phillips 3/19/99
PowerPC MPC823 CPU
Approved Size Document Number Rev
Z. Psenicnik 3/19/99
C 620005 D
Release For Production
J. Bello 3/19/99
Date: Monday, August 05, 2002 Sheet 5 of 6
A B C D E
A B C D E
L2 Ferrite-120
1
C2 R1
100nF 100
4 4
1
C18 R2 From FPGA
2
C17 C117 C107 1K
100nF 330pF 6.8uF NL XFCX
PA14
1
C1
1.5uF
2
VSSSYN PLL Filter
Capacitor
System Clock
to CPU PLL pins A1
XFC
and A2
R50 200K VDDH
xtalp
XTAL
Place decoupling capacitors next to CPU VDDSYN pin B1 and VSSSYN pin A1 and A2
3.9M R51
FPGA Clock
Use separate PPL VDDSYN power plane from 3.3V plain
EXTAL
1
Load C107 w/1.5uF and unload C1 for non-FM clocking 32768Hz 1 4
OE VDD EXTCLK
C108 C109
NL
22pF 22pF 2 3 VCLK
GND OUT
2
R117
Place these components
200K
as close to the SG-636PCE-25.175M
processor as possible
VDDH
RF Suppression
L1 VDDH VDDL FLASH decoupling caps '244
3 Ferrite-120 to CPU U2 3
decoupling cap
VDDH
System 3.0V
1
1 2 2 1
+3.3V_unfiltered Input Reset_n
C110 C4 C5 C6 C7 C106
6.8uF 100nF 100nF 100nF 100nF 100nF
2
Gnd
3
C14 C115 330pF 6.8uF
1
1
C12 C13 C114 6.8uF 330pF C116 C16
DRAM decoupling caps VDDH
6.8uF 100nF 330pF
VDDH
2
2
Oscillator
1
decoupling
C111 C19 C20 C21 C22 6.8uF cap
1
6.8uF 100nF 100nF 100nF 100nF C120
2
C128
100nF
2
MPC823 decoupling caps
R118
VDDH
NL 3
1
Q1-Base 1 Q1
HRESET
NL C112 C28 C29 C30 C31 C32
6.8uF 100nF 100nF 100nF 100nF 100nF
2
2
1
C130 R119
NL NL
VDDH
2
1
KAPWR
2 to CPU 32KHz C113 C41 C42 C43 C44 C15 2
R121 6.8uF 100nF 100nF 100nF 100nF 100nF
Supply RF/EMI Clock
2
HRESET_n
Filters and Reset
NL
Circuits 12.4K 100K
PORESET-Input
C40
1
C36 C37
6.8uF 100nF 330pF 100nF 6.8uF 330pF
2
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620005.dsn
Jim Belesiu Mar 5, 1999
Designed
Jim Belesiu Mar 5, 1999 Title
Checked Power Distribution, Clocks and Reset
L. Phillips 3/19/99
A B C D E
Print SW13
Print-sw 2 1
ACON-LED
Keyboard Circuits
R65 1.21K
1 2
On/Off-sw 5x5 Green
On/Off-sw Trend J2A
J2xA D1
Clock1 Trend 1 2 ACLED-1 1 2
Place capacitors Key-Clock-b Lead-Select 1 1
Lead-Select
2 2
by connector Key-Latch-b Print
Print
3 3
R66 1.21K
VCC VCC AC-On-x AC On LEDs
4 4
Key-data-b
Key-Data-b 5 5
Silence-Switch
1 2 ACLED-2 1 2
+ C9 + C27 flex-cable-5 flex-cable-5
R67 1.21K D2
4.7uF 4.7uF Front Panel - A
VCC 1 2 5x5 Green
TP182
R68 1.21K
R71
J1 U26 100
Key-Clock 2 18 u26-18 FP-Common
1 2 1A1 1Y1
Key-Latch-n 4 16 Key-Latch-b
3 3 4 1A2 1Y2 3
Key-Data 6 14
5 6 1A3 1Y3
LED-Data 8 12 LED-Data-b
7 8 1A4 1Y4
LED-Enable 11 9 u26-9
9 10 2A1 2Y1
13 7 u26-7
11 12 2A2 2Y2
LED-Latch-n 15 5 LED-Latch-1
13 14 2A3 2Y3
R51 17 3 LED-Latch-2
2A4 2Y4
316 HEADER 7X2
1
1G
19
2G
1
4
3
2
On-Led R1 74HC244
2.2K
1
D13 I705144
8
5
6
7
T1 (3mm) Green
LED_TP_Enable
On/Standby
TP183 R72
LED_TP_Data_In
2
VCC 100
Clock2 Silence Button
LED_TP_Clock
13 12 5 6 LED_SPO2_enable TP4 1 2
Front Panel - C
u13-out SW28
74HC04 74HC04
I705124
LED_SpO2_Enable
LED_SpO2_Clock
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF
1 1
Place one 9 8 7 6
ceramic cap
near each IC
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC 10 5
Initial Date
Welch Allyn Inc.
Drawn Schematic:
Jim Belesiu 3/15/99
C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26
1 2 3 4 Designed
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF Jim Belesiu 3/15/99 Title
Pull-up Resistor Network Detail
Checked
Front Panel Display Board
L. Phillips 3/24/99
A B C D E
4 4
VCC
TP66
SW23
1 2 9 8 7 6
VCC
10
5
C
ETCO2 Alarm On-Off SW24 R5
1 2 10K 10 5
TP67 TP68 TP69 TP70 TP71
U2
10
6
7
8
9
1
2
3
4
5
C
SW1 u2-10 10
SER
1 2 etco2-sw 11 1 2 3 4 R6
A
HRalarm-sw 12 Pull-up Resistor Network Detail 10K
B
HR Alarm On-Off LHselect-sw 13
C
9
8
7
6
4
3
2
1
SW2 LHAdjust+sw 14 TP72 TP73 TP74 TP75 TP76
D
1 2 LHAdjust-sw 3 U3
E
4 SW4 10
F SER
5 QRS Volume (+) 1 2 QRSvol+sw 11
G TP77 A
SW3 6 9 u2-9 QRSvol-sw 12
H QH B
LH Select 1 2 Alarmvol+sw 13
C
2 7 SW6 Alarmvol-sw 14
CLK QH D
15 QRS Volume (-) 1 2 Time-sw 3
INH E
SW5 1 U3-4 4
SH/LD F
LH Adjust (+) 1 2 5
G
SW8 6 9
3 H QH 3
74HC165 Alarm Volume (+) 1 2 TP178
SW7 2 7
CLK QH
LH Adjust (-) 1 2 15
INH
SW10 1
SH/LD
Alarm Volume (-) 1 2
74HC165
SW12
Trend Time 1 2
Trend
Lead-Select
Lead-Select D48
1
Print VCC
Print BAV99L
SW25
2
1 2
10
5
C
4
3
2
1
U4 1 2
SW15 On/Off-sw
10
SER
1 2 NIBPalarm-sw 11
A
SpO2alarm-sw 12 SW27
B
RHselect-sw 13 1 2
C
SpO2 Alarm On-Off SW16 RHadjust+sw 14
D
1 2 RHadjust-sw 3 TP83
E
BPauto-sw 4
F
BPstart/stop-sw 5
G
SW17 6 9
2 H QH Key-Data-b 2
1 2
RH Select 2 7
CLK QH
15
INH
SW18 TP84 TP85 TP86 1
SH/LD
1 2 TP87
RH Adjust (+)
74HC165
SW19
Key-Latch-b
1 2
RH Adjust (-) TP88
SW20
BP Auto 1 2 Clock1
Key-Clock-b
SW21
BP Start-Stop 1 2
Silence-Switch
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620008.dsn
Jim Belesiu 3/15/99
Designed
Jim Belesiu 3/15/99 Title
Keyboard Scanner
Checked
L. Phillips 3/23/99
4 4
VCC
TP10 TP12
TP14 R26 Temperature Tens VCC R27 VCC R28
150 150 Temperature Ones 150 Temperature Tenths
U14 5 4 D34 U15 u15-15 8 1 D35 U16 u16-15 8 1 D36
LED-Data-b 14 15 u14-15 6 3 d34-g 3 14 15 u15-1 5 4 d35-g 3 14 15 u16-1 5 4 d36-g 3
LED_TP_Data_In SER QA "G" SER QA "G" SER QA "G"
1 u14-1 7 2 d34-f 2 1 u15-2 6 3 d35-f 2 1 u16-2 6 3 d36-f 2
QB "F" A QB "F" A QB "F" A
11 2 u14-2 8 1 d34-e 4 11 2 u15-3 7 2 d35-e 4 11 2 u16-3 7 2 d36-e 4
SRCLK QC "E" F B SRCLK QC "E" F B SRCLK QC "E" F B
10 3 u14-3 d34-d 5 10 3 d35-d 5 10 3 d36-d 5
SRCLR QD "D" G SRCLR QD "D" G SRCLR QD "D" G
TP5 4 u14-4 d34-c 8 4 d35-c 8 4 d36-c 8
QE "C" E C QE "C" E C QE "C" E C
12 5 u14-5 5 4 d34-b 9 12 5 u15-4 5 4 d35-b 9 12 5 u16-4 5 4 d36-b 9
RCLK QF "B" D RCLK QF "B" D RCLK QF "B" D
13 6 u14-6 6 3 d34-a 10 13 6 u15-5 6 3 d35-a 10 13 6 u16-5 6 3 d36-a 10
G QG "A" G QG "A" G QG "A"
7 u14-7 7 2 7 7 u15-6 7 2 d35-dp 7 7 u16-6 7 2 7
QH Dp QH Dp QH Dp
8 1 u15-7 8 1 8 1
9 1 9 1 9 1
QH Anode-1 QH Anode-1 QH Anode-1
TP21 R29 6 R30 6 R31 6
Anode-2 Anode-2 Anode-2
74HC595A 150 74HC595A 150 74HC595A 150
7-SEG LED 0.36 TP25 7-SEG LED 0.36 TP30 7-SEG LED 0.36
3 VCC VCC 3
VCC
R53 Degree C
215 u15-9 R52 Degree F
D47
d47-c 2 1 215
VCC D46
u16-7 d46-c 2 1
VCC
TP34
TP22 T1.75 (5mm) Green
TP35 T1.75 (5mm) Green
u14-9
Temperature Hundreds
TP33 D33
3
"G"
2
"F" A
4
"E" F B
5
"D" G
d33-c 8
"C" E C
d33-b 9
"B" D
10
"A"
7
Dp
1
Anode-1
6
TP37 VCC Anode-2
u16-9
7-SEG LED 0.36
LED-TP-Enable
LED_TP_Enable
Clock2
LED_TP_Clock
LED-Latch-1
LED_TP_Latch
u19-out
LED_TP_Data_Out
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620008.dsn
Jim Belesiu 3/15/99
Designed
Jim Belesiu 3/15/99 Title
Checked
Temp/Pulse LED Drivers
L. Phillips 3/24/99
VCC
TP89 VCC VCC
4 R38 Systolic Hundreds TP91 R39 Systolic Tens TP93 R40 Systolic Ones 4
680 680 680
U20 u20-15 8 1 D40 U21 8 1 D41 U22 8 1 D42
u19-out 14 15 u20-1 5 4 d40-g 10 14 15 u21-15 5 4 d41-g 10 14 15 U22-15 5 4 d42-g 10
LED_NIBP_Data_In SER QA "G" SER QA "G" SER QA "G"
1 u20-2 6 3 d40-f 9 1 u21-1 6 3 d41-f 9 1 u22-1 6 3 d42-f 9
QB "F" A QB "F" A QB "F" A
11 2 u20-3 7 2 d40-e 1 11 2 u21-2 7 2 d41-e 1 11 2 u22-2 7 2 d42-e 1
SRCLK QC "E" F B SRCLK QC "E" F B SRCLK QC "E" F B
10 3 d40-d 2 10 3 u21-3 d41-d 2 10 3 u22-3 d42-d 2
SRCLR QD "D" G SRCLR QD "D" G SRCLR QD "D" G
4 d40-c 4 4 u21-4 d41-c 4 4 u22-4 d42-c 4
QE "C" E C QE "C" E C QE "C" E C
12 5 u20-4 5 4 d40-b 6 12 5 u21-5 5 4 d41-b 6 12 5 u22-5 5 4 d42-b 6
RCLK QF "B" D RCLK QF "B" D RCLK QF "B" D
13 6 u20-5 6 3 d40-a 7 13 6 u21-6 6 3 d41-a 7 13 6 u22-6 6 3 d42-a 7
G QG "A" G QG "A" G QG "A"
7 u20-6 7 2 5 7 u21-7 7 2 5 7 u22-7 7 2 5
QH Dp QH Dp QH Dp
8 1 8 1 8 1
9 3 9 3 9 3
QH Anode-1 QH Anode-1 QH Anode-1
R41 8 TP101 R42 8 TP103 R43 8
Anode-2 Anode-2 Anode-2
74HC595A TP105 680 74HC595A 680 74HC595A 680
7-SEG LED 0.5 7-SEG LED 0.5 7-SEG LED 0.5
TP180
TP110 TP111
T1 (3mm) Red T1.75 (5mm) Green T1.75 (5mm) Green
TP112 u20-out TP113 u21-out
TP181
u22-out
3 3
VCC
VCC VCC 680
TP114 R44 Diastolic Hundreds TP116 R45 Diastolic Tens TP118 Diastolic Ones
R46
680 680
U23 8 1 D43 U24 8 1 D44 U25 8 1 D45
14 15 u23-15 5 4 d43-g 10 14 15 u24-15 5 4 d44-g 10 14 15 u25-15 5 4 d45-g 10
SER QA "G" SER QA "G" SER QA "G"
1 u23-1 6 3 d43-f 9 1 u24-1 6 3 d44-f 9 1 u25-1 6 3 d45-f 9
QB "F" A QB "F" A QB "F" A
11 2 u23-2 7 2 d43-e 1 11 2 u24-2 7 2 d44-e 1 11 2 u25-2 7 2 d45-e 1
SRCLK QC "E" F B SRCLK QC "E" F B SRCLK QC "E" F B
10 3 u23-3 d43-d 2 10 3 u24-3 d44-d 2 10 3 u25-3 d45-d 2
SRCLR QD "D" G SRCLR QD "D" G SRCLR QD "D" G
4 u23-4 d43-c 4 4 u24-4 d44-c 4 4 u25-4 d45-c 4
QE "C" E C QE "C" E C QE "C" E C
12 5 u23-5 5 4 d43-b 6 12 5 u24-5 5 4 d44-b 6 12 5 u25-5 5 4 d45-b 6
RCLK QF "B" D RCLK QF "B" D RCLK QF "B" D
13 6 u23-6 6 3 d43-a 7 13 6 u24-6 6 3 d44-a 7 13 6 u25-6 6 3 d45-a 7
G QG "A" G QG "A" G QG "A"
7 u23-7 7 2 5 7 u24-7 7 2 5 7 u25-7 7 2 5
QH Dp QH Dp QH Dp
8 1 8 1 8 1
9 3 9 3 9 3
QH Anode-1 QH Anode-1 QH Anode-1
TP126 R47 8 TP128 R48 8 TP130 8
Anode-2 Anode-2 Anode-2
74HC595A 680 74HC595A 680 74HC595A 680
TP132 7-SEG LED 0.5 7-SEG LED 0.5 R49 7-SEG LED 0.5
LED-Latch-2
LED_NIBP_Latch
Clock3
LED_NIBP_Clock
LED-NIBP-Enable
2 LED_NIBP_Enable 2
TP142
u25-out
Silence-LED VCC
1
D31 D30 D29 D28 D25 D26 D24 D22
Q60 Q30 Q15 Q10 Q5 Q3 Q1 Qx
TP179
2
u13-out
LED_NIBP_Data_Out
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620008.dsn
Jim Belesiu 3/15/99
Designed
Jim Belesiu 3/15/99 Title
Checked
NIBP LED Drivers
L. Phillips 3/24/99
4 4
VCC
VCC R70
TP152 681
3 3
1
1
D7 D9 D12
T1 (3mm) Red T1 (3mm) Red T1 (3mm) Red
2
On/Off On/Off On/Off
d9-c
VCC
d7-c d12-c VCC VCC
SpO2 % Hundreds TP153 R9 TP155 R10
680 SpO2 % Tens 680 SpO2 % Ones
U5 TP162 D3 U6 8 1 D4 U7 8 1 D5
14 15 u5-15 R62 10 14 15 u6-15 7 2 d4-g 10 14 15 u7-15 6 2 d5-g 10
SER QA "G" SER QA "G" SER QA "G"
1 u5-1 2.2K 9 1 u6-1 6 3 d4-f 9 2 u7-1 7 3 d5-f 9
QB "F" A QB "F" A QC "F" A
11 2 u5-2 8 1 1 11 2 u6-2 5 4 d4-e 1 11 1 u7-2 5 4 d5-e 1
SRCLK QC "E" F B SRCLK QC "E" F B SRCLK QB "E" F B
10 3 u5-3 7 2 2 10 3 u6-3 d4-d 2 10 3 u7-3 d5-d 2
SRCLR QD "D" G SRCLR QD "D" G SRCLR QD "D" G
4 u5-4 6 3 d3-c 4 4 u6-4 d4-c 4 4 u7-4 d5-c 4
QE "C" E C QE "C" E C QE "C" E C
12 5 u5-5 5 4 d3-b 6 12 5 u6-5 8 1 d4-b 6 12 5 u7-5 8 1 d5-b 6
RCLK QF "B" D RCLK QF "B" D RCLK QF "B" D
13 6 u5-6 7 13 6 u6-6 7 2 d4-a 7 13 6 u7-6 7 2 d5-a 7
G QG "A" G QG "A" G QG "A"
7 TP175 5 7 u6-7 6 3 5 7 u7-7 6 3 5
QH Dp QH Dp QH Dp
5 4 5 4
9 u5-out 3 9 u6-out 3 9 3
QH Anode-1 QH Anode-1 QH Anode-1
8 R12 8 R13 8
Anode-2 Anode-2 Anode-2
74HC595A R63 74HC595A TP168 680 74HC595A TP170 680
215 7-SEG LED 0.5 7-SEG LED 0.5 7-SEG LED 0.5
D16
d16-c 2 1 VCC
VCC
u7-out VCC
SpO2 Hi VCC TP173
TP172 No Load
R64
215
D18
d18-c 2 1
VCC
SpO2 Lo TP176
TP174 T1.75 (5mm) Green
2 Clock1 2
LED_SpO2_Clock
LED-Latch-2
LED_SpO2_Latch
LED-SPO2-Enable
LED_SpO2_Enable
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620008.dsn
Jim Belesiu 3/15/99
Designed
Jim Belesiu 3/15/99 Title
Checked
SPO2 LED Drivers
L. Phillips 3/24/99
A B C D E
Width Coil (L3) inductance range changed
REV Description ECN/ECO Init Date Ckd
3
562 562
q1.b 2 Q1 Q3 2 q3.b +5V
16.7mSec
8
MPSW01A MPSW01A
8
U4A R3 3 R13 R18 R20
1
+ 1 ramp 3 5
23.7K 169 R15 38.3 562 169 R22
1 2 U4.2 2 + 1 q1.e 7 +
10K
4 - 2 6 4
U1A
- -
TLC272 U2A R14 R21 U2B
1
R52 74HCT04 MC34072 562 562 MC34072
4
1.96K R43 q2.b 2 vadj 2 q4.b
C1
5.11K
.1uF C2 Q2 R16 10 R17 10 Q4
3
U1.2 100pf MPSW51A MPSW51A
u2.2 Size Adjust
u2.7 u2.6
d6.c 2 1 2 1
R4 R23 To Yoke
D6 D1 10K 10K
1N4148 1N4148 R5 R6 J2
42.2K 41.2K vert-
5
u1.6 vert+
4
j2-3
3
To Main hor+
2
hor-
Board +12V
1
4
U3 CON5
J1 MC78L05ACP - 6 R7
3 1 u1.7 7 41.2K R31
1 VIN VOUT +5V
Vsync + 5 u1.5 10K
2
Hsync U1B
3
GND
TLC272
4
8
Video C6 C7
5
.047uF .047uF R8
6
2
41.2K
Zero Adjust
CON6 +12V
vcadj
R9 R11
vcadj+ vcadj-
+5V
4
2
1K C8 15uH 15- 35uH +12V R44 330
R24 R27 Q6 .022uF J3.1
10K 10 IRF640
5.5uSec
q5.c q6.d 1 J3 J3x J4
R45 330
U4B C22 R25 tube.g1
31.7uSec 1 1 1
3
3
3 4 u4.4 C22-2 q5.b 2 Q5 J3.3 tube.12V
3 3 3
2N3904 To CRT tube.gnd
4 4 4
T1 J3.5 tube.g1
Anode 5 5 R46 47K 5
1
CRT-Socket
1
E5
E4
E3
E2
E1
C11 +
1000uF
2
9
+12V 8 D3
D2 1N4935 Grid1
+Vvid
L1
+12filt 1 2 +B 10 2 Vd 1 2
2 47uH C15 2
+ C13
+Vvid R30
Video Amplifier 22uF
100K
Grid2
U4C
5 6
D5
1N4937 C16
.01uF 74HCT04
1 2 d5.c
U4D
C14
C19 .01uF 9 8
Focus
+5V R36 R37 .01uF R32
1.96K 1.96K Adjust 2.5Meg Focus
74HCT04
C17
3
R51 2 1 R41
19.6K 681 74HCT04
1
D7 q8-e vidout
U4E R48 1N4148
100
11 10 u4-6 q7-g 2 Q7
BS170 C20
No Load
3
1 1
74HCT04
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620011.dsn
Rick Myers Mar 4 1999
Designed
Rick Myers Mar 4 1999
Title
Checked
CRT Deflection Board
L.Phillips 3/9/99
A B C D E
4 4
+5V
Temperature
+5V Amplifier
C1
.047uF
R1
51.1K
RecVdc
TP3
A
8
R2
U1-3 3 1K
+ 1
Rec-Temp
C2 U1-2 2
-
R4 .01uF U1A
R9 TP9 9.09K MC34072
4
3
10K
TP54
Q2-b 1
+24V
Q2
A A TP6
MMBT3904L U1-1
+24V Boost A
2
R10
10K R7 (23.6 V nominal) C3
A
84.5K +12V R5 .01uF
C4 L1 q1-g 1K
TP10 +
1000uF 22uH
Printhead
A
U2-fb R8 23.7K
On/Off Switch
R3
1
+ C6 D2 10K
R12 1uF MBRS340T3 C5 .01uF
A
10K C7 4
.01uF TP14 Q4-D 3 2
U2
12
11
A
UC3843A +5V
Thermistor
+5V TP8 3 + C8
A VFB Q1 Input
U2-out
3 3
Vc
2
4
Vcc
1800uF R16
2
U2-comp 1 R13 Q4 19.6K
COMP MTP30P06V
+5V 10 MTP30N06VL D3
Q4-G
J1 TP17 U2-Ref 14 10 1
VREF OUT A
3
CON24A R6 3 BAV99L
Vpp Rec-Supply-On 10K TP19 R15
1 2
3
Rec-Motor-Step
PWR-GND
C11 R14 147 E1
3 4 A
+12V 1 .047uF 10K U2-RT 7 5 Q4-s 2643000301
5 6 RT/CT ISENSE
GND
+12V
Rec-Data-Latch Rec-Strobe Q3
7 8 Place Bead on
1
Rec-Clock Rec-Data 2N7002
9 10
Pin 2 of Q4
2
11 12 A
U2-Isense
C21 TP21 C13
13 14 A
.047uF 5600pF R17 R18
15 16 A
1
C14 0.1 no-load
17 18 A A
2200pF
19 20 A A
C12 3 2 Q6-e Printhead
21 22
.047uF
23 24 A
Q6 TP23 R19
Connector
MMBT3904L 3.16K +24V-switch J2
1
A +5V 2
Thermistor1
3
R22 Thermistor2
D D 4
4.22K 3 4 Strobe
A 5
6
U5B
RecVdc 7
74HCT14 +5V
8
R11
+5V D 9
5.11K
10
Strobe
11
5 6 Latch
12
Clock
13
U5C Data
+5V 14
74HCT14
15
D 16
1 2 C10
+24V .1uF CON16
2 U5A 2
+5V
1
74HCT14
D A A
TP26 R33 D6 13 12
+5V +5V C18 1.47K 27V
.047uF U3-10 U5F
3
TP24 74HCT14
TP1
d6-c
D
1
11 10 u3-clk
D
14
1
U5E U3 D1
R24 74HCT14 27V
Vdd
Vss
1.96K U6
D
3
2 13 data-IO TP27 R34 ULN2065
ClkIn/Osc1/RB5 RB0
1.47K u6-3 3 2 +24V
TP66 1B 1C
U3-3 3 12 clk U3-9 u6-6 6 7
Clkout/Osc2/RB4 RB1 2B 2C
u6-11 11 9
D TP67 3B 3C
Vpp 4 11 n24Von u6-14 14 16
Vpp/MCLR/RB3 RB2 4B 4C
TP68 U3-5 5 10 1 +
RC5/TOCK1 RC0 CLMP1
8 u6-clmp C19 C20
CLMP2
U3-6 6 9 .047uF 47uF
RC4 RC1 Connector Pin #
7 8
RC3 RC2 1 3 4 6
+5V R35
A A
1.47K
PIC16C505 U3-8
phase 1 + +
A
8
5 J3-1
J3 2 + +
+ 1
7 TP28
6 J3-3
2 3 + +
- 3
U1B J3-4
A 4 4 + +
MC34072
5
4
J3-6
6
TP29 R36
1.47K CON6
1 A 1
u1-7 U3-7
+5V
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620014.dsn
9 8 Rick Myers Mar 5, 1999
Designed
Rick Myers Mar 5, 1999 Title
U5D
74HCT14 Checked
Printer Electronics
L.Phillips 3/22/99
EKG-PWM-ADC 6 5
FE-PWM-ADC
B See ECN worksheet 5-39455 LPP 4/27/99 LPP
J1 U1C
AC+12V +5V
74HCT04 Improvements for ESD, RFI,
1
TP7 D and Fast Transients, Correct 5-39821 LPP 6/24/99 LPP
2 D
Respiration Diff-Amp Topology
3
EKG-Data-Clock 9 8 Mods to U2 clock line, Resp
4 FE-Data-Clock
E gain amp, ECG supply and 5-39936 LPP 7/9/99 LPP
5 +5V
U1D NVRAM pullup
6
74HCT04 TP8 Buffer for ETCO2, Nurse call relay
7
+5V F Modify RLD to reduce V-Lead noise 5-44461 LPP 3/26/02 JK
D
C22 EKG-ADC-Clock 11 10 Improve ESU rejection
Rec-GND FE-ADC-Clock
CON7 .047uF SpO2 bypass cap, RS232 PS mods
+5V
U1E G 5-44857 LPP 7/18/02 JK
74HCT04 4KV nurse call relay,Improve CMRR for Resp Topology
A D
TP9
4 4
TP11 D D
+3.3V FE-Data 13 12
FE-Data-In
U2-Reset Serial TP1 TP2 TP3 TP4 U1F
+5V
74HCT04
R20
14
Data 15 LED-On
D
TP10
EKG - Page4
10K
Out
SER QA
1 Power-Sync 3 4
J2 QB FE-Pwr-Sync
11 2
Battery
10
SRCLK QC
3
NIBP - Page 2 U1B
1 SRCLR QD
4 74HCT04
2 Batt-ID QE NIBP-A/D-SelC
12 5 Audio-Shutdown
3 RCLK QF NIBP-A/D-SelB D
13 6 EROM-wr
G QG NIBP-A/D-SelA
7
QH NIBP-Pump-On
CON3
NIBP-ADC-Clock +5V +5V
9
QH NIBP-Safety
C23
SpO2 - Page4
NIBP-15mmHg D
U2 .047uF
NIBP-Overpressure
74HCT595 SPO2-Rx 2 1 13 12
NIBP-Valve-Close SpO2Out
D NIBP-PWM-ADC CRT Board U1A U8F
NIBP-Offset-DAC
74HCT04 74HCT04
Connector D
+12V
D D
C30
J6
+5V
1
Video-VSync .047uF
2 D
Video-HSync +5V
+3.3V
3 Serial IO - Page8
4
Video-Data
5
2 1 +12V
6 RS423Rx
R6 U8A
Main PCA CON6
1.96K 74HCT04
Fan
+5V
C6 + C3
100uF 220pF Connector D
TP5 Connector
3 3
J5
J4 3 4 C39
RS423Tx 1
1 2 .047uF
D D 1 2 2
NIBP-Safety 3 4 U8B
3 4 +5V
+3.3V 5 6 NIBP-PWM-ADC TP17 74HCT04 CON2
5 6
7 8 TP6
7 8
9 10 RS423-Tx
9 10 D
C2 NIBP-OP 11 12 PIC-Data +3.3V C29 5 6
11 12 PIC-Data
.047uF 13 14 RS423-Rx U7 .047uF NurseCall
13 14
ETCO2-Tx 15 16 SPO2-Tx AT24C02N-10SC-2.7 U8C
15 16
ETCO2-Rx 17 18 SPO2-Rx R15 74HCT04
D 17 18 +12V
Spare-2 19 20 ADC-Clock 5 1 1.96K
19 20 SDA A0
NIBP-Data 21 22 FE-Clock 6 2 +5V
NIBP-15mmHg 23
21 22
24 SPI-Data-Out
SCL A1
3
D D
C40 + C41
CO2 Board
23 24 A2
LED-Latch 25 26 SPI-Clock TP18 .047uF 1uF
Vbackup Video-HSync 27
25
27
26
28
28 Batt-ID
WC
7 U7-wc Connector
Spare-3 29 30 FE-Data R23 R24 R8 J3
29 30 +5V +5V
Power-Sync 31 32 Rec-Motor-Step 1.21K 1.21K 1.96K
31 32 1
Vbackup 33 34
33 34 2
NIBP-Valve-Close 35 36 PIC-Clk R16
35 36 D D 3
Video-VSync 37 38 Speaker-Audio 3.48K 11 10 U8-10 9 8 ETCO2-TX-B
37 38 4
C1 NIBP-Offset-DAC 39 40
39 40
.047uF 41 42 NIBP2-PW-ADC U8E U8D CON4
ac-on 41 42
43 44 +3.3V +5V 74HCT04 74HCT04
43 44 D
45 46 Video-Data
D 45 46
Key-Latch-n 47 48
47 48 D D
RS232-CTS 49 50 Nurse-Call 1
Rec-Clock 51
49 50
52 Rec-Data-Latch 3
Front Panel
51 52 To PIC
53 54 Rec-Strobe Key-clock 2
hReset 55
53
55
54
56
56 SCL Display Connector On/Off-Key
SPI-data-in 57 58 SCD U3A J8 +5V
57 58
59 60 74HCT08 CON14AP
59 60
+5V Key-Clock-b 2 1
D + +
Socket 30x2 Key-Latch-n-b 4 3
+ +
Key-Data 6 5 C5 + C4
+ +
LED-Data-b 8 7 .047uF 330uF
D D + +
4 LED-On 10 9
2 + + 2
6 12 11
+ +
5 LED-Latch-b 14 13
+ +
U3B
74HCT08
+5V D D
D
9
8
LED-Data 10
U3C AC+12V-fuse
+5V
74HCT08 Q1
MMBT3906L
D
2 3 ACON-LED
12
11 R1
13 10K
1
Q1-e
U3D
74HCT08
TP19
Speaker Drive D
R2
Recorder Board C35 1.96K TP20 +3.3V
TP22 +5V 4.7uF q2-c
+5V Connector TP13 R3 TP21
3
Audio-Shutdown
+
10K
J7 Q2-b 1 Q2 R21
TP14 TP15 ACON
PIC-Vprog Rec-Supply-On MMBT3904L 10K
1 2 Rec-Supply-On TP25
Rec-Motor-Step
3 4
2
C42 R4
5 6 +12V
1
6
.047uF Rec-Data-Latch Rec-Strobe C36 J11 10K
7 8 ac-on
Rec-Clock Rec-Data 4.7uF R17 3 5 SP
Vbackup 9 10 + 1
3
C14 19.6K
11 12 2
.047uF R17-1 4 8 SM Page1
D Rec+DCV 13 14 Rec+DCV - 3
+
C20 Q3
15 16
R22 .047uF U9 CON3 1 2N7002
14
17 18 Print-Temp
2
7
1
2
Vdd
Vss
(pg 1) 1.21K
Rec-GND 23 24 Rec-GND
2 13 C37
PIC-Data ClkIn/Osc1/RB5 RB0 D
CON24A 0.1uF
U9-4
3 12
On/Off-Key Clkout/Osc2/RB4 RB1
R25
D D
(Front Panel Key) 4 11 1.21K R19
Vpp/MCLR/RB3 RB2 PIC-Clk
19.6K Initial Date
Welch Allyn Inc.
Rec+DCV
TP12 5 10 TP24
TC5/TOCK1 RC0 TP26 Drawn Schematic: 620017.dsn
6 9 PIC-audio Rick Myers Mar 5, 1999
R5 + C7 C8
On/Off RC4 RC1
19.6K 330uF .047uF Designed
(pg 3) Rick Myers Mar 5, 1999
7 8 U2-Clk Title
U2-Reset RC3 RC2
C38 Checked
Main Board - Model 220
(To U2) L. Phillips 3/16/99
220pF
D620361-MX10000 Approved Size Document Number Rev
Rec-GND Z. Psenicnik 3/16/99
TP16 C 620017 G
Release For Production
J. Bello 3/16/99
Date: Monday, August 05, 2002 Sheet 1 of 8
A B C D E
8
TP206 1K E gain amp, ECG supply and 5-39936 LPP 7/9/99 LPP
U201 R201 U203-3 3 NVRAM pullup
+ 1 Buffer for ETCO2, Nurse call relay
78L05 576
NIBP-Overpressure
8 1 U203-2 2 F Modify RLD to reduce V-Lead noise 5-44461 LPP 3/26/02 JK
IN OUT -
U203A Improve ESU rejection
C203 C222 LM393 SpO2 bypass cap, RS232 PS mods
GND
GND
GND
GND
4
R202 .01uF G 5-44857 LPP 7/18/02 JK
P+12V 4KV nurse call relay,Improve CMRR for Resp Topology
C201 + C202 174
4 .047uF 4.7uF .047uF 4
TP207
7
TP208 TP209 R210 +3.3V
A A A
8
464K
A
U202-3 3
A + 1 P+12V
2
- P+12V P+5V P+5V
R203 R211 TP239
A
3.32K U202A 1.96K TP203
8
MC34072 R209
8
1K 5
U203-5 5 + 7 u207-9 9
A +
TP210 7 6 8
NIBP-15mmHg -
U203-6 6 10
-
U203B U208B
4
TP240 P+5V C223 LM393 MC34072
Over Pressure
4
.01uF U207C
P+12V
R204 74HCT00
TP211 150
P+.75V
Fault Circuit A
A
8
C226 L202
.047uF Bead U202-5 5
+ 7
6 +12V +5V +Vpump 12
A -
C204 R205 11
P201-pwr .047uF 750 U202B 13
4
MC34072
7
8
5
6
R242
C232 10K TP213 Q202 R239 U207D
A
.047uF MMDF2N02E 1K 74HCT00
Primary R236
A A A
R212 R240
3
56.2K 10K
A
3
0mmHG = 0.5V 2 P201-Out Q201-B 1 Q201 R243
NIBP-Safety
MMBT3904L 100K
Gain
300mmHG = 4.0V
2
and C206 TP216 R241
3 6 P201-6 .047uF P+12V C209 10K 3
Comp
.047uF
C227
680pF
P201
A
1
2
XFPM-050KPGR-P1 TP217
A
8
R219 D202
U204-3 3 1.96K BAV99L
A A + 1 U204-1 3
2 J201
- Valve+
1
+3.3V Valve-
Zero Adjust U204A
2
D201-A
4
R213 MC34072 C228
3
1
+/-20mmHg range P+12V 237K .047uF Pump+
4
Pump-
5
R244 R217
A
21.5K TP219 TP220 5.62K CON5
A
R214 R216 U204-2 R246
TP204
8
7
8
5
6
1uF 1uF MC34072 R218
NIBP-A/D-SelA
23.7K Q203
MMDF2N02E
A A A A A/D Mux
U204-7 2 4
NIBP-Valve-Close NIBP-Pump-On
P+.75V
3
R247 R248
A
9 1K 1K
C
10
B
11
A
6 U209
2 INH 2
4051
4
BattCurrent X7
P+12V 2
BattVoltage X6
P+12V C216 5
Safety .047uF TP224
Print-Temp
P4.25V 1
X5
X4
C211 P.75V 12
Transducer PrimaryPres 15
X3 TP225
R235
NIBP
X2
SafetyPres 14 3.48K
.047uF
A
TP226 +5V/2 13
X1
X0 X
3 U209-Out U210-2 PWM A/D
8
R227 R228
A
Converter
8
.047uF
MC34072
A
P202 TP229
2
5
4
TP232 A
8
2
P202-Out- 5 + 7 U210-7 4
R231 C219 C224
+ 7 U206-7 3 6
73.2K .047uF 1000pF
A - NIBP-PWM-ADC
5
8
P202-5 6 R234 U210 5
- 3 3.48K MAX941
6
+ 1 U208-1 U210-3
U206B R225
4
4
R232 MC34072 TP235
A
5VRef U206-6 U207A 10K
74HCT00 U208-2
1 A A 1
C220
A
P+12V 1 PWM A/D
3 TP236
R221 C215 2 R233 .01uF
Converter
Zero R226
NIBP-ADC-Clock
3
5
TP238
D201 Initial Date
Welch Allyn Inc.
+ A
7 U205-7 MMBD1503A
6 U207-3 Drawn Schematic: 620017.dsn
- Rick Myers Mar 5, 1999
TP234
C213 R222 U205B Designed
4
Rec+DCV MTP30N06VL
4 A Release to Production
2 3 5-39121 JAC 3/15/99 LPP
Q303-s
L303
U307 C335 Bead B See ECN worksheet 5-39455 LPP 4/27/99 LPP
On/Off Switch
1
8 1 .047uF
VIN VOUT VBackup
Improvements for ESD, RFI,
7 5 +12V Boost
L302-1
u307-6 FDBK ERR D and Fast Transients, Correct 5-39821 LPP 6/24/99 LPP
3
C331 SHTDN C332
+
4.7uF
+
4.7uF
(12.1V nominal) Respiration Diff-Amp Topology
6 Mods to U2 clock line, Resp
TAP E gain amp, ECG supply and 5-39936 LPP 7/9/99 LPP
2
SENS NVRAM pullup
V+18V 3 1 U302-pwr Buffer for ETCO2, Nurse call relay
LP2951CD-3.3 R308 TP302 D303 F Modify RLD to reduce V-Lead noise 5-44461 LPP 3/26/02 JK
D D
17.8K 5.1V + C306 + C310 L302 Improve ESU rejection
1uF 1000uF 22uH SpO2 bypass cap, RS232 PS mods
D
U302-fb TP304 G 4KV nurse call relay,
4 5-44857 LPP 7/18/02 JK 4
Improve CMR for Resp Topology
+Vfuse On/Off Circuit R309 TP305 R310 D304
4.64K 10K MBRS340T3 L305
18V Boost U301-7
- Mosfet Gate Voltage Bead
11
12
L301 C305 UC3843A
Heatsink F303 1mH 5600pF + C311 + C312 + C313
3
R305 U301 VFB 1000uF 1000uF C336 330uF
Vc
Vcc
4
2
for D301 4Amp
1 MC34063AD TP307 TP306 R314 Q305 .047uF
1
U302-comp
U302-out
6078 D302 COMP 10
Q305-g
MTP30N06VL
BAV99L 14 10
AC+12V 8 U301-sw 5VRef 1
Q301 IDC VREF OUT
7
MPSW51A IPK TP308
1 1 1 2
1 3 ISWC C307
3
PWR-GND
2 U301-pwr 6
Vcc .047uF R311 7 5
Battery 3 4 2 U302-ct U302-sense
GND
ISWE R306 10K RT/CT ISENSE
3
R301 TP309 61.9K
2
D301 C301 10K C302 R315
GND
+ +
Q305-s
U301-ct 3 5 U301-comp
9
8
MBR2535CTL 330uF 1uF TCAP COMP 196
Q301-b
1
R312
C304 C308 3.83K
4
+
TP310 TP311
C303 R307 100uF 2200pF 3 2
Q304-e
R302 470pf 4.64K
TP314 1.96K Q304 R313 C309
MMBT3904L 1.96K 5600pF R316
TP312
TP313 0.1
Q302-c
R303 R304
3
D312-c
+ C339
TP354
1uF
3
TP316
3 3
F301
+Vpump
4Amp D310
MBRS340T3 HS302
Bat-fuse
Heatsink
Q312
forQ312
MTP30N06VL
6078
4
Battery 2 3 +5V
TP349 Charger Q308
4
3 2
L304 TP353 D307 + C323 + C325
MTP23P06V
F302 47uH R327 MBRS340T3 Q311 100uF 100uF
1
Q312-g
4Amp 0.1 MTP30N06VL
1
3 2 R346 U306
F302-2 AC+12V-fuse Q308-d C319-1 D307-A
4 100 R348 LF33CV
L306 10K
1 3 +3.3V
C340 Bead C337 + C318 C324 R347 IN OUT
.047uF .047uF 330uF C319 + C338 1000pF 10K
1
GND
D306 1000uF .047uF TP317 C328 + C329 C330
Q308-g C324-2
MBRS340T3 TP318 .047uF 100uF .047uF
2
R326 TP319
Q307 10 R328 R329
MMBT3904L 1K 1K
D D D
3 2 TP320 +5V Linear
U305-1
U305-2
Q307-e D
4
TP324 TP323
1
.047uF +
3
U303-fb U305-6 U305-3 5VRef
R325 3 U305A
1.96K 33.2K MC34072
8
C326 R350
2 .01uF 2
10K
R319 U303 R330
11
12
Q306-c 7 1 C327
+12V
U303-cp 1 U305-5 5
+ .047uF
U303-out
COMP
3
Q306-b
MMBT3904L 2
AC+12V-fuse
TP328
2
RT/CT ISENSE
U304-2 TP331
Ref-Batcharge
R324
10K
Current Limit
9
8
TP332 Q313
(1.5 Amp) TP334
U304-1
TP333 R351
2N7002
4
1
8
10K .047uF
ACON +12V +12V
1
R341
10K R353 TP340
Ref-Batcharge
AC+12V-fuse TP339 5.11K
R342 R343 Q314-d 3 2
BattCurrent
2
R339-2 MMBT3906L
Ref-Batcharge TP343
R343-1 Q314 R354 R355
3
2
1
R340
10K - 6 U304-6 TP352
TP347 Ibatt=1.5: BattCurr=2.87V
1 7 D309 1
U304-7
+ 5 U304-5 Q309-3 BAV70L +5V
U304B R336 TP348 RT301
MC34072 7.5K 10K
8
R337 Q310-c
TP350
RT301-1
8.87K R344
Float Voltage Welch Allyn Inc.
3
ACON
Bat-Adj MMBT3904L Drawn Schematic: 620017.dsn
Q310-b
R338 Designed
2 Rick Myers Mar 5, 1999 Title
1K
R345 Checked
DC/DC Power Supplies
L. Phillips 3/16/99
10K
Approved Size Document Number Rev
Z. Psenicnik 3/16/99
C 620017 G
3
A B C D E
GND
GND
GND
GND
C406 + Improvements for ESD, RFI,
100uF C403 C430 D and Fast Transients, Correct 5-39821 LPP 6/24/99 LPP
.047uF .047uF Respiration Diff-Amp Topology
2
Mods to U2 clock line, Resp
E gain amp, ECG supply and 5-39936 LPP 7/9/99 LPP
S S S
NVRAM pullup
Buffer for ETCO2, Nurse call relay
F Modify RLD to reduce V-Lead noise 5-44461 LPP 3/26/02 JK
S
Improve ESU rejection
SpO2 bypass cap, RS232 PS mods
1 8 G 4KV nurse call relay,
s+5V VOUT VIN
5 7 Improve CMR for Resp Toplogy 5-44857 LPP 7/18/02 JK
4 ERR FDBK 4
3
SHTDN
U403-fb
C415 + Isolation
1uF U403 6 C401
TAP
LP2951C
SENS
2 .047uF Barrier
S S
+12V
Isolated SpO2 Grounded SpO2
S S
Circuits Circuits
1 2 D401
s-5V OUT IN
3 MBRS130T3 + C412
IN
U404 6 10uF
IN
GND
C421 79L05 7 f+V T401-1
+ IN
C424 C409
1uF
.047uF 470pf
5
C405 + R419 T401 +12V
C402 100uF 215 C409-1 TP449
S S
.047uF 1
S
TP450 5 R405
S S
215
TP452 L401 R419-2 2 C414 U402-ref TP451
220uH C433 .047uF
470pf 8 T401-8 TP466
15
fVcc TP453 U402 C420
3 D405 16 .047uF
VREF
4
2
VIN
+ C431 + C434 BAV99L
10uF 10uF R407 TP454 10
SHTDWN FE-Pwr-Sync
Q401-g
Q402-e
3
Q401 10 12
D E E S CA
4 MTD3055V 1 2 1 U402-e 11 3
EA OSCOUT
13 6 U402-rt TP455
S S CB RT
D403 14 7 U402-ct
EB CT
2
IsoXfmr TP456 R409 TP457
f-V T401-4 Q402 1 5.11K 2
V+
MMBT3906L U402-sen 4 1
+SENSE V-
GND
U402-1
3 R406 5 9 3
-SENSE COMP
3
C407 + MBRS130T3 0.2 C411 R410
TP468 L402 C404 100uF R408 TP458 C410 LM3524DM 2200pF 7.5K
8
220uH .047uF 100 .01uF
Q401-s
fVee
S S
+ C432 + C435
10uF 10uF
f+V
S S
R422 +5V
10K
TP459 U410
8
R403 4N25
U401-3 3 1K R411
+ 1 U401-1 iso401-a 1 6 iso401-b 5.11K
U401-2 2
f+V -
R423 U401A 5 opto-fb
TP460 R416 5.11K LM358
4
8
C417
S S S
TP465 680pF
TP463 TP464
R417
10K
2 2
S
Nonin SpO2
Connector
J401
SpO2 ESD
J403 Ground
1 f+V iso+5Vdig
2 1
sSpO2tx
3 2
+ C419 C413
4
10uF Tab-.187 .047uF
+5V
CON4
S
S S D E
3
Q403
sSpO2tx 1 MMBT3904L C422 R414
.047uF 1.96K
R412 U411
2
S S
S S
C427 C428
.047uF
+
10uF Initial Date
Welch Allyn Inc.
Drawn Schematic: 620017.dsn
Rick Myers Mar 5, 1999
S S
Designed
Rick Myers Mar 5, 1999 Title
Checked
Power Isolation and SpO2 Interface
L. Phillips 3/16/99
Clamp voltage for Temp U501 U502 U503 U504 U505 U506 U507 U508
B See ECN worksheet 5-39455 LPP 4/27/99 LPP
and Resp circuits fVcc
RA
8
19.6K 73.2K 10K
Right-Arm C501-1 C537-1 U501-3 3 TP506
1 + fVcc
1 U505
2
8
2 Wilson 4051
3 -
R509 13 3 mux- 3
4 X0 X +
N501 C501 C537 C506 TP507 22Meg U501A R517 Network RA 14 1 diff-
5 X1
4
330pF 220pF 100pF TL072 10K C510 TP508 LA 15 2 C544
6 X2 -
LAMP NEON TP509 0.1% 220pF R529 10K aVR 12 Diff Amp 1000pF
X3
R509-1 aVL 1 U507A
X4
4
fVee aVF 5 TL072 Gain = 1
S E E E X5
R557 U501-2 R530 10K V- 2
E X6
Shield 22Meg 4 R544 R546
X7
fVee 10K 0.1% 10K 0.1%
R518 TP510 6 U508-3
INH
fVcc 1.21K R531 10K 11
A
VLdsOff 0.1% 10
E B
TP534 TP511 9
C
R502 R562 R510 TP512 TP513 R532 10K C543
8
19.6K 73.2K 10K TP514 fVcc TP557 TP558 .047uF
E
Left-Arm C502-1 C538-1 U501-5 5 fVcc u509-4
+ fVee
7 TP515
3 E 3
6 R533 10K TP516 fVcc
- fVcc
8
R511 U506 R565
2
N502 C502 C538 C507 22Meg U501B R519 4051 R545 3 121K
4
LA 13 3 mux+ 5 + 1 4
330pF 220pF 100pF TP519 TL072 10K C511 R534 10K 10K 0.1%
X0 X + -
LAMP NEON TP520 0.1% 220pF LL 14 7 diff+ U508-2 2 1 diff-out
X1 -
R511-1 LL 15 6 U508A 3
X2 - +
fVee TP521 RA 12 AD712 U509
S E E E X3
4
U501-6 LA 1 TP522
U508-1
R558 R535 10K U507B LMC7101
X4
5
22Meg LL 5 TL072
X5 E
V+ 2 C542 fVee
X6
R520 R536 10K 4 fVee 220pF
X7
fVcc 1.21K fVee
VLdsOff 0.1% 6
INH
TP541 TP523 R537 10K 11
A
R503 R563 R512 TP524 TP525 10 R547
B
8
8
330pF 220pF 100pF TP531 TL072 10K C512 3.3uF 19.6K
LAMP NEON TP533 0.1% 220pF ecg-hp U508-5 5
R513-1 + 7
An-ECG
fVee 6
S E E E -
R559 U502-2 C516
22Meg R548 R549 .047uF U508B
4
TP535 TP536 TP537 1Meg 110K AD712 R551 C517
R522 73.2K .01uF
fVcc 1.21K
E
VLdsOff 0.1% Q504-d fVee
Mux-LdS-A
TP544 TP538 U508-6
E
R504 R564 R514 TP539 TP540
Mux-LdS-B
8
3
R515 TP530
N504 C504 C540 C509 22Meg U502B R523
4
2
R560 U502-6 Q504-s R553
2
22Meg 100K
1 Q504-g
Sw-MonBw
R524 Q505
1.21K 2N7002
VLdsOff 0.1%
fVcc
3
U504
3 2 TP547
S1 D1 E E
1 TP548 U503B R555
Sw-RLD-RA IN1
8
TL072 30.1K
14 15 5 U503-5
S2 D2 + f+5V
16 7
Sw-RLD-LL IN2 VLdsOff
6
TP550 11 10 -
TP545
S3 D3
R505 R566 9 C536 R556
Sw-RLD-LA IN3 f+1.24V
4
TP559
2
D505 10K 3
3 3 2 2 3 RL-mux 1 +
MMBD1503A
2 R526
- E
V-Lead Defib Protect, 10K
U503-2
TP562
4
8
TP603 E gain amp, ECG supply and 5-39936 LPP 7/9/99 LPP
5 NVRAM pullup
U601 U602 U603 U608 U609
7 + iso+5Vdig
Buffer for ETCO2, Nurse call relay
Resp-Reset 6 Resp-Off
F Modify RLD to reduce V-Lead noise 5-44461 LPP 3/26/02 JK
fVee -
U607B Improve ESU rejection
SpO2-Reset
LM393 C629 C631 SpO2 bypass cap, RS232 PS mods
4
TP601
C625 + C614 C626 C627 C638 C640 .047uF .047uF G 4KV nurse call relay,
.047uF 4.7uF .047uF .047uF .047uF .047uF Sw-RespReset 5-44857 LPP 7/18/02 JK
fVee Improve CMR for Resp Toplogy
fVcc iso+5Vdig
4 D E D E 4
Isolation
E E E E E E fVcc iso+5Vdig
Serial/Parallel Barrier
R622 TP605 C641 +5V
8
46.4K f+5V TP639 R613 0.1uF
3
Control Data
6.19K 2
+ 8
1 TP638 U604A
Sw-MonBw 2
U604-1
U605 74HCT04 R628
- D E
U607A 74HCT595 U604-2 2 1 10K U613-6 R619
TP606 15 14 6
LM393 QA SER iso604-a 619
4
TP609 1 3
QB 5
2 11 FE-Data-In
QC SRCLK
fVee 3 10
MuxB QD SRCLR TP636 C643 U613
4
MonBw QE 220pF HCNW4503
5 12
QF RCLK
fVcc 6 13 E D E
QG G
SW-RLD-RL 7 D E
QH
SW-RLD-LL
8
SW-RL-V
5 9
QH
7 +
SW-RLD-V
6 iso+5Vdig
- f+1.24V TP610 TP611 TP607 TP612
AD712
U608B U605-out D E
4
C642 U612 +5V
fVee TP613 TP614 TP640 0.1uF HCNW4503
U606 f+5V R615
8 2
15 74HCT595 14 U604B 6.19K
QA SER
U604-3
1 74HCT04 R629
TP616 TP617 TP618 SW-RLD-LA D E
QB 10K R620
SW-RLD-RA 2 11 U604-4 U612-6 6
C630 QC SRCLK 4 3 619
3 10 iso603-a
Mux-LdS-C SRCLR 3
f+5V 4.7uF QD
Mux-LdS-B 4 5 FE-Data-Clock
QE
Mux-LdS-A Mux-A/D-C 5 12
QF RCLK
+
fVcc Mux-A/D-B 6 13 C644
f+5V G
QG TP637 220pF
Mux-A/D-A 7
QH
TP615 E TP635 E D E
9 D E
8
3 fVee QH 3
13 12 U605-12
5
Resp-DC + 7
9
6 C C646
- 10
U604F B 1000pF iso+5Vdig
11 D E
U601B 74HCT04 A
6
4
E
MC34072 INH
Resp-LdsOff U609
4 E
X7 4051 R630 C628 U611 +5V
fVee
2
X6
MuxB 10K TP641 0.1uF HCNW4503
U601-7 Temperature An-Resp 5
X5 f+5V R617
1 8 2
X4 U604C 2.15K
Amplifier 12
X3 74HCT04 R631
U604-5
15 D E
fVcc X2 TP642 5.11K R621
14 U604-6 6 5 U611-6 6
X1 iso602-a 215
13
X0 X
3 A/D Mux 3
TP620 5 FE-ADC-Clock
R624
8
AD712 9
C
10
E B
11
MuxA A
fVee 6
TP624 INH
TP623 C634 .01uF U603
4 4051
vRL X7 MuxA
2
f+1.24V X6
5
RA X5
R625 1
LA X4
-Clamp +Clamp 1K 12
LL X3
U603out
15 R605 R607
U602-2
V+ X2
D602 R627 1.21K 14 3.48K 464K
An-ECG X1
BAV99L 13 3
X0 X
1 2 iso+5Vdig
2 0.1% 2
iso+5Vdig
TP626 fVcc
U602-5
3
E TP625
C635 .01uF fVcc
R601 TP627 fVcc f+5V
U602-7
J601 10K R608 C632
Temp-In U601-3
2 C603 1K .047uF
5
6
8
f+5V +5V
1 680pF TP628
U604-8
3
Temperature
8
2
C636 R606
3 + 7 9 8 1
CON2 2200pF R602 3.48K Q601
Thermistor + 1 U601-1 U602-3 3 E
73.2K MMBT3904L
2 -
U602
2
-
LM311 U604D C621
4
1
TP629
f+5V U601A 74HCT04
4
Q601-e
E E E
46.4K 511 HCNW4503 6.19K
U601-2 iso601-a 2 8 TP643
C601 fVee R632
PWM fVee 5.11K
U604-10 E U610-6
11 10 6
TP632 3 FE-PWM-ADC
R604 1000pF A/D
3
10K Converter 5
D601-2 2 1
U604E
74HCT04 C647
D E
100pF
E
D601
TP633
MMBD1503A
52uSec
Integrator
Input
833uSec
(U604-10)
1 1
+5V
Comparator
Inputs
Analog In
Initial Date
Welch Allyn Inc.
-5V
PWM-Out Designed
Rick Myers Mar 5, 1999
(U604-8) Title
Checked
ECG A/D and Interface
L. Phillips 3/16/99
8
E E Improve ESU rejection
3 SpO2 bypass cap, RS232 PS
+ mods
1 u703-1 G 5-44857 LPP 7/18/02 JK
10
fVee 4KV nurse call relay,Improve
2 CMRR for Resp Topology
4 12 9 - 4
U703A
D Q E
PR
C717 C718 AD712
4
.047uF .047uF 11
CLK
CL
Q
fVee
E E E
13
U701B
74HC74
Isolation
Respiration
Barrier
Drive
Circuit
f+5V
-Clamp +Clamp
+ C719 iso+5Vdig
4.7uF iso+5Vdig
D701
TP701 MMBD1503A
C705
E
1 2 0.1uF +5V
R701 C701 TP702 R703 TP703 U701A R705
TP723
4
31.6K 1000pF 1.96K 74HC74 2.15K U710
3
PR
2.15K
TP704 3 resp-clk u710-6 8 2
CLK
C723
3 22pF 6 R706 3
CL
Q
6 215
D702 C721 3 iso701-a
E FE-Pwr-Sync
1
MMBD1503A 100pF 5
TP706
1 2
TP705 E D E D E
R702 C702 R704
Resp-Off
31.6K 1000pF 1.96K
3
C720
.047uF
D703
E
MMBD1503A Respiration
fVcc
1 2 Diff Amp
C706 TP710 R707 TP708 D705 fVcc
B.W. = .06Hz to 16 Hz Gain =1000
TP709
8
8
2 3.3uF 100K
- TP726 3 Resp-AC U703-5 5
U702A
+ 7
TL072 R711
An-Resp
4
R709 178K 2 6
-
464K U703B
fVee
R717 R718 R719 C713 AD712
4
U702-2 fVee
3.16K C711 825K 51.1K 0.1uF
D705-2
0.1uF
E
U704-2
2
AD712 R722
8
4
0 MMBF4393L C714
fVcc 6 - .047uF
1
U702-6 TP722 7
D704 5 +
E E
Q701-g
MMBD1503A
R713 U704B
8
1 2 fVee
178K AD712 D706
E
MMBD1503A
fVcc
4
R728
3
3
U702B
TL072 R729 R723
TP715
8
3.16K 1Meg
fVcc
R710
464K
E E
1 1
Initial Date
Welch Allyn Inc.
Drawn Schematic: 620017.dsn
Rick Myers Mar 5, 1999
Designed
Rick Myers Mar 5, 1999
Title
Checked
Respiration
L. Phillips 3/16/99
3
4 R812 C803 4
Isolated Supply +
215 100uF
T801
Serial 1 TP802
Communication
R812-1
D802
T801-5 R
5 BAV99L
2 T801-2 1 2
R+5V
R816
215 8
3
C813 + C804
3 470pf 100uF
U801 TP801 R815-1
MC34063AD
+5V R801
R
1 8 C807 4
IDC R
7 470pf D803
IPK
1 U801-1 BAV99L
ISWC
6 IsoXfmr
Vcc
2 T801-4 2 1
TP803 ISWE RVee
C801 +
GND
3
1uF 3 5 U801-5 C805
TCAP COMP +
100uF
U801-ct
4
R804
+5V U805 511
U805-6 R
C802 6 1 U805-1
220pf
5
R803 C806 R805
R803-2
4 10K .01uF 3.16K
2 U805-2
1
5.11K 1Meg
TP805
8 ISO801-4 TP804
3 3
U806
TL431/SO
2
3
6
7
R806
3.16K
+Vpump
TP810 R
R813
3
100
q802-b 1 Q802 K801
NurseCall
MMBT3904L relay-JQ1-5V
4
2
q802-e 1
Coil+
N.C.
COM1
N.O.
5
Coil-
3
R+5V RVcc
2 2
C808
C809 .047uF
.047uF
R R
16
TP807
1
C815 connector
.047uF R819 215
Vdd
U802-2
Vcc
15 2 J801
1RY 1RA
R810 U803 rly-NO
1
619 HCNW4503 13 4 rly-NC
R 2RY 2RA TP808 2
iso803-a 2 8 R811
RS423Tx 3
6.19K 11 6
3RY 3RA R 4
R817 215 Rx
5
6 iso803-c 14 3 U802-3 Tx
1DA 1DY 6
3
7
5 12 5 rly-COM
2DA 2DY 8
10 7 RJ-45
3DA 3DY
GND
Vss
R
U802
8
TL145406 C814 C812
R
680pF 680pF
R+5V
RVee
R R
+5V +5V
R R
3
C816 C810
.047uF 1 U802-15 .047uF
6
RS423Rx TP809
3
5
Initial Date
Welch Allyn Inc.
R
Designed
Rick Myers Mar 5, 1999
Title
Checked
Serial Communication
L. Phillips 3/16/99
NOTE 5 WAS
B 5-43326 RLB 10-12-01 T.W.
"INDUCTANCE : 380 uH p 10%"
D D
.150
.514 .750 MAX
.710 MAX
.200
.200
PCB
C C
HOLE PATTERN
NOTES: 1
7.5V .5V 40MA
+12V
1. MANUFACTURER: ZMAN MAGNETIC
BEAVERTON OREGON
5
2. TRANSFORMER MUST MEET UL CONSTRUCTION TECHNIQUES.
2
3. LABELING: THE TRANSFORMER SHALL BE LABELED, AND + 5 V (REGULATED) @ 100 mA
INCLUDE THE FOLLOWING:
- MANUFACTURER'S NAME
- WELLCH ALLYN PART NUMBER I.E. 620020 3
B - DATE CODE: YYWW (OR APPROVED ACCEPTABLE FORM) B
4. SCHEMATIC AS NOTED.
5. SPECIFICATIONS:
PRIMARY WINDING : PIN 5 TO PIN 8 FEEDBACK +5V THESE DRAWINGS AND SPECIFICATIONS AR E THE PROPERTY OF WELCH ALLYN, INC.
INDUCTANCE : 135 uH 10% AND SHALL NOT BE REPRODUCED, OR COPI ED, OR USED AS A BASIS FOR MANUFACTU RE
RESISTANCE : 0.15 OHMS 15% OR SALE OF EQUIPMENT OR DEVICES WITH OUT WRITTEN PERMISSION.
DRAWN DATE
SECONDARY WINDING : PIN 1 TO PIN 4 R
C
UNLESS OTHERWISE SPECIFIED
TOLERANCES
.XX = .02
DIMENSIONS
ARE IN 620020 B
7. PART TO BE A RECOGNIZED COMPONENT UNDER UL2601 OR EN60601.1 CONSTRUCTION. .XXX =
ANGLES
.005
2
INCHES
SCALE FULL SHEET 1 of 1
4 3 2 1
120.00 3.00
120.00 3.00
PATIENT END
B RA
PATIENT END
RA
RA (WHT)
RA
KENDALL
P/N:1540PS LOT#XXXXXX
RL (GRN)
D LL
D
LL
RL
C (BRN)
C
LA
LL
LL (RED)
LA
620027-2
LA
B A LA (BLK)
620027-1 3
1 RA WHITE 3
WHITE (RA, 1) 1 RA WHT
6 SHIELD 1 WHT (RA)
3 LL RED 5 RL GRN
2 LA BLACK 4 C BRN
RED (5) BLACK (LA, 2) JUMPER 3 LL RED
5
PATIENT END 5 GRN (RL) 2 BLK (LA) 2 LA BLK
4 NA
SHIELD
6
RED (LL, 3) 6 NA
4 BRN (C) 3 RED (LL)
CONNECTOR END CONNECTOR END PATIENT END
VIEW B-B CABLE WIRING DIAGRAM VIEW A-A CABLE WIRING DIAGRAM
C D R C R (RED)
C
R
R
KENDALL
P/N:1540PS-I LOT#XXXXXX
N (BLK)
N
F C (WHT)
C
F
F (GRN)
L
L C L (YEL)
D 620027-4
620027-3 3
3
RED (R, 1) 1 R RED
1 R RED
6 SHIELD 1 RED (R)
3 F GREEN 5 N BLK
2 L YELLOW 4 C WHT
RED (5) GREEN (F, 2) JUMPER 3 F GRN
5 B
PATIENT END 5 BLK (N) 2 YEL (L) 2 L YEL
4 NA B SHIELD
6
YELLOW (L, 3) 6 NA
4 WHT (C) 3 GRN (L)
CONNECTOR END CONNECTOR END PATIENT END
VIEW D-D CABLE WIRING DIAGRAM VIEW C-C CABLE WIRING DIAGRAM
PACKAGING
NOTES: COLOR CODE:W,R,BL 5
1. CONNECTOR AND TRUNK CABLE SHALL BE 414C GRAY 620027-2 1540PS MW03775 5-LEAD; DIN STYLE SAFETY PATIENT CABLE;
AND THE PATIENT END SHALL BE BLACK. COLOR CODE:W,G,BR,R,BL 6
2. ELECTRICAL RESISTANCE SHALL BE BETWEEN 900 AND 1100 OHMS. 620027-3 1340PS-I 3-LEAD, DIN STYLE SAFETY PATIENT CABLE
IEC COLOR CODE: R,G,Y 8
3. CABLE NAMEPLATE SHALL CONTAIN:
KENDALL 620027-4 1540PS-I 5-LEAD, DIN STYLE SAFETY PATIENT CABLE
B PART NUMBER: SEE TABLE - CATALOG P/N IEC COLOR CODE: R,B,W,G,Y 9
LOT NUMBER: XXXXXX
PART NUMBER: SEE TABLE - REF P/N THESE DRAWINGS AND SPECIFICATIONS AR E THE PROPERTY OF WELCH ALLYN, INC.
DESCRIPTION: SEE TABLE AND SHALL NOT BE REPRODUCED, OR COPI ED, OR USED AS A BASIS FOR MANUFACTU RE
QUANTITY: 1 EACH 7. CABLE MUST MEET THE PERFORMANCE STANDARD FOR ELECTRODE LEAD WIRES OR SALE OF EQUIPMENT OR DEVICES WITH OUT WRITTEN PERMISSION.
LOT NUMBER: XXXXXX AND PATIENT CABLES FOUND IN TITLE 21 CFR, PART 898 DRAWN DATE
R
JB ENGEL 09-Apr-99
5. CHANNEL DESIGNATIONS: RA=WHITE, LL=RED, LA=BLACK; 8. CHANNEL DESIGNATIONS: R=RED, F=GREEN, L=YELLOW; APPROVED DATE MATERIAL:
A WITH 1 K OHM RESISTORS; WITH 1 K OHM RESISTORS; ZIP 4/16/99 - A
B WIRING PER ANSI/AAMI 1983 ECG CONNECTOR STANDARD;
WIRING PER ANSI/AAMI 1983 ECG CONNECTOR STANDARD; REL TO PROD DATE FINISH:
(COMPLIANT WITH ANSI/AAMI EC53-1995 CABLE AND LEAD STANDARD) (COMPLIANT WITH ANSI/AAMI EC53-1995 CABLE AND LEAD STANDARD) J. BELLO 4/16/99 -
TITLE
6. CHANNEL DESIGNATIONS: RA=WHITE, RL= GREEN, C=BROWN; 9. CHANNEL DESIGNATIONS: R=RED, N=BLACK, C=WHITE; - - ECG PATIENT
LL=RED, LA=BLACK; WITH 1 K OHM RESISTORS; F=GREEN, L=YELLOW; WITH 1 K OHM RESISTORS;
B WIRING PER ANSI/AAMI 1983 ECG CONNECTOR STANDARD; CAD SOFTWARE: PRO E CABLE
WIRING PER ANSI/AAMI 1983 ECG CONNECTOR STANDARD; TRANSLATED FROM:
(COMPLIANT WITH ANSI/AAMI EC53-1995 CABLE AND LEAD STANDARD) (COMPLIANT WITH ANSI/AAMI EC53-1995 CABLE AND LEAD STANDARD) DRAWING NO. REV
C
UNLESS OTHERWISE SPECIFIED
TOLERANCES
.XX = .02
DIMENSIONS
ARE IN 620027 B
.XXX = .005 INCHES
ANGLES 2 SCALE NONE SHEET 1 of 1
4 3 2 1
D D
C C
4
PARTIAL ASSEMBLY
2
5
EXPLODED VIEW
B B
B 620201-502 SUB-ASSEMBLY
DRAWN DATE
R
JB ENGEL 13-Apr-99
APPROVED DATE MATERIAL:
A ZIP 4/15/99 - A
REL TO PROD DATE FINISH:
J. BELLO 4/15/99 -
TITLE
- - POWER SUPPLY\
CAD SOFTWARE: PRO E SUB-ASSEMBLY
TRANSLATED FROM: ME-10
DRAWING NO. REV
C
UNLESS OTHERWISE SPECIFIED
TOLERANCES
.XX = .02
DIMENSIONS
ARE IN 620201 B
620201X1.MI .XXX =
ANGLES
.005
2
INCHES
SCALE NONE SHEET 1 of 1
4 3 2 1
3.900
1 3
2
.832
DRAWN DATE
R
3 NOMINAL LENGTH (FROM SENSOR BODY TO FEMALE LUER INLET) WJM 01-Apr-99
9.8 INCHES. APPROVED DATE MATERIAL:
ZIP 4/14/99 -
4 WATERTRAP AND WATERTRAP RECEPTAC} LE REQUIRED FOR OPERATION. REL TO PROD DATE FINISH:
J. BELLO 4/14/99 -
5. PACKAGING TO BE APPROVED BY WELC H ALLYN. HANDLING AND PACKAGING TO TITLE
PREVENT DAMAGE DUE TO ESD, BENDI}} NG AND OTHER DAMAGE. - - ETCO2 PCB
CAD SOFTWARE: PROE ASSEMBLY
6. ASSY TO BE MARKED WITH MANUFACTURER'S SERIAL NUMBER. TRANSLATED FROM: ME10
DRAWING NO. REV
B
UNLESS OTHERWISE SPECIFIED
TOLERANCES
.XX = .02
DIMENSIONS
ARE IN
620032 C
.XXX = .005 INCHES
ANGLES 2
SCALE NONE SHEET 1 of 1
SEE ECN
B 5-39954 ASK 7-12-99 T.W.
(REV A REL. AS EXT ITM MSTR)
CISPRII CLASS B
EMI COMPLIANCE
(EN55011)
2311 STATHAM PKWY. OR SALE OF EQUIPMENT OR DEVICES WITH OUT WRITTEN PERMISSION.
J. BELLO 7-12-99 -
3. SUPPLIER REV. C OR HIGHER TITLE
B
UNLESS OTHERWISE SPECIFIED
TOLERANCES
.XX = .02
DIMENSIONS
ARE IN
620150 C
.XXX = .005 INCHES
ANGLES 2
SCALE SHEET 1 of 1
A
1.75 .25
.38
9 4
2
10
8
ITEM 1 ITEM 3
6 1
1 1
5 2
2 2
3 3
4 3
PIN 1 4 4
11 5 5
1 5 7 3
SECTION A-A 6 6
6
3.50 .25
1 11 SHRINK TUBE
1 10 WIRE, 22GA, GREEN
A
1 9 WIRE, 22GA, BROWN
1 8 WIRE, 22GA, BLUE
1 7 WIRE, 22GA, RED
1 6 WIRE, 22GA, BLACK
1 5 WIRE, 22GA, WHITE
NOTES:
6 4 CONTACTS, MOLEX 08-5 0-0113
1. ALL CONNECTORS ARE TO BE UL RECOG NIZED COMPONENTS AND CSA CERTIFIED. 1 3 6 PIN CONNECTOR, MOL EX 22-01-3067
CONNECTOR MATERIAL SHALL HAVE FLA MMABILITY RATINGS OF 94V-2 OR BETTER . 6 2 ECG PINS (FEMALE), A MP-66105-3
1 1 ECG CONNECTOR WA PAR T # 620102
QTY ITEM DESCRIPTION
2. WIRE SPECIFIATIONS
PART NO. DESCRIPTION
B
UNLESS OTHERWISE SPECIFIED
TOLERANCES
.XX = .02
DIMENSIONS
ARE IN
620165 A
.XXX = .005 INCHES
ANGLES 2
SCALE NONE SHEET 1 of 1
1 1
2 2
3 3
3 PIN 1 4 4
2 5
1
8 4 6
7 1
C C 1 8 FAIR RITE P/N 2643801902
1 7 SHRINK TUBE
1 6 WIRE, 22GA, YELLOW
1 5 WIRE, 22GA, ORANGE
1 4 WIRE, 22GA, RED
1 3 WIRE, 22GA, BROWN
8 2 CONTACTS, MOLEX 08-5 0-0113
NOTES:
2 1 4 PIN CONNECTOR, MOL EX 22-01-3047
1. ALL CONNECTORS ARE TO BE UL RECOG NIZED COMPONENTS AND CSA CERTIFIED. QTY ITEM DESCRIPTION
CONNECTOR MATERIAL SHALL HAVE FLA MMABILITY RATINGS OF 94V-2 OR BETTER . 620166-1 THIS DRAWING REV C AND ABOVE
620166
2. WIRE SPECIFICATIONS
PART NO. DESCRIPTION
B
UNLESS OTHERWISE SPECIFIED
TOLERANCES
.XX = .02
DIMENSIONS
ARE IN
620166 C
.XXX = .005 INCHES
ANGLES 2
SCALE NONE SHEET 1 of 1
1 A SEE DETAIL B
DRAINWIRE YELLOW 2
3
SHRINKWRAPPED (BOTH ENDS)
CONNECTOR REF.
PIN 1 .250 STRIP
B 1 6 FAIR-RITE 2643625102
PIN 1
4 4 5 HEAT SHRINK
5
A 1 4 COAX CABLE, BELDON#821 6
SECTION A-A 6
1 3 SHIELDED CABLE, CAROL# CO742 W/ DRAIN
BRAID SHIELD CONNECTED TO 26 AWG ORANGE 1 2 3M CONNECTOR, 89110-0101
JUMPER WIRE VIA SOLDER BRIDGE, COVER WITH
C 1 1 SPO2 CONNECTOR, AMP #7 45491-2
LOW TEMPERATURE SHRINK TUBING BOTHE ENDS
QTY ITEM DESCRIPTION
C 620169-2 THIS PART REV C AND ABOVE
JB ENGEL 14-May-99
4 2 APPROVED DATE MATERIAL:
8 3 ZIP 2/18/99 -
REL TO PROD DATE FINISH:
DB9
8
NOTES:
SCHEMATIC
J. BELLO 2/18/99 -
10 PIN TITLE
1. ALL CONNECTORS ARE TO BE UL RECOG NIZED COMPONENTS AND CSA CERTIFIED. - - CABLE ASSY
CONNECTOR MATERIAL SHALL HAVE FLA MMABILITY RATINGS OF 94V-2 OR BETTER . CAD SOFTWARE: PE NELLCOR SENSOR
TRANSLATED FROM: ME10
DRAWING NO. REV
B
UNLESS OTHERWISE SPECIFIED
2. CABLE ASSEMBLY TO BE 100% TESTED FOR POINT TO POINT
AND SHIELD OVER SHIELD CONTINUITY.
TOLERANCES
.XX = .02
DIMENSIONS
ARE IN
620169 C
.XXX = .005 INCHES
ANGLES 2
SCALE NONE SHEET 1 of 1
8 5 10 6 11 6
2
2
ON 8
ECTI
DIR 10
FLOW 7
3
9 2 REF
5
13
2
+ 4
- 1
RED 1 REF
DRAWN DATE
NOTES:
12 JB ENGEL 13-Apr-99
R
ZIP 4/15/99 -
2 SOLDER WIRE FROM ITEM 4 TO PUMP TERMINALS USING SOLDER ITEM 13.
REL TO PROD DATE FINISH:
J. BELLO 4/15/99 -
3 ATTACH FAST-ONS FROM ITEM 4. TITLE
- - PNEUMATIC SUB-ASSY
4 MANIFOLD ORIENTATION - HOLES FACI NG UP AS NOTED CAD SOFTWARE: PRO E
TRANSLATED FROM: ME-10
DRAWING NO. REV
B
UNLESS OTHERWISE SPECIFIED
5 PUMP INTAKE ORIENTATION - TUBE ON TOP SIDE AS NOTED. TOLERANCES
.XX = .02
DIMENSIONS
ARE IN
620187 B
.XXX = .005 INCHES
ANGLES 2
SCALE NONE SHEET 1 of 1
4.75.12
3.75.12
.75.12 .378.12
NOTE CATHODE
SINGLE LOOP, ALL WIRES ORIENTATION
THROUGH FERRITE 2
PIN 1 1 1
2 2
3 3
4 4
10 9 3 PIN 1
2 5
1
4 6 1 10 CLEAR HEAT SHRINK
8 7 1 1 9 DIODE,VISHAY TELEFUNKEN P/N IN4148
1 8 FAIR RITE P/N 2643801902
1 7 SHRINK TUBE
1 6 WIRE, 22GA, YELLOW
1 5 WIRE, 22GA, ORANGE
1 4 WIRE, 22GA, RED
1 3 WIRE, 22GA, BROWN
8 2 CONTACTS, MOLEX 08-5 0-0113
NOTES: 2 1 4 PIN CONNECTOR, MOL EX 22-01-3047
QTY ITEM DESCRIPTION
1. ALL CONNECTORS ARE TO BE UL RECOG NIZED COMPONENTS AND CSA CERTIFIED.
CONNECTOR MATERIAL SHALL HAVE FLA MMABILITY RATINGS OF 94V-2 OR BETTER .
2. WIRE SPECIFICATIONS
-TYPE U.L. 1061, CSA AWM I A/B FT1 THESE DRAWINGS AND SPECIFICATIONS AR E THE PROPERTY OF WELCH ALLYN, INC.
AND SHALL NOT BE REPRODUCED, OR COPI ED, OR USED AS A BASIS FOR MANUFACTU RE
-COLOR CODED .009 THK. (NOM) PVC INSULATION OR SALE OF EQUIPMENT OR DEVICES WITH OUT WRITTEN PERMISSION.
DRAWN DATE
-TEMP RANGE: -10 C TO +80 C R
JB ENGEL 13-Jan-99
-VOLTAGE RATING: 300V APPROVED DATE MATERIAL:
- - CABLE ASSY
CAD SOFTWARE: PE CO2
TRANSLATED FROM: ME10
DRAWING NO. REV
B
UNLESS OTHERWISE SPECIFIED
TOLERANCES
.XX = .02
DIMENSIONS
ARE IN
620524 B
.XXX = .005 INCHES
ANGLES 2
SCALE NONE SHEET 1 of 1
Model Serial#
621N0 62201361
621SP 62100948
622N0 62201361
622NP 62201357
623SP 62300410
623NP 62300412
Model Serial#
621S0 62100935
621SP 62100941
622S0 62101305
622SP 62200135
622N0 62201305
622NP 62201312
623SP 62300405
623NP 62300408
Table F-3. Upgraded printer cable to a cable with foam tape attached.
Model Serial#
621xx 62104069
622xx 62208111
623xx 62304018
The foam tape ads extra safety into the printer cable.
Model Serial#
621xx 62103000
622xx 62206000
623xx 62303000
Upgraded the Main PCB to make it ESU tolerant. Added user feature to print on alarm or not
print on alarm. Software changed to 2.2
Table F-5. Upgraded the Nellcor SpO2 PCB from 204/205 to 506.
Model Serial#
621xx 62104000
622xx 62208000
623xx 62304000
NOTE: The new Nellcor 506 SpO2 PCB is backward compatibly. The new 506 SpO2 sensor
extension cable DEC-8, that can be identified by the purple connector, is backward com-
patible with the older 204/205 SpO2 PCB. The older 204/205 SpO2 sensor extension cable
EC-8, that can be identified by the gray connector, will not work it will not physically
plug into the Atlas connector with the new Nellcor 506 SpO2 PCB. The software was
changed to version 2.5.
The older sensors, that are indentified by the gray connector, will not work with the newer
sensor extension cables even though the sensor will physically plug into the newer sensor
extension cable DEC-8. The newer patient sensors have a purple connector and will work
on the older sensor extension cables.