Geiger 1985
Geiger 1985
Z 0" L R
(a) (b)
h = g (v
m + - ν-) (2)
0
is assumed to be attained via control of g by 7 . m ABC *° l+QmRi
(e) (f)
MARCH 1985 21
A voltage buffer, such as used in Figs. 2c and 2d, is tained with either g or g . The total adjustment
ml ml
often useful for reducing output impedance.* Al range of the gain of this structure is double (in dB)
though the gain characteristics of these circuits are that attainable with the single OTA structures consid
ideally identical, the performance of the two circuits ered in Figs. 2a and 2b. Furthermore, if both OTAs
is not the same. The performance differences are due are in the same chip, the variations with temperature
to differences in the effects of parasitics in the cir of the g 's are cancelled.
m
cuits. Specifically, the parasitic output capacitance of Several standard controlled impedance elements
the OTA in Fig. 2c, along with instrumentation para are shown in Fig. 3, along with the input impedance
sitics, parallel the resistor R in discrete component
L expression. These controlled impedances can be used
structures, thus causing a roll-off in the frequency re in place of passive counterparts (when applicable) in
sponse of the circuits. In the circuit of Fig. 2d, the active RC structures to attain voltage control of the
parasitic output capacitance of the OTA is connected filter characteristics or as building blocks in OTA
across the null port of an op amp and thus has negli structures.
gible effects when the op amp functions properly. The circuit of Fig. 3a is a grounded Voltage Variable
Likewise, instrumentation parasitics will typically ap Resistor ( W R ) . The circuit of Fig. 3b behaves as a
pear at the low impedance output of the op amp and floating W R , provided g and g are matched. If a
ml m2
thus not have a major effect on the performance. mismatch occurs, the structure can be modeled with
As with conventional amplifier design using resis a floating W R between terminals 1 and 2 of value g mV
tors and op amp's, the amplifier bandwidth of these along with a voltage dependent current source of
structures warrants consideration. For the circuits of value (g -g )
ml Vi driving node 2.
m2
Figs. 2c and 2d, the major factor limiting the band The circuit of Fig. 3c acts as a scaled W R . Higher
width is generally the finite gain bandwidth product impedances are possible than with the simple struc
of the op amps. If the op amps are modeled by the ture of Fig. 3a, at the expense of the additional re
popular single-pole roll-off model, A(s) = GB/s, and sistors.
the OTAs are assumed ideal, it follows that the band A voltage variable impedance inverter is shown in
width of the circuits of Fig. 2c and Fig. 2d is GB, Fig. 3d. Note the doubling of the adjustment range of
independent of the voltage gain of the amplifier. this circuit, as with the amplifier of Fig. 2g. Of special
This can be contrasted to the bandwidths of GBl Κ interest is the case where this circuit is loaded with a
and GB/1 + Κ for the basic single op amp noninvert capacitor. In this case, a synthetic inductor is ob
ing and inverting amplifiers of gains Κ and -K, tained. The doubling of the adjustment range is par
respectively. ticularly attractive for the synthetic inductor since
Note that the circuits of Figs. 2a and 2b differ only cutoff frequencies in active filter structures generally
in the labeling of the " + " and " —" terminals. In all involve inductor values raised to the 1/2 power. By
circuits presented in this paper, interchanging the making g = g and adjusting both simultaneously,
ml m2
" + " and " - " terminals of the OTA will result only in first-order rather than quadratic control of cutoff fre
changing the sign of the g coefficient in any equation
m quencies is possible.
derived for the original circuit. Henceforth, it will be A floating impedance inverter is shown in Fig. 3e.
the reader's responsibility to determine when such an Note that it is necessary to match g and g for m2 m3
interchange provides a useful circuit. proper operation. The circuit of Fig. 3f serves as an
The circuits of Figs. 2e and 2f are feedback struc impedance multiplier. That of Fig. 3g behaves as a
tures. The circuit of Fig. 2e offers gains that can be super inductor and that of Fig. 3h as a FDNR.
continuously adjusted between positive and negative
values with the parameter g . By interchanging the
m
First-Order Filter Structures
+ and - terminals of the OTA, very large gains can be A voltage variable integrator structure with a differ
obtained as g R approaches 1 (as Z approaches in
m 1 0
ential input is shown in Fig. 4a. The integrator serves
finity). Gain is nonlinearly related to g . Control
m
as the basic building block in many filter structures.
range via g is reduced in these structures when com
m
Two different lossy integrators (first-order lowpass fil
pared to the amplifiers of Figs. 2a and 2b. If compo ters) are shown in Figs. 4b and 4c. The circuit of Fig.
nents are sized fitly, the gain of these structures can 4b has a loss that is fixed by the RC product and a
be made essentially independent of g (as in the con
m
gain controllable by g . The circuit of Fig. 4c offers
m
ventional op amp inverting and noninverting config considerably more flexibility. The pole frequency can
urations) and the output impedances can be made be adjusted by g (interchanging the input terminals
m2
reasonably small. of OTA 2 actually allows the pole to enter the right
The amplifier of Fig. 2g is attractive since it contains half plane), and the dc gain can be subsequently ad
no passive components. Gain adjustment can be at- justed by g . It should be noted that the structure of
ml
•'HE
ι χι
*ΙΪΙ|
(c)
+
(d)
7 Z L m39m4
g
1 ΓΠ|
I Z :
ni| m L
r 3 m2
3 m3
'iti4
z L
9m h
2
(f)
Π z -
iB
s C| C
2 2 Z
ι ^SUPER
«n%2 C | C g
2 g
*
INDUCTOR
~2Τ Χ
(g) (h)
Fig. 3 Controlled impedance elements. (a) Single-ended voltage variable resistor (VVR). (b) Floating VVR. (c) Scaled VVR. id) Voltage variable
impedance inverter, (e) Voltage variable floating impedance, (f) Impedance multiplier, (g) Super inductor, (h) FDNR.
(o) Vq 9mR
Fig. 4 are nonzero. Note, however, that no buffer is
Vj " s R C + I
needed for the cascade of any of the integrators of (b)
Fig. 4, since the input impedance to each circuit is
ideally infinite.
First-order filters can be readily built using OTAs. Vi
Considerable flexibility in controlling those specific V 0 Qm,
MARCH 1985 23
c 2
VjO-
»m 2
τ a Qm\ + s C 2
(h) V| 8 s(C +C )+g +g
| 2 m m 2
(i)
Fi'g. 5 First-order voltage-controlled filters, (a) Lowpass, fixed dc gain pole adjustable, (b) Lowpass fixed pole, adjustable dc gain, (c) Highpass, fixed high-
frequency gain, adjustable pole, (d) Shelving equalizer, fixed high-frequency gain, fixed pole, adjustable zero, (e) Shelving equalizer, fixed high-
frequency gain, fixed zero, adjustable pole, (f) Lowpass filter adjustable pole and zero, fixed ration, (g) Shelving equalizer, independently adjustable
pole and zero, (h) Lowpass or highpass filter, adjustable zero and pole, fixed ratio or independent adjustment, (i) Phase shifter, adjustable with g . m
Fig. 5a is given by the expression For monolithic applications, the resistor R can be re
placed with a third OTA, using the configuration of
hdB = Fig. 3a.
Both the pole and zero in this circuit are adjustable or on a straight line (constant bandwidth) parallel to
through the parameter g , but the ratio is held con
m
the imaginary axis in the s-plane. The challenges as
stant. This preserves the shape in the transfer charac sociated with constant-Q pole adjustment through
teristics and thus represents only a frequency shift in the simultaneous tuning of two or more components
the response, as shown in Fig. 6f. should be obvious.
The circuit of Fig. 5g utilizes an additional OTA and A seemingly more difficult situation exists when
offers considerable flexibility. If either g or g is ml m2
considering the design of the popular elliptic filters.
fixed, the circuit behaves much like the shelving To maintain the elliptic characteristics as the cutoff
equalizers discussed above. If g and g are ad ml m2
frequency is changed, all poles and all zeros of the
justed simultaneously, then a fixed pole-zero ratio approximating function must be moved simultane
and, hence, shape preserving response is possible. In ously and with the appropriate ratio in a constant- Q
this case, the circuit can be lowpass, allpass, or high- manner.
pass, depending upon the g : g ratio. If the " + " and
ml m2 A group of second-order voltage-controlled filter
" - " terminals of g are interchanged and the trans
ml structures are discussed in this section. Circuits with
conductance gains are adjusted so that g = g the ml m2f constant-Q pole adjustment, circuits with constant
circuit behaves as a phase equalizer. bandwidth ω adjustment, and circuits with indepen
0
The circuit of Fig. 5h also preserves the shape of the dent pole and zero adjustment are presented. Some
transfer function, provided g and g are adjusted ml m2
circuits with simultaneous constant-Q adjustment of
in such a manner that their ratio remains constant. In both the poles and zeros are also presented along
this case, the shape of the response is determined by with a general biquadratic structure. These structures
the gmi'.gmi d C :C ratio. Depending upon these
a R
X 2
have immediate applications in voltage-controlled
ratios, the response is either lowpass or highpass in Butterworth, Chebyschev, and Elliptic designs.
nature, as indicated in Fig. 6h. A simple second-order filter structure is shown in
If g R = 1, the circuit of Fig. 5i behaves as a phase
m2
Fig. 7a [17], [19]. This structure is canonical in the
MARCH 1985 25
Fig. 6 Transfer characteristics for first-order structures of Fig. 5. (a) Circuit of Fig. 5a. (b) Circuit of Fig. 5b. (c) Circuit of Fig. 5c. (d) Circuit of Fig. 5d.
(e) Circuit of Fig. 5e. (f) Circuit of Fig. 5f. (g) Circuit of Fig. 5g. (h) Circuit of Fig. 5h. (i) Circuit of Fig. 5i.
«Ό Q
Vi = VA
w Adjustable gmlgml
0
V and V
B c Grounded
Lowpass S C ! C + SCig
2 2 m2 + gmlgml y Q c 2
Vi = v B
w Adjustable
0 V and V
A G Grounded SCigml gm
Bandpass S CiC
2 2 + SCig m2 + gmlgml y c , c 2
c,
Vi = V c
w Adjustable
0
Highpass
V and Vß Grounded
A S CiC
2 2 gm IL
S C i C + SCig
2 2 m2 + gmlgml y c , c 2 c,
Vi = v = v
A c
Notch
S CiC
2 2 + SCxgml + gmlgml Ci
s^QQVc + sC V lgm2 B +
(4)
s ^ Q + sC^ m 2 + gg ml m2
justable circuits with fixed pole Q's. The pole Q's are
determined by the capacitor ratio, which can be accu
rately maintained in monolithic designs. It is interest
ing to note that the zeros of the notch circuit also
move in a constant-Q (i.e. along the jw axis) manner
with the poles, as g is adjusted. m
*>v r
_ sCCV
2 x 2 c + sC V lgm2 B +
(5)
8τη\8ηΰΥA
s C,C
2 2 + sC^g^R + g
and
_ sCCV
2 + sC g V
x 2 c x m2 B + gg Vml m2 A
(6)
s ^ Q + sg^C, +g
The circuits of Figs. 7b and 7c can be also used to
implement lowpass, bandpass, highpass, and notch
transfer functions through the proper selection of the
inputs as for the circuit of Fig. 7a.
In the circuit of Fig. 7b, the expressions for ω and 0
8m\8m2
(7)
QC 2
and
ι
(c)
Q = g R (8)
Sml m3 Vc l g
8ml8m2
(9)
QC 2
ι / Q \J gmlgm2
n =
(10)
yg u / cJ m3
MARCH 1985 27
ous circuits has been split to allow for adjusting the
pole-zero ratio. The transfer function of the circuit is
given by
Ci
c 2 +c 3
S + gml/ClCl
(14)
2
s + sg /(C
2 m2 2 + C ) + gmlgJC^C,
3 + C) 3
Fig. 8 Elliptic filter structure. signs, this may pose some problems in monolithic
structures. One convenient way to control the pole-
zero ratio is to insert the voltage-controlled amplifier
of Fig. 2g between the points χ and x' in Fig. 8 and
along vertical lines parallel to the jw axis in the use the transconductance gain of either of these addi
s-plane. tional OTAs as the control variable.
The circuit of Fig. 7d has an output given by The final second-order structure considered here is
the general biquad of Fig. 9. The output for this cir
VçC^s + Vßg^sC, +
2 gg V
ml m2 A
cuit is given by
s ^ Q + sC^ + g m 3
(11)
ml$m2
The ω and Q of the poles are, respectively, _ s C ! C y + sC g ±v
2 2 c x m B + g g v
m2 m5 A
0
(15)
Smlgml
$ml$m2
(12)
The potential for tuning the ω and Q for both the
Qc 2
poles and zeros (when V, = V = V = V ) to any A
0
B c
phase equalizer.
The circuit of Fig. 8 has both poles and zeros that
can be adjusted simultaneously in a constant-Q man
ner. The circuit is similar to those shown in Fig. 7a
with the exception that the capacitor C in the previ- 2
Fig. 9 General biquadratic structure.
<
6V-
I ABC.
i<4 lABCn
Rn Fig. Ï 4 Smg/e input-multiple output bias current generator for
monolithic applications.
(b)
1 1
l ÏABC ABC
'VRET
amplifier bias current is proportional to V for all c ferences in the voltage V of Fig. 11a for small values
d
schemes shown in Fig. 12. Since 7 can typically beABC of 7 . The circuit of Fig. 13b again has V referenced
ABC c
adjusted over several decades, all schemes will be to ground and is essentially independent of the match-
very sensitive to small changes in V toward the low c ing of V for the individual OTAs. The scheme of Fig.
d
MARCH 1985 31
[19] R. L. Geiger and J. Ferrell, "Voltage Controlled Filter Design
Using Operational Transconductance Amplifiers," Proc. IEEE/
ISCAS, pp. 5 9 4 - 5 9 7 , May 1983.
[20] A. R. Saha and R. Nandi, "Integrable Tunable Sinusoid Os
cillator Using DVCCS," Electron. Lett., vol. 19, pp. 7 4 5 - 7 4 6 ,
Sept. 1983.
[21] G. M. Wierzba and S. Esmelioglu, 'Techniques for Designing
Enhanced-Gain-Bandwidth-Product Circuits," Proc. 26th Mid
west Symp. on Circuits and Syst., pp. 6 0 2 - 6 0 6 . Aug. 1983.
[22] R. W. Newcomb and S. T. Liu, "A Voltage Tunable Active-R
Filter," Proc. IEEE/ISCAS, pp. 4 0 9 - 4 1 2 , May 1984.
[23] J. Hoyle and E. Sânchez-Sinencio, "Sinusoidal Quadrature
OTA Oscillators," Proc. 27th Midwest Symp. on Circuits and
Syst., June 1984.
Randall L. Geiger Edgar Sânchez-Sinencio
[24] H. S. Malvar, "Electronically Controlled Active Active-C Fil
ters and Equalizers with Operational Transconductance Am
plifiers," IEEE Trans. Circuits Syst., vol. CAS-31, pp. 6 4 5 - 6 4 9 , Randall L. Geiger was born in Lexington, Nebraska, on May 17,
July 1984. 1949. He received the B.S. degree in electrical engineering and the
[25] F. Krummenacher, "High-Voltage Gain CMOS OTA for Micro- M.S. degree in mathematics from the University of Nebraska, Lin
power SC Filters," Electron. Lett., vol. 17, pp. 1 6 0 - 1 6 2 , Feb. coln, in 1972 and 1973, respectively. He received the Ph.D. degree
1981. in electrical engineering from Colorado State University, Fort Col
[26] M. G. Degrauwe, J. Rijmenants, E. A. Vittoz, and J. deMan, lins, in 1977.
"Adaptive Biasing CMOS Amplifiers," IEEE J. Solid-State Cir In 1977, Dr. Geiger joined the Faculty of the Department of Elec
cuits, vol. SC-17, pp. 5 2 2 - 5 2 8 , June 1982. trical Engineering at Texas A&M University, College Station, and
[27] K. D. Peterson and R. L. Geiger, "CMOS OTA Structures with currently holds the rank of Associate Professor. His present re
Improved Linearity," Proc. 27th Midwest Symp. on Circuits and search is in the areas of integrated circuit design and active circuits.
Syst., June 1984. He received the Meril B. Reed Best Paper Award at the 1982 Mid
[28] A. Nedungadi and T. R. Viswanathan, "Design of Linear west Symposium on Circuits and Systems, served as Conference
CMOS Transconductance Elements," IEEE Trans, on Circuits Chairman at the 1983 UGIM conference, and is currently serving as
and Syst., vol. CAS-31, pp. 8 9 1 - 8 9 4 , Oct. 1984. an Associate Editor for the IEEE Transactions for Circuits and Systems.
Dr. Geiger is a member of Eta Kappa Nu, Sigma Xi, Pi Mu Ep
[29] K. S. Tan and P. R. Gray, "Fully Integrated Analog Filters Using
silon, and Sigma Tau; he is also a Senior Member of the IEEE.
Bipolar-JFET Technology," IEEE J. Solid-State Circuits, vol.
SC-12, pp. 8 1 4 - 8 2 1 , Dec. 1978.
[30] A. P. Nedungadi and P. E. Allen, "A CMOS Integrator for
Edgar Sânchez-Sinencio was born in Mexico City, Mexico, on
Continuous-Time Monolithic Filters," Proc. IEEE/ISCAS, vol.
October 27, 1944. He received the degree in communications and
2, pp. 9 3 2 - 9 3 5 , May 1984.
electronic engineering (professional degree) from the National
[31] G. Tröster and W. Langheinrich, "Monolithic Continuous-
Polytechnic Institute of Mexico, Mexico City; the M.S.E.E. degree
Time Analogue Filters in NMOS Technology," Proc. IEEE/
from Stanford University, California; and the Ph.D. degree from
ISCAS, vol. 2, pp. 9 2 4 - 9 2 7 , May 1984.
the University of Illinois at Champaign-Urbana, in 1966, 1970, and
[32] H. Khorramabadi and P. R. Gray "High-Frequency CMOS
1973, respectively.
Continuous-Time Filters," Proc. IEEE/ISCAS, vol. 3, pp. 1 4 9 8 -
During his graduate studies, he was awarded with fellowships
1501, May 1984.
from the United Nations Educational, Scientific, and Cultural Or
[33] K. Fukahori, "A Bipolar Voltage-Controlled Turnable Filter,"
ganization; the Mexican Atomic Energy Commission; and the Con-
IEEE ] . Solid-State Circuits, vol. SC-16, pp. 7 2 9 - 7 3 7 , Dec. 1981.
sejo Nacional de Ciencia y Tecnologia of Mexico. From January
[34] K. W. Moulding, "Fully Integrated Selectivity at High Fre 1965 to March 1967, he worked with the Mexican Atomic Energy
quency Using Gyrators," IEEE Trans. Broadcast. Telev. Reg., vol. Commission, as a Design Engineer. In April 1967, he joined the
BTR-19, pp. 1 7 6 - 1 7 9 , Aug. 1973. Petroleum Institute of Mexico, where he was associated with
[35] H. O. Voorman and A. Biesheuvel, "An Electronic Gyrator," the design of instrumentation equipment until August 1967. He
IEEE ] . Solid-State Circuits, vol. SC-7 pp. 4 6 9 - 4 7 4 , Dec. 1972. worked as a Research Assistant at the Coordinated Science Labora
[36] K. W. Moulding and P. J. Ranking, "Experience with High- tory at the University of Illinois from September 1971 to August
Frequency Gyrator Filters Including a New Video Delay-Line 1973.
IC," Proc. 6th European Conf. on Circuit Theory and Design, In 1974, Dr. Sânchez-Sinencio held an industrial post-doctoral
pp. 9 5 - 9 8 , Sept. 1983. position with the Central Research Laboratories, Nippon Electric
[37] J. O. Voorman, W. H. A. Bruls, and J. P. Barth, "Bipolar Integra Company, Ltd., Kawasaki, Japan. From 1976 to 1983, he was the
tion of Analog Gyrator and Laguerre Type Filters (Transcon- Head of the Department of Electronics at the Instituto Nacional
ductance-Capacitor Filters)," Proc. 6th European Conf. on Cir de Astrofisica, Optica y Electronica (INAOE), Puebla, Mexico.
cuit Theory and Design, pp. 1 0 8 - 1 1 3 , Sept. 1983. Dr. Sânchez-Sinencio was a Visiting Professor in the Department of
[38] J. O. Voorman, W. H. A. Brüls, and P. J. Barth, "Integration of Electrical Engineering at Texas A&M University during the aca
Analog Filters in a Bipolar Process," IEEE ] . of Solid-State Cir demic years of 1 9 7 9 - 1 9 8 0 and 1 9 8 3 - 1 9 8 4 , where he is currently a
cuits, vol. SC-17, pp. 7 1 3 - 7 2 2 , Aug. 1982. Professor. He was the General Chairman of the 1983 26th Midwest
[39] K. W. Moulding, J. R. Quarterly, P. J. Rankin, R. S. Thompson, Symposium on Circuits and Systems. He is the coauthor of the
and G. A. Wilson, "Gyrator Video Filter IC with Automatic book Switched-Capacitor Circuits (Van Nostrand-Reinhold, 1984). Dr.
Tuning," IEEE J. of Solid-State Circuits, vol. SC-15, pp. 9 6 3 - 9 6 8 , Sânchez-Sinencio's present interests are in the areas of active filter
Dec. 1980. design, solid-state circuits, and computer-aided circuit design. He
[40] V. W. Burgger, B. J. Hosticka, and G. S. Moschytz, "A Com is a Senior Member of the IEEE.
parison of Semiconductor Controlled Sources for the Design
of Active RC Impedances," Int. ] . of Circuit Theory and Appl.,
vol. 10, pp. 2 7 - 4 2 , 1982.