Mosfet I-V Characteristic Curve Laboratory

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Laboratory Report

Activity No. 1

MOSFET I-V Characteristic Curves and


SPICE Extraction of Small-Signal Model
Parameters

In partial fulfilment for the course


ECE 126 (Introduction to Analog IC Design

Submitted by
ECCLESIASTES G. MONTAOS, JR.

Submitted to
PROF. ALLENN C. LOWATON

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Introduction

MOSFET is a voltage controlled field effect transistor. It has a “Metal Oxide” Gate
electrode which is electrically insulated from the main semiconductor n-channel or p-
channel by a very thin layer of insulating material usually silicon dioxide, commonly
known as glass. It is the most common and the most efficient transistor used in integrated
circuits in this generation. It is a four-junction device that has many applications such as
amplification and switching of electronic signals, and equivalent components in
microelectronics - resistor, capacitor, current source, etc. It can be classified as NMOS
(N-channel MOSFET) and PMOS (P-channel MOSFET).
MOS I-V Characteristic is about the analysis of generation and transport of charges
as a function of terminal voltages. In line with this, the I-V curves can obtain relevant
parameters such as threshold voltage, overdrive voltage, and drain-to-source current, and
depict the regions of operation for MOS.

Objective

The objective of this laboratory activity is to understand the operation of MOSFETs


through I-V curves with the aid of HSPICE. While at it, this activity also aims to practice
designers on what parameters should be altered to come up with a specific output (drain-
source current).

Procedure

Step 1
Connect the NMOS and PMOS as shown below. Simulate the Ids-Vgs characteristic curve.

(NMOS) (PMOS)
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NMOS:

VTH

PMOS:

VTH

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In NMOS, when the gate-source voltage is below the threshold voltage (VTH = 431mV), the
drain-source current is zero. This means that the NMOS only conducts when Vgs > VTH.

In PMOS, the drain-source current is not zero when |Vgs| > |VTH = -437mV|. It means that
the PMOS only conducts when |Vgs| > |VTH|.

Step 2
Disconnect the gate and drain of MOS then assign different values of V gs to its gate
terminal. Simulate the Ids-Vds characteristic curve.

NMOS:

Vgs=2V

Vgs=1.3V

Vgs=0.8V

Vgs=0V

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PMOS:

Vgs=0V

Vgs=-0.8V

Vgs=-1.3V

Vgs=-2V

In varying both Vgs of NMOS and PMOS, it is observed that the drain-source current is
also varying. This means that the value of Ids can be controlled by applying a voltage drop
from gate to source.

This step also shows that when Vgs is zero (or less than the threshold voltage), Ids is not
exactly zero. There is still a current that flows from the drain to the source but it is too
small (in this activity, 10-15) that it can be assumed to be zero.

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Step 3
Follow Step 2, change the channel length. Simulate the Ids-Vds characteristic curve.

NMOS:
Length = 4.25 um = 4.5 um = 6 um = 8 um

L=4.25um
L=4.5um

L=6um

L=8um

In NMOS, as the length increases, the drain-source current decreases. This means that
the channel length is inversely proportional to the drain-source current. Based on the
results of the simulation, it can also be seen that the length of the channel slightly affects
the threshold voltage.

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PMOS:
Length = 2.25 um = 2.5 um = 4 um = 6 um

L=6um

L=4um

L=2.5um
L=2.25um

As with the NMOS, in PMOS, when the channel length increases, the drain-source also
decreases. It has the same property with the NMOS. The change of its channel length also
slightly affects the threshold voltage.

In adjusting the drain-source current of the MOS, the length of the channel can be used
to alter it.

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Step 4
Set |Vgs| to a value smaller than |VTH| to operate the MOS in subthreshold region.
Simulate the Ids-Vgs characteristic curve.

NMOS:

The Vgs is set to a value less than the threshold voltage. In the characteristic curve of step
1, it was seen that while |Vgs|is less than |VTH|, the value of the drain-source current zero.
According to the characteristic curve of this step, the value of Ids is not actually zero but
still very small (10-12).

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PMOS:

Same as with the NMOS, when |Vgs| < |VTH| the value of Ids gets very small.

The varying curves in the graphs of this step is because of the alteration of V DD in the
simulation.

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CODES

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Questions

1. If we increase W/L of the device in Step 1, what changes will occur to its
corresponding curve?

The curve increases its slope. There will be a slight increase in the Vth but the
noticeable increase is in the Ids as W/L is increased.

2. When the dimensions Wn / Ln equal Wp / Lp, does |Idsp| / Idsn equal µp / µn?

According to the formula for Ids, with slight manipulation for both NMOS and
PMOS, yes.

3. What is the relationship between the channel length and the slope of the curve in
Step 3?

The channel length is inversely proportional to the slope of the resulting curve.
This means that as the length is increased, there is a visible decrease in the curve’s
slope, which also results to a decreased value of Ids.

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4. When the MOSFET operates in subthreshold region, what is the relationship
between Vgs and the slope of the curves in Step 4? What device, either PMOS or
NMOS, has the larger slope? Why?

By testing, that is by altering the values of Vgs in the subthreshold region, there
is no changes in the way the curve looked. This can be explained by the fact that
in the curve in Step 4, Vgs is the independent variable of Ids. This means that no
changes in Vgs will affect how the Ids curve will look, Vgs will just generate a
value of Ids that will follow the given curve. Therefore, there is no relationship
between Vgs and the slope of the curve in Step 4.

On the other hand, NMOS has a larger slope compared to PMOS because NMOS
has higher electron mobility than PMOS which has a lower hole mobility and
transconductance.

Conclusion

This activity showcased the basic operations of MOSFETs through I-V curves. I
have learned that by adjusting the effective channel dimensions of MOSFETs along with
the supply to drive the device, one can adjust it drain-source current output. Aside from
internal changes on the device, one can also control the value of drain-source current by
applying a voltage drop from the device gate to source.
Confirmed by the result of this activity also is the fact that even if the gate-source
voltage is set in the subthreshold region, the drain-source current is not actually zero but
of a relatively small amount.

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