Csc1202 Assignmet - Solution

__________________________________________________________________________
SCHOOL OF SCIENCE AND TECHNOLOGY
COURSEWORK FOR THE BSC (HONS) COMPUTER SCIENCE; YEAR 1

COURSEWORK FOR THE BSC (HONS) INFORMATION TECHNOLOGY; YEAR 1
COURSEWORK FOR THE BSC (HONS) SOFTWARE ENGINEERING; YEAR 1
COURSEWORK FOR THE BSC (HONS) INFORMATION SYSTEMS; YEAR 2
ACADEMIC SESSION MARCH 2019
CSC1202 / CSC2064: COMPUTER ORGANISATION
DEADLINE: 22 MAY 2019 (WEDNESDAY), 5:00 PM
STUDENT NAME/ID: Shehab Mohamed Beram 17078767
STUDENT NAME/ID: Ho Bok Er Fredi 18003376
STUDENT NAME/ID: Sakib Md Farhan Islam 17074162
STUDENT NAME/ID: Amir Mahdi Moghtaderi Esfahani 14078968
INSTRUCTIONS TO CANDIDATES
 This assignment will contribute 25% to your final grade.

 This is a group (up to 4 people) assignment.
IMPORTANT
The University requires students to adhere to submission deadlines for any form of
assessment. Penalties are applied in relation to unauthorized late submission of work.
- Coursework submitted after the deadline but within 1 week will be accepted for a
maximum mark of 40%.
- Work handed in following the extension of 1 week after the original deadline will be
regarded as a non-submission and marked zero.
Lecturer’s Remark (Use additional sheet if required)
We.................................... (Name) ............................. received the assignment and read the

comments....................................................................................................... (Signature/date)
Academic Honesty Acknowledgement
“We Sakib, Amir, HO and Shehab verify that this paper contains entirely our own work. We
have not consulted with any outside person or materials other than what was specified (an
interviewee, for example) in the assignment or the syllabus requirements. Further, we have
not copied or inadvertently copied ideas, sentences, or paragraphs from another student. We
realize the penalties (refer to the student handbook) for any kind of copying or collaboration
on any assignment.”
1) Explain the difference between a half-adder and a full-adder.
Ans:
Half Adder
There are two inputs and two outputs in a Half Adder. Inputs are named as A and B, and the outputs
are named as Sum (S) and Carry (C). The Sum is X-OR of the input A and B. Carry is AND of the input
A and B. With the help of half adder, one can design a circuit that is capable of performing simple
addition with the help of logic gates. Let us first take a look at the addition of single bits.
0+0=0
0+1=1
1+0=1
1 + 1 = 10
These are the least possible single bit combinations. But the result for 1 + 1 =10. This problem can be
solved with the help of an EX – OR gate. The sum results can be re-written as a 2-bit output. Thus the
above combination can be written as
0 + 0 = 00
0 + 1 = 01
1 + 0 = 01
1 + 1 = 10
Here the output “1” of “10” becomes the carry-out. Sum is the normal output and the CARRY is the
carry-out. The truth table of the half adder is shown below.
Full Adder
The full adder is a little more difficult to implement than a half adder. The main difference between
a half adder and a full adder is that the full adder has three inputs and two outputs. The two inputs
are A and B, and the third input is a carry input CIN. The output carry is designated as COUT, and the
normal output is designated as S. The truth table of the Full Adder Circuit is shown below.
2) Design a 5-bit adder that is able to:
a) perform addition and subtraction.
b) handle two 5-bit positive or negative binary numbers.
c) detect zero and overflow (set the respective flag to ‘1’).
You must show or discuss the following in your answer:
a) the number of registers and how they are connected to the adder.
b) the simplified logic circuit of the adder (including the registers).
c) how does the adder work.
d) strengths and weaknesses of your adder design.
Note: There are several ways to design an added. You are free to decide which way to use. You must
show all the steps involved in designing the adder (for example, obtaining the Boolean expression,
simplifying the Boolean expression, etc.).
Ans: You can understand it easy by following block diagram
Block Diagram:
Circuit Diagram:
Truth table for half adder:

Truth table for full adder:
Software implementation using “Virtual Digital Simulator”:
Inputs are "10110" and "11011"

Output (sum) is "110001"
Cout is "1"
c0, c1, c2, c3 are 0,1,1,1 relatively
ICs used in the project:
OR GATE IC: 74LS32

AND GATE IC: 74LS08
XOR GATE IC: 74LS86
Let's use half-adders & full-adders to add 2 binary numbers, 11101 + 10101.
To add these numbers:

- start at the rightmost bit, add the 2 bits
- put the sum below, and the carry-on top of the next column
Then, until done...

- add 3 bits (include the previous carry)
- put the sum below, and the carry-on top of the next column
We will need one half-adder, to get the rightmost bits. Then, we'll need 4 full adders for each pair of
bits to the left (remember: we need to add the pair of bits to the previous carry bit).
3) Discuss whether the 5-bit adder from (2) can be used to perform addition or subtraction on the
following two’s complement binary numbers.
If yes, calculate the answer and convert the answer to decimal. Also, determine the flags (zero or
overflow) that would be raised. You must show all the steps when calculating the answer.
If no, explain why it is not possible, and explain what are the changes or components that you need
to add to make it work.
a) 010 10 + 011 01
b) 101 00 + 111 11
c) 111 10 – 101 11
d) 100 01 – 011 11
e) 110 101 + 010 110
Ans: Yes, the above circuit can add and subtract the above mentioned. We will need one half-adder,
to get the rightmost bits. Then, we'll need 4 full adders for each pair of bits to the left (remember:
we need to add the pair of bits to the previous carry bit).
a)
010 10
+ 011 01
________
101 11
b)
101 00
+ 111 11
________
1)100 11
We will ignore the left most bit because it is an overflow or extra bit.
c)
111 10
– 101 11
________
001 11
d)
100 01
– 011 11
________
100 10
e)
110 101
+ 010 110
________
1)001 011
We will ignore the left most bit because it is an overflow or extra bit.

Csc1202 Assignmet - Solution

Uploaded by

Copyright:

Available Formats

Csc1202 Assignmet - Solution

Uploaded by

Document Information

Original Description:

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Csc1202 Assignmet - Solution

Uploaded by

Copyright:

Available Formats

__________________________________________________________________________

SCHOOL OF SCIENCE AND TECHNOLOGY

COURSEWORK FOR THE BSC (HONS) COMPUTER SCIENCE; YEAR 1

ACADEMIC SESSION MARCH 2019

CSC1202 / CSC2064: COMPUTER ORGANISATION

DEADLINE: 22 MAY 2019 (WEDNESDAY), 5:00 PM

STUDENT NAME/ID: Shehab Mohamed Beram 17078767

STUDENT NAME/ID: Ho Bok Er Fredi 18003376

STUDENT NAME/ID: Sakib Md Farhan Islam 17074162

STUDENT NAME/ID: Amir Mahdi Moghtaderi Esfahani 14078968

 This assignment will contribute 25% to your final grade.

We.................................... (Name) ............................. received the assignment and read the

Academic Honesty Acknowledgement

Ans: You can understand it easy by following block diagram

Truth table for half adder:

Inputs are "10110" and "11011"

ICs used in the project:

OR GATE IC: 74LS32

To add these numbers:

Then, until done...

You might also like