Module-1 The 80x86 Microprocessor Chapter-1

Microprocessor (µp): is a programmable electronic device that controls the interpretation and execution of the
instructions.
Micro refers to small size and the processor refers to the device that performs computational and control
operation.
The world 1stµp is the Intel 4004, introduced in 1971.Major µp manufacturers are Intel, Zilog (Z8000) and
Motorola (MC 6800).

[Note:CPU [ALU]: basic unit of computer invented in 1944 by Eckert and John William.Purpose of CPU:
improve or replace the calculator and simulate the human brain.Principle: Von Neumann stored program
concept.]

Brief History of the 80x86 families:

Evolution from 8080/8085 to 8086:
 In 1978 Intel Corporation introduced a 16 bit µp called the 8086. This processor was major
improvement over previous generation 8080/8085 series Intel microprocessor in several ways.
► 8086 having a memory capacity of 1MB whereas 8080/8085 having maximum of 64KB of
memory
► 8080/8085 was an 8-bitsystem meaning that the microprocessor could work on only 8-bits of
data at a time.Data larger than 8-bits had to be broken into 8-bit pieces to be processed by
CPU.The 8086 is a 16-bit microprocessor.
► The 8086 was a pipelined processor, whereas 8080/8085 non-pipelined. Pipelined architecture
increases the processing speed of the microprocessor.
Evolution from 8086 to 8088:
 When 8086 was introduced, at that all peripherals were designed are 8-bit.In addition, aprinted circuit
board with a 16 bit data bus much more expensive.
 Therefore Intel came-out with 8088 version.
 It is identical to the 8086 as programming is concerned, it has an 8 bit data bus instead of 16 bit bus, and
it has a same memory capacity of 1MB.

Success of the 8088

 In 1981 Intel has chance to change forever, when IBM picked up the 8088 as their microprocessor in
designing the IBM PC
 The 8088-based IBM PC was a great success,because IBM & Microsoft made it an open system.
 open system means Documentation and specifications of the hardwareand software of the PC were made
public
 Making it possible for many vendors to clone(copy of something) the hardwareand software
successfully.

Other microprocessor 80286, 80386 and 80486

 Major victory and need from PC users for more powerful microprocessor,Intel introduced the 80286 in
1982.
 The evolution of microprocessors is increasingly influenced by the evolution of the Internet.
 It consists of 16-bit internal & external data buses. 24 address lines, 16MB of memory. (224=16MB)
 80286 can operate in one of two modes:real mode and protected mode - which allows for 16M of
memory.

Sandeep.K.H Page 1
[NOTE:
 Real mode operation allows the microprocessor to address only the first 1M byte of memory
space.Only the 8086 and 8088 operate in the real mode.
 The DOS requires that the microprocessor should operate in the real mode.
 Protected mode memory addressing allows access to the data and programs located above the
first 1M byte of memory, as well as within the first 1M byte of memory.
 The 80286 and above operate in either the real or protected mode.Protected mode is where
Windows operates. ]

♦ In 1985 Intel introduced 80386

♦ It consists of 32-bit bit internal & external data buses, with a 32-bit address bus.
♦ Capable of handling memory of up to 4 gigabytes. (232)
♦ All the microprocessor discussed so far were general-purpose processors could not handlemathematical
calculations rapidly

 Intel introducednumeric data processing chips called Math coprocessors, such as 8087, 80287, 80387.
 In 1989 Intel introduced 80486
 In 80486, Intel put a greatly enhanced80386 & math coprocessor on a single chip, plus additional
features such as cache memory.
o [Note: Cache memory is static RAM with a very fast access time.]
 All programs written for the 8088/86 will run on286, 386, and 486 computers.

Pentium and Pentium pro:

 In 1993, Intel released the Pentium. It was given the name Pentium instead of 80586 because names can
be copyrighted, but numbers cannot.
 Ithad speeds of 60 & 66 MHz, consists of 3 million transistors on thePentium chip.
 Pentium hasspeed twice that of 80486and 300 times faster than that of the original 8088.
 Pentium is fully compatible with previous x86processors but includes several new features like separate
8KB of cache memory for code and data.
 The Pentium is a 273-pin PGA (pin grid array) chip
 It consists of 64-bit data bus, & 32-bit address bus.
 Capable of addressing 4GB of memory.

 In 1995 Intel Pentium Pro was released—the sixthgeneration x86.

 It consists of 5.5 million transistors.
 Designed primarily for 32-bit servers & workstations.

Pentium II:
 In 1997 Intel introduced the Pentium II processor with 7.5-million-transistor,havingMMX(Multi-Media
Extension) technology for fast graphics and audio processing.
 In 1998 the Pentium II Xeon was released.
 Primary market is for servers and workstations.
 In 1999, Pentium Celeron was released.
 Its Lower cost & good performance make it ideal for PC’sused to meet educational and home business
needs.

Pentium III:
 In 1999 Intel released Pentium III.
 9.5-million-transistor processor.
 70 new instructions called SIMD.
 Mainly used for 3-D imaging, andstreaming audio.

Sandeep.K.H Page 2
 Pentium 4:
 In 2000 Intel released Pentium 4.
 Speeds of 1.4 to 1.5 GHz.
 Completely new 32-bit architecture, called Net-Burst.
 Designed for heavy multimedia processing, Video, music, and graphic file manipulation on the Internet.
 New cache & pipelining technology & expansion ofthe multimedia instruction set make the Pentium-4
a high-endmedia processing microprocessor.

Pentium Itanium:
 Intel has selected Itanium as the new brand namefor the first product in its 64-bit family of processors.
 Formerly called Merced.
 Pentium Itaniumarchitecture is designed to meet needs ofpowerful servers & high-performance
workstations.
 Itanium will have the ability to execute many instructionssimultaneously, plus extremely large memory
capabilities.

Differences between 8008, 8085, 8086, 8088, 80286, 80386, 80486

S.N Product 8008 8080 8085 8086 8088 80286 80386 80486
1 Introduced year 1972 1974 1976 1978 1979 1982 1985 1989
2 Technology PMOS NMOS NMOS NMOS NMOS NMOS CMOS CMOS
3 NO’S of Transistors 3000 4500 6500 29000 29000 134000 275000 1.2million
4 Number of pins 18 40 40 40 40 68 132 168
5 Physical memory 16KB 64KB 64KB 1MB 1MB 16MB 4GB 4GB
6 Data bus 8 8 8 16 8 16 32 32
7 Address bus 8 16 16 20 20 24 32 32

Differences between Pentium, Pentium pro, Pentium-II, Pentium-III, Pentium-IV, Pentium Itanium
S.N Product Pentium Pentium pro Pentium-II Pentium-III Pentium-IV Pentium Itanium
1 Introduced 1993 1995 1997 1999 2000 2002
year
2 Technology BICMOS BICMOS BICMOS BICMOS BICMOS BICMOS
3 Numbers 3.1million 5.5million 7.5million 9.5million 42million 220 million
ofTransistors
4 Physical 4GB 64GB 64GB 64GB 64GB 64GB
memory
5 Data bus 64 64 64 64 64 64
6 Address bus 32 36 36 36 36 64

Note:
 Bus is a group wires or lines which carry data, address and control signals.
 Address Bus: used to specify the physical address of the memory or I/O device, it is unidirectional.
[The 16-bit address bus means it can address or 65535 different memory locations].
 Data Bus: used to transfer the data within the microprocessor and memory or I/O device, it is
bidirectional-because microprocessor requires sending and receiving data.
 Control Bus: used to process the data that is what to do with selected memory location.
 In the most computer system there are four control bus connections. (Memory write control),
(memory read control), (I/O write control), (I/O read control).

Sandeep.K.H Page 3
Inside the 8086/88:

There are two ways to make the CPU process information faster:
 Increase the working frequency by using technology available, with cost considerations.
 Change the internal architecture of the CPU
The architecture of 8086 is functionally divided into two units they are Bus Interface Unit (BIU) and Execution
Unit (EU).
The BIU accesses memory and peripherals, while the EU executes instructions previously fetched.
The functional parts of the BIU are
1. Instruction queue (IQ)
2. Instruction pointer (IP)
3. Segment registers
 Instruction queue (IQ): is used to speed up the execution of programs, by pre-fetching six
instructionbytes in advance from the memory. The queue is 4 bytes long in 8088 and 6 bytes in 8086.
 Instruction pointer (IP): It always holds the address of memory location (offset) of the next instruction
to be executed. As the instruction is executed, the IP is advanced to point to the next instruction in the
memory.
 Segment Register: BIU contains four 16-bit segment register they are :
Code Segment register [points to the codememory]
Data Segment register [points to the data memory]
Stack Segment register [points to the Stack memory]
Extra Segment register [points to the data memory]
Execution Unit (EU):
♦ The phases of execution of the instruction are fetching, decode, and execute.
♦ The functional parts of the EU are
General purpose Registers
Arithmetic and Logic Unit (ALU)
Flag Registers
Pointers and Index Registers
Sandeep.K.H Page 4
 ♦ ALU:It performs 8bit or 16 bit mathematical operations such as Addition, Subtraction, Multiplication,
Division,data conversion and logical operations like AND,OR and NOT.It also performs register
increment,decrement and shift operation.
Multi/General purpose registers:
 AX 16-bit register (accumulator) as either of two 8-bit registers (AH and AL).The AX register is used in
data movement,arithmetic and logical operations. AX is divided into two parts (AH-higher 8 bits of AX
and AL-lower 8 bits of AX).
 The bits of a register are numbered in descending order, as shown:

 BX (base register).It is used as a pointer to memory location. [Holds offset address of the memory
location using which we can access the data segment memory]
 CX (Count). The loop and repeat instruction of 8086 uses the CX register to hold repeat count
value.The value stored in this register is used to control the number of times a loop has to be executed.
 DX (data), DH, or DL.DX is used to hold the I/O address during some I/O operation.
 BP(base pointer)points to a memory location for memory data transfers.
 DI(destination index) and SI (source index):.DI and SI is also used in string handling operations.

Special-Purpose Registers:
SP(stack pointer) addresses an area of memory called the stack.

Pipelining:
Intel implemented pipelining in 8088/86 by splitting the internal structure into two sections:
 The execution unit (EU) and the bus interface unit (BIU).
 These two sections work simultaneously.
 The BIU fetches the instruction bytes while the EU is executing an instruction. Fetching the next
instruction while the current instruction executes, is called pipelining.
 8088/86 pipelining has two stages, fetch &execute.
 In more powerful computers, it can have many stages.
 8085 could fetch or execute at any given time.
 The idea of pipelining in its simplest form is to allow the CPU to fetch and execute at the same time.

Sandeep.K.H Page 5
INTRODUCTION TO ASSEMBLY PROGRAMMING
 The CPU can work only in binary, at very high speeds.
 It is tedious & slow for humans to deal with 0s & 1s inorder to program the computer.
 A program that consists of 0s & 1s is called machine language.
 Early programmers actually coded the programsin machine language.
 Assembly languages were developed,which provided mnemonics for machine code.
 Mnemonic refer to codes & abbreviationsthat are relatively easy to remember.
 Assembly language is referred to as a low-levellanguage because it deals directly with the
internalstructure of the CPU.
 Assembly language programs must be translated intomachine code by a program called an assembler.
 To program in Assembly language, programmersmust know the number of registers and their size as
well as other details of the CPU.
 There are numerous assemblers available fortranslating x86 Assembly language programsinto machine
code.
 One of the most commonly used assembler’s isMASM by Microsoft, TASM by Turbo.
 Today there are many different programminglanguages, such as C/C++, C#, etc.called high-level
languages
 Programmerdoes not have to be concerned with internal CPU details.
 High-level languages are translated into machinecode by a program called a compiler.

Assembly language programming:

 An Assembly language program consists of a series of lines of Assembly language instructions.
 An Assembly language instruction consists of a mnemonic (opcode), optionally followed by one or two
operands.
 Operands are the data items being manipulated and Mnemonics are commands to the CPU, telling it
what to do with those items.
 Two widely used instructions are move &add.

MOV instruction:
 The MOV instruction copies data from one location to another, using below format:

The MOV instruction showing the source, destination, and direction of data flow.

Sandeep.K.H Page 6
  This instruction tells the CPU to move (in reality, copy) the source operand to the destination operand.
 The source is at the right and the destination is at the left, next to the opcode MOV.
 An Opcode, or operation code, tells the microprocessor which operation to perform, the source and
destination are often called operands.
 Comma always separates the destination from the source in an instruction.
 MOV AX, BX instruction transfers the contents of the source register (BX) into the destination register
(AX).
 After this instruction is executed, register AX will have the same value as register BX.
 The source never changes, but the destination always changes.
Example:
MOV AH, AL ; move or copies the contents of AL to AH.
MOV AX, 45H ; move or copies immediate value 45H to AX
MOV BL, AX ; not allowed (mixed size: cannot move 16-bit register into an 8-bit register)
MOV DS, CS ; not allowed (segment to segment)
MOV DS, 35H ; not allowed (values cannot be loaded into any segment register)
 To move information to the segment registers, the data must first be moved to a general-purpose
register, then to the segment register.
Note: 8bit data ranges from 00H to FFH (255 Decimal) and 16-bit data ranges from 0000H to FFFFH

ADD instruction:
 The ADD instruction has the following format:
ADD destination, source
 ADD tells the CPU to add the source & destinationoperands and put the result in the destination.
 To add two numbers such as 25H and 34H, each canbe moved to a register, then added together:

 Executing the program above results in:AL = 59H (25H + 34H = 59H) and BL = 34H.
 The contents of BL do not change.
 Is it necessary to move both data items intoregisters before adding them together?No, it is not necessary.

 The general-purpose registers are typically used inarithmetic operations

INTRODUCTION TO PROGRAM SEGMENTS

 A typical Assembly language program consists ofat least three segments:
 Data segment - used to store information (data) to be processed by the instructions in the code segment.
 Code segment - which contains the Assembly language instructions that perform the tasks that
theprogram was designed to accomplish.
 Stack segment - used by the CPU to store information temporarily.
 A segment is an area of memory that includes upto 64K bytes
 8085 having a maximum of 64KB of physical memory, since it had only 16 pins for address lines. (216 =
64K)
 In 8085 there was 64KB of memory for all code, data, and stack information.
 This Limitation was carried into 8088/86 design for compatibility.
 In 8088/86 there can be up to 64K bytes in each category.
 8088/86 can only handle maximum of 64KB of code, 64KB of data and 64KB of stack at any given time
although it has 1MB of memory.

Sandeep.K.H Page 7
Code segment:
 In Intel 8086there are three types of addresses:
The physical address – is a 20-bit address.
An actual physical location in RAM or ROM within the 1MB
This address can have a range of 00000H to FFFFFH.
The offset address - a location in a 64KB segment range,
This can range from 0000H to FFFFH
The logical address - which consists of a segment value and an offset address.

 To execute a program, 8086 fetches the instructions from the code segment.
 The logical address of an instruction always consists of aCS (code segment) and an IP (instruction
pointer), shown in CS:IP format.
 IP contains the offset address.
 The physical address for the location of the instructionis generated by shifting the CS left one hex digit,
thenadding it to the IP.
 Assume CS=2500H& IP = 95F3H
 The offset address contained in IP, is 95F3H.
 The logical address is CS:IP, or 2500:95F3H.
 The physical address will be 25000 + 95F3 = 2E5F3H
 How to Calculate the physical address is shown below:

 The microprocessor will retrieve the instruction from memory locations starting at 2E5F3.
 Since IP can have a minimum value of 0000H and amaximum of FFFFH, the logical address range in
thisexample is 2500:0000 to 2500:FFFF.
 This means that the lowest memory location of the codesegment above will be 25000H (25000 + 0000)
and thehighest memory location will be 34FFFH (25000 + FFFF).

Sandeep.K.H Page 8
DATA SEGMENT:
 Assume a program to add 5 bytes of data, such as 25H, 12H, 15H, 1FH, and 2BH, one way to add them
is as follows:

 In the program above, the data & code are mixed together in the instructions.
 If the data changes, the code must be searched for every place it is included and the data retyped.
 To overcome this in x86 microprocessors, the area of memory setaside for data is called the data
segment.
 The data segment uses register DS and an offset value.
 8088/86 allows only the use of registers BX, SI,and DI as offset registers for the data segment
 The next program demonstrates how data canbe stored in the data segment and the programrewritten so
that it can be used for any set of data.
 Assume data segment offset begins at 200H. The data is placed in memory locations:

 The program can be rewritten as follows:

 The offset address is enclosed in brackets, whichindicate that the operand represents the addressof the
data and not the data itself.

 If the brackets were not included, as in "MOV AL,0200", the CPU would attempt to move 200 into AL
instead of the contents of offset address 200.
 This program will run with any set of data.
 Changing the data has no effect on the code.
 If the data had to be stored at a different offsetaddress the program would have to be rewritten
 A way to solve this problem is to use a register to holdthe offset address, and before each ADD,
increment theregister to access the next byte.

Sandeep.K.H Page 9
  The INC(increments) instruction adds 1 to its operand.
 "INC BX" achieves the same result as "ADD BX,1
 The physical address for data is calculated usingthe same rules as for the code segment.
 The physical address of data is calculated by shifting DSleft one hex digit and adding the offset value, as
shown

LITTLE ENDIAN V/S BIG ENDIAN:

 Previous examples used 8-bit or 1-byte data.What happens when 16-bit data is used?

 From a Gulliver’s travels story about how an egg shouldbe opened—from the little end, or the big end.
 In the big endian method, the high byte goes to thelow addressand the low byte to the high address.
 In the little endian method, the high byte goes to thehigh address and the low byte to the low address.
Memory location DS:1500 contains F3H.
Memory location DS:1501 contains 35H.
 All Intel microprocessors and many microcontrollersuse the little endian convention.
 Motorola microprocessors, alongwith some other microcontrollers, use big endian.

Sandeep.K.H Page 10
EXTRA SEGMENT:
 ES is a segment register used as an extra datasegment.
 In many normal programs this segment is not used.
 Used in essential string operations.

MEMORY MAP OF THE IBM PC:

 The 20-bit address of 8088/86 allows 1MB (1024K bytes) ofmemory space with the addressrange
00000–FFFFF.
 During the design phase of the firstIBM PC, engineers had to decideon the allocation of the 1-
megabytememory space to various sectionsof the PC.
 This memory allocation iscalled a memory map.
 Figure above shows Memory Allocation in the PC
 Of this 1 megabyte, 640K bytesfrom addresses 00000–9FFFFHwere set aside for RAM
 128K bytes A0000H– BFFFFHwere allocated for video display
 The remaining 256K bytes fromC0000H–FFFFFH were set asidefor ROM
 The 640K bytes from 00000 to 9FFFFH is referredto as conventional memory.
 The 384K bytes from A0000H to FFFFFH are calledthe UMB (upper memory block).

RAM:
 In the early 80s, most PCs came with 64KB to 256KB of RAM,it is more at that time.
 Users had to buy memory expansion board to expand up to 640K if they needed additional memory.
 The need for expansion depends on the windows version being used and the type of application software
to run.

Video RAM:
 From A0000H to BFFFFH is set aside for video RAM
 The amount of memory used and the memory location vary dependingon the video board installed on
the PC

Sandeep.K.H Page 11
ROM:
 C0000H to FFFFFH is set aside for ROM.
 Not all the memory in this range is used by the PC's ROM.
 64K bytes from location F0000H–FFFFFH areused by BIOS (basic input/output system) ROM.
 Some of the remaining space is used by various adaptercards (such as the network card), and the rest is
free.
 There must be some permanent (nonvolatile) memory to hold the programs telling the CPU what to do
when the power is turned on
 This collection of programs is referred to as BIOS.
 The BIOS tests devices connected to the PC whenthe computer is turned on and to report any errors.

FLAG REGISTER:

 The flag register is a 16-bit register sometimesreferred to as the status register.

 Although it is 16 bits wide, only some of the bits are used and rest are either undefined or reserved by
Intel.
 Many Assembly language instructions alter flagregister bits & some instructions function
differentlybased on the information in the flag register.
 Six flags, called conditional flags, indicate somecondition resulting after an instruction executes.
These six are CF, PF, AF, ZF, SF, and OF.
 The remaining three, often called control flags, controlthe operation of instructions before they are
executed.
CF (Carry Flag) - Set when there is a carry out, from d7 after an 8-bit operation, or d15 after a 16-bit
operation.
PF (Parity Flag) - After certain arithmetic and logical operations, if the result has an even number of 1s, the
parity flag is set to 1; otherwise, it is cleared.(The parity bit only counts the lower 8 bits of the result and is
set accordingly)
AF (Auxiliary Carry Flag) - If there is a carry from d3 to d4 of an operation, this bit is set; otherwise, it is
cleared.
ZF (Zero Flag) - Set to 1 if the result of arithmetic or logical operation is zero; otherwise, it is cleared.
SF (Sign Flag) - Binary representation of signed numbers uses the most significant bit as the sign bit. After
arithmetic or logic operations, the status of this sign bit is copied into the SF, indicating the sign of the result.
TF (Trap Flag) - When this flag is set it allows the program to single-step, meaning to execute one instruction
at a time. Single-stepping is used for debugging purposes.
IF (Interrupt Enable Flag) - This bit is set or cleared to enable/disable only external maskable interrupt
requests.
DF (Direction Flag) - Used to control the direction of string operations.
OF (Overflow Flag) - Set when the result of a signednumber operation is too large.

Sandeep.K.H Page 12
Sandeep.K.H Page 13
  Flag bits affected by the ADD instruction: CF (carry flag); PF (parity flag); AF (auxiliary carry flag). ZF
(zero flag); SF (sign flag); OF (overflow flag).
 Instructions such as data transfers (MOV) affect no flags.
 A widely used application of the flag register is the use of the zero flag to implement program loops.
 A loop is a set of instructions repeated a number of times.
 As an example, to add 5 bytes of data, a counter can be used to keep track of how many times theloop
needs to be repeated.
 Each time the addition is performed the counter is decremented and the zero flag is checked.
 When the counter becomes zero, the zero flag is set (ZF = 1) and the loop is stopped.

The x86 ADDRESSING MODES:

 How the CPU can access data in variousways, called addressing modes.
 The number of addressing modes is determined whenthe microprocessor is designed & cannot be
changed
 The x86 provides seven distinct addressing modes:
[1] Register addressing mode:
 Register addressing mode involves use of registersto hold the data to be manipulated.Memory is not
accessed, so it is relatively fast.
 Examples of register addressing mode:

 The source & destination registers must match in size.

 Coding "MOV CL,AX" will give an error, since the source isa 16-bit register and the destination is an
8-bit register.

[2]Immediate addressing mode

 The source operand is a constant.
 This mode can be used to load information into anyof register except the segment and flag registers.

Sandeep.K.H Page 14
[3] Direct addressing mode:
 The data is in somememory location(s).
 The address of the data in memory comes immediatelyafter the instruction.

 The address of the operand is provided with theinstruction, as an offset address.

 Calculate the physical address by shifting left the DSregister and adding it to the offset
 Note the bracketaround the address.If the bracket is absent, executing the command will givean error,
as it is interpreted to move the value 2400 (16-bit data) into register DL an 8-bit register.

[4]Register indirect addressing mode:

 The address ofthe memory location isheld by a register.
 The registers used for this purpose are SI, DI, and BX.

 The physical address is calculated by shifting DSleft one hex position and adding BX to it.
 The same rules apply when using register SI or DI.

[5] Based relative addressing mode:

 Base registersBX or BP, and a displacement value, is used tocalculate the physical address.
 Default segments used for the calculation of thephysical address (PA) are DS for BX and SS for BP.

 Alternatives are "MOV CX,[BX+10]" or "MOVCX,10[BX]"

 Again the low address contents will go into CLand the high address contents into CH.
 In the case of the BP register:

 Alternatives are "MOV AL,[BP+5]" or "MOV AL,5[BP]".

Sandeep.K.H Page 15
[6] Indexed relative addressing mode:
 Works thesame as the based relative addressing mode, except that registers DI & SI hold the offset
address.

[7] Based indexed addressing mode:

 By combining based & indexed addressing modes,a new addressing mode is derived called thebased
indexed addressing mode.
 One base register and one index register are used.

Segment Overrides
♦ The segment override prefix, allows the programmer to deviate from the default segment.
♦ The segment override prefix is appended at the front of an instruction to select an alternate segment
register.
♦ For example, the MOV AX,[DI] instruction accesses data within the data segment by default. If required
by a program, this can be changed by prefixing the instruction.
♦ Suppose that the data are in the extra segment instead of in the data segment. This instruction addresses
the extra segment if changed to MOV AX, ES: [DI]

Sandeep.K.H Page 16
THE STACK:
 What is a stack? Why is it needed?
 There must be some place for the CPU to store information safely and temporarily.
 The CPU needs this storage area since there are only a limited number of registers.
 The main disadvantage of the stack is access time.
 Some very powerful (expensive) computers do nothave a stack.
 The stack memory is pointed by SS (stack segment) register and SP (stack pointer) register.
 These registers must be loaded before anyinstructions accessing the stack are used.
 Every register inside the x86 can be stored in thestack, and brought back into the CPU from thestack
memory, except segment registers and SP.
 Storing a CPU register in the stack is called a push.
 Loading the contents of the stack into the CPU registeris called a pop.
 The x86 stack pointer register (SP) points at thecurrent memory location of thestack.

PUSH
 As each PUSH is executed, the register contents aresaved on the stack and SP is decremented by 2.
 When an instruction pushes or pops a generalpurposeregister, it must be the entire 16-bitregister.One
must code "PUSH AX".
 There are no instructions such as "PUSH AL" or "PUSH AH".

POP
 As each pop is executed, the register contents are removed from the stack placed into the CPU and SP is
incremented by 2

Sandeep.K.H Page 17
  The exact physical location of the stack depends onthe value of the stack segment (SS) register andSP,
the stack pointer.
 To compute physical addresses for the stack, shiftleft SS one hex digitand then add offset SP to it.

Overlapping:
 It is possiblethat two segments can overlap which is desirable in some circumstance is shown below

Sandeep.K.H Page 18
Assignment question:

1. Name the thee features of the 8086 that were improvement over the 8080/8085
2. What are the major difference between 8086 and 8088 microprocessor?
3. Give the size of the address bus and physical memory capacity of the following
(a) 8086 (b) 80286 (c) 80386
4. The 80286 is a …………… bit microprocessor, whereas the 80386 is a …………… bit microprocessor
5. List the additional feature introduced in the 80286 that were not present in the 8086
6. List the additional feature introduced in the 80486 that were not present in the 80386
7. List the additional feature introduced in the Pentium that were not present in the 80486
8. How many transistors did the Pentium II use?
9. Which microprocessor was the first to incorporate MMX technology on-chip?
10. List the additional feature introduced in the Pentium II that were not present in the Pentium
11. Tue o false. Itanium has a 64-bit architecture.
12. Write the assembly language instruction to move value 1234h into register BX.
13. Write the assembly language instruction to add the values 16H and ABH. Place the result in the register
AX.
14. No value can be moved directly into which register?
15. What is the largest hex value that can be moved into a 16-bit register? Into an 8-bit register? What are
the decimal equivalents of these hex values?
16. A segment is an area of memory that includes up to ………. bytes.
17. State the difference between the physical and logical addresses.
18. A physical address is a ……. bit address and offset address is a ……… bit address.
19. Which register is used as the offset register with segment register CS?
20. If BX= 1234H and the instruction MOV [2400], BX were executed, what would be the content of
memory location at offsets 2400 and 2401?
21. Which register is used to access the stack?
22. with each push instruction, the stack pointer register SP is incremented/decremented by 2
23. with each pop instruction, the stack pointer register SP is incremented/decremented by 2
24. The ADD instruction can affect which bits of the flag register?
25. The carry flag will be set to 1 in an 8-bit addition if there is a carry out from bit ……..
26. The carry flag will be set to 1 in a 16-bit addition if there is a carry out from bit ……..
27. Explain the internal architecture of 8086, with neat diagram. 10M June/Dec 2010,june 12,14 & Dec 15
28. What is meant by pipelining? How is it implemented in 8086? 4M Dec 2010 June 2013
29. What is flag register? Explain the flag register format, in detail? 6M June 2011,14,15 and Dec 12,13
30. List and explain the addressing modes with examples. June 2010,11,14,Dec-11,13,15[6M]
31. What is the use of stack memory? Explain the execution of push and pop instruction? Dec-12[6M]
32. What do BIU and EU stands for and what are their functions?
33. Which of the following register cannot be split into high and low bytes?
CS, AX, DS, SS, BX, DX, CX, DI, DI
34. Name the segment register and their function in the 8088/86 6M Dec 2011,14,15 and June 12,13
35. If CS = 3499H and IP = 2500H find the logical, physical and lower and upper range of the address of the
code segment?
36. If DS = 3499H and offset = 3FB9H find the logical, physical and lower and upper range of the address
of the data segment?

Sandeep.K.H Page 19
 37. If SS = 2000H and SP = 4578H find the logical, physical and lower and upper range of the address of
the stack segment?
38. Explain segment override with an example? Show the override register and the default segment register
used (if there were no override) in each of the following cases.
(a) MOV SS:[BX], AX
(b) MOV SS:[DI], BX
(c) MOV DX, DS:[BP+6]
39. Find the status of the CF,PF,AF,ZF and SF for the following operation
(a) MOV BL, 9FH (b) MOV AL, 23H (c) MOV DX, 10FFH
ADD BL, 61H ADD AL, 97H ADD DX, 1
40. Give the addressing mode for the each of the following:
(a) MOV AX, DS (g) MOV BX, 5678H
(b) MOV CX, [3000] (h) MOV AL, CH
(c) MOV [DI], BX (i) MOV AL, [BX]
(d) MOV CX, DS (j) MOV DX, [BP+DI+4]
(e) MOV BL, [SI]+10 (k) MOV AH, [BX+SI+50]
(f) MOV [BP+6], AL (L) MOV [BP][SI]+12, AX

Sandeep.K.H Page 20
Module-1 the 80x86 Microprocessor Chapter-2

Introduction to assembly language program:

 An Assembly language program consists of series of statements, or lines.
 Either Assembly language instructions or statements called directives.
 Directives (pseudo-instructions) give directions to the assembler about how the Assembly language
instructions should be translate into machine code.
 Assembly language instructions consist of four fields:
[label:] mnemonic [operands][;comment]
 Brackets indicate that the field is optional. Do not type in the brackets.
 The label field allows the program to refer to a line of code by name. The label field should not exceed
31 characters. A label must end with a colon
 The mnemonic (opcode) and operand(s) fields together accomplish the tasks for which the program was
written.
ADD AL, BL
MOV AX, 6764
 The mnemonic (opcode) in above example are ADD and MOV.
 "AL, BL" and "AX, 6764" are the operands.
 The comment field begins with a ";" and written at the end of a line. The assembler ignores comments.
Comments are optional, but if we write it is easier to read and understand the program.

Model defination:
 MODEL directive selects the size of the memory model.
 The memory model are SMALL, MEDIUM, COMPACT, and LARGE.
.MODEL SMALL
Small is one of the most widely used memory model for assembly language program. The small model uses a
maximum of 64kb of memory for code and another 64kb of for data

.MODEL MEDIUM
Data must fit in 64kb and code can exceed 64kb of memory

.MODEL COMPACT
Code must fit in 64kb and data can exceed 64kb of memory

.MODEL LARGE
Both Data and code can exceed 64kb of memory, but no single set should not exceed 64kb

.MODEL HUGE
Both Data and code can exceed 64kb of memory

.MODEL TINY
Both Data and code must fit 64kb of memory, used with COM files

Segment definition:
♦ An x86 CPU has four segments register.
♦ CS (code segment), DS (data segment), SS (stack segment), ES (extra segment).
♦ The simplified segment definition format uses three simple directives: ".CODE" ".DATA" ".STACK"
.STACK ; marks the beginning of the stack segment
.DATA ; marks the beginning of the data segment
.CODE ; marks the beginning of the code segment

Sandeep.K.H Page 21
A sample program:

A structure of assembly language program

STACK SEGMENT
.stack 64
This directive reserves 64 bytes of memory for the stack

DATA SEGMENT
The data segment defines three data items: DATA1, DATA2, and SUM.
Each is defined as DB (define byte).
Data items defined in the data segment will be accessed in the code segment by their labels.
DATA1 and DATA2 are given initial values in the data section.
SUM is not given an initial value. But storage is set aside for it.

Sandeep.K.H Page 22
CODE SEGMENT
The first line of the segment after the .CODE directive is the PROC directive.
A procedure is a group of instructions designed to accomplish a specific function.
Every procedure must have a name defined by the PROC directive, followed by the assembly language
instructions, and closed by the ENDP directive.
The PROC and ENDP statements must have the same label.
The PROC directive may have the option FAR or NEAR.

 MOV CX, 05 will load the value 05 into the CX register (looping).
 MOV BX, OFFSET OF DATA_IN will load BX with offset of DATA_IN
 ADD AL, [BX] adds the content of memory location pointed by BX to AL
 INC BX simply increments the pointer by adding 1 to BX, which makes BX to point to next data item.
 DEC CX decrements CX counter by 1 and set the ZF =1 when CX = 0
 JNZ AGAIN will jump back to the label again as long as the zero flag is indicating that CX is not zero

ASSEMBLE, LINK AND RUN ARE THE PROGRAM:

Sandeep.K.H Page 23
  Many editors can be used to create and/or edit the program.
 ".asm" file (the source file) is the file created with an editor.
 The ".asm" file is assembled by an assembler, like MASM or TASM.
 The assembler will produce an object file and a list file(.lst), along with other files(such as .crf) useful to
the programmer.
 The extension for the object file must be ".obj".
 Before feeding the ".obj" file into LINK, all syntax errors must be corrected.
 Fixing these errors will not guarantee the program will work as intended, as the program may contain
logical errors.
 This object file is input to the LINK program, to produce the executable program that ends in ".exe".
 The ".exe" file can be executed by the microprocessor.

Note:
“.lst” file which is optional is useful to the programmer because it lists the all the opcode, offset addresses as
well as errors detected by the MASM.
".crf” file (cross reference) it provides an alphabetical list of all symbols & labels used in the program as well
as program line numbers
“.map” file which gives the name of each segment, where it starts, where it stops, and its size in bytes.

The PAGE and TITLE directive

 Format of page directive is Page [lines],[columns]
 Default setting is 60,132
 It is common to put the name of the program immediately after the TITLE pseudo-instruction and a brief
description of the function of the program. Text after the TITLE should not exceed 60 ASCII characters.

CONTROL TRANSFER INSTRUCTIONS

 In the sequence of instructions, it is often necessary to transfer program control to a different location.
 If control is transferred to a memory location within the current code segment, it is NEAR. Also called
intrasegment (within segment).
 In a NEAR jump, the IP is updated and CS remains the same, since control is still inside the current code
segment.

Sandeep.K.H Page 24
  If control is transferred outside the current code segment, it is a FAR jump. Also called intersegment
(between segments)
 In a FAR jump, because control is passing outside the current code segment, both CS and IP have to be
updated to the new values.

CONDITIONAL JUMPS
 Conditional jumps have mnemonics such as JNZ (jump not zero) and JC (jump if carry).
 In the conditional jump, control is transferred to a new location if a certain condition is met.
 The flag register indicates the current condition.
 All conditional jumps are short jumps.
 The address of the target must be within -128 to +127 bytes of the IP.
 The conditional jump is a two-byte instruction.
One byte is the opcode of the jump condition.
The second byte is a value between 00 and FF.
 An offset range of 00 to FF gives 256 possible addresses. These are split between backward jump (to -
128) and forward jumps (to +127)

TABLE1: 8086 CONDITIONAL JUMP INSTRUCTION

UNCONDITIONAL JUMP
 An unconditional jump transfers control to the target location label unconditionally.
 unconditional jump have following forms:

SHORT JUMP - in the format "JMP SHORT label ".

 A jump within -128 to +127 bytes of memory relative to the address of the IP, opcode EB.
NEAR JUMP - has the format "JMP label".
 A jump within the current code segment.
 The target address can be any of the addressing modes of direct, register, register indirect, or memory
indirect:

Sandeep.K.H Page 25
 Direct JUMP - exactly like the short jump except that the target address can be anywhere in the segment in
the range +32767 to -32768 of the current IP.
Register indirect JUMP - target address is in a register. Example: "JMP BX", IP takes the value BX.
Memory indirect JMP - target address is the contents of two memory locations, pointed at by the register.
Example: "JMP [DI]" will replace the IP with the contents of memory locations pointed at by DI and DI+1.

FAR JUMP - in the format "JMP FAR PTR label". A jump out of the current code segment. IP and CS are
both replaced with new values.

CALL statements
 The CALL instruction is used to call a procedure, to perform tasks that need to be performed frequently.
 The target address could be in the current segment, in which case it will be a NEAR call or outside the
current CS segment, which is a FAR call.
 The microprocessor saves the address of the instruction following the call on the stack. To know where
to return, after executing the subroutine.
 In the NEAR call only the IP is saved on the stack.
 In a FAR call both CS and IP are saved.
 For control to be transferred back to the caller, the last subroutine instruction must be RET (return).
 RET instruction that directs the CPU to POP the top 2 bytes of the stack into the IP and resume
executing of instruction.

RULES FOR NAMES IN ASSEMBLY LANGUAGE

 The names used for labels in Assembly language programming consist of…
 Alphabetic letters in both upper- and lowercase.
 The digits 0 through 9.
 Question mark (?); Period (.); At ( @ )
 Underline ( _ ); Dollar sign ($)
 Each label name must be unique.
 Label name can be up to 31 characters long.
 The first character must be an alphabetic or special character. It cannot be a digit.

DATA TYPES AND DATA DEFINITION

x86 data types
 The 8088/86 processor supports many data types.
 Data types can be 8- or 16-bit, positive or negative.
 The programmer must break down data larger than 16 bits (0000 to FFFFH, or 0 to 65535 in decimal).
 A number less than 8 bits wide must be coded as an 8-bit register with the higher digits as zero.
 A number is less than 16 bits wide must use all 16 bits.

ORG (origin):
 ORG is used to indicate the beginning of the offset address.
 The number after ORG can be either in hex or in decimal.
 If the number is not followed by H, it is decimal and the assembler will convert it to hex.

DB ( Define byte):
 One of the most widely used data directives
 DB directive is used to allocate memory location that is 1 byte (8-bit) in size.
 DB can define numbers in decimal, binary, hex, & ASCII.
 D after the decimal number is optional.
 B (binary) and H (hexadecimal) number is required.
 To indicate ASCII, place the string in single quotation marks.

Sandeep.K.H Page 26
DUP ( duplicate ):
 DUP is used to duplicate a given number of characters. This can avoids a lot of typing. Two methods of
filling six memory locations with FFH

DW ( Define word):
 DW directive is used to allocate memory location that is 2 byte ( one word) in size.

DD ( Define double word):

 DD directive is used to allocate memory location that is 4 byte ( two word) in size.

DQ ( Define quad word):

 DQ directive is used to allocate memory location that is 8 byte ( four word) in size.

Sandeep.K.H Page 27
DT ( Define Ten bytes):
 DT directive is used to allocate memory location that is 10 bytes ( five word) in size.
 A maximum of 18 digits can be entered

EQU ( equate):
 EQU associates a constant value with a data label.
 When the label appears in the program, its constant value will be substituted for the label.
 Defines a constant without occupying a memory location.
 Example: COUNT EQU 25
 When executing the instructions "MOV CX,COUNT", the register CX will be loaded with the value 25.

FULL SEGMENT DEFINITION

The older, more traditional definition is called full segment definition.

SEGMENT DEFINITION
The SEGMENT and ENDS directives indicate the beginning &ending of a segment, in this format:

 In full segment definition, the ".MODEL" directive is not used. The directives ".STACK", ".DATA",
and ".CODE" are replaced by SEGMENT and ENDS directives.
 Figure below shows the full segment definition and simplified format, side by side.

Sandeep.K.H Page 28
STACK SEGMENT DEFINITION
The following three lines in full segment definition are comparable to ".STACK 64" in simple definition:

DATA SEGMENT DEFINITION

In full segment definition, the SEGMENT directive names the data segment and must appear before the data.
The ENDS segment marks the end of the data segment:

CODE SEGMENT DEFINITION

The code segment also begins and ends with SEGMENT and ENDS directives:

Sandeep.K.H Page 29
EXE vs. COM files:

FLOWCHARTS AND PSEUDOCODE

Flowcharts: AND PSEUDOCODE
 A flowchart uses graphic symbols to represent different types of program operations.
 These symbols are connected together to show the flow of execution of the program.

Pseudocode:
 Flowcharting has been standard industry practice for decades.
 However some programs finds limitation in using flowchart such as we cannot write much in small
boxes and it is hard to get the big picture of what the program does.
 An alternative to flowcharts, pseudocode, involves writing brief descriptions of the flow of the code.

 Structured programming is a term used to denote programming techniques that makes the program
easier to code, debug and maintain.
 Structured programming uses three basic types of program control structures:

Sequence: is executing instructions one after the other.

Sandeep.K.H Page 30
Control: IF-THEN-ELSE and IF-THEN are control programming structures, which can indicate one
statement or a group of statements. Figure below shows the two control programming structure.

Iteration:
REPEAT-UNTIL and WHILE-DO are iteration control structures, which execute a statement or group of
statements repeatedly.
REPEAT-UNTIL structure always executes the statement(s) at least once, and checks the condition after the
each iteration.
WHILE-DO may not execute the statement(s), first condition is checked at the beginning of each iteration.

Sandeep.K.H Page 31
Example: Flow chart and pseudocode to a program that adds 5 bytes of data and store the result in sum

Assignment question:
1) (a) The input file to the MASM assemble program has the extension ……..
(b) The input file to the LINK program has the extension ……..
2) Select all the file types from the second column that are output of the program in the first column.
…………… Editor (a) .obj (b) .asm
……………. Assembler (c) .exe (d) .lst
……………… linker (e) .crf (f) .map
3) What is the purpose of INC instruction?
4) What is the purpose of DEC instruction?
5) Describe briefly the function of the RET instruction.
6) If control is transferred outside the current code segment is it near or far
7) The DD directive is used to allocate memory location that are ….. bytes in length
8) The DQ directive is used to allocate memory location that are ….. bytes in length
9) State briefly the purpose of the ORG directive
10) What is the advantage in using the EQU directive to define a constant value
11) How many bytes set aside by each of the following directive
(a) Data DB ‘2345’ (b) Data DW 2345H
12) Which program produces the .exe file
13) Which program produces the .obj file
14) What is flow chart and pseodocode? Write the flowchart and pseudocode for if - then – else ?
15) Write any four difference between .com and .exe
16) Explain full segment with example?
17) Write a program to add 5 bytes of data and store the result in sum using simplified segment definition?
18) Explain call and return statement?
19) Briefly explain conditional and unconditional jump
20) With neat diagram explain assemble, link and run a program?
21) Explain the four fields of assembly language instruction?
22) Explain with example following assembler directives
a) .model tiny b) DB c) segment and ends d) proc and endp e) dup f) equ g) ORG

Sandeep.K.H Page 32