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DCLD (3rd) May2018

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Roll No. Total No.

of Pages: 02
Total No. of Questions: 09

B.Tech. (CSE)/(IT) (2011 Onwards) (Sem. – 3)


DIGITAL CIRCUITS & LOGIC DESIGN
M Code: 56593
Subject Code: BTCS-303
Paper ID: [A1125]
Time: 3 Hrs. Max. Marks: 60

INSTRUCTIONS TO CANDIDATES:
1. SECTION-A is COMPULSORY consisting of TEN questions carrying TWO marks each.
2. SECTION-B contains FIVE questions carrying FIVE marks each and students have to
attempt any FOUR questions.
3. SECTION-C contains THREE questions carrying TEN marks each and students have
to attempt any TWO questions.

SECTION A
o m
1. Write briefly:
.r c m
a) Weighted BCD

p e o
.r c
b) Principle of Duality

a
c) Exclusive-NOR versus Exclusive-OR

p
b r
d) Multiplexer versus Demultiplexer
e) Uses of Shift Registers
p e
f) FPGA
a
g) Convert 101012 to decimal
h) TTL and CMOS
b rp
i) Number of Gate inputs required for expression:
j) MOSFET

M-56593 Page 1 of 2
SECTION B
2. Evaluate Following:
a) Multiply 2A816 by B616
b) Subtract 14 from 46 using 8-bit 2’s complement arithmetic.
3. State and prove De-Morgan’s Theorems.
4. Explain the Operation of two input TTL NAND gate.
5. Design and implement a 4-bit binary to gray convertor.
6. Distinguish between combinational and sequential switching circuits.

SECTION C
7. Write short note on following

m
a) Successive approximation A to D conversion technique

o
.r c
b) Ripple Carry Adder
8. What are programmable logic devices? What are their advantages? Explain in detail the

9. Using Boolean algebra show that


p e
architecture of a programmable logic device.

o m
a) AB + AC + BC = AB + AC

p a .r c
r
b) AB + AC = (A+C)( A + B)

b p e
a
b rp

M-56593 Page 2 of 2

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