General Description: Capsense Express™ Controllers With Smartsense™ Auto-Tuning 16 Buttons, 2 Sliders, Proximity Sensors

CY8CMBR3002, CY8CMBR3102
CY8CMBR3106S, CY8CMBR3108
CY8CMBR3110, CY8CMBR3116 Datasheet
CapSense® Express™ Controllers
With SmartSense™ Auto-tuning
16 Buttons, 2 Sliders, Proximity Sensors
CapSense Express 16 Button Controller
General Description
The CY8CMBR3xxx CapSense® Express™ controllers enable advanced, yet easy-to-implement, capacitive touch sensing user
interface solutions. This register-configurable family, which supports up to 16 capacitive sensing inputs, eliminates time-consuming
firmware development. These controllers are ideal for implementing capacitive buttons, sliders, and proximity sensing solutions with
minimal development-cycle times.
The CY8CMBR3xxx family features an advanced analog sensing channel and the Capacitive Sigma Delta PLUS (CSD PLUS) sensing
algorithm, which delivers a signal-to-noise ratio (SNR) of greater than 100:1 to ensure touch accuracy even in extremely noisy
environments. These controllers are enabled with Cypress's SmartSense™ Auto-tuning algorithm, which compensates for manufac-
turing variations and dynamically monitors and maintains optimal sensor performance in all environmental conditions. In addition,
SmartSense Auto-tuning enables a faster time-to-market by eliminating the time-consuming manual tuning efforts during development
and production ramp-up.
Advanced features, such as LED brightness control, proximity sensing, and system diagnostics, save development time. These
controllers enable robust water-tolerant designs by eliminating false touches due to mist, water droplets, or streaming water. The
CY8CMBR3xxx controllers are offered in a variety of small form factor industry-standard packages.
The ecosystem for the CY8CMBR3xxx family includes development tools—software and hardware—to enable rapid user interface
designs. For example, the EZ-Click Customizer tool is a simple graphical user interface software for configuring the device features
through the I2C interface. This tool also supports CapSense data viewing to monitor system performance and support validation and
debugging. Another tool, the Design Toolbox, simplifies circuit board layout by providing design guidelines and layout recommenda-
tions to optimize sensor size, trace lengths, and parasitic capacitance. To quickly evaluate the CY8CMBR3xxx family features, use
the CY3280-MBR3 Evaluation Kit.
Features ❐ Flanking Sensor Suppression (FSS) to eliminate false touch-

es in closely spaced buttons
■ Register-configurable CapSense Express controller ❐ Analog voltage output
❐ No firmware development required ❐ Attention line interrupt to the host to indicate any change in
❐ Patented CSD sensing algorithm
sensor status
❐ High sensitivity (0.1 pF) ■ System diagnostics to detect
• Overlay thickness of up to 15 mm for glass and 5 mm for ❐ Improper value of the modulating capacitor (CMOD)
plastic ❐ Out of range sensor parasitic capacitance (CP)
• Proximity solutions ❐ Sensor shorts
• Sensitivity up to 2 fF per count ■ EZ-Click™ Customizer tool
❐ Best-in-class >100:1 SNR performance
❐ Simple GUI for device configuration
• Superior noise-immunity performance against conducted ❐ Data viewing and monitoring for CapSense buttons, sliders,
and radiated noise and proximity sensors
• Ultra-low radiated emissions ❐ System diagnostics for rapid debug
❐ SmartSense Auto-tuning
■ I2C slave
• Sets and maintains optimal sensor performance during
❐ Supports up to 400 kHz
run time
❐ Wake-on-hardware address match
• Eliminates manual tuning during development and produc-
❐ No bus-stalling or clock-stretching during transactions
tion
■ Low-power 1.71-V to 5.5-V operation
■ Low-power CapSense 2
❐ Deep Sleep mode with wake-up on interrupt and I C address
❐ Average current consumption of 22 µA per sensor at 120-ms
detect
refresh interval
❐ Wide parasitic capacitance (CP) range: 5–45 pF ■ Industrial temperature range: –40 °C to +85 °C
■ Advanced user interface features ■ Package options
❐ Water tolerance ❐ 8-pin SOIC (150 mil)
❐ User-configurable LED brightness for visual touch feedback ❐ 16-pin SOIC (150 mil)
• Up to eight high-sink current GPOs to drive LEDs ❐ 16-pin QFN (3 × 3 × 0.6 mm)
❐ Buzzer signal output for audible touch feedback ❐ 24-pin QFN (4 × 4 × 0.6 mm)
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document Number: 001-85330 Rev. *G Revised May 6, 2014
Contents
System Overview.............................................................. 3 LED ON Time ............................................................ 13
Features Overview............................................................ 4 Toggle ....................................................................... 14
CapSense Sensors ..................................................... 4 Buzzer Signal Output ................................................ 14
Sliders ......................................................................... 4 Host Interrupt............................................................. 15
Proximity Sensors ....................................................... 4 Latch Status Output................................................... 15
SmartSense Auto-tuning ............................................. 4 Analog Voltage Output .............................................. 15
Water Tolerance.......................................................... 4 System Diagnostics................................................... 16
Noise Immunity............................................................ 4 Example Application Schematics ................................. 17
Flanking Sensor Suppression (FSS) ........................... 4 Power Supply Information ............................................. 19
Touch Feedback.......................................................... 4 Electrical Specifications ................................................ 20
General-Purpose Outputs (GPOs) .............................. 4 Absolute Maximum Ratings....................................... 20
Buzzer Drive................................................................ 4 Operating Temperature ............................................. 20
Register Configurability ............................................... 5 DC Electrical Characteristics..................................... 20
Communication to Host ............................................... 5 AC Electrical Specifications....................................... 21
System Diagnostics..................................................... 5 I2C Specifications...................................................... 22
Ultra-Low Power Consumption.................................... 5 System Specifications ................................................... 23
Pinouts .............................................................................. 6 Power Consumption and Operational States .............. 25
CY8CMBR3116 (16 Sensing Inputs)........................... 6 Response Time ............................................................... 27
CY8CMBR3106S (16 Sensing Inputs; Sliders Supported) 7 CY8CMBR3xxx Resets ................................................... 27
CY8CMBR3108 (8 Sensing Inputs)............................. 8 Host Communication Protocol...................................... 27
CY8CMBR3110 (10 Sensing Inputs)........................... 9 I2C Slave Address..................................................... 27
CY8CMBR3102 (2 Sensing Inputs)........................... 10 I2C Communication Guidelines................................. 28
CY8CMBR3002 (2 Sensing Inputs)........................... 10 Write Operation ......................................................... 28
CY8CMBR3xxx Ecosystem............................................ 11 Setting the Device Data Pointer ................................ 28
Documentation ............................................................... 11 Read Operation ......................................................... 29
Design Guides........................................................... 11 Layout Guidelines and Best Practices ......................... 30
Registers TRM .......................................................... 11 Ordering Information...................................................... 30
Software Utility ............................................................... 11 Packaging Dimensions .................................................. 31
EZ-Click Customizer Tool.......................................... 11 Thermal Impedances................................................. 33
Tools ................................................................................ 11 Solder Reflow Specifications..................................... 33
Design Toolbox ......................................................... 11 Appendix ......................................................................... 34
Evaluation Kits........................................................... 11 Units of Measure ....................................................... 34
Online ........................................................................ 11 Glossary .......................................................................... 35
Training ..................................................................... 11 Reference Documents.................................................... 35
Technical Support ..................................................... 11 Document History Page ................................................. 36
Device Feature Details ................................................... 12 Sales, Solutions, and Legal Information ...................... 38
Automatic Threshold ................................................. 12 Worldwide Sales and Design Support....................... 38
Sensitivity Control...................................................... 12 Products .................................................................... 38
Sensor Auto Reset .................................................... 12 PSoC® Solutions ...................................................... 38
Noise Immunity.......................................................... 13 Cypress Developer Community................................. 38
Flanking Sensor Suppression ................................... 13 Technical Support ..................................................... 38
General-Purpose Outputs ......................................... 13
Document Number: 001-85330 Rev. *G Page 2 of 37

System Overview which senses the change in capacitance based on touch or

proximity, and controls the user interface system accordingly.
A capacitive sensor detects changes in capacitance to determine The sensing algorithm, built in the controllers, determines the
the presence of a touch or proximity to conductive objects. The presence of touch and drives the outputs or sends signals to the
capacitive sensor can be a capacitive button that replaces the host processor. This algorithm can distinguish between the
traditional mechanical buttons, a capacitive slider that replaces signal (based on touch or proximity) and noise, which can be
mechanical knobs, or a proximity sensor that replaces an caused by environmental or electrical conditions.
infrared sensor in a user interface solution. A typical capacitive Figure 1 shows a typical user interface system with capacitive
user interface system consists of the following: buttons connected to a CY8CMBR3xxx CapSense Express
■ A capacitive sensor controller, which controls the system and also communicates
with the host processor through I2C.
■ An audio-visual output, such as a buzzer or an LED
Traditionally, capacitive sensing controllers require firmware
■ A capacitive sensing controller connected to the sensor development to perform specific user interface functions and
manual system tuning to achieve optimal performance.
■ A host processor However, the CY8CMBR3xxx CapSense Express family of
The capacitive controller connects the sensor and the output to controllers does not require any firmware development, acceler-
the host processor through a communication interface, such as ating time-to-market. These devices feature SmartSense
an I2C or a GPO. Auto-tuning, which eliminates the need for manual tuning,
providing optimal performance even under extremely noisy
The capacitive user interface system serves as a
conditions.
human-machine interface that takes the user’s touch inputs and
provides audio-visual feedback through a buzzer or an LED.
CY8CMBR3xxx is a family of capacitive sensing controllers,
Figure 1. Typical CapSense System
CapSense Buttons
Linear Slider
Radial Slider
I2C
HI
CY8CMBR3xxx Host Interrupt Host
CapSense Sensors Processor
CapSense Controller
Buzzer
LEDs
Outputs

Features Overview The CY8CMBR3xxx family offers water-tolerance to liquids such

as water, ketchup, oil, and blood.
CapSense Sensors Enable the shield electrode through the register map, using
The CY8CMBR3xxx family of controllers supports up to 16 EZ-Click, to prevent false touches under wet conditions and
capacitive sensors. These can be configured as follows: enable both the shield electrode and guard sensor to prevent
false touches in streaming water conditions. The shield electrode
■ Up to 16 CapSense buttons and guard sensor consume a port pin each in the CapSense
■ Up to two sliders: Configurable as linear or radial sliders controller. Refer to the CY8CMBR3xxx CapSense Design Guide
for best practices and design guidelines for implementing
■ Up to two proximity sensors that can detect up to 30-cm water-tolerant designs.
proximity distance
Noise Immunity
Sliders The CY8CMBR3xxx family features the robust CSD PLUS
■ Supports up to two 5-segment sliders capacitive sensing algorithm. Additionally, it implements the
advanced noise immunity algorithm, EMC, for stable operation
■ Configures each slider individually as linear or radial in extremely noisy conditions.
■ Combines both sliders to form one 10-segment slider The EMC algorithm has higher average power consumption. For
low-power applications, where noise conditions are not extreme,
■ Slider resolution is user-configurable you can disable this feature through the I2C interface.
Proximity Sensors Flanking Sensor Suppression (FSS)
■ The CY8CMBR3xxx family supports up to two proximity This feature distinguishes between signals from closely spaced
sensors with a detection range of up to 30 cm. These proximity buttons, eliminating false touches. It ensures that the system
sensors are capable of detecting both proximity and touch recognizes only the first button touched.
events.
Touch Feedback
■ The wake-on-approach feature wakes the devices from a
low-power state to Active mode on a proximity event. The CY8CMBR3xxx family has pins that you can configure for
audio-visual feedback through a buzzer or an LED.
■ The device also features driven shield, which enhances the
proximity sensing range in the presence of metal objects. General-Purpose Outputs (GPOs)
■ The device supports proximity sensors with CP ranging from The GPOs are high-sink current, open-drain outputs that can
8 pF to 45 pF. drive most LEDs. The GPO status can be controlled directly by
the CapSense sensors so that a sensor 'ON' status automatically
SmartSense Auto-tuning turns ON a corresponding LED. Alternatively, GPOs can be
The CY8CMBR3xxx family features SmartSense Auto-tuning, controlled by the host through the I2C interface.
Cypress's patented CapSense algorithm, which continuously The GPOs also support advanced features, such as:
compensates for system and environmental changes during run
time. SmartSense Auto-tuning has the following advantages: ■ CSx to GPOx Direct Drive: Directly control the GPOs upon
button touch or proximity event.
■ Reduces design effort by eliminating manual tuning
■ Pulse width modulation (PWM): Controls LED brightness.
■ Adapts to variations in PCB, overlay, paint, and manufacturing
that degrade touch-sensing performance ■ Toggle: The GPO status is toggled upon every touch event on
the button sensors, and proximity event on proximity sensors,
■ Eliminates manual tuning in production to mimic the functionality of the mechanical toggle switch.
■ Adapts to changes in the system environment due to noise ■ Voltage output: Analog voltage that represents the button
status.
■ Allows a platform design approach with different overlays,
button shapes, and trace lengths Buzzer Drive
Water Tolerance The output pins of the CY8CMBR3xxx controllers can be
configured for driving a single-input DC Piezo-electric buzzer
The CY8CMBR3xxx family delivers water-tolerant designs that
through a PWM. The PWM frequency and buzzer activation
eliminate false touches due to wet conditions, such as water
duration are configurable. The buzzer output is activated for a
droplets, moisture, mist, steam, or even wet hands. The
finite amount of time when a finger touch is detected.
CapSense controller locks up the user interface in firmware to
prevent touch inputs in streaming water.

Register Configurability The built-in system diagnostics detects the following fault condi-
tions at power-up and helps to monitor the following:
The CY8CMBR3xxx registers may be configured through the I2C
interface. Device features may be enabled, disabled, or modified ■ Improper value of the modulating capacitor (CMOD)
by writing appropriate values to the I2C configurable register
map. This register map also provides various status outputs to ■ CP value out of range
indicate the touch/release status and system performance and ■ Sensor shorts
debug parameters.
You can access the register map of the device through the I2C Ultra-Low Power Consumption
interface by a host controller, such as a microcontroller or the For low-power applications, such as those operated by a battery,
EZ-Click Customizer. select a capacitive sensing controller that has ultra-low average
The CY8CMBR3xxx devices feature a safe register map update power consumption.
mechanism to overcome configuration data corruption, which The CY8CMBR3xxx controllers draw an average current of
can occur due to power failure during flash writes or any other 22 µA per sensor at 1.8 V.
spurious events. If the configuration data is corrupted during a
register map update, the devices reconfigure themselves to the The CY8CMBR3xxx family supports two operating modes:
last known valid configuration. ■ Active: The sensors are scanned periodically for power
optimization.
Communication to Host
■ Deep Sleep: The sensors are not scanned until a command
The CY8CMBR3xxx family communicates to a host processor
from the host is received to resume sensor scanning.
through the following methods:
In the Active mode, CY8CMBR3xxx family implements additional
■ The I2C interface allows the host to configure parameters and techniques, such as optimizing the average power consumption
receive status information on touch events and providing a smooth user interface experience without
■ The host interrupt alerts the host when a new touch event increasing the refresh interval.
occurs. This helps to build effective communication between In addition to these modes, the device has a wake-on approach
the host and the CapSense controller. Alternatively, the CPU feature, which uses proximity sensing to reduce the average
can poll the device status by reading through I2C. power consumption, ensuring power saving when the system is
inactive.
■ The GPO provides the ON or OFF sensor status to the host.
The GPO ports can also be used to implement analog voltage Details of all features are documented in Device Feature Details
and DC output (DCO) using an external resistor network. on page 12.
System Diagnostics
The CY8CMBR3xxx devices are equipped with a system
diagnostics feature to detect system-level fault conditions and to
avoid failure of the user interface design. The system diagnostic
features also help to monitor system-level parameters to debug
the design during development.

Pinouts
CY8CMBR3116 (16 Sensing Inputs)
Table 1. Pin Diagram and Definitions - CY8CMBR3116
24-QFN
Default Pin Diagram
Pin # Pin Name Type Description If unused Configuration
1 CS0/PS0 – CapSense button / proximity sensor, Ground/Ground CS0
controls GPO0
HI/BUZ/GPO7
2 CS1/PS1 – CapSense button / proximity sensor, Ground/Ground CS1
controls GPO1
I2C SDA
I2C SCL
XRES
3 CS2/GUARD – CapSense button / guard sensor, Ground/Ground CS2
CS4
CS5
controls GPO2
4 CS3 – CapSense button, controls GPO3 Ground CS3
23
19
24
22
21
20
CS0/PS0 1 18 CS6
5 CMOD – External modulator capacitor. Connect NA CMOD CS1/PS1 2 17 CS7
2.2 nF/5 V/X7R or NPO capacitor CS2/GUARD 3 QFN 16 CS8/GPO0
6 VCC Power Internal regulator output. Connect a NA VCC CS3 4 (Top View) 15 CS9/GPO1
0.1-µF decoupling capacitor if VDD > CMOD 5 14 CS10/GPO2
1.8 V. If VDD is 1.71 V to 1.89 V, short VCC 6 13 CS11/GPO3
this pin to VDD.
11
12
7
8
9
10
7 VDD Power Power NA VDD
VSS
4/GPO6
3/GPO5
2/GPO4
5/SH/HI
VDD
8 VSS Power Ground NA VSS
9 CS15/SH/HI I/DO CapSense button / shield electrode/ Ground/Leave HI
Host Interrupt (SPO1 in the register open/Leave open
map)
10 CS14/GPO6 I/DO CapSense button / general purpose Ground/Leave open GPO6
output (GPO)
11 CS13/GPO5 I/DO CapSense button / GPO Ground/Leave open GPO5
18 CS6 – CapSense button, controls GPO6 Leave open CS6
21 I2C SDA DIO I2C data Leave open I2C SDA
22 I2C SCL DIO I2C clock Leave open I2C SCL
23 HI/BUZ/ DO Host Interrupt/buzzer output/ GPO Leave open/ leave GPO7
GPO7 (SPO0 in the register map) open/ leave open
24 XRES XRES Active Low external reset (an active low Leave open XRES
pulse on this pin resets the CapSense
Controller)
25 Center Pad[1] E-pad Connect to VSS for best mechanical, Floating, not E-pad
thermal, and electrical performance connected to any
other signal
Legend: I = Analog Input, O = Analog Output, DIO = Digital Input/Output, DO = Digital Output, CS = CapSense Button, PS = Proximity Sensor
SH = Shield Electrode, BUZ = Buzzer Output, GPO = General Purpose Output, GUARD = Guard Sensor, SPO = Special purpose output.
Note
1. The center pad on the QFN package should be connected to ground (VSS) for best mechanical, thermal, and electrical performance. If it is not connected to ground,
it should be left floating without being connected to any other signal.

CY8CMBR3106S (16 Sensing Inputs; Sliders Supported)

Table 2. Pin Diagram and Definitions - CY8CMBR3106S
24-QFN
Default Pin Diagram
1 CS0/PS0 – CapSense button / proximity Ground/Ground CS0
sensor
CS5/SH/HI
I2C SDA
I2C SCL
HI/BUZ
XRES
sensor
CS4
3 CS2 – CapSense button Ground CS2
23
19
24
22
21
20
4 CS3 – CapSense button Ground CS3 CS0/PS0 1 18 CS15/SLD24
CS1/PS1 2 17 CS14/SLD23
5 CMOD – External modulator capacitor. NA CMOD QFN 16 CS13/SLD22
CS2 3
Connect 2.2 nF/ 5 V/X7R or
CS3 4 (Top View) 15 CS12/SLD21
NPO capacitor
CMOD 5 14 CS11/SLD20
6 VCC Power Internal regulator output. NA VCC VCC 6 13 SLD14
Connect a 0.1-µF decoupling
11
12
7
8
9
10
capacitor if VDD > 1.8 V. If VDD
VSS
SLD10
SLD11
SLD12
SLD13
VDD
is 1.71 V to 1.89 V, short this pin
to VDD.
9 SLD10 – Slider1, segment0 Ground SLD10
14 CS11/SLD20 – CapSense button / Slider2, Ground/Ground SLD20
segment0
segment1
segment2
segment3
18 CS15/SLD24 – CapSense button / Slider2, Leave open/Leave open SLD24
segment4
19 CS5/SH/HI – CapSense button / shield Ground/Leave open/Leave CS5
electrode/host interrupt. open
(SPO1 in the register map)
20 CS4 – CapSense Button Ground CS4
21 I2C SDA DIO I2C Data Leave open I2C SDA
22 I2C SCL DIO I2C Clock Leave open I2C SCL
23 HI/BUZ O Host interrupt / buzzer output. Leave open/Leave open HI
This pin acts as SPO0 for this
device (SPO0 in register map).
24 XRES XRES External reset Leave open XRES
25 Center Pad[2] E-pad Connect to VSS for best Floating, not connected to E-pad
mechanical, thermal and any other signal
electrical performance
Legend: I = Analog Input, O = Analog Output, DIO = Digital Input/Output, CS = CapSense Button,
PS = Proximity Sensor, SH = Shield Electrode, BUZ = Buzzer Output, SPO = Special Purpose Output.
Note


16-QFN
Default Pin Diagram
sensor, controls GPO0
I2C SDA
I2C SCL
HI/BUZ
CS3
sensor, controls GPO1
3 CMOD – External modulator capacitor. NA CMOD
13
16
15
14
Connect 2.2 nF/5 V/X7R or CS0/PS0 1 12 CS2/GUARD
NPO capacitor CS1/PS1 2 QFN 11 CS7/GPO3/SH
CMOD 3 (Top View) 10
4 VCC Power Internal regulator output. NA VCC CS6/GPO2
VCC 4 9 CS5/GPO1
5
6
7
8
capacitor if VDD > 1.8 V. If VDD
is 1.71 V to 1.89 V, short this pin
CS4/GPO0
VSS
VDDIO
VDD
to VDD
5 VDDIO Power Power for I2C and HI lines Connect to VDD VDDIO
9 CS5/GPO1 – CapSense button / GPO Ground/Leave open GPO1
11 CS7/GPO3/ I/DO CapSense button / GPO/ shield Ground/Leave open GPO3
SH electrode.
(SPO1 in the register map)
12 CS2/GUARD – CapSense button, controls Leave open/Leave open CS2
GPO2 / guard sensor
13 CS3 – CapSense button, controls Ground CS3
GPO3
16 HI/BUZ DO Host interrupt / buzzer output Leave open/leave open HI
Supply voltage for buzzer and
pull-up resistor on HI should be
equal to VDDIO
(SPO0 in the register map).
17 Center Pad[3] E-pad Connect to VSS for best Floating, not connected to E-pad
mechanical, thermal and any other signal
electrical performance
Legend: I = Analog Input, O = Analog Output, DIO = Digital Input/Output, CS = CapSense Button, PS = Proximity Sensor
SH = Shield Electrode, BUZ = Buzzer Output, GPO = General Purpose Output, GUARD = Guard Sensor, SPO = Special Purpose Output.
Note


16-SOIC
Pin # Pin Name Type Description If unused Default Pin Diagram

Configuration
I2C SDA 1 16 CS4/SH
3 CS0/PS0 – CapSense button / proximity Ground/Ground CS0 I2C SCL 2 15 CS3
sensor, controls GPO0 CS0/PS0 3 14 CS9/GPO4/HI/BUZ
4 CS1/PS1 – CapSense button / proximity Ground/Ground CS1 CS1/PS1 4 SOIC 13 CS2/GUARD
sensor, controls GPO1 CMOD 5 12 CS8/GPO3
VCC 6 11 CS7/GPO2
Connect 2.2 nF/5 V/X7R or VDD 7 10 CS6/GPO1
NPO capacitor VSS 8 9 CS5/GPO0
6 VCC Power Internal regulator output. NA VCC

capacitor if VDD > 1.8 V. If
VDD is 1.71 V to 1.89 V, short
this pin to VDD
13 CS2/GUARD – CapSense button, controls Ground/Leave open CS2
GPO2 / guard sensor
14 CS9/GPO4/HI/ I/DO CapSense button / GPO / Leave open/Leave GPO4
BUZ host interrupt/buzzer output. open/Leave
(SPO1 in the register map) open/Leave open
15 CS3 – CapSense button, controls Ground CS3
GPO3
16 CS4/SH I/O CapSense button, controls Ground/Leave open CS4
GPO4/ shield electrode
(SPO0 in the register map).
Legend: I = Analog Input, O = Analog Output, DIO = Digital Input/Output, CS = CapSense Button, PS = Proximity Sensor
SH = Shield Electrode, BUZ = Buzzer Output, GPO = General Purpose Output, GUARD = Guard Sensor, SPO = Special Purpose Output.


8-SOIC
Pin # Pin Name Type Description If unused Default Pin Diagram

Configuration
Connect 2.2 nF/5 V/X7R or NPO
capacitor , I,I2C
P0[5]
SCL 1 8 Vdd
I2C SDA
, I,CMOD
P0[3] 2 7 P0[4], A,
CS0/PS0 I
3 VCC Power Internal regulator output. Connect a NA VCC SOIC
0.1-µF decoupling capacitor if VDD CL, P1[1]
VCC 3 6 P0[2], A, I
CS1/PS1/GPO0/SH
> 1.8 V. If VDD is 1.71 V to 1.89 V, Vss
VDD 4 5 P1[0],
VSS I2C SDA
short this pin to VDD.

6 CS1/PS1/ I/DO/O CapSense button / proximity sensor/ Ground/Ground/ GPO0
GPO0/SH GPO/ shield electrode (SPO0 in the Leave open/leave
register map). Open
7 CS0/PS0 – CapSense button / proximity sensor, Leave open/Leave CS0
controls GPO0 open
Legend: I = Analog Input, O = Analog Output, DIO = Digital Input/Output, CS = CapSense Button, PS = Proximity Sensor,
SH = Shield Electrode, GPO = General Purpose Output, SPO = Special Purpose Output.

8-SOIC
Pin # Pin Name Type Description If unused Pin Diagram
1 GPO1 DO GPO Leave open
2 CMOD I/O External modulator capacitor. NA
Connect 2.2 nF/5 V/X7R or NPO
capacitor , I,GPO1
P0[5] 1 8 Vdd
GPO0
3 VCC Power Internal regulator output. Connect NA , I,CMOD
P0[3] 2 7 P0[4],
CS0 A, I
a 0.1-µF decoupling capacitor if SOIC
VDD > 1.8 V. If VDD is 1.71 V to CL, P1[1]
VCC 3 6 P0[2],
CS1 A, I
1.89 V, short this pin to VDD.
Vss
VDD 4 5 P1[0], I2C
VSS
4 VDD Power Power NA

5 VSS Power Ground NA
6 CS1 – CapSense button, controls GPO1 Ground
7 CS0 – CapSense button, controls GPO0 Leave open
8 GPO0 DO GPO Leave open
Legend: I = Analog Input, DO = Digital Output, CS = CapSense Button, GPO = General Purpose Output

CY8CMBR3xxx Ecosystem Tools

Cypress provides a complete ecosystem to enable a quick devel- Design Toolbox
opment cycle with the CY8CMBR3xxx CapSense controller
The Design Toolbox is an interactive spreadsheet tool that
family. This ecosystem includes simple tools for device configu-
provides application-specific design guidelines for capacitive
ration, design validation, and diagnostics.
buttons. It is used to configure and validate the CapSense
system.
Documentation
The Design Toolbox:
Design Guides
■ Provides general layout guidelines for a CapSense PCB
Design guides are an excellent introduction to a variety of
possible CapSense-based designs. They provide an intro- ■ Estimates button dimensions based on end-application
duction to the solution and complete system design guidelines. requirements
Refer to the following design guides for CY8CMBR3xxx: ■ Calculates power consumption based on button dimensions
1. Getting Started with CapSense – an ideal starting point for all
CapSense users ■ Validates layout design
2. CY8CMBR3xxx CapSense Design Guide – provides Evaluation Kits
complete system design guidelines for CY8CMBR3xxx
The CY3280-MBR3 Evaluation Kit can be used to quickly
You can download these design guides from our website: evaluate the various features of the CY8CMBR3xxx solution.
www.cypress.com/go/capsense. The kit also functions as an Arduino shield, making it compatible
with the various Arduino-based controllers in the market. You can
Registers TRM purchase this kit at the Cypress online store.
The CY8CMBR3xxx Registers TRM lists and details all the
registers of the CY8CMBR3xxx family of controllers in order of Online
their addresses. These registers may be accessed through an In addition to print documentation, there are abundant web
I2C interface with the host. resources. The dedicated web page for the CY8CMBR3xxx
family has all the current information.
Software Utility
Training
EZ-Click Customizer Tool
Free PSoC and CapSense technical training (on-demand,
The EZ-Click Customizer Tool is a simple, GUI-based software webinars, and workshops) is available online at
utility that can be used to customize the CY8CMBR3xxx device www.cypress.com/training. The training covers a wide variety of
configurations. topics and supports different skill levels to assist you in your
Use this GUI-based tool to do the following: designs.
■ Select the appropriate part number based on an Technical Support

end-application requirement using the Product Selector For assistance with technical issues, search the Knowledge
■ Configure the device features Base articles and forums at www.cypress.com/support. If you
cannot find an answer to your question, create a technical
■ Observe CapSense data for button and proximity sensors support case or call technical support at 1-800-541-4736.
■ Use the System Diagnostics and built-in test self-test (BIST)
features for debug and production-line testing

Device Feature Details Automatic Threshold

Table 7. Device Feature Benefits ■ Dynamically sets all threshold parameters for button sensors,
depending on the noise in the environment.
Feature Benefits
■ Applicable only to button sensors.
Automatic Threshold Automatically tunes all the threshold
■ Mutually exclusive from the EMC feature. If EMC is enabled,
parameters of the sensors for
automatic threshold is automatically disabled.
different noise settings
Sensitivity Control Maintains optimal button Sensitivity Control
performance for different overlay This feature allows specification of the minimum change in
and noise conditions sensor capacitance that can trigger a sensor state change (OFF
to ON or vice-versa).
Sensor Auto Reset Recalibrates the sensor when a
stuck-sensor (fault) condition ■ Sensitivity can be specified individually for each CapSense
occurs, and avoids invalid sensor button and slider.
output status to host ■ Sensitivity can be specified as one of the four available values:
0.1 pF, 0.2 pF, 0.3 pF, and 0.4 pF.
Noise Immunity Provides immunity against external
noise and the ability to detect ■ Higher sensitivity values can be used for thick overlays or small
touches without false trigger in noisy button diameters.
environments ■ Lower sensitivity values should be used for large buttons or
Flanking Sensor Avoids multiple button triggers in a thin overlays to minimize power consumption.
Suppression (FSS) design with closely spaced buttons Sensor Auto Reset
Host Controlled GPOs GPO pins, which can be controlled
This feature resets the CapSense sensors to the OFF state after
by the host processor through I2C a specific time period, even though they continue to be activated.
LED On time GPO output status stays ON for a ■ Resets the sensor baseline to the current raw count after a
set duration after the touch is specific time period, even though the sensors continue to be
released to provide better visual activated.
feedback to the user
■ Prevents a stuck sensor when a metal object is placed close
Toggle Sensor output status toggles on to that sensor.
every sensor activation to mimic the ■ The Auto Reset period can be set to 5 or 20 seconds and can
mechanical toggle button be configured through two global settings provided in the
functionality register map:
Buzzer Signal Output Provides audio feedback on button ❐ Global setting for all proximity sensors
touch ❐ Global setting for all CapSense buttons and slider segments
Host Interrupt Provides interrupt to host when ■ The guard sensor does not undergo Auto Reset.
there is a change in sensor status Figure 2. Example of Button Auto Reset on GPO0 (DC Active
Latch Status Output Latches the sensor status changes Low Output)
in the register until the host reads
Sensor
the activated sensor status; this Activated
ensures that the sensor status is
always read by the host even if the Auto Reset Period
host is late to service the host Touch on Sensor

CSx
interrupt signal from CY8CMBR3xxx
GPOx
Analog Voltage Output Indicates the button status through
voltage levels GPOx turns inactive as Auto
Reset period expired for CSx
System Diagnostics Supports production testing and
debugging
Low-Power Sleep Mode Reduces power consumption
and Deep Sleep Mode

Noise Immunity General-Purpose Outputs

■ The CY8CMBR3xxx family features the robust CSD PLUS ■ Supports up to eight GPOs, multiplexed with sensor inputs or
capacitive sensing algorithm. other functionality, depending on the part number.
■ Uses pseudo-random sequence (PRS) clock source to ■ Provides GPO status control. GPOs can be configured to be
minimize electromagnetic interference. controlled by the sensor input or the host through the I2C
interface.
■ Provides advanced noise immunity algorithm, that is, electro-
magnetic compatibility (EMC), for superior noise immunity ■ Allows for configurable Active LOW or Active HIGH logic output.
against external radiated and conducted noise The Active LOW logic output can be configured to directly drive
❐ EMC algorithm has higher average power consumption. For LEDs in the current sink mode. The Active HIGH logic output
low-power applications, where noise conditions are not ex- can be configured to interface the GPOs with the host and other
treme, this feature can be disabled using the EZ-Click tool. circuits.
Flanking Sensor Suppression ■ The GPOx status will not be retained in the Deep Sleep mode.
The GPOx output state will be reset to default during deep sleep
■ Distinguishes between signals from closely spaced buttons, and upon wake-up from deep sleep.
eliminating false touches.
Figure 4. CSx Controls GPOx (Active HIGH Logic)
■ Can be enabled or disabled individually on each CapSense
button.
Sensor Sensor
■ On touch detection by two or more sensors on which FSS is Activated Deactivated
enabled, only the first touched sensor reports active status.
■ Allows only one button at a time to be in the Touch state.
■ Supported only on CapSense buttons.
CSx
Figure 3. Reported Sensor Status with FSS Enabled
CS0 CS1 CS2 CS3 No sensor touched

GPOx
■ Supports two drive modes:
❐ Open-drain drive mode (HIGH-Z and GND) for analog volt-
age outputs and LED direct drive
CS1 is touched, CS1 reported ON
CS0 CS1 CS2 CS3
❐ Strong drive mode (VDD and GND) to interface with the host
and other circuits
■ Supports PWM on GPOs for LED brightness control. Two
different duty cycles can be configured for Sensor Touch and
No Touch states (Active and Inactive state duty cycles). When
the GPO is host-controlled, and if the PWM control is enabled
for the GPO, the same Touch and No Touch duty cycles will be
CS2 also touched along with CS1,
CS0 CS1 CS2
C S2 CS3 used for the On and Off states of the host-controlled GPO.
CS1 is reported ON
■ When the proximity sensor is enabled, the proximity event
controls the respective GPOs. A touch event on a proximity
sensor is indicated only through the I2C register map.
■ Sensor fault conditions are indicated with the pulse signal on
Only CS2 is touched; reported ON
the respective GPOs at power-up by system diagnostics.
CS0 CS1 CS2 CS3
LED ON Time
■ Keeps the GPO status ON for a particular period of time after
the falling edge of a sensor, for better visual indication through
LEDs

Figure 5. CSx Controls GPOx with LED ON Time Enabled Buzzer Signal Output
Sensor ■ Produces a PWM signal to drive a Piezo-Buzzer that generates
Sensor Deactivated audio feedback when a touch is detected on a CapSense button
Activated
or a guard sensor.
CSx physical
status ■ Supports buzzer connection, as shown in the following figure.
BUTTON_STAT
register shows Figure 7. Buzzer Connection[4]
sensor inactivation
CSx bit in
BUTTON_STAT VDDIO
GPOx
Buzzer
LED ON Time
Button response time
CY8CMBR3xxx
BUZ
■ Can be enabled only when the GPO is directly controlled by a
CapSense sensor
■ Can be enabled or disabled on each sensor and the ON Time
duration can be configured from 0 to 2 seconds in 20-ms incre-
ments
■ Can be enabled in all configurations of GPOs except the Toggle
mode
■ Not applicable when the sensor status is turned off by Sensor ■ PWM frequency is configurable: The buzzer frequency is
Auto Reset configurable to meet different Piezo-Buzzer drive requirements
and to provide different tones. The buzzer frequency may be
Toggle configured either by using the EZ-Click tool or by writing to the
corresponding control register. Refer to System Specifications
■ The controller can toggle the GPO state at every rising edge on page 23 for the supported buzzer frequencies.
of a sensor activation event to mimic the functionality of a
mechanical toggle switch (a touch event for a button sensor ■ Generates PWM output for a fixed duration (ON time) when a
and a proximity event for proximity sensors activates a sensor). touch is detected. The ON time is configurable through
EZ-Click, from 100 ms to 12.7 s, in steps of 100 ms,
Figure 6. CSx Controls GPOx with the Toggle Enabled
■ Buzzer signal output and EMC (refer to the CY8CMBR3xxx
Sensor Sensor Sensor Registers TRM) are mutually exclusive features. These must
Activated Deactivated Activated not be enabled simultaneously.
Figure 8. Buzzer Activation on a Touch Event
CSx Sensor
GPOx Activated
■ Can be enabled only when the GPO is directly controlled by a CSx Active

capacitive sensor. CSx
■ Can be enabled or disabled individually on each capacitive

sensor. BUZ
■ Can be enabled in all configurations of GPOs—that is, Active
LOW and Active HIGH DC output, PWM output, open-drain, Buzzer ON Time
and strong drive modes.
The buzzer output does not restart if multiple trigger events occur
before the Buzzer ON Time elapses.
Note
4. Buzzer must be connected between VDDIO and the BUZ pin. If VDDIO is not available on the device, connect the buzzer to VDD instead of VDDIO.

Figure 9. Buzzer Operation with Consecutive Touches Latch Status Output

Sensor Sensor ■ Allows to read both current status (CS) and latch status (LS)
Activated Re‐activated to avoid missing button touches.
■ CS and LS can be read through registers, BUTTON_STAT, and
LATCHED_BUTTON_STAT respectively.
CSx Table 8 explains the various combinations of CS and LS.
BUZ Table 8. Latch Status Read

CS LS Description
Buzzer ON Tim e
0 0 CSx is not touched during the current I2C read
Host has already acknowledged any previous CSx touch in
the previous I2C read
If the buzzer is not currently active, the buzzer output starts on 0 1 CSx was touched before the current I2C read
each trigger event. This CSx touch was missed by the host
■ When the buzzer is enabled, the buzzer output toggles between

a Logic HIGH state and a Logic LOW state, to drive the buzzer Analog Voltage Output
when active. When the buzzer is inactive, the buzzer output Some of the applications use analog voltage as an effective
maintains a Logic HIGH state. method to indicate the sensor status to the host controller. A
■ The buzzer ON Time has a range of (1 to 127) × 100 ms. simple external resistor network can be used with GPOs of
CY8CMBR3xxx to generate analog voltage output upon touch
Host Interrupt detection for such applications.
This feature generates a pulse signal on any change in the The CY8CMBR3xxx GPOs support the open-drain low-drive
CapSense sensors' status. mode. In this mode, the sensor “touch” state is indicated by a
logic LOW signal on the GPO and a "no touch" state is indicated
■ The host interrupt is an active LOW pulse signal generated on by the HIGH-Z signal. With the external resistor shown in Figure
the HI pin during any change in the sensor status or slider 11, when a sensor is touched, the respective GPO is driven to a
position. logic LOW signal. This forms a simple voltage divider and
produces a voltage output. All the other GPOs are in HIGH-Z
■ The duration of the active LOW host interrupt pulse is THI (refer
states because their respective sensors are in the "no touch"
to System Specifications on page 23).
state.
■ The minimum time between two HI pulses is equal to one
Figure 11. Voltage Output Using GPO and Resistor Network
refresh interval.
Figure 10. Host Interrupt Line with CSx Buttons Touched
Separately R0
CS0 CS0 GPO0
Sensor Sensor R1
CS1 CS1
Activated Deactivated
GPO1 R
CS2 CS2 R2
CY8CMBR3xxx
GPO2
CS3 CS3 R3 VOUT
GPO3
CS4 CS4 R4
GPO4
CS5 CS5 R5
CSx GPO5
CS6 CS6 R6
GPO6
CS7 CS7 R7
GPO7
HI
THI
The output analog voltage can be calculated based on the
following equation:
■ The host interrupt pin has the open-drain low-drive mode.
■ This pin is powered by VDDIO in CY8CMBR3108. This allows
communication with a host processor at voltage levels lower
than the chip VDD.
■ Only one pin can be configured as the host interrupt on devices Here, Rn represents the series resistor value of any given GPO.
that have a host interrupt functionality on multiple pins.

Note If more than one button is activated at the same time, the Sensor CP > 45 pF
Rn becomes equivalent (parallel) to all Rn resistors. If the parasitic capacitance of a sensor is more than 45 pF, the
■ For the circuit represented in Figure 11 to work, GPOs should sensor is disabled.
be configured in the Active LOW logic, open-drain drive mode. Improper value of CMOD
PWM must be disabled and the CSx-to-GPOx direct drive must
be enabled (that is, GPOs must be configured as If the value of CMOD is less than 1 nF or greater than 4 nF, all
sensor-controlled). sensors are disabled (the recommended value of CMOD is
2.2 nF).
■ The FSS feature can be enabled so only one button is reported Sensor shorts
ON at a time.
System Diagnostics also checks for the following errors:
System Diagnostics
■ Sensor shorted to Vss
System Diagnostics is a BIST feature that tests for faulty sensor,
shield, or CMOD conditions at device resets. ■ Sensor shorted to VDD
■ If any sensor fails these tests, a 50-ms pulse is sent out on the ■ Sensor shorted to another sensor
corresponding GPO (that is, the pulse is observed on GPOx if ■ Sensor shorted to shield
CSx fails the test), and the sensor is disabled.
■ If the shield fails the tests, a 50-ms pulse is sent out on all GPOs
and all the sensors are disabled.
■ If CMOD fails the tests, a 50-ms pulse is sent out on all GPOs
and all the sensors are disabled.
■ System Diagnostics failure pulses are sent within device
boot-up time.
■ The System Diagnostics status is also updated in the register
map. Therefore, the host can also read test results through the
I2C interface.

Example Application Schematics

Figure 12. Example Schematics Demonstrating Four Buttons and Four GPOs
CS3
VDDIO VDD
I2C_SDA
I2C_SCL
J1 C5 C4 C2 C6
(TO HOST)
VDD
1 1uF 0.1uF 1uF 0.1uF
2
3
R1
R2
R10
4 I2C_SCL
5 I2C_SDA
HI
330E
330E
560E
I2C HEADER
16
15
14
13
U1
HI/BUZ
I2C_SCL
I2C_SDA
CS3
CS0 560E R3 1 12 R4 560E CS2
CS0/PS0 CS2/GUARD VDD
CS1 560E R5 2 11 D4 R9 1K
CS1/PS1 CS7/GPO3/SH
CMOD 3 10 D1 R6 1K
CMOD CS6/GPO2
VCC 4 9 D2 R7 1K
VCC CS5/GPO1
CS4/GPO0
C3 C1
VDD_IO
2.2nF 0.1uF
VDD
VSS
CY8CMBR3108(16-QFN)
5
VDDIO 8
D3
VDD
R8
1K VDD
In Figure 12[5, 6], the CY8CMBR3108 device is configured in the ■ VDD pin: To external supply voltage
following manner: ❐ 1-µF and 0.1-µF decoupling capacitors connected to VDD
■ CS0–CS3: CapSense buttons ■ VDDIO pin: To supply voltage, which is ≤ VDD

❐ All CapSense pins must have a 560-ohm series resistance 2
❐ VDDIO powers I C and HI lines.
(placed close to the chip) for improved noise immunity. ❐ 1-µF and 0.1-µF decoupling capacitors connected to VDDIO.
■ GPO0–GPO3: To external LEDs ■ I2C_SCL and I2C_SDA pins: 330 ohms to the I2C header
❐ LEDs are connected in sinking mode because the 2 2
❐ For I C communication: It is assumed that the I C line pull-up
CY8MBR3xxx devices have high sink current capability. resistors are present on the host side outside the I2C header.
❐ Series resistances are connected to limit the GPO current to
be with IIL limits. ■ HI pin: To host
2
❐ To prompt the host to initiate an I C transaction for reading
■ CMOD pin: 2.2 nF to ground the changed sensor status.
■ VCC pin: 0.1 µF to ground
Notes
5. VCC should be connected to VDD for 1.71 V ≤ VDD ≤ 1.89 V.
6. Proper ground layout is important for better SNR performance. Refer to the CY8CMBR3xxx CapSense Design Guide and Getting started with CapSense guide for all
layout guidelines.

Figure 13. Example Schematics Demonstrating Multiple Sensor Types
BUZZER
CS4
J1
I2C_SDA
I2C_SCL
VDD
(TO HOST)
1 CSS1
XRES
2 VDD
3 VDD SLD10
4 I2C_SCL
5 I2C_SDA SLD11
330E
330E
R3
R18
C1 C4
SLD12
HI
I2C HEADER 1uF 0.1uF
SLD13
R1
R2
560E
100E
SLD14
24
23
22
21
20
19
U1 CapSense Linear Slider 5 Seg
PSO
XRES
HI/BUZ
I2C_SCL
I2C_SDA
CS4
CS5/SH/BUZ
560E R4 1 18 R5 560E SLD24
CS0/PS0 CS6/SLD24
CS1 560E R6 2 17 R7 560E SLD23
CS1/PS1 CS7/SLD23
CS2 560E R8 3 16 R9 560E SLD22

CS2 CS8/SLD22
CS3 560E R10 4 15 R11 560E SLD21
CS3 CS9/SLD21
CMOD 5 14 R12 560E SLD20
CMOD CS10/SLD20
VCC 6 13 R13 560E SLD14 SLD20
VCC SLD14
SLD10
SLD11
SLD12
C2 C3 SLD13
VDD
VSS
SLD21
2.2nF 0.1uF
CY8CMBR3106S(24-QFN)
7
10
11
12
560E
560E
560E
560E
VDD
SLD22
R15
R14
R16
R17
SLD10
SLD11
SLD12
SLD13
SLD23
SLD24
CapSense Radial slider 5-Seg
In Figure 13[7, 9], the CY8CMBR3106S device is configured in ❐ AC buzzer (1-pin).

the following manner: ❐ Buzzer second pin to ground.
■ PS0: CapSense proximity sensor ■ I2C_SCL and I2C_SDA pins: 330 ohm to the I2C header. It is
assumed that the I2C line pull-up resistors are present on the
■ CS1–CS4: CapSense buttons[8] host side outside the I2C header.
■ CMOD pin: 2.2 nF to ground ❐ For I2C communication.
■ VCC pin: 0.1 uF to ground ■ HI pin: To host

2
❐ To prompt the host to initiate an I C transaction for reading
■ VDD pin: To external supply voltage the changed sensor status.
❐ 1-µF and 0.1-µF decoupling capacitors connected to VDD
■ XRES pin: Floating
■ SLD10-SLD14: CapSense linear slider segments ❐ For external reset.
■ SLD20-SLD24: CapSense radial slider segments
■ BUZ: To buzzer
Notes
7. VCC should be shorted to VDD for 1.71 V ≤ VDD ≤ 1.89 V.
8. All CapSense pins have 560-ohm series resistance (placed close to the chip) for improved noise immunity.
9. Proper ground layout is important for better SNR performance. Refer to the CY8CMBR3xxx CapSense Design Guide and Getting started with CapSense guide for
all layout guidelines.

Power Supply Information ■ 1.8-V externally regulated operation: When VDD is powered
with a 1.8 V ±5% supply, the VCC and VDD pins should be
The CY8CMBR3xxx family of controllers contains three supply shorted externally and the SUPPLY_LOW_POWER bit in the
domains: VDD, VCC, and VDDIO. DEVICE_CFG3 register should be set to 1 through the I2C
interface (refer to the CY8CMBR3xxx Registers TRM for details
■ VDD: This is the primary supply to the chip and can be powered
on the register). When the VCC and VDD pins are shorted, this
from 1.8 V ±5% or 1.8 to 5.5 V. The CapSense controller is
bypasses the internal voltage regulator. Under this condition,
powered by the VDD supply, and all the I/O signal levels (except
make certain that VDD does not exceed 1.89 V.
I2C lines, HI, and XRES) are referenced with respect to the VDD
supply. For packages and MPNs that do not have VDDIO, the Note: If EZ-Click is used to configure the device, it automatically
I2C SDA, I2C SCL, HI, and XRES signal levels are also refer- takes care of the required register settings based on the voltage
enced with respect to the VDD supply. settings selected in EZ-Click.
■ VDDIO: This is the supply input for I2C SDA, I2C SCL, HI, and The CY8CMBR3xxx family of controllers is factory-configured for
XRES lines. The signal levels of these I/Os are referenced with 1.8-V to 5.5-V operation. To configure a factory-configured
respect to VDDIO. The VDDIO supply can be as low as 1.71 V device for 1.8-V externally regulated operation, you can use the
and as high as the voltage of the VDD supply. The VDDIO should following procedure:
not be powered at a voltage higher than that of the VDD supply. ■ Short VDD and VCC.
The VDDIO is available only on select packages. For a package
that does not have VDDIO, the I2C SDA, I2C SCL, HI, and XRES ■ Power the device at 1.8 V (note that regardless of the value of
signal levels are referenced with respect to the VDD supply. the SUPPLY_LOW_POWER bit, the device can be powered at
1.8 V for configuring the device; only CapSense operation is
■ VCC: This is the internal regulator output, which powers the not guaranteed if the SUPPLY_LOW_POWER bit is not
core and capacitive sensing circuits. A 0.1-µF, 5-V ceramic properly configured)
capacitor should be connected close to the VCC pin for better
performance. ■ Use EZ-Click to configure the device for 1.8-V operation.
■ Power sequencing: The CY8CMBR3xxx device does not ■ Save and reset the device.
require any power supply sequencing for the VDD and VDDIO ■ Ground consideration: Both the VSS pin and the metal pad
supplies. Either of these supplies can ramp earlier or later than (E-pad) of the device should be connected to board ground.
the other. The only requirement is that VDDIO should not be
greater than VDD.
Figure 14. Power Supply Connections for CY8CMBR3xxx CapSense Controllers[10]
Power supply connections when 1.8 < VDD < 5.5 V Power supply connections* when 1.71 < VDD < 1.89 V
1.8 V to 5.5 V 1.71 V to 1.89 V

CY8CMBR3xxx CY8CMBR3xxx
VDD VDD
0.1 μF 1 μF 0.1 μF
VCC VCC
0.1 μF 1 μF
1.71 V < VDDIO < VDD 1.71 V < VDDIO < VDD
VDDIO VDDIO
1 μF 0.1 μF 1 μF 0.1 μF
VSS VSS
*SUPPLY_LOW_POWER bit in DEVICE_CFG3 register should be set to 1
to operate device at 1.8V (±5%)
Note
10. Proper ground layout is important for best performance. Refer to the layout guidelines mentioned in the CY8CMBR3xxx CapSense Design Guide and Getting started
with CapSense guide.

Electrical Specifications
Absolute Maximum Ratings
Table 9. Absolute Maximum Ratings[11]
Parameter Description Conditions Min Typ Max Units
VDD_MAX Max voltage on the VDD pin relative to VSS –40 °C to +85 °C TA, absolute maximum –0.5 – 6 V
VDDIO_MAX Max voltage on the VDDIO pin relative to VSS –40 °C to +85 °C TA, absolute maximum 0.5 – 6 V
VCC_MAX Max voltage on the VCC pin relative to VSS Absolute maximum –0.5 – 1.89 V
VIO DC input voltage relative to VSS on I/O –40 °C to +85 °C TA, absolute maximum –0.5 – VDD+0.5 V
ESD_HBM Electrostatic discharge, human body model Human body model ESD. 2200 – – V
Electrostatic discharge, charged device
ESD_CDM Charged device model ESD 500 – – V
model
Maximum/minimum current to any input
ILU Latch-up current limits –140 – 140 mA
or output, pin-to-pin or pin-to-supply
IIO Current per GPIO – – 25 mA
Operating Temperature
Table 10. Operating Temperature
Ambient temperature inside system
TO Operation temperature –40 25 85 °C
enclosure
TJ Junction temperature –40 – 100 °C
DC Electrical Characteristics
DC Chip-Level Specifications
The specifications in Table 11 are valid under these conditions: –40 °C ≤ TA ≤ 85 °C. Typical values are specified at TA = 25 °C,
VDD = 3.3 V, and are for design guidance only.
Table 11. DC Chip-Level Specifications
Parameter Description Conditions/Details Min Typ Max Units

VCC shorted to VDD 1.71 1.8 1.89 V
VDD Chip supply voltage VCC not shorted to VDD. VCC connected
1.8 – 5.5 V
to 0.1 µF decoupling capacitor
1.71 V < VDD < 1.89 V 1.71 – VDD V

VDDIO Supply voltage I/O
1.8 V < VDD < 5.5 V 1.71 – VDD V
+25 °C TA, VDD > 2 V, sensitivity ≥ 0.1 pF – – ±50 mV

Maximum allowed ripple on power
VDD_RIPPLE
supply, DC to 10 MHz +25 °C TA, VDD > 1.75 V, CP < 20 pF,
– – ±25 mV
sensitivity = 0.4 pF
External regulator voltage bypass
CEFC X5R ceramic ±10% or better – 0.1 – µF
(capacitor to be connected to the VCC pin)
Power supply decoupling capacitor on
CEXC X5R ceramic or better – 1 – µF
VDD
Note
11. Usage above the absolute maximum conditions listed in Table 9 may cause permanent damage to the device. Exposure to absolute maximum conditions for extended
periods of time may affect device reliability. The maximum storage temperature is 150 °C in compliance with JEDEC Standard JESD22-A103, High Temperature
Storage Life. When used below absolute maximum conditions, but above normal operating conditions, the device may not operate to specification.

XRES DC Specifications
Table 12. XRES DC Specifications

VIH_XRES Input voltage high threshold on XRES pin CMOS input 0.7*VDD – – V
VIL_XRES Input voltage low threshold on XRES pin CMOS input – – 0.3*VDD V
CIN_XRES Input capacitance on XRES pin – – 7 pF
VDD ≤ 4.5 V – 0.05*VDD – mV

VHYSXRES Input voltage hysteresis on XRES pin
VDD > 4.5 V 200 – – mV
DC I/O Port Specifications

The specifications in Table 13 are valid at –40 °C ≤ TA ≤ +85 °C. Typical parameters are specified at TA = 25 °C and are for design
guidance only.
Table 13. DC I/O Port Specifications

IOH = –4 mA at 3 V VDD VDD–0.6 – – V
VOH Output voltage HIGH level
IOH = –1 mA at 1.8 V VDD VDD–0.5 – – V
IOL = 4 mA at 1.8 V VDD – – 0.6 V

VOL Output voltage LOW level
IOL = 10 mA at 3 V VDD – – 0.6 V
CPIN Pin capacitance All VDD, all packages, all I/Os – 3 7 pF

ITOT_GPIO Maximum total sink chip current – – 85 mA
RPU Pull-up resistor +25 °C TA, All VDD 3.5 5.6 8.5 kΩ
AC Electrical Specifications
Table 14. AC Chip-Level Specifications
TSR_POWER_UP Power supply slew rate during power-up –40 °C ≤ TA ≤ 85 °C, all VDD 1 – 67 V/ms
XRES AC Specifications
Table 15. XRES AC Specifications

TXRES External reset pulse width –40 °C ≤ TA ≤ 85 °C, all VDD 5 – – µs
Note
12. VIH must not exceed VDD + 0.2 V.

I2C Specifications
Table 16. I2C Specifications
FSCLI2C_FM I2 C SCL clock frequency 0 – 400 kHz
THDSTAI2C_FM Hold time (repeated) START condition; after this

0.6 – – µs
period, the first clock pulse is generated
TSUSTAI2C_FM Setup time for a repeated START condition 0.6 – – µs
TLOWI2C_FM LOW period of the SCL clock 1.3 – – µs
THIGHI2C_FM HIGH period of the SCL clock 0.6 – – µs
THDDATI2C Data hold time 0 – – µs
TSUDATI2C_FM Data setup time 100 – – ns
TSUSTOI2C_FM Setup time for I2C STOP condition 0.6 – – µs
CB_FM Capacitive load for each I2C bus line – – 400 pF
TVDDATI2C_FM Data valid time – – 0.9 µs
TVDACKI2C_FM Data valid acknowledge time – – 0.9 µs
TSPI2C_FM Pulse width of spikes suppressed by the input filter – – 50 ns
TBUFI2C_FM Bus-free time between STOP and START condition 1.3 – – µs
VIL_I2C Input LOW voltage 2-mA sink –0.5 – 0.3 * VDD V
VIH_I2C Input HIGH Voltage 3-mA sink 0.7* VDD – – V
VOL_I2C_L Output LOW voltage, low supply range VDD < 2 V, 3-mA sink – – 0.2 * VDD V
VOL_I2C_H Output LOW voltage, high supply range VDD > 2 V, 3-mA sink – – 0.4 V
Fast Mode, 1.71 V ≤ VDD ≤
IOL_I2C_FM I2C output low current 5.5 V, load = CB_SM, VOL = 6 – – mA
0.6 V
I2C_VHYS_HV Fast and standard mode I2C

I2C input hysteresis speeds. 2 V ≤ VDD ≤ 4.5 V
0.05 * VDD – – mV
I2C_VHYS_5V5 Fast and standard mode I2C

I2C input hysteresis speeds. 4.5 V < VDD < 5.5 V 200 – – mV
I2C_VHYS_LV Fast and standard mode I2C

I2C input hysteresis speeds. VDD < 2 V
0.1 * VDD – – mV
Figure 15. I2C Bus Timing Diagram for Fast or Standard Modes
TBUFI2C
SDA
P
TSUSTAI2C TSUSTOI2C
TLOWI2C TSUDATI2C S
S
SCL
THDSTAI2C THIGHI2C THDDATI2C

System Specifications
The specifications in the following table are valid at TA = 25 °C and VDD = 5 V, unless otherwise specified.
Table 17. System Specifications
0.2-pF sensitivity, SNR 5:1 5 – 45 pF
CP Supported parasitic capacitance range of

sensors
5-V rating, X7R or NP0 Cap.

CMOD Value for CMOD external capacitor – 2.2 – nF
CP ≤ 45 pF
VDD = 5 V, 3.3 V, 2.5 V, 1.8 V,
IAVG_NT Average current per button with no finger CP = 10 pF, 2 buttons,
– – 22 μA
touch Refresh interval = 120 ms, EMC
disabled, 0.4-pF sensitivity
VDD = 5 V, 3.3 V, 2.5 V, 1.8 V,
IAVG_WT CP = 10 pF, 8 buttons,
Average current with finger touch – – 600 μA
Refresh interval =120 ms, EMC
disabled, 0.4-pF sensitivity
VDD = 5 V, 3.3 V, 2.5 V, 1.8 V,
IAVG_WF CP = 10 pF, 8 buttons,
Average current with EMC – – 300 μA
Refresh interval =120 ms, EMC
enabled, 0.4-pF sensitivity
VDD = 5 V, 3.3 V, 2.5 V, 1.8 V,
IAVG_NF CP = 10 pF, 8 buttons,
Average current without EMC – – 100 μA
Refresh interval = 120 ms, EMC
disabled
IDS Deep Sleep current with I2C on VDD ≤ 3.3 V, TA = 25 °C, I2C Enabled – 2.5 – μA
Boot-up time (time from power-up to first

TBOOT_SYS sensor scan) with system diagnostics 16 buttons, CP ≤ 18 pF – – 900 ms
enabled and EMC disabled
TBOOT_WF sensor scan) with no system diagnostics 10 buttons, CP ≤ 18 pF – – 850 ms
and EMC enabled
TBOOT sensor scan) with no system diagnostics 16 buttons, CP ≤ 18 pF – – 400 ms
and EMC disabled
TBOOT_SYS_WF sensor scan) with both system 10 buttons, CP ≤ 18 pF – – 1350 ms
diagnostics and EMC enabled.
TI2CBOOT Boot up time (time from power to I2C

– – 15 ms
ready)
Time between I2C command and
TI2C_LATENCY_ execution (for all commands except the
– – 50 ms
MAX "Save"[13] command)
Note
13. Save command takes 220 ms to execute.

Table 17. System Specifications (continued)
THI Host interrupt pulse width 5 V, 1.8 V 200 – 700 μs
FBUZ_4 Buzzer output frequency 5 V, 1.8 V – 4.00 – kHz
FBUZ_2.67 Buzzer output frequency 5 V, 1.8 V – 2.67 – kHz
FPWM GPO PWM frequency 5 V, 1.8 V – 106.7 – Hz
TSNS_RST5 Sensor auto-reset interval 5 sec 5 V, 1.8 V – 5 – sec
TSNS_RST20 Sensor auto-reset interval 20 sec 5 V, 1.8 V – 20 – sec
Pulse width on GPOx when the

TFAULTY_SNS_P
corresponding CSx fails the system – 50 – ms
ULSE
diagnostics test
Maximum CP supported for shield
CP_SHIELD – – 100 pF
electrode

Power Consumption and Operational States controllers enter the Look-for-Touch state, in which they scan all
sensors at a slow, user-configured refresh interval. If a touch is
The CY8CMBR3xxx family of controllers is designed with present, the controllers either enter or remain in the Active state,
multiple low-power operational states to meet the low-power in which they update the sensor status and drive the corre-
requirements of battery-powered applications. These controllers sponding outputs. A transition from Active to Look-for-Touch
have the following operational states (see Figure 16): occurs when no touch is detected and the buzzer is not driven.
1. Boot: The devices load the last-known configuration data and Similarly, a transition from Look-for-Touch to Look-for-Proximity
run system diagnostics tests. occurs when no proximity is detected.
2. Active: The sensors are scanned at a speed set by the refresh The following parameters configure the operational states:
interval to determine the presence of touch, proximity, or ■ State timeout (Register STATE_TIMEOUT) defines the
finger position on a slider, and any configured outputs (GPOs, following:
buzzer, and HI) are driven. The refresh interval can be
❐ Minimum time (in seconds) of no touch activity in the Active
configured from 20 ms to 500 ms in steps of 20 ms, either state
using the EZ-Click tool or by configuring the register.
❐ Minimum time to trigger a transition to the Look-for-Touch
3. Look-for-Touch: All the sensors are scanned at a much state
slower, user-configured refresh interval, and any enabled ❐ Minimum time of no touch activity in the Look-for-Touch state
GPOs (such as PWM or DC Toggle) are driven. ❐ Minimum time to trigger a transition to the Look-for-Proximity
4. Look-for-Proximity: Only proximity sensors enabled for state
wake-on approach are scanned. No outputs are driven in this ■ Refresh Interval (Register REFRESH_CTRL) defines the
state. minimum time between the start of subsequent scans in the
5. Deep Sleep: No sensors are scanned, and the Look for Touch and Look-for-Proximity states.
CY8CMBR3xxx devices are in a low-power state with no
processing. The GPO status is reset to the default value in the ■ The Refresh Interval for the Active state is fixed at 20 ms.
Deep Sleep mode. During all three states—Active, Look-for-Touch, and
6. Configuration: No scanning or reporting occurs and the Look-for-Proximity—the devices enter standby mode after
devices wait for a reset for the configuration settings to take scanning and processing the requisite sensors. This helps to
effect. maintain the lowest power consumption within any refresh
interval.
The CY8CMBR3xxx controllers automatically manage
transitions between four operational states (Boot, Active, The following guidelines result in the lowest operating current:
Look-for-Touch, and Look-for-Proximity). The host can force ■ Ground all unused CapSense inputs (CSx)
transition in and out of the Deep Sleep state. A host command
can alter the configuration data, causing a transition to the ■ Minimize CP
Configuration state. A transition can also occur automatically
after boot. ■ Reduce CSx button sensitivity
The Active state emphasizes a high refresh rate (that is, low ■ Configure the design to be optimized for power consumption
refresh interval) for fast responses to button touches and ■ Avoid using a high noise immunity level in a low-noise
proximity events. The Look-for-Touch state enables low power environment
consumption during periods of no-touch activity.
The Look-for-Proximity state allows ultra-low power ■ Use a higher Button Scan Rate or Deep Sleep operating mode
consumption when a human body is not in close proximity. This
state is entered only if the wake-on-approach feature is enabled
(and the toggle is disabled). In this state, the CY8CMBR3xxx
controllers periodically scan proximity sensors to determine the
presence of a human body. If they detect human presence, the

Figure 16. CY8CMBR3xxx Operational States and Transitions
Deep Sleep
(S)
SLEEP Command
SLEEP Command
SLEEP Command
I2C Address Match
No Touch No Touch
Boot Active Look-for-Touch Look-for-Proximity

Reset
(B) (A) (T) (P)
Proximity
Touch Detected Detected
I2C Commands
Configuration Corrupted I2C Commands
I2C Commands
Configuration
(C)
Reset

Response Time Host Communication Protocol

Response time for button and proximity sensors is the minimum The CY8CMBR3xxx CapSense controllers communicate to the
amount of time for which the sensor must be active/inactive host through the I2C interface. I2C is a simple two-wire
(touched or proximity present), for the device to detect it as a synchronous communication protocol that uses the following two
valid activation or deactivation event. lines:
For the CY8CMBR3xxx device family, response time numbers ■ Serial Clock (SCL) –This line is used to synchronize the slave
for different sensors can be estimated using the design toolbox. with the master.
The following response time numbers are provided in the
toolbox: ■ Serial Data (SDA) – This line is used to send data between the
master and the slave.
■ RFBT: This value represents the response time for first button
touch when the device is in the Look-for-Touch or The CY8CMBR3xxx I2C interface has the following features:
Look-for-Proximity operational states. ■ Bit rate of 400 kbps
■ RCBT: This value represents the response time for consecutive ■ Configurable I2C slave address (7-bit)
button touches when the device is in the Active operational
state. ■ No bus-stalling or clock-stretching during transactions
■ RFST: This value represents the response time for the first slider ■ Register-based access to the I2C master for reads and writes
touch when the device is in the Look-for-touch operational ■ Repeated START support
state.
The CY8CMBR3xxx CapSense controllers can be part of a
■ RCST: This value represents the response time for consecutive single-slave or a multi-slave environment.
slider touches when the device is in the Active operational state.
Figure 17. I2C Communication Between One Master
■ RBSR: This value represents the response time for button and and One Slave
slider release events when the device is in the Active opera-
tional state. VDD VDD VDD
■ RProx: This value represents the response time for detecting
valid proximity events on a proximity sensor.
■ RProx_release: This value represents the response time for
proximity release events on a proximity sensor.
CY8CMBR3xxx Resets HI
The CY8CMBR3xxx family of CapSense controllers has three HOST CY8CMBR3xxx

reset options – two hardware resets and one software reset. SCL
■ Hardware Resets SDA

❐ Power reset –Toggling the power on the VDD pin of the
CapSense controller resets the controller.
❐ XRES reset – Pull the device XRES pin LOW for TXRES du-
ration and then pull it HIGH.
■ Software Reset I2C Slave Address
To reset the software, write one SW_RESET command to the To identify each device on the I2C bus, a unique 7-bit I2C slave
command register. All three resets are functionally equivalent, address is used. When the master wants to communicate with a
and the CapSense controllers enter the Boot state (refer to the slave on the bus, it sends a START condition followed by the
Power Consumption and Operational States section) after any appropriate I2C address. The START condition alerts all slaves
reset. on the bus when a new transaction starts. The slave with the
specified I2C address acknowledges the master. All the other
slaves ignore further traffic on the bus until the next START
condition is detected.

I2C Communication Guidelines Write Operation

1. After device reset, the host should wait for TI2CBOOT time A host performs the following steps during a write operation:
before initiating any I2C communication. The CY8CMBR3xxx 1. The host sends the START condition.
CapSense controller family will generate a NACK if the host
tries to communicate before this period. 2. The host specifies the slave address, followed by the
read/write bit to specify a write operation.
2. The CY8CMBR3xxx controller is expected to NACK the
address match event if it is in the standby mode (during any 3. The device may NACK the host.
of the operational states – Deep Sleep, Look-for-Touch, 4. The host sends a Repeat Start (or a stop followed by a start
Look-for-Proximity, or Active). The controller wakes up from condition), followed by the address and read/write bit, to
the standby mode on an address match but sends NACK until specify a write operation. The host keeps sending the Repeat
it transitions into the Active state. When the device NACKs a Start with the address and read/write bits until the device
transaction the host is expected to retry the transaction until sends an ACK. The device ACKs the host.
it receives an ACK. 5. The host specifies the register address to which it has to write.
3. If there is a delay of more than 340 ms between two subse- 6. The device ACKs the host.
quent bytes within an I2C transaction, the device may go into
standby mode and the host may get a NACK. 7. The host starts sending the data to the device, which is written
to the register address specified by the host. This is followed
4. When the host sends the SAVE_CHECK_CRC command, the by an ACK from the device.
device will send a NACK on any subsequent I2C transactions
until the command execution is completed. The time taken to 8. If the write operation includes more bytes, each one is written
complete the SAVE_CHECK_CRC command is 220 ms typ. to the successive register address. Each successive byte is
followed by an ACK from the device.
5. The host must not write to read-only registers. All write opera-
tions directed to such read-only registers are ignored. 9. After the write operation is complete, the host sends the STOP
condition to the device. This marks the end of the communi-
cation (see Figure 18).
Figure 18. Host Writing x Bytes to the Device
Slave Slave Register

Data[n] Data[n+1] Data[n+x]
Address
` Address ` Address (n)
AAAAAAA R A A A A A A A R R R R R R R R R D D D D D D D D D D D D D D D D DD D D D D D D
S
65 43 210W
N NS A A A A AP
6 5 4 3 2 1 0 W 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 76 5 4 3 2 1 0
Start
NACK
Write
Start
Start
NACK
Stop
ACK
ACK
ACK
ACK
ACK
Setting the Device Data Pointer 4. The host sends a Repeat Start, followed by the address and
read/write bit, to specify a write operation. The host keeps
The host sets the device data pointer to specify the starting point
sending the repeat start with the address and read/write bit
for future read operations. Setting the device data pointer
until the device sends an ACK.
involves the following steps:
5. The device ACKs the host.
1. The host sends the START condition.
6. The host specifies the register address. Any further read
2. The host specifies the slave address, followed by the
operation will take place from this address.
7. The host sends the STOP condition (see Figure 19).
3. The device may NACK the host.
Figure 19. Host Setting the Device Data Pointer
Slave Slave Register

Address ` Address `pointer
AAAAAAA R AAAAAAA R R R R R R RRR
S N N S A AP
6 5 4 3 2 1 0W 6 5 4 3 2 1 0W 7 6 5 4 3 2 10
Start
Start
Start
NACK
NACK
Write
ACK
Stop
ACK

Read Operation 6. The device retrieves the byte from the pre-specified register
address and sends it to the host. The host ACKs the device.
The host performs the following steps for a read operation:
7. Each successive byte is retrieved from the successive
1. The host sends the START condition.
register address and sent to the host, followed by ACKs from
2. The host specifies the slave address, followed by the the host.
8. After the host receives the required bytes, it NACKs the
3. The device may NACK the host. device.
4. The host sends a repeat start followed by the address and 9. The host sends the STOP condition to the device. This marks
read/write bit to specify a write operation. The host keeps the end of the communication (see Figure 20).
sending the repeat start with the address and read/write bits
until the device sends an ACK.
5. The device ACKs the host.
Figure 20. Host Reading x Bytes from the Device
Slave Slave
Data[n] Data[n+1] Data[n+2] Data[n+x]
Address ` Address `
AAAAAAA R A A A A A A A R D D D D D D D D D D D D D D D D D D D D D D D D DD D D D D D D
S N NS A A A A NP
6 5 4 3 2 1 0W 6 5 4 3 2 1 0W 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 76 5 4 3 2 1 0
Start
Start
Read
NACK
NACK
ACK
ACK
ACK
ACK
Stop
NACK
Start
Legend:
CY8CMBR3xxx to Host
HOST to CY8CMBR3xxx

Layout Guidelines and Best Practices

Cypress provides an extensive set of design guidelines for CapSense board designs. Refer to the CY8CMBR3xxx CapSense Design
Guide for complete system guidelines.
Ordering Information
The CY8CMBR3xxx family consists of six parts that vary depending on the parameters. The following table lists all the parts and a
summary of the features supported.
Table 18. Ordering Information
Ordering Code Package Operating Total CapSense Sliders Proximity GPOs Shield Communication
Type Temperature Capacitive Buttons Sensors Interface
Sensing
Inputs
CY8CMBR3116-LQXI 24-pin QFN Industrial Up to 16 Up to 16 0 Up to 2 Up to 8 1 I2C / GPO
CY8CMBR3106S-LQXI 24-pin QFN Industrial Up to 16 Up to 11 Up to 2 Up to 2 0 1 I 2C
CY8CMBR3110-SX2I 16-pin SOIC Industrial Up to 10 Up to 10 0 Up to 2 Up to 5 1 I2C / GPO
CY8CMBR3108-LQXI 16-pin QFN Industrial Up to 8 Up to 8 0 Up to 2 Up to 4 + HI 1 I2C / GPO
CY8CMBR3102-SX1I 8-pin SOIC Industrial Up to 2 Up to 2 0 Up to 2 Up to 1 1 I2C/GPO
CY8CMBR3002-SX1I 8-pin SOIC Industrial 2 2 0 0 2 0 GPO

Packaging Dimensions
Figure 21. 24-Pin QFN (Sawn) 4 × 4 × 0.55 mm
001-13937 *E

Figure 22. 16-Pin QFN 3 × 3 × 0.6 mm
001-87187 **
Figure 23. 16-Pin SOIC (150 mil)
51-85068 *E

Figure 24. 8-Pin SOIC (150 mil)
51-85066 *F
Thermal Impedances
Table 19. Thermal Impedances
Package Typical θJA (°C/W)
8-pin SOIC 127 °C/W
16-pin SOIC 80 °C/W
16-pin QFN 33 °C/W
24-pin QFN 21 °C/W
Solder Reflow Specifications

Table 20 illustrates the minimum solder reflow peak temperature to achieve good solderability.
Table 20. Solder Reflow Specifications
Package Maximum Peak Temperature Time at Maximum Temperature
8-pin SOIC 260 °C 30 s
16-pin SOIC 260 °C 30 s
16-pin QFN 260 °C 30 s
24-pin QFN 260 °C 30 s

Appendix
Units of Measure
Table 21. Units of Measure
Symbol Units of Measure
°C degrees Celsius
fF femtofarad
Hz hertz
kbps kilobits per second
kHz kilohertz
kΩ kilo ohm
MHz megahertz
µA microampere
µF microfarad
µs microsecond
mA milliampere
ms millisecond
mV millivolt
nA nanoampere
ns nanosecond
nV nanovolt
Ω ohm
pp peak-to-peak
pF picofarad
s second
V volt

Glossary
CP Parasitic capacitance.
EZ-Click The customizer tool (GUI) that enables easy register configurability and debugging for the
CY8CMBR3xxx family of controllers.
GPO General Purpose Output – that is, an output pin on a chip that the user can configure.
FSS Flanking Sensor Suppression. An algorithm that distinguishes between signals from closely spaced
buttons, eliminating false touches. It ensures that the system recognizes only the first button touched.
SmartSense Cypress CapSense algorithm that continuously compensates for system, manufacturing, and
environmental changes.
SNR A ratio of the sensor signal, when touched, to the noise signal of an untouched sensor.
Toggle An MBR device feature that toggles the state of GPOs on every sensor activation.
Open-Drain Low-Drive An output pin drive mode wherein logic 0 is represented by a low voltage (that is, Voltage < VOL), whereas
mode logic 1 is represented by floating the output line to a HIGH impedance state.
Strong Drive mode An output pin drive mode where logic 0 is represented by a low voltage (that is, Voltage < VOL), whereas
logic 1 is represented by a high voltage (that is, Voltage V > VOH).
Raw counts A count value representing a digital count equivalent of sensed capacitance.
Baseline A filtered version of the raw counts. The baseline essentially tracks the value of the parasitic capacitance
in the system but does not track the value of the finger capacitance.
Parasitic capacitance The intrinsic capacitance of PC board traces to sensors.
Finger capacitance Additional capacitance introduced on a CapSense sensor when a finger approaches/touches the sensor.
Global setting A setting value that is common for all elements of a set.
Active LOW signal A signal that indicates the active state by logic 0 and the inactive state by logic 1 values.
Active HIGH signal A signal that indicates the active state by logic 1 and the inactive state by logic 0 values.
Reference Documents
Document Title Description
CapSense CY8CMBR3xxx Design Guide Provides design guidance for using capacitive touch sensing (CapSense) function-
ality with the CY8CMBR3xxx family of CapSense controllers.
Getting Started with CapSense® Provides a starting point for anyone who is new to capacitive touch sensing
(CapSense) and for anyone learning key design considerations and layout best
practices.
Design Toolbox Includes four sections – General Layout Guidelines for a CapSense PCB, a layout
estimator for estimating button dimensions, a power consumption calculator (based
on button dimensions), and the Design Validation tool to validate the layout design.
EZ-Click User Guide Gives instructions on how to install and uninstall the EZ-Click Customizer tool and
describes how to set up the boards. It also includes detailed descriptions of all the
tabs in the GUI.
CY8CMBR3xxx Programming Specifications Gives the information necessary to program the nonvolatile memory of the
CY8CMBR3xxx devices. It describes the communication protocol required for
access by an external programmer, explains the programming algorithm, and gives
electrical specifications of the physical connection.
CapSense® Express™ Controllers Registers Lists and details all registers of CY8CMBR3102, CY8CMBR3106S,
TRM CY8CMBR3108, CY8CMBR3110, and CY8CMBR3116 CapSense® Express™
controllers. All registers are listed in the order of address.

Document History Page

Document Title: CY8CMBR3002, CY8CMBR3102, CY8CMBR3106S, CY8CMBR3108, CY8CMBR3110, CY8CMBR3116
CapSense® Express™ Controllers with SmartSense™ Auto-tuning 16 Buttons, 2 Sliders, Proximity Sensors
Document Number: 001-85330
Orig. of Submission
Revision ECN Description of Change
Change Date
*G 4359354 DCHE 05/06/2014 Updated links to the following web pages: EZ-Click, Cypress online store, and
MBR3 Evaluation Kit.
Changed time at max temperature from 20 seconds to 30 seconds.

Sales, Solutions, and Legal Information

Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office
closest to you, visit us at Cypress Locations.
Products PSoC® Solutions

Automotive cypress.com/go/automotive psoc.cypress.com/solutions
Clocks & Buffers cypress.com/go/clocks PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP
Interface cypress.com/go/interface
Cypress Developer Community
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Community | Forums | Blogs | Video | Training
cypress.com/go/plc
Memory cypress.com/go/memory Technical Support
PSoC cypress.com/go/psoc cypress.com/go/support
Touch Sensing cypress.com/go/touch
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Wireless/RF cypress.com/go/wireless
© Cypress Semiconductor Corporation, 2013-2014. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of
any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for
medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as
critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems
application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Document Number: 001-85330 Rev. *G Revised May 6, 2014 Page 37 of 37

PSoC® and CapSense® are registered trademarks and PSoC Designer™, SmartSense™, EZ-Click™, CapSense Express™, and Programmable System-on-Chip™ are trademarks and of Cypress
Semiconductor Corporation.
Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided
that the system conforms to the I2C Standard Specification as defined by Philips. As from October 1st, 2006 Philips Semiconductors has a new trade name - NXP Semiconductors.
All products and company names mentioned in this document may be the trademarks of their respective holders.

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CY8CMBR3002, CY8CMBR3102

CapSense Express 16 Button Controller

Features ❐ Flanking Sensor Suppression (FSS) to eliminate false touch-

Document Number: 001-85330 Rev. *G Page 2 of 37

System Overview which senses the change in capacitance based on touch or

Document Number: 001-85330 Rev. *G Page 3 of 37

Features Overview The CY8CMBR3xxx family offers water-tolerance to liquids such

Document Number: 001-85330 Rev. *G Page 4 of 37

Document Number: 001-85330 Rev. *G Page 5 of 37

Document Number: 001-85330 Rev. *G Page 6 of 37

CY8CMBR3106S (16 Sensing Inputs; Sliders Supported)

Document Number: 001-85330 Rev. *G Page 7 of 37

CY8CMBR3108 (8 Sensing Inputs)

Document Number: 001-85330 Rev. *G Page 8 of 37

CY8CMBR3110 (10 Sensing Inputs)

Pin # Pin Name Type Description If unused Default Pin Diagram

6 VCC Power Internal regulator output. NA VCC

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CY8CMBR3102 (2 Sensing Inputs)

Pin # Pin Name Type Description If unused Default Pin Diagram

4 VDD Power Power NA VDD

CY8CMBR3002 (2 Sensing Inputs)

4 VDD Power Power NA

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CY8CMBR3xxx Ecosystem Tools

■ Select the appropriate part number based on an Technical Support

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Device Feature Details Automatic Threshold

host is late to service the host Touch on Sensor

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Noise Immunity General-Purpose Outputs

CS0 CS1 CS2 CS3 No sensor touched

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■ Can be enabled only when the GPO is directly controlled by a CSx Active

■ Can be enabled or disabled individually on each capacitive

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Figure 9. Buzzer Operation with Consecutive Touches Latch Status Output

BUZ Table 8. Latch Status Read

■ When the buzzer is enabled, the buzzer output toggles between

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Example Application Schematics

■ CS0–CS3: CapSense buttons ■ VDDIO pin: To supply voltage, which is ≤ VDD

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Figure 13. Example Schematics Demonstrating Multiple Sensor Types

CS2 560E R8 3 16 R9 560E SLD22

CapSense Radial slider 5-Seg

In Figure 13[7, 9], the CY8CMBR3106S device is configured in ❐ AC buzzer (1-pin).

■ VCC pin: 0.1 uF to ground ■ HI pin: To host

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1.8 V to 5.5 V 1.71 V to 1.89 V

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IIO Current per GPIO – – 25 mA

Parameter Description Conditions/Details Min Typ Max Units

1.71 V < VDD < 1.89 V 1.71 – VDD V

+25 °C TA, VDD > 2 V, sensitivity ≥ 0.1 pF – – ±50 mV

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Table 12. XRES DC Specifications

Parameter Description Conditions/Details Min Typ Max Units