ClassSession 58932020621639390

MEMORY SYSTEMS
MEMORY HIERARCHY
This refers to the ordered arrangement of memory systems or storage in current computer architecture
which seeks to take advantage of memory locality in reference to computer program execution.
Each level of the hierarchy has either increasing or decreasing tendencies of the characteristics that are
associated with memory systems. These characteristics are: Speed, Access time, Latency, Size, Cost,
Robustness, Power Consumption and Memory Length.
1. SPEED: This is the amount of information/data that can be accessed from a given memory system per
unit time. It is the number of bits (binary digits) that can be transferred into or out of a given memory
system per unit time. In other words, it is the rate at which information or data can written to or read
from, a given memory system per second. Units are bit per second (bps).
2. ACCESS TIME: This is the time taken for data to become available for use after a read or write
operation is initiated. The units for access time are Seconds (s).
3. LATENCY: This is the amount of time it takes for a red/write mechanism to position itself at the
appropriate location above or on the media prior to a read-write operation. It is normally associated
with memory systems that have moving parts. The units for Latency are Seconds (s).
4. CAPACITY: This is the maximum amount of data that a given memory system can accommodate for
storage, either long term or short term. The unit for capacity is the Byte (B).
5. SIZE: This is the maximum volume that a given memory system/object can occupy. It is simply, how
big or small the memory system is. Units, cubic meters (m 3).
6. COST: This the total expense in terms of currency that go into the manufacture and or purchase of a
memory system.
7. ROBUSTNESS: This is the measure of the susceptibility of a memory system to errors. It is simply the
measure of the reliability of a a memory system to errors, or how prone it is to errors.
8. POWER CONSUMPTION: This is the amount of electric power that a given memory system utilizes or
consumes in its overall operation. The units are Kilowatt Hours (kWhr).
9. MEMORY LENGTH: This is the amount of time that a given memory system can is capable of holding
data reliably, without the introduction of errors in the absence of a power connection.
THE MEMORY HIERARCHY

1 Processor Registers: Fastest access (1 CPU Cycle), Only Hundreds Bytes capacity.
2 Level One (L1) Cache: Often accessed in just a few CPU cycles, usually tens of bytes.
3 Level Two (L2) Cache: Higher Latency than L1 by 2x to 10x, often 512kB or more.
4 Level Three (L3) Cache(Optional): Higher Latency L2, often several MB in capacity.
5 Dynamic RAM: Hundreds of CPU Cycles, up to multiple GBs in capacity, Access time may not be
uniform.
6 Flash Memory: Faster than disks, up to 16/64 GB, transfer usually over USB.
7 Magnetic Disks (HDD, Zip Disk, Floppy Disk): Hundreds of thousands of cycles latency, TB
capacity.
8 Optical Storage (Blu-Ray, DVDs, CDs, Mini- Disks): Slower, larger capacity
9 Magnetic Tape
 From the top of the hierarchy to the Bottom, Speed reduces.

 From the top of the hierarchy to the Bottom, Access Time increases.
 From the top of the hierarchy to the Bottom, latency increases.
 From the top of the hierarchy to the Bottom, Capacity increases.
 From the top of the hierarchy to the Bottom, Size also increases.
 From the top of the hierarchy to the Bottom, Cost reduces.
 From the top of the hierarchy to the Bottom, Robustness increases.
 From the top of the hierarchy to the Bottom, Power Consumption increases.
 From the top of the hierarchy to the Bottom, Memory Length increases as well
Levels 1 to 5 are categorized as Short Term memory (Volatile).

Levels 6 & 7 are Medium Term Memory.
Levels 8 & 9 are Long Term Memory.
CACHE MEMORY
This is a relatively small, high speed memory that stores the most recently and frequently used
instructions or data from the larger but slower main memory. it is designed and built from Static RAM
(SRAM) cells which are composed of flip flops. It acts as an intermediate between the Processor and the
RAM or main memory. In so doing, it optimizes the performance of the computer system by reducing the
amount of time the processor has to wait for data and instructions from the larger but definitely slower
main memory.
L1 and L2 Caches
L1 cache is usually integrated into the processor chip and has very limited storage capacity. L1 is also
known as Primary Cache. L2 cache is normally in a separate memory chip external to the processor and
usually has a higher capacity than L1 cache. L1 cache is also known as Secondary Cache. Some systems
may have higher level caches (L3, L4, L5, etc) but these are optional. L1 & L2 are the most common.
CHARACTERSISTICS OF MEMORY SYSTEMS

RANDOM ACCESS MEMORIES (RAMs)
RAMs are read/write memories in which data can be written to or read from any selected address in any
sequence in an equal amount of time. When a data unit is written into a given address in the RAM, the
data unit previously stored at that location/address is replaced by the new data unit. When a data unit is
read from a given address in the RAM, the data unit remains stored and is not destroyed by the read
operation. This Non-Destructive Read operation can be viewed as Copying the content of an address while
leaving the content intact.
A RAM is typically used for short term data storage because it cannot retain the stored data bits when the
electric power is turned off.
THE RAM FAMILY

There are Two (2) categories of RAM, these are Static RAM (SRAM) and Dynamic RAM (DRAM).
Static RAM uses Flip flops as storage elements and can therefore store data indefinitely as long as dc power
is applied.
Dynamic RAM uses Capacitors as storage elements and cannot retain data very long without the capacitors
being recharged by a process called Refreshing. Both SRAMs & DRAMs will lose data when dc power is
removed and, therefore, are classified as Volatile Memories.
Data can be read much faster from SRAMs than from DRAMs. However, DRAMs can store much more data
than SRAMs for a given physical size and cost because the DRAM memory cell is much simpler, and more
can be crammed into a given area than in the SRAM.
STATIC RAMs (SRAMs)

All SRAMs are characterized by flip flops storage cells that are typically implemented in Integrated Circuits
with several MOS (Metal Oxide Semi-conductor) Transistors (MOS Field Effect Transistors [MOSFETs] in
particular). There are also some smaller SRAMs implemented with Bipolar Transistors. As long as dc power
is applied to Static RAM memory cell, it can retain a 0 or 1 state indefinitely. If power is removed, the
stored data bit is lost.
(Diagram for the sram cell)
The cell is selected by placing an active (high) level on the Bit Select line and a data bit (0 or 1) is written
into the cell by placing it on the Data and Data lines. A data bit is read by taking it off the Data and Data
lines. Input data and Output data can share the same lines because the read and write operations occur at
different times.
DYNAMIC RAMs (DRAMs)

Dynamic memory cells store a data bit in a small capacitor rather than in a latch. The advantage of this
type of cell is that it is very simple, thus allowing very large memory arrays to be constructed on a chip at a
lower cost per bit. The disadvantage is that the storage capacitor cannot holds its charge over an extended
period of time will lose the stored data bit unless its charge is refreshed periodically. Refreshing requires
additional memory circuitry and complicates the operation of DRAM.
Diagram for the dram cell
- DRAM is cheaper than SRAM

- It can store more data per unit area
- It has a simpler structure than SRAM.
- It is slower than SRAM because of the refresh before reading.
DIRECT MEMORY ACCESS (DMA)

DMA is an input output strategy that seeks to move data between a peripheral and the CPU’s main
memory without the direct intervention of the CPU itself. DMA provides the fastest possible means of
transferring data between an interface and the main memory as it carries no CPU overheads and leave the
CPU free to do its work.
DMA normally operates in one of two modes.

i) Burst Mode DMA [Hold Mode]
ii) Cycle Steal Mode [Transparent Mode, Interleaved Mode]
BURST MODE DMA

This is the mode of DMA in which the DMA Controller seizes control of the System Bus for the duration of
the data transfer or at least for the transfer of a large number of words. Burst mode DMA allows data to be
moved into memory as fast as the weakest link in the chain Memory/Bus/Interface will permit.
Unfortunately, in Burst Mode DMA, the CPU is effectively Halted [Held] because it cannot use its data and
address busses.
CYCLE STEAL MODE

In this mode of DMA, the DMA operations are Interleaved with the normal memory accesses of the
computer [CPU]. As the computer does not require access to the system busses 100% of the time, the DMA
transfer can take place when the busses are free. In many microprocessor systems, thus free time occurs
when the CPU is busy generating an address in readiness for a memory read/write cycle.
When the system clock is LOW, the CPU does not need the busses, so the DMA Controller grabs them and
carries out the data transfer. When the system clock is HIGH, the CPU carries out its normal memory
access cycle. DMA by Cycle Stealing is said to be Transparent to the computer due to the fact that the CPU
does not “See” it. That is, the transfer is invisible to the computer as NO processing time is lost.
INTEGRATED CIRCUITS
There are four levels of integration, namely:
i) Small Scale Integration (SSI)

ii) Medium Scale Integration (MSI)
iii) Large Scale Integration (LSI)
iv) Very Large Scale Integration (VLSI)

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MEMORY SYSTEMS

THE MEMORY HIERARCHY

 From the top of the hierarchy to the Bottom, Speed reduces.

Levels 1 to 5 are categorized as Short Term memory (Volatile).

CHARACTERSISTICS OF MEMORY SYSTEMS

THE RAM FAMILY

STATIC RAMs (SRAMs)

(Diagram for the sram cell)

DYNAMIC RAMs (DRAMs)

- DRAM is cheaper than SRAM

DIRECT MEMORY ACCESS (DMA)

DMA normally operates in one of two modes.

BURST MODE DMA

CYCLE STEAL MODE

There are four levels of integration, namely:

i) Small Scale Integration (SSI)

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