AN1757

APPLICATION NOTE

SWITCHING FROM THE L6561 TO THE L6562

by Luca Salati

1 INTRODUCTION
Conceived on the same core of the L6561 and pin-to-pin compatible with it (see fig. 1), the L6562 is the new
ST's Transition Mode (TM) controller for high Power Factor Corrector stages: the replacement can be done with
minimum or no modification of a stage designed with the L6561.
As the building blocks of these two IC's are the same (fig. 1), one can design with the L6562 using the guidelines
given for L6561, in particular in the ST Application Note 966 ("L6561, enhanced transition mode power factor
corrector"). All the documentation produced for L6561 can be easily adapted to the L6562 ([1] [2] [3] [4]).
The first paragraph of this Application Note is dedicated to explain the differences in terms of Electrical Charac-
teristics between these two controllers: it will be clear that these modifications do not require component chang-
ing when switching from L6561 to L6562.
Besides providing good results in term of power factor, this new IC considerably reduces the Total Harmonic
Distortion (THD) without need for external components: an innovative circuit improves the behavior of the sys-
tem reducing the conduction dead-angle that occurs to the AC input current near the zero-crossings of the line
voltage (paragraph 3) making easier the compliancy with regulation.
The increased gate driver capability (typically 600mA sourcing and 800mA sinking) makes the L6562 suitable
for a wide range of applications (with output power up to 300W).Based on that, L6562 can be fit the following
applications: Lighting, IEC61000-3-2 compliant SMPS (TV, Desktop, PC, Monitors…), hi-end AC-DC adapter/
charger, entry level server & web server.

2 L6562 VS. L6561: ELECTRICAL CHARACTERISTICS DIFFERENCES

A series of tables will follow highlighting the differences between L6561 and L6562 in terms of Electrical Char-
acteristics; at the end of each section, a short description explains the impact of these differences on the appli-
cation and the consequent benefits.

Figure 1. Block Diagram

COMP MULT CS
2 3 4
1
INV - MULTIPLIER & 40K
2.5V
+ THD OPTIMIZER

5pF
VOLTAGE OVER-VOLTAGE
REGULATOR DETECTION VCC

8 15V
VCC
7V INTERNAL R
25V SUPPLY Q
R1 S
7
+ UVLO DRIVER GD
VREF2
R2 -
ZERO CURRENT
- DETECTION
2.1V STARTER
6 +
GND 1.6V

DISABLE
5
ZCD D03IN1465

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AN1757 APPLICATION NOTE

ELECTRICAL CHARACTERISTICS
L6561 L6562
Symbol Parameter Test condition Unit
Min Typ Max Min Typ Max
SUPPLY VOLTAGE
VCC Operating range After turn-on 10.3 18 10.3 22 V

VZ Zener voltage for L6561: ICC=25mA 18 20 22 22 25 28 V

for L6562: ICC=20mA

The supply voltage upper limit is extended to 22V (min.) to provide more headroom for supply voltage changes.
This also makes it easier to fit the supply voltage of the L6562 to that of the cascaded DC-DC converter control
IC.
SUPPLY CURRENT
Symbol Parameter Test condition L6561 L6562 Unit
ISTART-UP Start-up current before turn-on (VCC =11V) 20 50 90 40 70 µA

IQ Quiescent current After turn-on 2.6 4 2.5 3.75 mA

ICC Operating Supply @ 70KHz 4 5.5 3.5 5 mA

Current
IQ Quiescent current During OVP (either static or 2.1 2.2 mA
dynamic) or VZCD ≤150mV

The consumption of the chip has been reduced providing an advantage in terms of power dissipation on the
start-up resistors, if used, and consumption of the self-supply circuit.
MULTIPLIER INPUT
Symbol Parameter Test condition L6561 L6562 Unit
K Gain VMULT =1V, VCOMP=4V 0.45 0.6 0.75 0.5 0.6 0.7 1/V

The improved control process allows reducing the statistical spread of this parameter; this change does not im-
pact on the application design but improves reliability of IC's quiescent point
ERROR AMPLIFIER
Symbol Parameter Test condition L6561 L6562 Unit
ICOMP Source Current VCOMP=4V, VINV=2.4V -2 -4 -8 -2 -3.5 -5 mA

Upper clamp voltage ISOURCE=0.5mA 5.8 5.3 5.7 6 V

VCOMP
Lower clamp voltage ISINK = 0.5 mA 2.25 2.1 2.25 2.4 V

The improved control process allows reducing the statistical spread of this parameter; this change does not im-
pact on the application design but improves reliability of IC's quiescent point.
CURRENT SENSE COMPARATOR
Symbol Parameter Test condition L6561 L6562 Unit
td(H-L) Delay to Output 200 450 200 350 ns

0 15 mV

Current sense offset VCOMP=0V 30 mV

VCOMP=2.5V 5 mV

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 AN1757 APPLICATION NOTE

The maximum propagation delay (Delay to output) of the current loop has been reduced: this provides advan-
tages at both light load (lowering the minimum duty cycle) and heavy load (reducing the amount of peak inductor
current exceeding the programmed value).
Offset of the current sense comparator: in the L6561 it depends on the manufacturing process; in the L6562
such parameter is kept under control because it defines the amount of correction introduced by the internal THD
corrector circuit (see paragraph "3. THD optimizer circuit").
ZERO CURRENT DETECTOR

Symbol Parameter Test condition L6561 L6562 Unit

VZCDH Upper clamp voltage for L6561: IZCD=-3mA 4.7 5.2 6.1 5.0 5.7 6.5 V
for L6562: IZCD=-2.5mA

IZCDsrc Source current -3 -10 -2.5 -5.5 mA

capability

IZCDsnk Sink current capabil- 3 10 2.5 mA

ity

VZCDen Restart threshold 350 mV

IZCDres Restart current after -100 -200 -300 30 75 µA

disable

Upper clamp voltage: the change does not have impact on the application design; it just reflects a change of
internal structure that reduces temperature drift.
The source and sink current capabilities for the L6562 are lower than the relevant in the L6561: this is the
effect of the reduced spread of these two parameters. From the application design point of view this leads to a
higher value for the minimum resistance connected between the auxiliary winding and the ZCD pin (R6 in the
schematic of Figure 5). Generally this is not a key issue because the value for this resistor is kept much higher
than the minimum calculated, to achieve optimum MOSFET turn-on.
The restart threshold, not specified in the L6561 though present, is specified in the L6562.
The restart current after disable has been reduced to limit IC consumption while disabled.
STARTER

Symbol Parameter Test condition L6561 L6562 Unit

tSTART Start Timer period 70 150 400 75 130 300 µs

The improved control process allows reducing the statistical spread of this parameter; this change does not im-
pact on the application design
OUTPUT OVERVOLTAGE

Symbol Parameter Test condition L6561 L6562 Unit

Hys. Dynamyc OVP Hys- 30 µA

teresys

This parameter, not specified in the L6561 though present, is specified in the L6562

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AN1757 APPLICATION NOTE

ELECTRICAL CHARACTERISTICS (continued)

GATE DRIVER

Symbol Parameter Test condition L6561 L6562 Unit

IGdsource = 20 mA 0.7 1 2 2.6 V

VOH
Dropout voltage IGDsource = 200 mA 1.2 2 2.5 3 V

VOL IGDsink = 200 mA 1.5 0.9 1.9 V

tf Current fall time 40 100 30 70 ns

tr Current rise time 40 100 40 80 ns

VOclamp Output clamp volt- IGDsource = 5mA; Vcc = 20V not present 10 12 15 V
age

(*) IGD Sink Current VCC =3.5V VGD = 1V 5 10 mA

(*) UVLO saturation Vcc = 0 to Vccon, 1.1 V

Isink=10mA

Dropout voltage: this is a fixed offset due to the internal driver structure that has been changed.
Current Rise and fall time: the driver modification has led to a lower driver dynamic resistance and the effect
is the reduction of fall and rise time of the driver current.
Output Clamp voltage: the high-level voltage of this pin is clamped at about 12V to avoid excessive gate volt-
ages in case the pin is supplied with a high Vcc.
(*): the aim of this feature is to avoid undesired MOSFET turn-on due to spurious spikes when the IC is under
UVLO condition. In the L6561 this feature is characterized through the current that the GD pin is able to sink
under the given test conditions.
For the L6562 it is guaranteed that over the whole UVLO range, the GD pin is able to sink up to 10mA without
exceeding 1.1V, a voltage definitely lower than the turn-on threshold of the MOS.

3 THD OPTIMIZER CIRCUIT

The L6562 is equipped with a special circuit that reduces the conduction dead-angle occurring to the AC input
current near the zero-crossings of the line voltage (crossover distortion). In this way the THD (Total Harmonic
Distortion) of the current is considerably reduced, as shown in fig. 2.

Figure 2. L6562 vs. L6561: THD

D03IN1466
12

10

8
L6561
6

L6562
4

2
85 110 135 175 220 265

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 AN1757 APPLICATION NOTE

A major cause of this distortion is the inability of the system to transfer energy effectively when the instanta-
neous line voltage is very low. This effect is magnified by the high-frequency filter capacitor placed after the
bridge rectifier, which retains some residual voltage that causes the diodes of the bridge rectifier to be reverse-
biased and the input current flow to temporarily stop.
To overcome this issue, the circuit embedded in the L6562 forces the PFC pre-regulator to process more energy
near the line voltage zero-crossings as compared to that commanded by the control loop. This will result in both
minimizing the time interval where energy transfer is lacking and fully discharging the high-frequency filter ca-
pacitor after the bridge.
Figure 3 shows the THD corrector circuit block diagram and the waveforms in the significant points; the multiplier
has two inputs: the first one is a fraction of the rectified input voltage and the second one is the output of L6562
error amplifier. The multiplier output is the product of these two quantities and (ideally) is a rectified sinusoid
whose peak amplitude decreases by increasing the input voltage.
This waveform represents the threshold that the current sense voltage must cross to trigger the PWM compar-
ator (see fig. 1).
Essentially the THD improvement circuit artificially increases the ON-time of the power switch with a positive
offset added to the output of the multiplier in the proximity of the line voltage zero-crossings. This offset is re-
duced as the instantaneous line voltage increases, so that it becomes negligible as the line voltage moves to-
ward the top of the sinusoid.
The effect of the circuit is shown in the figure 4, where the key waveforms of a standard TM PFC controller are
compared to those of the L6562.
To maximally benefit from the THD optimizer circuit, the high-frequency filter capacitor after the bridge rectifier
should be minimized, compatibly with EMI filtering needs. A large capacitance, in fact, introduces a conduction
dead-angle of the AC input current in itself - even with an ideal energy transfer by the PFC pre-regulator - thus
making the action of the optimizer circuit little effective.

Figure 3. THD corrector: block diagram

COMP

+
MULT MULTIPLIER to PWM
+ COMPARATOR

OFFSET
GENERATOR

30mV
@ Vac1
@ Vac2 > Vac1 D03IN1467

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AN1757 APPLICATION NOTE

Figure 4. Effect of THD optimizer circuit

Input current Input current

Rectified mains voltage Rectified mains voltage

Imains
Input current Imains
Input current

Vdrain
MOSFET's drain voltage Vdrain
MOSFET's drain voltage

Figure 5. EVAL6562N-80W schematic

T1 D1 NTC

R11 VO=400V
R4 R14 C23 PO=80W
C5
R51
R1 R5 D8 D2 R6 R12
C3
R5
C1
+
B1 5 2
FUSE R2 8 1

Vac 3 L6562
- R7
(85V to 265V) 7 Q1 R13 C6

R3 C29 C4 C2 6 4
R15

C7 R8 R9 R10

D03IN1468

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 AN1757 APPLICATION NOTE

PART LIST
R1 750kΩ 1% R14 100Ω, 5% C6 47µF, 450V

R2 750kΩ 1% R15 shorted C7 N.A.

R3 10kΩ 1% R50 12kΩ C23 330nF

R4, R5 180kΩ 5% R51 N. A. C29 22µF, 25V

R6 68kΩ 5% NTC 2.5 D1 STTH1L06

R7 33Ω C1 0.47µF 400V D2 1N5248B

R8 47kΩ C2 10nF D8 1N4148

R9, R10 0.82Ω, 0.6W C3 0.68µF Q1 (TO220) STP8NM50

R11, R12 750kΩ, 1% C4 100nF BRIDGE DF06M

R13 9.53kΩ, 1% C5 12nF FUSE 4A/250V

T1: Boost Inductor Spec (ITACOIL E2543/E)

– E25x13x7 core, 3C85 ferrite
– 1.5mm gap for 0.7mH primary inductance
– Primary: 105 turns (20 x 0.1mm)
– Secondary: 11 turns (0.1mm)

Figure 6. EVAL6562N-80W: efficiency (left, in %) and Power Factor (right) vs. input voltage

D03IN1469 D03IN1470
98

97 1
Full load
Full load
96 0.95
Half load
95 0.90

Half load
94 0.85

93 0.80

92 0.75
85 110 135 175 220 265 (VAC) 85 110 135 175 220 265 (VAC)

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AN1757 APPLICATION NOTE

Figure 7. EVAL6562N-250 schematic

D4
D2 NTC

R16
R4 R6 C7
C5
R8
R1 R5 D1 D3 R7 R15
C6
R9
C1
+
B1 5 2
FUSE R2 8 1

Vac 3 L6562 R19

- D5
(85V to 265V) R10
7 Q1 R17 C8
R3 C2 C3 C4 6 4
R18

C9 R11 R12 R14 R13

D03IN1471

PART LIST:
R1, R2 910kΩ 1% R17 9.53KΩ, 1% C9 OPEN

R3 13kΩ 1% R18 SHORT D1 1N4148

R4, R5 180kΩ 5% R19 SHORT D2 (DO-201AD) STTH3L06

R6 100Ω 5% C1 1µF, 400V D3 ZENER 18V

R7 47kΩ 5% C2 22µF, 25V D4 1N5406

R8, R11, R14 OPEN C3 100nF D5 1N4148

R9 20kΩ C4, C5 10nF Q1 (TO220) STP20NM50

R10 33Ω, 5% C6 680nF BRIDGE STBR606 (ST)

R12, R13 0.33Ω, 1W C7 220nF FUSE 4A/250V

R15, R16 750KΩ, 1% C8 100µF 450V NTC 2.5

HEATSINKER: Aavid Thermalloy Max Clip S508

T1: Boost Inductor Spec: EB0057-C (COILCRAFT)

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 AN1757 APPLICATION NOTE

L6562-250W demo board evaluation:

Figure 8. PF vs. Input Voltage Figure 10. Efficiency ( %) vs. Input Voltage

D03IN1472 D03IN1473
98

1 97

Full load
0.996 96
Full load Half load
0.992 95
Half load
0.988 94

0.984 93

0.980 92
88 110 135 175 220 265 (VAC) 88 110 135 175 220 265 (VAC)

Figure 9. THD vs. Input Voltage

D03IN1474
14

12

10

8
Half load
6
Full load

2
88 110 135 175 220 265 (VAC)

REFERENCES
AN1007: "L6561 - BASED SWITCHER REPLACES MAG AMPS IN SILVER BOXES"
AN1059: "DESIGN EQUATIONS OF HIGH - POWER - FACTOR FLYBACK CONVERTERS BASED ON THE
L6561"
AN1060: "FLYBACK CONVERTERS WITH THE L6561 PFC CONTROLLER"
AN1089: "CONTROL LOOP MODELING OF L6561 - BASED TM PFC"

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