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    EE311 Analog Electronics Final Q1) (15 PTS.) A Class-A Emitter Follower Biased With A Constant Current Source Is Given in The

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    The document contains a 6 question electronics exam covering topics like: [1] Emitter follower circuit analysis and efficiency calculation [2] Feedback amplifier design and phase margin determination [3] Transconductance amplifier analysis [4] Series-shunt feedback amplifier analysis [5] Common gate amplifier gain and frequency response [6] Differential amplifier design for specified gain and power dissipation

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    EE311 Analog Electronics Final Q1) (15 PTS.) A Class-A Emitter Follower Biased With A Constant Current Source Is Given in The

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    burak
    46 views6 pages
    The document contains a 6 question electronics exam covering topics like: [1] Emitter follower circuit analysis and efficiency calculation [2] Feedback amplifier design and phase margin determination [3] Transconductance amplifier analysis [4] Series-shunt feedback amplifier analysis [5] Common gate amplifier gain and frequency response [6] Differential amplifier design for specified gain and power dissipation

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    Spring2010-EE311FINAL

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    The document contains a 6 question electronics exam covering topics like: [1] Emitter follower circuit analysis and efficiency calculation [2] Feedback amplifier design and phase margin determination [3] Transconductance amplifier analysis [4] Series-shunt feedback amplifier analysis [5] Common gate amplifier gain and frequency response [6] Differential amplifier design for specified gain and power dissipation

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    46 views6 pages

    EE311 Analog Electronics Final Q1) (15 PTS.) A Class-A Emitter Follower Biased With A Constant Current Source Is Given in The

    Uploaded by

    burak
    The document contains a 6 question electronics exam covering topics like: [1] Emitter follower circuit analysis and efficiency calculation [2] Feedback amplifier design and phase margin determination [3] Transconductance amplifier analysis [4] Series-shunt feedback amplifier analysis [5] Common gate amplifier gain and frequency response [6] Differential amplifier design for specified gain and power dissipation

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    of 6

    10/06/2010

    Spring 2010

    EE311 Analog Electronics


    Final

    Q1) (15 pts.) A class-A emitter follower biased with a constant current source is given in the
    figure. You can neglect the base currents in your calculations.

    VCC = 10 V
    RL = 1K
    β =200
    VBE(on)=0.7 V
    VCE(sat)=0.2 V
    VBE(sat)=0.8 V

    a) Determine the value of R that will produce the maximum possible output signal swing. What
    is the value of IQ, and the maximum and minimum values of iE1 and iL?

    b) Using the results of part (a), calculate the conversion efficiency.

    1
    10/06/2010
    Spring 2010

    Q2) (15 pts.) Consider a three-pole feedback amplifier with a loop gain function given by

    β × 1000
    T( f ) =
    ⎛ f ⎞⎛ f ⎞⎛ f ⎞
    ⎜1 + j 3 ⎟⎜1 + j 4 ⎟⎜
    1+ j 6 ⎟
    ⎝ 10 ⎠⎝ 5 × 10 ⎠⎝ 10 ⎠
    a) Determine the value of β that yields a phase margin of 45 degrees. What is the value of closed
    loop low frequency gain for this case?

    b) If β is changed to 0.14, determine the new closed loop low frequency gain and the
    approximate phase margin.

    2
    10/06/2010
    Spring 2010

    Q3) (15 pts.) A transconductance (series-series) amplifier is given in the figure. Calculate the
    closed loop transconductance gain Agf=io/vs.

    V+ = 10 V
    V- = - 10 V
    β = 100
    VBE(on)= 0.7 V
    VA= ∞
    RF = 10K
    RC2 = 18.6K
    RC3 = 2K
    RL = 1K
    I1 = 1 mA
    I2 = 2 mA

    Q1, Q2, Q3 parameters


    gm1=gm2=19.23 mA/V
    rπ1= rπ2=5.2 K
    gm3 =76.92 mA/V
    rπ3 =1.3 K

    3
    10/06/2010
    Spring 2010

    Q4) (25 pts.) For the given series-shunt feedback circuit,


    VCC = 10 V
    β = 120
    VBE(on)= 0.7 V
    VA= ∞
    R1 = 400 kΩ
    R2 = 75 kΩ
    RC1 = 8.8 kΩ
    RE1 = 0.5 kΩ
    RC2 = 13 kΩ
    RE2 = 3.6 kΩ
    RF = 10 kΩ
    RE3 = 1.4 K
    CC, CE, CF →∞
    Q1, Q2, Q3 parameters
    gm1 =32.81 mA/V
    rπ1 =3.66 K
    gm2 =19.12 mA/V
    rπ2 =6.28 K
    gm3 =78.08 mA/V
    rπ3 =1.54 K
    a) Determine the closed loop voltage gain Avf=vo/vi.

    b) Determine the input resistance Rif.

    c) Determine the output resistance Rof.

    4
    10/06/2010
    Spring 2010

    Q5) (15 pts.) For the common gate amplifier in the figure,
    V+ = 5 V
    V- = - 5 V
    RS= 4K
    RD= 2K
    RL= 4K
    RG= 50K
    Ri= 0.5K

    PMOS
    Kp= 1 mA/V²
    VTP= -0.8 V
    λ= 0
    Cgs= 4 pF
    a) Determine the midband voltage gain Av=vo/vi. Cgd= 1 pF
    b) Determine the upper 3 dB frequency.

    5
    10/06/2010
    Spring 2010

    Q6) (15 pts.) A differential amplifier will be designed using the given topology in the figure.

    VDD = 6 V
    VSS = − 6 V

    NMOS:
    VTN = 1 V
    μnCox(W/L) =1 mA/V2

    PMOS:
    VTP = - 1 V
    μpCox(W/L) =0.5 mA/V2

    The specifications are as follows:


    1) Your design parameters are I1, I2 and RD. You can select them as you wish.
    2) The differential-mode gain (Adm=vo/vid when v1=+vid / 2, v2=− vid / 2) should be Adm=10 V/V.
    3) All transistors should operate in SAT.

    Best design criteria is to have as low power dissipation (P) as possible.


    Fill up the table with your design parameters.

    I Input Design Output Parameters


    t Parameters
    e I1 I2 RD VGS1 VDS1 VSG3 VSD3 VRD Adm Acm P
    r (mA) (mA) (kΩ) (V) (V) (V) (V) (V) (V/V) (V/V) (mW)
    1
    2
    3
    4
    5

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