BJT
BJT
MODULE 3
H V Balachandra Achar
Senior Lecturer,
Dept. of E&C Engg.,
M I T, Manipal
Syllabus
Introduction
• Solid state transistor was invented by a team of scientists at
Bell laboratories during 1947-48
• It brought an end to vacuum tube era
• Advantages of solid state transistor over vacuum devices:
– Smaller size, light weight
– No heating elements required
– Lower power consumption and operating voltages
– Low price
Introduction
• Bipolar Junction Transistor (BJT) is a sandwich consisting of
three layers of two different types of semiconductor
• Two kinds of BJT sandwiches are: NPN and PNP
Introduction
• Transistor symbols:
Transistor Operation
• Operation of NPN transistor is discussed here; operation of
PNP is similar with roles of free electrons and holes
interchanged
• For normal operation (amplifier application)
– EB junction should be forward biased
– CB junction should be reverse biased
• Depletion width at EB junction is narrow (forward biased)
• Depletion width at CB junction is wide (reverse biased)
Transistor Operation
Transistor Operation
Transistor Operation
• When EB junction is forward biased, free electrons from
emitter region drift towards base region
• Some free electrons combine with holes in the base to form
small base current
• Inside the base region (p-type), free electrons are minority
carriers. So most of the free electrons are swept away into the
collector region due to reverse biased CB junction
Transistor Operation
C IC C IC
IB IB
B B
IE IE
E E
NPN PNP
Transistor Operation
• As approximation, we can neglect ICBO compared to IE and IC
• Hence approximate equations are: I = α I
C dc E
IC
αdc =
IE
• Like the reverse saturation current of ordinary diode, ICBO also
doubles for every 10o rise in temperature.
• So ICBO cannot be neglected at higher temperatures
• The parameter αdc is called common-base dc current gain
• Value of αdc is around 0.99
(1 − α dc ) I C = α dc I B + I CBO
α dc I
IC = I B + CBO
(1 − α dc ) (1 − α dc )
I C = β dc I B + I CEO --- (4)
• Where α dc and I CBO
β dc = I CEO = = (β dc + 1)I CBO
(1 − α dc ) (1 − α dc )
Department of Electronics and Communication Engineering,
Manipal Institute of Technology, Manipal, INDIA
Transistor Operation
• Equations (2) and (4) are two alternate forms of BJT current
equation
• Since value of αdc is around 0.99, ICEO >> ICBO
• However, ICEO is still very small compared to IC
I
• Hence approximation of (4) gives: I C = β dc I B or β dc = C
IB
• Parameter βdc is called common emitter dc current gain
• Values of αdc and βdc vary from transistor to transistor. Both
αdc and βdc are sensitive to temperature changes
Transistor Configurations
• BJT has three terminals
• For two-port applications, one of the BJT terminals needs to
be made common between input and output
Transistor Configurations
• CB Input characteristics
– A plot of IE versus VEB
for various values of VCB
– It is similar to forward
biased diode
characteristics
– As VCB is increased, IE
increases only slightly
– Note that second letter in
the suffix is B (for base)
Transistor Configurations
Transistor Configurations
CB Output characteristics
Transistor Configurations
• When IE = 0, IC = ICBO
– ICBO is collector to base current with emitter open
– Below this line we have cut-off region
– Here both junctions are reverse biased
• Region to the left of y-axis (VCB negative) is saturation region
– Here both junctions are forward biased
– IC decreases exponentially, and eventually changes
direction
∆VCB
rO = with I E const
∆I C
∆I C
α ac = with VCB const
∆I E
Transistor Configurations
• Common Emitter configuration
Transistor Configurations
• CE output characteristics
– A plot of IC versus VCE for various values of IB
– Three regions identified: Active, Cut-off, Saturation
– Active region:
• Linear region in the output characteristics
• E-B junction forward biased
• C-B junction reverse biased
• IC increases with IB
• For given IB, IC increases slightly with increase in VCE;
this is due to base-width modulation (Early effect)
Transistor Configurations
• Note that VCE = VCB + VBE
• So if VCE is increased, effectively VCB also increases
• For saturation to take place, C-B junction should be forward
biased.
• This happens when VCE is approximately 0.3 V (or less) for Si
• Note that when VCE= 0.3V, and VBE= 0.6 V, VCB= –0.3V (a
forward bias of 0.3 V)
• So region to the left of the vertical line VCE=VCE(sat)=0.3V (for
silicon) is considered as saturation region
• Region below IB=0 line (or IC=ICEO) is cut-off region
• The values of αdc & αac, and βdc & βac are almost the same.
Hence the subscripts can be omitted for simplicity
Transistor Configurations
• Input resistance ri • Output resistance ro
∆VBE ∆VCE
ri = with VCE = const ro = with I B = const
∆I B ∆I C
Tutorials
1. A Ge transistor with β = 100 has collector-to-base leakage
current of 5 µA. If the transistor is connected in common-
emitter operation, find the collector current for base current
(a) 0 (b) 40 µA.
Sol: Given that ICBO = 5µA, and β = 100
We know that I C = β dc I B + I CEO
Transistor Biasing
• What is meant by biasing the transistor?
– Applying external dc voltages to ensure that transistor
operates in the desired region
• Which is the desired region?
– For amplifier application, transistor should operate in active
region
– For switch application, it should operate in cut-off and sat.
• What is meant by quiescent point (Q-point)?
– The point we get by plotting the dc values of IC , IB and VCE
(when ac input is zero) on the transistor characteristics
Transistor Biasing
• Types of biasing:
– Fixed bias and Self bias
• Fixed bias:
– The value of IB is “fixed” by choosing
proper value for RB
– Equations to consider are:
VCC − VBE
IB =
RB
VCE = VCC − I C RC
Transistor Biasing
• Load Line
– We have: VCE = VCC − I C RC
Transistor Biasing
• Voltage divider bias or Self bias
– Resistor RE connected between
emitter and ground
– Voltage-divider resistors R1 & R2
replace RB
– Circuit can be analyzed in two
methods:
• Exact method (using
Thevenin’s theorem)
• Approximation method
(neglecting base current)
Department of Electronics and Communication Engineering,
Manipal Institute of Technology, Manipal, INDIA
Transistor Biasing
• Exact method:
– Input side of self-bias
(Fig. a) transformed into
Thevenin’s equivalent
circuit (Fig. b) where,
RTH is the resistance
looking into the
terminals A & B (Fig. c)
and VTH is given by:
VCC R2 R1 R2
VTH = RTH = R1 || R2 =
R1 + R2 R1 + R2
Transistor Biasing
• Self-bias circuit redrawn with input side
replaced by Thevenin’s equivalent :
• Equations to consider:
VTH − VBE
IB =
RTH + ( β + 1) RE
VCC R2 VB − VBE
VB = IE =
R1 + R2 RE
I C = αI E
VCE = VCC − I C RC − I E RE
Tutorials
1. For a fixed bias circuit using Si transistor, RB = 500 kΩ, RC = 2 kΩ, VCC =
15 V, ICBO = 20 µA and β = 70. Find the collector current ICQ and VCEQ at
Q-point. Take VBE as 0.7 V. (Ans: 3.422mA, 8.156V)
2. A Si transistor is biased for a constant base current. If β = 80, VCEQ = 8 V,
RC = 3 kΩ and VCC = 15 V, find ICQ and the value of RB required.
(Ans: 2.33 mA, 493 K)
3. Repeat problem 2 if the transistor is a germanium device. (VBE=0.3V)
(Ans: 2.33 mA, 507 K)
4. For a fixed bias circuit, VCC = 12 V and RC = 4 kΩ. The Ge transistor used
is characterized by β = 50, ICEO = 0 and VCE sat = 0.2 V. Find the value of
RB that just results in saturation. (Ans: 198.3K)
Transistor Amplifier
• Amplifier
– Device which gives larger swing in output voltage
proportional to the input voltage swing
– BJT basically amplifies current: Collector current equals
beta times Base current
– With proper circuit designs, we can get voltage
amplification and power (both voltage and current)
amplification
– For faithful amplification (no distortion), BJT should
operate in Active region throughout the input cycle (Class
A)
Department of Electronics and Communication Engineering,
Manipal Institute of Technology, Manipal, INDIA
Transistor Amplifier
– Without any bias,
transistor is in cut-off
(IC=0, VCE=0)
– Biasing circuit fixes the
operating point in the
middle of active region
required for faithful
amplification
– Figure shows common-
emitter amplifier circuit
employing fixed bias
Transistor Amplifier
• With reference to the fig in previous slide, as input voltage vin
varies, iin varies, thus base current iB varies
• This variation in base current is amplified beta times to get
variation in collector current iC
• Output voltage vout is VCC – iC RC
• Note that if vin increases, there is proportional decrease in vout,
but of greater magnitude
• Similarly if vin decreases, vout increases proportionally
• Thus output voltage of CE amplifier is 180o out of phase with
input voltage
• (Note that small letters are used to represent ac quantities)
Transistor Amplifier
• This
animation
shows the
working of
Common
Emitter
transistor
circuit
AV = AV 1 . AV 2 ....... AVN
( AV ) dB = ( AV 1 ) dB + ( AV 2 ) dB + ....... + ( AVN ) dB
Transistor Amplifier
• RC coupling
– Fig shows CE amplifier
employing self bias
– Additional components
are CC and CE
– CC is called coupling
capacitor – used to
prevent dc component
from entering or leaving
amplifier stage
Transistor Amplifier
• Figure shows frequency
response plot
• At lower and higher
frequencies, gain is less
• Gain attains const value
at mid frequencies
• Bandwidth of amplifier is
range of frequencies over
which gain is not less
than 3 dB of maximum 20 log | 0.707 AVO | = 20 log | AVO | – 3
gain
Transistor Amplifier
• Classification of amplifiers:
– Based on mode of operation:
• Class A: collector current flows throughout the complete input
cycle (360o); Q-point is in the centre of active region (no distortion)
• Class B: collector current flows during (positive or negative) half
cycle of input; Q-point is at “just cut-off” or “just saturation”
• Class AB: collector current flows for more than half cycle, but less
than full cycle of input waveform; Q-point is “near cut-off” or “near
saturation”
• Class C: collector current flows for less than half cycle of input
waveform; Q-point is in “deep cutoff” or “deep saturation”
• (For classes B, AB and C, output is distorted or clipped)
End of Module 3