SOFTWARE REQUIREMENTS

3.1GENERAL:
Tanner EDA is a suite of tools for the design of integrated circuits. These tools allow you
to enter schematics, perform SPICE simulations, do physical design (i.e., chip layout), and
perform design rule checks (DRC) and layout versus schematic (LVS)checks

3.2: APPLICATIONS OF VLSI

Electronic systems now perform a wide variety of tasks in daily life. Electronic systems
in some cases have replaced mechanisms that operated mechanically, hydraulically, or by other
means; electronics are usually smaller, more flexible, and easier to service. In other cases
electronic systems have created totally new applications. Electronic systems perform a variety of
tasks, some of them visible, some more hidden:

 Personal entertainment systems such as portable MP3 players and DVD players
perform sophisticated algorithms with remarkably little energy.
 Electronic systems in cars operate stereo systems and displays; they also control
fuel injection systems, adjust suspensions to varying terrain, and perform the
control functions required for anti-lock braking (ABS) systems.
 Digital electronics compress and decompress video, even at high definition data
rates, on-the-fly in consumer electronics.
 Low-cost terminals for Web browsing still require sophisticated electronics,
despite their dedicated function.
 Personal computers and workstations provide word-processing, financial analysis,
and games. Computers include both central processing units (CPUs) and special-
purpose hardware for disk access, faster screen display, etc.

Medical electronic systems measure bodily functions and perform complex processing
algorithms to warn about unusual conditions. The availability of these complex systems, far
from overwhelming consumers, only creates demand for even more complex systems. The
growing sophistication of applications continually pushes the design and manufacturing of
integrated circuits and electronic systems to new levels of complexity. And perhaps the most
amazing characteristic of this collection of systems is its variety as systems become more
complex, we build not a few general-purpose computers but an ever wider range of special-
purpose systems. Our ability to do so is a testament to our growing mastery of both integrated
circuit manufacturing and design, but the increasing demands of customers continue to test the
limits of design and manufacturing.

3.3 ADVANTAGES OF VLSI:

While we will concentrate on integrated circuits in this book, the properties of integrated
circuits what we can and cannot efficiently put in an integrated circuit—largely determine the
architecture of the entire system. Integrated circuits improve system characteristics in several
critical ways. ICs have three key advantages over digital circuits built from discrete components:

 Size: Integrated circuits are much smaller—both transistors and wires are
shrunk to micrometer sizes, compared to the millimeter or centimeter scales of
discrete components. Small size leads to advantages in speed and power
consumption, since smaller components have smaller parasitic resistances,
capacitances, and inductances.
 Speed: Signals can be switched between logic 0 and logic 1 much quicker
within a chip than they can between chips. Communication within a chip can
occur hundreds of times faster than communication between chips on a printed
circuit board. The high speed of circuit’s on-chip is due to their small size—
smaller components and wires have smaller parasitic capacitances to slow down
the signal.

3.4 DESIGN TOOLS:

There are 3 tools that are used for this process

 S-edit
 T-SPICE L- edit
 A schematic capture tool
 the SPICE simulation engine integrated with S-edit - the physical design tool
Using S-Edit (Schematic Entry Tool) &T -SPICE(Analog Simulation Tool):

Example: IV Curves of an NMOS Transistor

S-edit is a schematic entry tool that is used to document circuits that can be driven
forward into a layout of an integrated circuit. It also provides the ability to perform

SPICE\simulations of the circuits using a simulation engine called T-SPICE.T-SPICE can be

setup and invoked from within S-edit.

Part1: Setup your Directory Structure &download Libraries

th
 a Log onto a computer on 6 floor Coble high.

 You want to create a directory for all of your Tanner EDA projects. You also will need
to download and unzip a set of library &model files from the course website that will be
used for your simulations.
 Create a directory structure named

“EELE414_VLSI_Fall2011\Tanner_ Projects

 Go to the course website and download the zip file called “Tanner_ Libraries. zip ”.Unzip
it into your Tanner Projects directory. This group of files contain the necessary
information to enter components into S-edit (circuit symbols),perform SPICE simulations

Part2: Start a New Design &Setup Libraries

 a Start S-Edit:
 Start – All Programs – Tanner EDA – Tanner Tools v12.6 – S-Edit v12.6
 Start a New Design:

Using the pull down menus, create a new design:

 File – New - New Design

A dialog will appear asking for a design name and location. When you give the name, S-
edit will create a folder of that name in the directory that you provide that will contain all of
the design files. You should give a descriptive name that represents each simulation you will
be running.
  Enter the name “HW03_NMOS_IV_Part1” and browse to
your “EELE414_VLSI_Fall2011\Tanner-Projects” director -
Click “ok”
 Create a new Cell

A “cell” is a design element. A cell can contain multiple views such as schematics and
symbols .cells can be instantiated other cells. When performing simulation, we will typically call
the cell ”TOP” when we are testing a circuit ,for example an inverter ,the inverter will have its
own cell that contains a schematic of the devices and a symbol .the inverter cell is instantiated in
the TOP cell that contains ideal elements such as voltage sources and probes that are only used
for simulation .this allows us to separate the cells that are actually going to be implemented on
the die versus cells that are only used for simulation .

Using the pull down menus create a new cell view:

 Cell– New View

A blank schematic page will appear. It is a good idea to save this right now.

d) Enter the symbol libraries:

First, you need to include a library which contains the symbols for all basic circuit
elements such as resistors, NMOS, capacitors, etc…The libraries for all the basic
symbols are in theTanner_Libraries.zip file you downloaded and unzipped.

 On the left side of the S-edit screen you’ll see a Libraries window, click on the
“Add” button.
 Browse to “Libraries\All\ All.tanner” and click “OK”

3 You should see a set of libraries appear:

e) Setup the SPICE Models for the Generic_025 kit.

The libraries that you just added have symbols for NMOS and PMOS transistors.
However, all non-linear components such as MOS transistors require a model to describe
their behavior. If you simply enter an NMOS symbol in your schematic, SPICE will not
know what to do since each NMOS transistor fabricated in a different technology behave
differently.

In this example, we will use a transistor technology called “Generic_025”, which

represents a standard, 0.25um CMOS process. You will need to setup the SPICE models for this
process in S-edit. Once you do that, when you enter an NMOS or PMOS transistor, you can then
associate the0.25um model to that symbol.

Using the pull down menus, setup the SPICE models:

 Setup – SPICE Simulation

 In the dialogue that appears, you should highlight “General” on the left.
 On the right, click in the “Library Files” field. This is where you will specify any
SPICE models you will be using in your simulations. Browse &select
“Generic_025_Kit\Generic_025_SPICE_Models_Level1.li
  On the right, click in the “SPICE File Name” field. This is where you specify the name
and location of the SPICE Net-list output. Browse to your design directory
“EELE414_VLSI_Fall2011\Tanner-Projects\HW03_NMOS_IV_Part1”and enter the
filename “TOP.SP”.
 On the right, click in the ”simulations results file name ”field this is where the results of
the simulation will be written. this file is what the wave form viewer will look for when
you go to plot your results. Browse to your design directory
“EELE414_VLSI_Fall2011\Tanner-Projects\HW03_NMOS_IV_Part1” and enter the

filename TOP.sp.

Before you can exit this window, you will need to select an analysis type. We will setup
the details of the analysis later, but for now, just check the ”DC sweep analysis” and click “ok”
to close the setup window

Part3: Enter the Schematic to simulate the IV behavior of an n-MOS Transistor.

We will be entering the following circuit:

Enter the NMOS transistor

  -on the left, click on devices” in the upper window. this will display all of the symbols
available in this group .you should see all of the components that you can implement on a
CMOS integrated circuit.
 -to place the NMOS, you will click on the “INSTANCE” button. Two things happen
when you click on this button. first, a dialog will appear that will allow you setup the
parameters for the NMOS

Second, the symbol will attach to your mouse. we will place he NMOS in the
schematic first and then set its properties later. This is an easier way to enter the devices. Click in
the schematic window to drop an instance of the NMOS. Hit the “Esc” button to end the insert-
mode.

 To place the NMOS, you will click on the “Instance” button .Two things happen when
you click on this button. First, a dialog will appear that will allow you to setup the
parameters for the NMOS. Second, the symbol will attach to your mouse. We will place
the NMOS in the schematic first and then set its properties later. This is an easier way to
enter the device. Click in the schematic window to drop an instance of the NMOS. Hit the
“Esc” button to end the insert-mode

The NMOS is now in the schematic:

A note on zooming:

-[Home]=zoom fit-[-] =zoom out-[=] =zoom in- the scroll wheel also zoom
sin/out.

 To setup the NMOS, click on the NMOS symbol. You will see the properties of the
device on the left. We want to setup the following:
 Model :enter “NMOS”. This model is found in the Generic_025 library you added
 Name:M1. The SPICE designation for MOS transistors is to have the name start with an
“M”. S-edit automatically appends an M to the name is the final name will be “MM1” in
the TOP.sp file. But it is good practice to name all MOS transistors with M’s.
 -W Set to 2.5u. This is the default.
 L Set to 0.25u. This is the default.
b) Enter a DC source for VGS:
 Using the same process you used for the NMOS symbol, enter a
“SPICE_Elements”: Voltage Source”. This is a generic voltage source symbol
that is configured as a DC, TRAN, PWL, etc.in its properties dialog.
 Click on the voltage source and enter the following:

-Master-interface: DC(this is the default but this is how you would change it to something else).

-Name: VGS_Source(it is a good idea to use descriptive names).

This is where you will set the DC voltage (i.e.,4v,5v).however, for his example we will
use a parameter instead of a hardcoded value. we will enter a parameter name here and them set
up the parameter later. enter “VGS_param” for the value of V. when performing a DC sweep,
you must use parameters for the sweep .

c) Enter a DC source for VDS

 using the same process as above enter a DC source for VGS with the following:
 master-interface: VDS_source

-name:”VDS_param”

-v
DC(this is the default but this is how you would change it to something else).

Position the sources as in the following figure:

A noye on zooming:

 Hold down ALT-M to move a component. While holding these buttons down,click and
drag the components.
 to rotate ,click on the device and click the [r] button.

d) Enter grounds

using the same process above ,

Enter three grounds from misc: GND

e) Enter Wire:
 You can enter wires by clicking on the “wire” icon at the top

 Enter wires by clicking on a symbol node and then dragging. Enter corners by clicking
once where you want to turn.
 You can label nets using the “Net Label” icon at the top
f) Enter a Current Probe to monitor IDS
 Enter the SPICE_Commands: Print Current component. This doesn’t connect to
anything. You just place it anywhere and then tell it what current to monitor in its
properties dialog.
 In its properties dialog, setup:
Terminal: D (this is the Drain of the NMOS)
Device:MM1 (this is the name of the device. Notice that we called it M1, but S-edit
automatically appends another M to the name. You will only see this once you run the Net-list.
Analysis: DC (VERY IMPORTANT TO SELECT THIS!!!!)

Part 4: Setup the Parameters that will be used during the DC sweep analysis:
When we entered the VGS and VDS sources, we set their values to “VGS_param” and
“VDS_param”. We now need to setup these parameters.
Using the pull down menus:
 Setup – SPICE Simulations
 On the left, click on “Parameters”
 On the right, click on the “Add Parameters” button (it is in the upper right corner next
to the red X)
Enter: Name: value:
VGS_ param 1v
 On the right, click on the “Add Parameters” button
Enter: Name: Value:
VDS_param 2.5v
We will overwrite these values during our sweep, but the parameters need to exist first.
Part 5: Setup the SPICE DC Sweep Analysis
Using the pull down menus:
 Setup – SPICE Simulations
 On the left, click on “DC Sweep Analysis”
 On the right, enter the following for Source (this is what will be swept)
Source or Parameter Name: VDS_param
 Start Value:0
Stop Value: 2.5
Step:0.1
Sweep Type: l in
 On the right, enter the following for Source (this is what will be swept)
Source or Parameter Name: VGS_param
Start Value:1
Stop Value:1.5
Step:0.5
Sweep Type: l in
NOTE: The first parameter you setup in this dialog will be plotted on the independent
axis.
Part 6: Simulate the Design:
a) First, check you design using the pull down menus:
 Tools – Design Checks (any warnings or errors will be shown at the bottom)
b) Simulate your design:
 Clock on the Green Arrow to start the simulator:
The T-Spice window will appear. If everything is OK, the waveform viewer will also appear. If
everything worked, your waveforms should look like this:

c) View the Net-list:

 In the T-spice window, right click on the file at the bottom and select “Show Net-list”
This will bring up the TOP.SP Net-list that was created and used by the spice engine. This is a
good place to look when you get errors. This is the text based description of what you entered
in S-edit.

d) View the Waveform:

 If the windows viewer did NOT automatically appear, you can click on the file in the T-
spice window and select “Show Waveform”
Example: Transient Analysis of a CMOS Inverter & Symbol Creation
Part 1: Start a New Design, Setup Libraries & Setup Simulation
In this example, we will create a CMOS inverter and simulate its transient response. We will
create an inverter design that contains a symbol and then instantiate it in another schematic to
stimulate the circuit.
Symbols are handled by adding another view to a design. We will start by creating a design
called “Inverter” and then create a schematic view. This schematic will contain an NMOS and
PMOS wired as an inverter. We will add “Ports” for the Input, Output, VDD, and VSS. We will
then add a symbol view to this design. The symbol will contain the inverter shape and the
corresponding pins for Input, Output, VDD, and VSS.
We will then create a separate schematic called TOP that will be used to test the inverter. We
will instantiate the inverter symbol in TOP. We only want to put items into the inverter design
that can be fabricated. TOP will contain the ideal voltage sources to provide the input
waveform, the power supplies, and a mock load. In this way, when we go into physical design
(i.e., layout), we only drive forward the isolated circuits.
 Start S-Edit
 Create a new design called:
“EELE414_VLSI_Fall2011\Tanner_Projects\HW04_INV_Transient_Part1”
 Add the Tanner_Projects\Libraries\All\All.tanner library to the library list on the left
 Create a new Cell called “TOP” using the Pull Down Menus
 Cell - New View
Name = TOP
View Type= schematic
 Setup the simulation using the Pull Down Menus:
 Setup – SPICE Simulation
 Highlight the General Tab of the Setup SPICE window and set the following
SPICE File Name: \HW04_INV_Transient_Part1\TOP.SP
Library Files: ..\Generic_025_Kit\Generic_025_SPICE_Models_Level1.lib Simulation Results
File Name: File Name: \HW04_INV_Transient_Part1\TOP.OUT
 Check the “Transient/Fourier Analysis” box on the left and set the following:
Stop Time= 2ns
Maximum Time Step= 10ps
 Click “OK”
Part 2: Create the Inverter
a) Create a new schematic view using the pull-down menus:
Cell - New View
Name = Inverter
View Type= schematic
Enter the inverter schematic:

 Entering the NMOS:

Name= M1
L= 0.25u
W= 2.5u
Model=NMOS
 Entering the PMOS:
Name= M2
L= 0.25u
W= 5.0u
Model=PMOS
 Entering the Ports:
Ports are entered using the icons on the top of the S-edit window. Enter the following:
In Port: Name it “IN”
Out Port: Name it “OUT”
 In/Out Port: Name it “VDD”
In/Out Port: Name it “VSS”
 Wire up the Inverter
Enter wire connections as shown in the previous figure.
 Export a SPICE Net-list
Exporting a SPICE Net-list is a good idea in order to verify that you have entered the
schematic correctly. Also, this Net-list will be used later when performing a “Layout
versus Schematic (LVS)” check. We want to export a Net-list at the Inverter schematic
cell level so that a Net-list of just the inverter exists for LVS. When we conduct the
simulation of this inverter, we will create a TOP level schematic that will have a Net-list
containing ideal voltage sources. This Net-list can’t be used for LVS since it contains
components that won’t be fabricated.
With the schematic open, use the pull down menus to perform:
 File – Export – Export SPICE.
 Browse to your design directory and give the file name “Inverter.spc”.
 Click “OK”
If you open the Inverter.spc with a text editor, you will see the following:
  Create the Inverter Symbol
Symbols can either be created manually by creating a new symbol view or automatically by S-
edit. We will use the automatic symbol generation. This will create a new symbol view from
the schematic, create the ports for the symbol, and make a symbol shape. While the shape of
the symbol is rarely what we ultimately want, it will do a lot of the work for us.
 With the schematic view open, use the pull down menus to create the symbol view:
Cell – Update Symbol
A new window will come up with a square symbol and 4 ports with the same names you
entered in the Inverter: schematic view (i.e., IN, OUT, VDD, VSS). You should edit the shapes
until you have created a symbol that looks like an inverter:

A note on drawing:
The “Path” icon will put you into a mode where you can draw lines that are not wires.
The “Circle” icon will allow you to enter the inversion bubble.
The ports can be moved by holding down “alt-m”
The ports can be rotated by selecting and pressing the “r” button
Remember to save.
Part 3: Create the TOP schematic to test the Inverter
a) Instantiate the Inverter in the TOP schematic:
Open the TOP schematic view using the pull-down menus:
  Cell – Open View:
Cell Name: TOP
View Type: schematic
In the library windows on the left of the window, highlight your
“HW04_INV_Transient_Part1” library. In the lower left window, you will see your two Cells
“TOP” and “Inverter”.
 Click on “Inverter” and you will see your symbol show up in the symbol viewer.
 Click on the “Instance” button and place your symbol in the TOP schematic
b) Enter the following circuit in order to power and stimulate your inverter:

 Enter the Pulse Voltage Source. All voltage sources are the same component in the
SPICE_Elements library. The default is DC, but this can be changed to any other type
of source in the properties dialog.
Name= Vin_Source
Master-Interface = Pulse
Period = 1ns
Pulse Width = 0.5ns
V High= 2.5v
V Low= 0v
Rise Time = 10ps
Fall Time= 10ps
  Enter a Load capacitor from the Devices library
Name= C load
C=50fF
 Enter a DC Source for VDD
Name = VDD_Source
Master Interface = DC
V= 2.5v
 Enter the grounds from the Misc library
 Enter wire connections and name them Vin and Vout
 Enter a voltage probe for both Vin and V out
Part 4: Simulate the Design
a) First, check you design using the pull down menus:
 Tools – Design Checks (any warnings or errors will be shown at the bottom)
b) Simulate your design:
 Clock on the Green Arrow to start the simulator:
The T-Spice window will appear. If everything is OK, the waveform viewer will also appear. If
everything worked, your waveforms should look like this

Using L-Edit (IC Physical Design Tool)

L-edit is an integrated circuit physical design tool from Tanner EDA. This tool allows you to
draw the layout of an IC, look at cross-sections, perform DRC (design rule check), and generate
a Net-list of your layout so that you can perform LVS (layout versus schematic) using a
different tool.

Part 1: Launch L-edit, Start a design, and Setup the Technology

a)Log onto a computer in the digital lab (601 Coble) and launch L-edit using:
Start – All Programs – Tanner EDA – Tanner Tools v12.6 – L-Edit v12.6
b) Create a new layout design:
 FILE New
 select “Layout”
 under “Copy TDB…”, browse to:
Tanner_Projects\Generic_025_Kit\Generic_025.tdb
  Click “OK”

When you copy in the Generic_025.tbd files, it loads all of the layer definitions foR the
0.25um process and the design rule information. On the left, you should see a set of layers for
this technology that can be used to create devices.
c) Verify the technology rule options & setup grid:
 Setup – Design
Now you want to setup the grid. Click on the “Grid” tab Since we are using a 0.25um grid, let’s
put our major grid and snap grid at 0.125um. Then we will put our minor grid at 0.05. Enter the
following:

Now let’s configure the ruler settings. When you draw polygons to implement your circuitry,
you will continually be measuring your shapes to make sure they are what you want. You can
place items called “rulers” that will show how large your shapes are.

Click on the “Drawing” tab and configure the “Display Text” to “Centered”
 d) Save your design:
 Now you can click “save” and give your design a descriptive name and location. (i.e.,
\Tanner_Projects\HW07_INV_Layout_Part1”
Part 2: Inspect the design rules for the kit
The design rules for this kit were loaded when you specified the Generic 0.25um design kit. L-
edit will check for violations in the design rules using a process called Design Rule Check
(DRC). To see the rules, use the pull down menus:
 Tools – DRC Setup
 You’ll see that the “DRC Standard Rule Set” is selected. Highlight this (if it isn’t
already) and click the “Edit” Button:

At this point, the only rule that makes much sense is the minimum gate length. If you click on
Rule 3.1. Poly Minimum Width, you’ll see that a DRC error will occur if you draw a shape on
the Poly layer that is less than 0.25um in width. As you can also see there are rules that govern
all of the layers in the design kit.

 Once you look at the rules, click “OK” to go back to the “Setup DRC” dialog and check
the “Pop up message box” so that you can see the results of the rule checking.

Part 3: Create your layout for the CMOS inverter

 Let’s create a CMOS inverter with Ln=Lp=0.25um, Wn=2.5um, Wp=5um. This will
match the inverter that you created in the second example in this tutorial and will allow us to
perform an LVS check.

NMOS:

The process that we are using is N-well CMOS. This means that the blank screen you see
a p-type silicon substrate. We explicitly draw active regions on the screen to open up the field-
oxide to insert diffusion regions. This means you can think of the screen as p-type silicon with
FOX everywhere on it to begin with. In order to create the NMOS structure, we use three
layers:
N-Select- This layer tell where the field-oxide should be opened up for the active regions. An
N-select rectangle must be slightly larger than the shape defining where the implants go.
Active- This tell the process where to implant the n-type ions (P or As). Remember that
we want to implant into the Poly to reduce its resistance. The “Width” of the
N-Select dictates the width of the transistor (Wn)
Poly- This specifies the gate of the device. Under the poly will be thin oxide forming MOS
structure. The “Length” of the Poly dictates the length of transistor (Ln).
Display Notes:
 You can setup the default units to use (micron vs. lambda) in the upper
corner of the screen. If you are getting confusing measurements, make
sure that this box is in the units you want.
 You can setup the grid display and snap using the “Setup – Design”
menu and “Grid” tab. Doing this on the fly sometimes helps you draw
faster.
Entry Notes:
 You enter a rectangle by first selecting the layer and then clicking on the
square icon.