References:: 111 Richard Valantine, "Motor Control Electronics Handbook", 1998, ISBN 0-07-066810-8

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References:

111 Richard Valantine, "Motor Control Electronics Handbook", 1998, ISBN 0-07-066810-8

12] David Bension, "PIC Micro Controller Application Guide", Version 2.0

!JI John B. Peatman "Design with PIC Microcontrollers'', ISBN 81-7805-508-9

141 Sanath Alahakoon, "Digital Motion Control Techniques for Electrical Drives",

ISBN -91-7170-555-4

!51 Ned Moohan, Tore M. Undeland, William P. Robbins "Power Electronics" Second

Edition

[61 lntemationl Rectii~er, "Motor Drive Control IC Designer's Manual"

171 V. R. Moorthi "Power Electronics Devices, Circuits and Industrial applications",

ISBN -10-0-19-567092-2

IX] Ashfaq Ahmed, "Power Electronics for Technology"', ISBN 81-297-0208-8

]9J R. Krishna, "Electric Motor Drives Modeling, Analysis and Control"

ISBN 81-297-0139-1

64
Appendix A

Software Program for Micro Controller

**************************************************************************
include <pi 8f443,1.inc>
include <AAinc>
**************************************************************************
CO\'W\G _CONF\G \ H, \Jx\J2
CONFIG _CONFIG2L, OxOC
CONFIG _ CONFIG2I-I, Ox3E
CONFIG _ CONFJGJL, Ox3C

! I J\GS hits
:!define TIMERO OV FLAGO
:define OFFSET! FLAG l
.:Jcfine OFFSET2 FLAG 2
:define OFFSET3 FLAG 3
1dcfinc RUN 4
ldcfincSTOP 5
'dcflncFREQ UPDATE 6

'"cys parameters
idellnc KEY PORT PORTO
rJefine RUN STOP KEY 7

I ·D parameters
1dcJine LED PORT PORTO
tdcfinc RUN STOP LED 0

I >utv cycle limit definition,


tdcf"ineMINI-1 - DUTY- CYCLE OxOO
rdcfineMINL DUTY CYCLE Ox3C

**************************************************************************
1\;\M locations in Access hank, initialized
**************************************************************************
l IDATA ACS
I J\L3LE OFFSET! res
I ;\BLE OFFSET2 res
! ABLE OFFSET3 res
I 1>/\GS res
I RI~:Q REF_ H res

65
FREQ REF_L res
I·REQUENCY res
J'EMP res
\\ . _M\) \ \es \
TEMP LOCATION res 2
PDCOL TEMP res
J>DCOI-I TEMP res
PDClL--TEMP res
PDC1H --TEMP res
PDC2L TEMP res
PDC2ll - TEMP res
SINE TABLE
--
res Oxl4 ;Sine table
temp res 1
[Cill p 1 res I

**************************************************************************
RESETANDINTERRUPTVECTORS
**************************************************************************
STARTUP code OxOO
goto Start ;Reset Vector address
CODE Ox08
goto ISR HIGH ;High priority ISR at Ox0008
PROG LOW CODE OxO 18
goto JSR LOW ;Low priority ISR at OxOO 18

**************************************************************************
INITIALIZATION
**************************************************************************
Start

clrf FREQUENCY
clrf FLAGS
call INIT PCPWM
call INlT TMRO
call INIT PORTO
call COPY - TABLE- TO- RAM
call lNIT - MOTOR - START

WAIT HERE
call KEY CHECK
btfss FLAGS,RUN
bra WAIT HERE
clrf FLAGS
call !NIT INTERRUPTS

66
**************************************************************************
MAJN LOOP
**************************************************************************

MAIN LOOP
bttss FLAGS,TIMERO_ OV_FLAG
bra bypass
call UPDATE·-- PWM- DUTYCYCLES
call UPDATE- TABLE- OFFSET
bcf FLAGS,TIMERO _ OV FLAG
bypass
bt1sc FLAGS I ,FREQ__ UPDATE
call CALCULATE TIMERO- RELOAD
-~

btfss ADCONO, GO
bsf ADCONO, GO
call KEY CHECK
call KEY PRESSED

bra MAIN LOOP

**************************************************************************
INTERRUPT SERVICE ROUTINES
**************************************************************************
ISR HIGH
btfsc INTCON,TMROIF
bra TIMERO OVERFLOW
RETFIE FAST

TIMERO OVERFLOW
movff FREQ_REF_H,TMROH
rnovff FREQ_REF_ L,TMROL
bsf FLAGS,TIMERO_OV_FLAG
bcf INTCON,TMROIF
RETFIE FAST

*************************************************************************
Low priority interrupt service routine
**************************************************************************
ISR LOW

btfsc PIR 1,ADIF


bra READ ADC RESULTS

RETFIE FAST

67

l
READ -- ADC RESULTS
~

movff ADRESH,FREQUENCY
movlw Ox30
cpfsgt FREQUENCY
movwf FREQUENCY
movlw OxFO
cpfslt FREQUENCY
movwf FREQUENCY
bsf FLAGS I, FREQ~ UPDATE
bcf PIRI,ADIF
RETFIE FAST

**************************************************************************
UPDATE PWM DUTYCYCLES
~ ~

**************************************************************************

UPDATE PWM DUTYCYCLES


~ ~

movf TABLE_OFFSETI,W
movf PLUSWO,W
mulwf FREQUENCY, W
movff PRODJ-l,PDCOH~TEMP
movff PRODL,PDCOL~_TEMP

UPDATE PWM2
movf TABLE~ OFFSET2,W
movf PLUSWO,W
mulwfFREQUENCY, W
movffPRODH,PDC I H__TEMP
movtTPRODL,PDClL_JEMP
UPDATE PWM3
movf TABLE_OFFSETJ,W
movf PLUSWO,W
mulwf FREQUENCY, W
movff PRODH,PDC2H~TEMP
movff PRODL,PDC2L~TEMP

TRUNCATE PWMI23
bcf STATUS,C
rlcf PDCOL~TEMP,F
rlcf PDCOI-I_TEMP,F
rlcf PDCOL_TEMP,F

68

..
rlcf PDCOH_TEMP,F
rlcf PDCOL~TEMP,W
andlw Ox3
movfT PDCOI-I~TEMP,PDCOL ~TEMP
movwfPDCOI I TEMP

bcf STATUS,C
rlcf PDCII,_TEMP,F
riel' PDC 11-l_TEMP,F
rlcf PDCIL~TEMP,F
rlcf PDC Ill TEMP,F
rlcf PDC 1L_TEMP, W
andhv Ox3
moviT PDCII-1 TEMP,PDCI L_TEMP
movwf PDC Ill TEMP

bcf STATUS,C
rlcf PDC2L TEMP,F
rlcf PDC2H_TEMP,F
rlcf PDC2L TEMP,F
rlcf PDC211 TEMP,F
rlcf PDC2L~ TEMP,W
andlw Ox3
movff PDC2HTEMP,PDC2L TEMP
movwf PDC21-l TEMP

call CHECK LIMITS

bsf PWMCON I, UDIS


movff PDCOL_~rEMP,PDCOL
movff PDCOH_TEMP,PDCOH
movff PDC I L_TEMP,PDC 1L
movff PDC II I TEMP,PDC l 1-1
movlT PDC2L TEMP,PDCJL
movtT PDC2H __TEMP,PDC31-l

bcf PWMCONI, UDIS

return

**************************************************************************
TABU: OFFSET
**************************************************************************

UPDATE TABLE---OFFSET
-

btfss FLAGS.OFFSETl FLAG

69
bra DECREMENT OFFSET!
movlw (SINE_TABLE_ENTRIES-1)
cpfslt TABLE_OFFSET 1
bra CLEAR--OFFSET! FLAG
-

inct' TABLEOFFSETI,F
bra UPDATE OFFSET2

CLEAR -- OFFSET! - FLAG


bcf FLAGS,OFFSET1 __ FLAG

Dl~CREMENT OFFSET I
dcfsnz T AI3 LE _ 0 FFSET 1,F
bsf FLAGS,OFFSET1_FLAG

l JPDATE OFFSET2
btfss FLAGS,OFFSET2 _FLAG
bra DECREMENT OFFSET2
movlw (SINE TABLE-- ENTRIES-I)
~~

cpfslt TABLE __ OFFSET2


bra CLEAR--·OFFSET2- FLAG
incf T ABLEOFFSET2,F
bra UPDATE OFFSET3

CLEAR OFFSET2 FLAG


bel' FLAGS,OFFSET2 _FLAG

DFCREMENT OFFSET2
dctsnz TABLE CWFSET2,F
bsf FLAGS,OFFSET2 __ FLAG

UPDATE OFFSET3
btlss FLAGS,OFFSET3 FLAG
bra DECREMENT OFFSET3
movlw (SlNE_TABLE __ ENTRlES-1)
cpfslt TABLE_OFFSET3
bra CLEAR OFFSET3 FLAG
incf TABLE_OFFSETJ,F
return

CLEAR- OFFSET3 --FLAG


bcf FLAGS,OFFSET3 __FLAG

DECREMENT OFFSETJ
clcfsnz TABLE_OFFSETJ,F
hsf FLAGS,OFFSET3 _FLAG
return

70
**************************************************************************
CALCULATE- TIMERO - RELOAD

**************************************************************************

CALCULATE - TIMERO- RELOAD

bcf FLAGSI,FREQ__ UPDATE


clrf TEMP
clrf TEMPI
movlw HJGH(FREQUENCY_SCALE)
movwfTEMP LOCATION
movlw LOW( FREQUENCY_SCALE)
movwfTEMP LOCATION+ 1

continue subtraction

rnovf FREQUENCY,W
btfsc STATUS,Z
return
bsf STATUS,C
movf FREQUENCY,W
subwtbTEMP _LOCATION I l,F
clrf WREG
subw1bTEMP _LOCATlON,F
btfss STATUS,C
goto Result
incf TEMP,F
btfsc STATUS,C
incf TEMPI,F
goto continue subtraction

Result

bsf STATUS,C
movlw OxFF
subfwbTEMP,F
subfwbTEMPI ,F
movtf TEMP I ,FREQ_REF_H
movff TEMP,FREQ_REF_ L

return

71
**************************************************************************
Check limits routine
**************************************************************************
CIIECK LIMITS

CHK PWMO MIN


-- ~

movf PDCOH_TEMP, F
bnz Cl-IK- PWM I- MIN
movlw MINL- DUTY ·-CYCLE
C'Yl'S\!:,\. \1 DCm. ~Y~MP
movwfPDCOL TEMP

CHK PWM\ - MlN


~

movf PDCI \-\_TEMP, F


bnz CHK- PWM2- MIN
movlw MINL - DUTY CYCLE~

cpfsgt PDC I L TEMP


movwfPDC I L TEMP

Cl-IK -- PWM2--- MIN


movf PDC2l-I __TEMP, F
bnz DONE-- CHECK--- LIMITS
movlw MINL- DUTY -- CYCLE
cpfsgt PDC2L~TEMP
movwfPDC2L TEMP
DONE- CHECK - LIMIT
return
**************************************************************************
Stops the motor by driving the PWMs to 0% duty cycle.
**************************************************************************

STOP MOTOR
bcf PIE I ,A DIE
bcf lNTCON,TMROIE
clrf OVDCOND
clrf TABLE OFFSET I
clrf TABLE OFFSET2
clrf TABLE OFFSETJ
bcf FLAGS, TIMERO_OV _FLAG
bsf FLAGS I ,STOP

return

72
**************************************************************************
Starts motor from previous stop with motor parameters initialized
**************************************************************************
RUN MOTOR
bsf FLAGSJ,RUN
bcf FLAGS,FLAG}'AULT
bsf PIE 1,ADIE
call !NIT--- MOTOR START ·-·

call UPDATE-- PWM -- DUTYCYCLES


call UPDATE TABLE--OFFSET
~

bsf INTCON,TMROIE
movlw b'llllllll'
movwf OVDCOND
return

**************************************************************************
KEY SWITCH SUBROUTINES
**************************************************************************
KEY CHECK

btfss KEY __ PORT, RUN_ STOP_ KEY


return
bsf FLAGS,RUN
return

KEY PRESSED

btfss KEY_PORT, RUN_STOP_KEY


go to STOP-- MOTOR- NOW
btJss FLAGS,STOP
return
go to RUN MOTOR
bsf LED PORT,RUN STOP LED
return

STOP MOTOR NOW


call STOP MOTOR
bcf LED~PORT,RUN~STOP_LED
return

**************************************************************************
Initialize High-Speed ADC
**************************************************************************
!NIT HSADC
movlw b'OOOOOOOO'
movwfADCON I

73
movlw b'OO I I 00 I0'
movwfADCON2
movlw b'OOOOOOOO'
movwfADCON3
movlw b'IIOOIIII'
movwf ADCIIS
movlw b'OOOOOO I0'
movwfANSELO
movlw b'OOOOOO 10'
movwfTRISA

movlw b'OOOOO I0 I'


movwfADCONO
return

**************************************************************************
Initialize PCPWM
**************************************************************************
!NIT PCPWM

movlw b'OOOOOOOO'
movwf PTCONO

movlw OxF9
movwf PTPERL
movl w OxOO
movwfPTPERI I

mov I w b'O I 0 I 0000'


movwfPWMCONO

movlw b'OOOOOOO I'


movwf PWMCON I

movlw b'OOOO I 0 I 0'


movwf DTCON
movlw b'l I 11 I I I I'
movwf OVDCOND
mov Iw b'OOOOOOOO'
movwf OVDCONS
movlw OxOO
movwf SEVTCMPL
movlw OxOO
movwf SEVTCMPII
bsf PTCON I, PTEN
return

74
lllllFU
I 13ID'NO.JJ.NI JSq
'13ID'NO.:J1NI JSq
NO.Jtl JMAOUl
,[ [()()l()()[,qM!AOUI
d!OV' I tid I _pq
~l!OV' I ~lid _1sq
d!Olll!\!J.'ZNO.J.LNI JSq
!:l!Otll!\!J~'NO.J.LNI JSq
-
S.Ldnt~lElLNI .LIN!
*************************************************************************~
SldllJJ0lUl 0Zl!Hllllll
*************************************************************************~
UJOPJ
'JO(Jli\J.lJA\AOUI
:;-J~X() 11:\!AOLU
I IO(IV\!.LJh\AOUI
~:JX() MJAOUI
NO:JOJJMAOlll
,()() J 0()()0 \,q 1-AJAOlll
Olll!\l.L .Ll N:
*************************************************************************•
()JZlllllj~ ZlZI!l~lllli
*************************************************************************'
UJO)dJ
OS llLlJII:\Aotll
I I 000000 I ,q M!AOlll
O.U!Od .LIN
*************************************************************************'
ClUIOd ZlZf!UI)Ill
*************************************************************************
UJHPJ
HSitiJ.JII:\AOUl
.oooooooo,q A\[Aow
~LL(IOd .LI r·\
*************************************************************************
.J.DIOd ZlZ'Il~l)ltl
************************************************************************~-
**************************************************************************
Initialize Motor
**************************************************************************
!NIT MOTOR START
movlw Ox09
movwfT ABLE OFFSET I
bsf FLAGS,OFFSETl _FLAG
movlw0x03
movwfTABLE OFFSET2
bcf FLAGS,OFFSET2_FLAG
movlw OxOF
movwfTABLE OFFSETJ
bcf FLAGS,OFFSETJ_ FLAG
bsf PORTC,O
bra CONT !NIT MOT

CONT !NIT MOT


movlw Ox30
movwfFREQUENCY
movlwOxFD
movwfFREQ_REF _II
movwfTMROH
movlw Ox2C
movwfTMROL
movwfFREQ_ REF_ L
bsf FLAGS,TIMERO_ OV FLAG
return

**************************************************************************
COPY TABLE TO RAM
**************************************************************************
COPY TABLE -- TO RAM
-- -

movlw UPPER sine table


movwf'f'BLPTRU
movlw HIGH sine table
movwfTB LP' rHJ I
movlw LOW sine table
movwfTI3 LPTR L
movlw LOW(SINE TABLE)
movwfFSROL
movlw I IIGII(SINETABLE)
movwfFSROII
movlw Ox14
movwfTEMJ>

76
< WY AGAIN
TBLRD*+
movff TABLAT,POSTINCO
dccfsz TEMP,F
bra COPY AGAIN

movlw LOW( SINE _TABLE)


movwf FSROL
movlw I-IIGI-l(SINE TABLE)
movwf FSROI I
return

'*************************************************************************
SINE TABLE
•*************************************************************************
; 1\BLE code Ox0600
.Jnc table
· lx00,0x02,0x08,0x II ,Ox I E,Ox2E,Ox40,0x54,0x69,0x80,0x96,0xAB,OxBF,OxD I ,OxE I J)xEE
· h:F7,0xFD,OxFF

'*************************************************************************
END

77
i

l
File AA.inc

**************************************************************************
Oscillator frequency

!/define OSCILLATOR d'20000000'

**************************************************************************
TimcrO prcscalcr;

1
: dcllncTIMERO PRESCALE d'l6'

•••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••

l'hc sampling frequency

'idcfincSINE TABLE- ENTRIES


-
d'37'

**************************************************************************

'***SAMPLES_PER __ CYCLE = (SINE __ TABLE_ENTRIES-l)*d'2'

INSTRUCTION _CYCLE= (OSCILLATOR)/d'4'

I RU)UENCY__ SCALE=

1 IN STR UCTI ON_CYCLE/SAMPLES_PET{_CYCLE)/(TIMERO_PRESCALE/4)

I imcr prcscalc/4 is done to compensate ADC multiplication factor of 4 to the frequency)

"*************************************************************************
P\VM frec1uency definition

:dcllncPWM _FREQUENCY d'5000'

M···························~··············································

78
II File: 18f443l.lkr
/I Sample linker script for the PIC 18F4431 processor

LIBPATH.

CODEPAC)E NAME=vcctors START=OxO END=Ox29 PROTECTED


CODEPAGE NAME=page · START=Ox2A END=Ox3FFF
CODEPAGE NAME=idlocs START=Ox200000 END=Ox200007 PROTECTED
CODEPAGE NAME=config START=Ox300000 END=Ox300000
PROTECTED
CODEPAGE NAME=devid START=Ox3FFFFE END=Ox3FFFFF
PROTECTED
CODEPAGE NAME=cedata START=OxFOOOOO END=OxFOOOFF
PROTECTED

ACCESSBANK NAME=accessram START=,OxO END=Ox5F


DATABANK NAME=gprO START=--=Ox60 END=OxFF
DATABANK NAME=gprl START=OxlOO END=Oxl FF
DATABANK NAME=gpr2 START=Ox200 END=Ox2FF
ACCESSBANK NAME=accesssfr START=OxF60 END==OxFFF PROTECTED

SECTION NAME=~CONFIG ROM=config

79
Appendix B
PIC18F2331/2431/4331/4431
Pin Diagrams
·---~---- ------· --------~----~-----------....---..---~~~--------~--------------· -----------·-----~------------

28-Pin SDIP, SOIC

..._.___ __ .,. R87/KBI3/PGD


MCLRNrr/RE3 - - - -
RAO/ANO < " \ ' - [~ RB6/KBI2/PGC
RA1/AN1 _ _,. ...-.-,. RB511<BI1/PWM4/PGMI 1l

RA2/AN2NREF-/CAP1/INDX · - [~ - - RB4/KBIO/PWM5
RA3/AN3NREF+/CAP2/QEA •~-~-,. ~ RB3/PWM3
RA4/AN4/CAP3/QEB ____,. [:: 6 RB2/PWM2

AVDD - - - - [:::: 7 RB1/PWM1


AVss ____ .,. [_ 8 __, •- ~-,. RBO/PWMO

OSC1/CLI<IIRA7 [~ 9 u 20 ::J • --- Voo


OSC2/CLKO/RA6 L-::: 10 0: 19 -:::1 •----- Vss
RCOfT 1OSO{f1 CKI • ~ --- ... [~ 11 18 --:1---- -... RCT/RX/DT/SDO
RCifT10SI/CCP2ifLTA ____ ... L 12 17 -l ____ ,. RC6fTX/CI<iSS

RC2/CCP1/FLTB [_ 13 16 ] RC!i/INT2/SCK/SCL

RC3fTOCI<IfT!iCI<IIINTO • - - - - [_ 14 15 ::J •---~~---,. RC4/INT1/SOI/SDA

Note 1: Low-voltage programming must be enabled.

40-Pin PDIP

MClRNPP/RE3 ______ ,._ [ -c~T- - 40 _j •-~-.- RB7/KBI3/PGD


RAO/ANO _ , _ 2 39 J ..__... RB6/KBI2/PGC
3 38 - _,____ RB5/KBI1/PWM4/PGMI2)
RA1/AN1 ____...
37 •--·,. RB4/KBIO/PWM5
RA2/AN2NREF-/CAP1/INDX -~-­ 4
RA3/AN3NREF+/CAP2/QEA 5 36 - - - - RB3/PWM3
RA4/AN4/CAP3/QEB --- 6 ..- 35 - - RB2/PWM2

~..-
7 34 J _ , . RB1/PWM1
RA51AN5/LVDIN --
REO/AN6 8 33 . _ - - - - RBO/PWMO
M 32 J •--Voo
RE1//\N7 9
10
~ 31 ::J • - - - Vss
RE2/AN8 u.
CCI 30 ] •----- RD7/PWM7
1\Voo 11 ..-
AVss 12 u 29 •- ______.._ RD6/PWM6
ii: 28 •·---- ... R05/PWM41 4l
OSC1/CLKIIRA7 13 3
OSC2/CLI<OiRA6 14 27 J •------ RD4/FLTA1 l
28 ..,______,._ RC7/RX/DTISDOI 1l
RCOfT1 OSO/T1 CKI 15
25 _ . . . RC6/TX/CK/SS
RC 1fT1 OSI/CCP2/FLTA 16 1
24 J •-·-- ,._ RC5/INT2/SCK(1)/SCLI l
RC2/CCP1/FLTB 17 1
18 23 • - - RC4/INT1/SOII 1ltSDA1 l
RC3fTOCKI(1)fT5CKI(1)/INTO _____...
19 22 _ _____.. RD3/SCK/SCL
RDO/TOCKI/T5CI<I · -
20 21 l _,____ RD2/SDI/SDA
RDI/SDO
-~- ~

Not~ I: RC3 is the alternate pin for TOCKI/T5CKI; RC4 is the allernate pin for SDI!SDA; RC5 is the alternate pin
for SCK/SCL
2: Low-voltage programming must be enabled.
3: RD4 is the alternate pin for FLTA.
4: RD5 rs ttm Allernale pin for PWM4.

'-----------~-- ---~--- ---------~-- ---------··-- ------- -- -----~-

80
Appendix C

PIC18F2331/2431/4331/4431
TABLE 1-3: PIC18F4331/4431 PINOUT 1/0 DESCRIPTIONS
Pin Name
Pin Number ~in Buffer Description
DIP TQFP QF_N_ Type Type
--·c:::-c.:::cc:c_~:=:==---=.::t:cc-::=- - - - - - - - - - - 1===1================= -------
MCLR/V~'P/RE3 18 18 Master Clear (input) or programming voltage (input).
MCLR ST Master Clear (Reset) input. This pin is an active-low
Reset to the device.
VP~' p Programming voltage input.
REJ I ST Digital input. Available only when MCLR is disabled.
OSC 1/CLKI/RA 7 13 30 I 32 Oscillator crystal or external clock input.
OSC1 Oscillator crystal input or external clock source input.
ST
ST buffer when configured in RC mode. CMOS otherwise.
CLI\1 I I CMOS I External clock source input. Always associated with pin
function OSC1. (See related OSC1/CLKI. OSC2/CLKO pins.)
, F\A7 1/0 TTL General purpose 1/0 pin.
I
. OSC2/CLKO/RA6 t4- r- 3-1--t-3f 1-----1- ·-----loscillalor C:i-Y-Siaf-orcTockoutJ;-ut.-- ------ · -- -
OSC2 0 Oscillator crystal output. Connects to crystal or resonator
in C1ystal Oscillator mode.
CLI<O 0 In RC mode, OSC2 pin outputs CLI<O. which has 1/4 the
frequency of OSC 1 and denotes the instruction cycle rate.
RAG
-!--
1/0
-----
1 TTL j General purpose 1/0 pin.
---~-----------------··--------·- ------------~---- -----------
PORTA is a bidirectional 1/0 port.
1-\/\0/AND 2 19 19
RAO
AND
1/0
I
TTL
Analog
I Digital I/O.
Analog input 0.

RA1/AN1 I 3 I 20 20 I 110
R/\ 1
AN1 I
TTL
Analog
I Digital I/O.
Analog input 1.

I-\A2/AN21VREF-/CAP1/I 4 I 21 21
INDX I
R/\2 1/0 TTL Digital I/O.
/\N2 I Analog Analog input 2.
VF<EF- I Analog NO Reference Voltage (Low) input.
C/\P1 I ST Input capture pin 1.
INDX I ST Quadrature Encoder Interface index input pin.

i R/\3//\N31Vr<EF+/ 5 22 22
IC/\P2/QEA
1-\/\3
I 1/0 TTL Digital I/O.
AN3 I Analog Analog input 3.
VF<EF+ I Analog ND Reference Voltage (High) input.
CAP2 I ST Input capture pin 2.
QEA I ST Quadrature Encoder Interface channel A input pin.

I-\/\4/AN4/C/\P3/QEB I 6 I 23 23 I
RA4 1/0 TTL Digital 1/0.
AN4 I Analog Analog inpul4.
CAP3 I ST Input capture pin 3.
QEB I ST Quadrature Encoder lnte1iace channel B input pin.

f\/\5//\N5/LVDIN
RA5
AN5
LVDIN
I 7 I 24 24
I

1/0
I
I
________ L . _____ L_________
~~TTL
Analog
Analog
l Digitall/0.
Analog input 5.
Low-voltage Deled input.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - --------- --------
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I = Input
0 =Output P =Power
OD = Open-Dram (no diode to Voo)

XI

....
PIC18F2331/2431/4331/4431
TABLE 1-3: PIC18F4331/4431 PINOUT 1/0
r-·
DESCRIPTIONS (CONTINUED)
~~ -~~~--~----~ ~~-~~~~~-----~~-~ ~-- ~- ·----
i Pin Number Pin Buffer
Pin Name -- Description
: DIP TQFP QFN Type Type
~-- ~ t--~ - - r-~- ~

PORTE is a bidirectional 1/0 port~

REO/AN6 8 25 25
REO 1/0 ST Digital I/O.
AN6 I Analog Analog input 6.
RE1/AN7 9 26 26
RE1 1/0 ST Digital I/O. I
I

I
AN7 I Analog Analog input 7. I
lf'{E2/AN8 10 27 27
I RE2 1/0 ST Digital I/O.
I AN8 I Analog Analog input 8.
I
-- --- -~------- -·· - ~-~- - - - - - r--~-- ---~-~---~---~~ ~~~-~-----~----~- -~~~--~-~-~--~~- ~~

fvss
I
12, 6,29 6, 30, p - Ground reference for logic and 1/0 pins.
I
31 31 I

iVoo 11, 32 7,28 7, 8, p - Positive supply for logic and 1/0 pins.
28,
29
NC
-~. ~ ---- ~-~~ ~-- ~--

I --
--·---- ------- ----------
12,
13,
13
-~-

NC
t------
NC No connect
---~-------

i
I ~~-
- - - - -----··-- -~ -~j33,_~L~-- -~--- ~~ ~~-L___-~- ---~~~-~ -------- I
Legend: TTL =TTL compatible input CMOS =CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I =Input
0 =Output P =Power
OD =Open-Drain (no diode to Voo)

82
PIC18F2331/2431/4331/4431
TABLE 1-3: PIC18F4331/4431 PINOUT 110 DESCRIPTIONS (CONTINUED)
-----
~-,----· ---~----------- ------------
Pin Number Pin Buffer
Pin Name De$cription
DIP TQFP QFN Type Type
-
PORTO is a bidirectional 1/0 port, or a Parallel Slave Port
(PSP) for interfacing to a microprocessor port. These pins
have TIL input buffers when PSP module is enabled.
f~DO!TOCK' 19 38 38
ROO 1/0 ST Digital I/O.
TOCKI I ST TimerO external clock input.
T5CKI I ST Timer5 input clock.
~ RD1/SDO 20 39 39
RD1 1/0 ST Digital I/O.
SDO 0 - SPI Data out.
RD2/SDI/S 21 40 40
RD2 110 ST Digital ItO.
SOl I ST SPI Data in.
SDA 1/0 ST 12 C Data 1/0.
.RD3/SCK 22 41 41
RD3 1/0 ST Digital I/O.
SCK 1/0 ST Synchronous serial clock inpuUoutput for SPI mode.
SCL 1/0 ST Synchronous serial clock input/output for 12C mode.
IRD4/FLTA 27 2 2
. RD4 1/0 ST Digital I/O.
FLTA I ST Fault interrupt input pin.
R05/PWM 28 3 3
RDS 1/0 ST Digital I/O.
PWM4 0 TTL PWM output 4.
IR06/PWM 29 4 4
~ RD6 1/0 ST Digital I/O.
PWM6 0 TTL PWM output 6.
:RD7/PWM 30 5 5
RD7 1/0 ST Digital 1/0.
i
PWM7
--~-~-
0 TTL PWM output 7.
Legend: TTL =TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I =Input
0 =Output P =Power
00 = Open-Drain (no diode to Voo)

83

..
PIC18F2331/2431/4331/4431
fABLE 1-3: PIC18F4331/4431 PINOUT 110 DESCRIPTIONS (CONTINUED)
-------------Pin Number- ~Pi~ Buff;-·~----~~-------~~.-----~----------
Pin Name Descnption

-=l
DIP TQFP QFN Type Type
PORTC is a bidirectional 1/0 port.
I\CD/T1 0 SO/T1CKI 15 32 34
RCD 1/0 ST Digital I/O.
T10 0 0 - Timer1 oscillator output.
T1C I ST Timer1 external clock input.
1\C1/T10 SI/CCP2J 16 35 35
fLTA
RC1 1/0 ST Digital i/O.
T10 I I CMOS Timer1 oscillator input.
CCP 1/0 ST Capture2 input, Compare2 output, PWM2 output.
FLTA I ST Fault interrupt input pin.
I\C2/CC '1/FLTB 17 36 36
RC2 1/0 ST Digital i/O.
CCP 1/0 ST Capture1 input/Compare1 outpu!/PWM1 output.
FLTB I ST Fault interrupt input pin.
HC3/TDC KI/T5CKI/ 18 37 37
INTO
RC3 1/0 ST Digital i/O.
TOC I I ST TimerO alternate clock input.
T5C I I ST TimerS alternate clock input.
INTO I ST External interrupt 0.
HC4/INT /SDI/SDA 23 42 42
RC4 110 ST Digital I/O.
INT1 I ST External interrupt 1.
SO/ I ST SPI Data in.
SDA 1/0 ST 12C Data 1/0.
I'C5/INT '/SCK/SCL 24 43 43
RC5 1/0 ST Digital I/O.
INT2 I ST External interrupt 2.
SCK 110 ST Synchronous serial clock input/output for SPI mod1
SCL 1/0 ST Synchronous serial clock input/output for 12C modE
RC6/TX ~KISS 25 44 44
RC6 110 ST Digital 1/0.
TX 0 - USART Asynchronous Transmit.
CK 1/0 ST USART Synchronous Clock (see related RX/DT).
ss I ST SPI Slave Select input.
HC7/RX JT/SDO 26 1 1
RC7 110 ST Digital i/O.
RX I ST USART Asynchronous Receive.
DT 110 ST USART Synchronous Data (see related TX/CK).
SDO
-· - . ----- __I__ - ___ j ______ 0
-~---~ ~----~-
SPI Data out.
----------~--~ ------~-~-------·--------
______ j
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I =Input
0 =Output P =Power
OD = Open-Drain (no diode to Voo)

84
PIC18F2331/2431/4331/4431
TABLE 1-3: PIC18F4331/4431 PINOUT 110 DESCRIPTIONS (CONTINUED)
---------- ------------------ -------- r - - - - - - - ----
~------- ·-·-· -·-·-·--------------- ·---- ""l
Pin Number Pin Buffer
PinNa me Description
f-DIP 'TQFP QFN Type Type
"-- ·-- "-
PORTS is a bidirectional I/O port. PORTS can be software
programmed for internal weak pull-ups on all inputs.
~f~BO/PWMO 33 8 9
RBO 1/0 TTL Digital I/O.
PWMO 0 TTL PWM output 0.
RB1/PWM1 34 9 10
RB1 1/0 TTL Digital I/O.
PWM1 0 TTL PWM output 1.
IIRB2/PWM2 35 10 11
RB2 1/0 TTL Digital I/O.
PWM2 0 TTL PWM output 2.
f~B3/PWM3 36 11 12 I
RB3 1/0 TTL Digital 1/0.
PWM3 0 TTL PWM output 3.
RB4/KBIO/PW M5 37 14 14
RB4 1/0 TTL Digital 1/0.
KBIO I TTL Interrupt-on-change pin.
PWM5 I 0 TTL PWM output 5.
II
RB5/KBI1/PW M4/ 38 15 15
PGM
RB5 1/0 TTL Digita~ 1/0.
KBI1 I TTL Interrupt-on-change pin. I
PWM4 0 TTL PWM output 4.
PGM 1/0 ST Low-voltage ICSP programming entry pin.
~

RB6/KBI2/PG ~ 39 16 16
RB6 1/0 TTL Digital I/O.
KBI2 I TTL Interrupt-on-change pin.
PGC 1/0 ST In-Circuit Debugger and ICSP prog(amming clock pin.

L17 _I ~7 .
I RB7/KBI3/PG )
1

:
RB7
KBI3 _1_40 1/0
I
TTL
TTL
Digital 1/0.
Interrupt-on-change pin.
I PGD 1/0 ST In-Circuit Debugger and ICSP programming data pin.
I - ~-- -·-- ------~--------------~--~----------------------------------

Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I =Input
0 =Output P =Power
OD = Open-Drain (no diode to Voo)

85

...
Appendix n
lr-)ternotionol
I~~R Rectifier IR2130/IR2132
-------------------------------------------------------------------~-~~.~-----------------------
3-PHAS'E BRIDGE DRIVER
Features I Product Summary
• Floating channel designed for bootstrap operation
Fully operational to +600V VoFFSET 600V max.
, Tolerant to negative transient voltage I

· clV /cit immune lo+/- 200 rnA I 420 rnA


• Gate drive supply range from 10 to 20V
• Undervoltage lockout for all channels
• Over-current shutdown turns off all six drivers
Vour 10- 20V
" Independent half-bridge drivers
~ Matched propagation delay for all channels
ton/oU (typ.) 675 & 425 ns
·, Outputs out of phase with inputs
~ Cross-conduction prevention logic Deadtime (typ.) 2.5 IJS (IR2130)
Description 0.8 IJS (IR2132)
\\"· ,j
j,fre IR2130/IR2132 is a high voltage, high speed
power MOSFET and IGBT driver with three indepen-
(IBnl high and low side referenced output channels. Packages
f,1 roprietary HVIC technology enables ruggedized
)THH1olitl1ic construction. Logic inputs are compatible
:tilth 5V CMOS or LSTIL outputs. A ground-refer-
flnced operational amplifier provides analog feedback
of bridge current via an external current sense resis-
tor. A cuner1t trip function which terminates all six
#
2B lead SOIC
6utputs is also derived from t11is resistor. An open


'irnir1 FALJLT signal indicates if an over-current or 20 Lead PDIP
inlclor-voltage shutdown has occurred. The output driv-
erc; feature a high pulse current buffer stage designed
lor rninirnurn driver cross-conduction. Propagation 44 Lead PLCC w/o 12 Leads
~lolays are matched to simplify use at high frequen-
~los. Tt1e floating channels can be used to drive N- channel power MOSFETs or IGBTs in the high ·
Ji configuration which operate up to GOO volts.
i
•I•
.I.

:nVpical Connection

~-r··_.--
:1
'

'~cc <>-------- ± T I
fliNDJ " ~
Clfli2]
r hlllT cr----· 1-.-.h.l L......__ !.-.....-..---<>
10
·--o LOAD
·--0

CIIC' o--~.--

L1r iU o--- -
t-~
_.._~---

I. ____ _

<
\,1\l
International
IR2130/IR2132 I~~R Rectifier

Absolute Maximum Ratings


Absolute Maxirnurn Ratings Indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to Vso. Ths,.Thermel Resistance and Power Dissipation ratings are measured
under board mounted and still air COfjdlllons. Additional lnlbrn1ation Is shown In Figures 50 through 53.

Symbol ~ Definition Min. Max. Units


- -
l---'{)3_u.;J_ f-Hgh Side Floating Su~el~ Vl:Jila!le -0.3 625
Vst2L_ 'High Side Floating Oitsel Voltage Vat 2 3- 25 Vet 2 3 + 0.3
~-LV High Sldw Floating Output Voltage
., , .
V S1.2.3- 0.3 Vet.2.3 + 0.3
- Vcg Low Side and Logic Fixed Supply Voltage 'h~.,
-0.3 25
Vss Logic Ground ,, Vee- 25 Vee+ 0.3
VLOt23 Low Side Output Voltage -0.3 Vee+ 0.3
V1tl Logic Input Volta_ye (f-HN1 ,2,3, UN1 ,2,3 & !TRIP) Vss- 0.3 Vee+ 0.3 v
VFLT FAULT Output Voltage v55 - 0.3 Vee+ 0.3
VcAO Operallonal Amplifier Output Voltage v11s- o.3 Vee+ 0.3
VcA- Operational Amplifier lnver11ng Input Voltage Vss- 0.3 Vee+ 0.3
dV~ Allowable Offset Supply Voltage Transient - 50
~:.:.::___
~'o Package Power Dlssipallon @ T As +25"C (28 Lead DIP) - 1.5
(20 Lead SOIC) - 1.6 w
- - · - - - - i---= .
(44 Lead PLCC) - 2.0
Rth.1A 1
Thermal ResiStance, Junction to Ambient (20 Lead DIP) - 03

-
(28 Lead SOIC) - 78 ·crw
-- (44 Lead PLCC) - 63
TJ Junction Temperature - 150

r----Ts Storage Temperature -55 150 ·c


- TL --
_l{lad Temperatura (Soldering, 10 seconds) - 300

Recommended Operating Conditions


The lnpuVOutput logic timing diagram is shown In Figure 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute voltages referenced to Vso. The Vs offset raUr1g Is tasted
with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown In Figure 54.

Symbol Definition Min. Max. Units


_V~.L_ High Side Floating Supply Voltage Vs1.2.3 + 10 Vs1.2.J + 20
~.L_ High Side Floating Offset Voltage Note 1 600
~_LbL_ High Side Floating Output Voltage Vst.z.J Va1 23
Vee Low Side and Logic Fixed Supply Voltage 10 20
Vss Logic Ground -5 5
VLOt2.3 Low Side Output Volla_g_e 0 Vee
\fiN logic Input Voltage (HIN1 ,2,3, 0N1 ,2,3 & !TRIP) Vss Vss-+ 5 v
VFLT FAULT Output Voltage Vss Vee
VeAQ___ Operational Amplifier Output Voltage Vss 5
-----=-
VeA· Operational Amplifier Inverting Input Voltage Vss 5
- _Tl\ ___ _ A_111blent Temperature -40 - -
125 ·c

Note 1: Logic operational lor Vs of (Vso- 5V) to (Vso + 600V). Logic stale held lor Vs of (Vso- 5V) to (Vso- Vss).

192

87
Appendix E

PD -91587A
International
I\iR Rectifier IRG4PC30KD
INSULATED GATE BIPOLAR TRANSISTOR WITH Short Circuit Rated
ULTRAFAST SOFT RECOVERY DIODE .----____,...,--__, UltraFast IGBT
Features "
• High short circuit rating optimized for motor control, VcES =600V
lsc =101Js, @360V VeE (start), TJ::: 125"C,
VGE = 15V
• Combines low conduction losses with high VCE(on) typ. = 2.21 V
G,
switching speed
• Tighter parameter distribution and higher efficiency @VGE::: 15V, lc = 16A
E
than previous generations
• IGBT co-packaged with HEXFRED™ ultrafast, n-channel
uitrasoft recovery antiparallel diodes
Benefits
• Latest generation 4 IGBTs offer highest power density
motor controls possible
• HEXFRED™ diodes optimized for performance with IGBTs.
Minimized recovery characterisllcs reduce noise, EMI and
switching losses
• This part replaces the IRGBC30K02 and IRGBC30MD2
products
• For hints see design tio 97003 T0.247AC
Absolute Maximum ~atings
Parameter Max. Units
VcES Collector-to-Emitter Voltage BOO v
lc@ Tc" 2s·c Continuous Collector Current ~8
=
lc@ Tc 100"C Continuoua Collector Current 15
IeM Pulsed Collector Current <D 56 A
it.M Clamped Inductive load Current Ill 58
lr@ Tc = 1oo·c Diode Continuous Forward Current 12
IFM Diode Maximum Forward Current 56
lsc S!10rt Circuit Withstand Time 10 us
Vc>~ Gate-to-Emitter Voltage :t20 v
Po@ Tc"' 25"C Maximum Power Dissipation 100
w
Pn @ T c = 1OO"C Maximum Power Dissipation 42
T,r Oparallng Junotlon and -55 to +150
Tsw Storage Tempen:lture Range ·c
Soldering Temperature, for 10 sec. 300 (O.Ojl3 ln. (1.6mm) from case)
Mounting Torque, G-32 or M3 Screw. 1o lbf•ln (1.1 N•m)

Th~nnal Resistance
Parameter Min. Typ. Max. Units
Rux; Junction-to-Case - IGBT - - 1.2
RuJC Junction-to-Case - Diode - - 2.5 "C/W
RQCS Case-to-Sink, flat, greased surface - 0.24 -
~k!A Junr.tion-to-Ambient, _typical socket mount - ~
40
Wt Weight --- ---
- -
6 (0,21) ..
g_ (oz)
www.irf.com
4/15/2000

88
Inlernational
IRG4PC30KD IOR Rectifier
Electrical Characteristics@ TJ =2fi°C (unless otherwise specified)
Param~t~r Min. Typ. Max. Units Conditions
V(HR)CES Collectcr-to-Emltter Breakdown VoltageQl 600 - - v VGE ::: OV, lc = 250~A
tW(!lR)CESii'ITJ Tempemb.re Coeff. of B.-ed«lown Voltage - 0.54 - vrc VGE = OV, lc =1.0rnA
VcE(on) Collector-to-Emitter Saturation Voltage - 2.21 2.7 le = 16A =
VGE 15V
- 2.88 - v lc = 28A See Fig. 2, 5
- 2.36 - lc: 16A, TJ = 150'C
VGE(IIll Gate Threshold Voltage 3.0 - 6.0 VeE = VGe, le = 250~A
AVGE(u,YATJ Temperature Coeff. of Threshold Voltage - -12 - mVI'C VeE= VGE. le =
250pA
9te Forward Transconductance @) 5.4 8.1 - s Vee= 100V, le = 16A
IcEs Zero Gate Voltage Collector Current - - 250 pA VGE = OV, VeE= 600V
- - 2500 VGE = OV, VeE= 600V, TJ =150'C
VrM Diode Forward Voltage Drop - 1.4 1. 7 v le = 12A See Fig. 13
- 1.3 1.6 le =12A, TJ = 150'C
IGES Gate-to-Emitter Leakage Current - - ±100 nA VoE =±20V
Switching Characteristics @ T J =25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
Q, Total Gate Charge (turn-on) - 67 100 lc =16A
Q!L".__ Gate - Emitter Charge (turn-on) - 11 16 nC Vee= 400V See Flg.8
-
Ogc
-- Gate - Collector Charge (tum-on) - 25 37 VGE = 15V
l.:J(on) Tum-On Delay Time - 60 -
I, Rise Time - 42 - ns
TJ =25'C
ld(ofl) Tum-Off Delay Time - 160 250 =
le 16A, Vee= 480V
It Fall Time - 80 120 =
VGE 15V, RG =23(2
Eon Turn-On Switching Loss - 0.60 - Energy losses include "tall"
Eoff Turn-Off Switching Loss - 0.58 - mJ and diode reverse recovery
E1s Total Switching Loss - 1.18 1.6 See Fig. 9,10,14
l,c Short Cirruit Withstand nme 10 - - IJS Vee= 360V, T.1=125oC
=
VGE 15V, RG = 10!l, VcPK < 500V
t.l(oll) Turn-On Delay Time - 58 - TJ = 150'C, See Fig. 11,14
t, Rise Time - 42 - le "' 16A, Vee = 480V
ns
4l(off) Turn-Off Delay Time - 210 - VGE = 15V, RG = 23rl,
tr Fall Time - 160 - Energy losses include "tall"
E1s Total Switching Loss - 1.69 - mJ and diode reverse recovery
LE Internal Emitter Inductance - 13 - nH Measured 5mm from package
C;es Input Capacitance - 920 - VGE = OV
Caes Output Capacitance - 110 - pF Vee" 30V See Fig. 7
Cres Reverse Transfer Capacitance - 27 - f" 1.0MHz
lrr Diode Reverse Recovery Time - 42 60 ns TJ"' 25"C See Fig.
- 80 120 TJ = 125"C 14 IF= 12A
irr Diode Peak Reverse Recovery Current - 3.5 6.0 A T.1 =25'C See Fig.
- 5.6 10 T.1 = 125"C 15 VR =200V
Q,, Diode Reverse Recovery Charge - 80 160 nC TJ = 25'C See Fig.
- 220 600 TJ = 125"C 16 dl/dt =200AIJ~
1
dl(re<;)Mfdt Diode Peak Rate of Fall of Recovery
During tb
-=-
-
180
160
1---
-
NIJS
- -
=
TJ 25"C
TJ = 125'C
See Fig.
17

2 www.irf.com

89
- ~- -------~----- ----~-~--------~------~---~--~~~~~~~-~-~ - - __ApJlCll dix _F
C/)

- a:a July 21HI~> ::1


FAIRCHILD tO
OJ
I
SF'[, lll.:~L:J~Jl)L_J[_:_;TCJI=l'
":::T
ru
Single-channel: 6N135, 6N136, HCPL-2503, HCPL-4502 ::::1
::1
<U

Dual-Channel: HCPL"2530, HCPL-2531 Ol


z
High Speed Transistor Optocouplers -..l
w
rJl

en
Features Description z
-'-
• llipl1 speed I Mllil/s
w
Tile I !Cf'l.-4!i02/~ICPL-2fl03, GN 135/6 ami lll;f'L ~'5:10/HCf'l Ol
• SII)Hlllor 1__:~;111 I() liV/ps 2531 oplocouplels conslsl ol an AIOaAs LElJ oplically co11plnd
• I l11nl CIIAnnel HCI'L -2530/HCPL 2531 lo a high speed pl10lodetecto1 translsto1 . :r:
()
~o
• I lo1 rille wu1ldno volla(Je-<11.10V llMS A separate COIIIIecl/nn for the bias of the plmtodiudn ilnpruvos I
• I; I H [Jllfll <Jill Rod () 70''C the Speed by SeV8181 Old81S ofnlAgniliJrJe OVOJ CIHIVGntionnl '
f')
(Jl
• lJ I rr!<:ll(Jrlized (File II EflOlOO) phototlllnslstur oplocouplor s by rmlucinq lli\1 IJ11so -collot:\"1
c::J
capaciltlllce of Ills inpul lransislor w
Applications An lnler nalnolse shlold p1ovirJes supnllor crllnrnull 111odJJ 1n;rH.: :r
('')
• [ IIIH I f~t:f~/VPI S
lion ol IUI1V/ps. AnlllllliOVOII IHlckngo Blluws Sll)mrior insirlnlliHI
pm111illlng a <lllO V wo1ldn\j vollaqu COiilprllrHIIo indusl1y !;);1!1- ,--u1
II l'td!:e lrclltslrllrner replnccnnenl dald of 220 V -f'~
VI
• I ltlljllillnloriAce lo CMUS LS II L-1 IL c::J
1'-l
• WhiG ll;mdwidlli armloy Cllli)JIIIly
Cl
c:
ClJ

Package Schematic ()
I

::r
Q)
:::J
:::J
m
!
u· . -·nJ v
'G -~ \ ;t·~·
HIC
Cl' :r:
()

v,. T -o
I

·_~ --t. l! -r~~-~~ - \1


~- )lll v,, N'
(JI
w
v, ~ .
- i
L CJ

~ -- I /_ r!QJ v, J oJv
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r
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r
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I•IIC I I~ ~. L~-~- ~1111/ll N


rJl
w
---'-

:r:
Gr-11 :J5, 6r-ll :lG, IICPL 250J, II Crt -•IG02 IICf'l 25JOI!ICPI 2fl.ll
=:::T
CIJ
Pin 1 Is not cormndsU In ·n
rnrl ~JumUer IICPI -•1002 n>
ctJ
D.
-I
-~
m
:::J
II)

-
0
(/}

0
.....
't:J
0
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c:::
't:J

...,
CP
(/J

)1lllr-, 1 iltr\ hdr/ ~.;P!l\li'OIH/lJc!Or \;orpornit!Jil


1 1 www lnlw!rihfc:.(Hlll r !lt!l
'-trlrJIP r:liilr11lf!l lilr/1 J5, (il•! 136 , IICPL <'liOJ, IICI'L 4502 Duni-CiwrHJel: IICI'L ;.>C,;-\11 IICI'l.-253 I flev. \0 3

90
en
:::I
Absolute Maximum Ratings (TA = 25°C unless otherwise specified) lCl

Parameter
~- -~ ~---·~~·- ~ ~-~ ~ -----~------- ----- - Symbol Value Units
CP
n
0

:::r
II ~- --------
St(ll a1de I BllliJ'Jrature
- -
~~ ~ -~ ~~ ~~ ~-~~~-- ---~---------- ----------- T SH; -55 to •12~)
---------· --------- ---- ··-
('
OJ
:::I
:::I
Clper HIIIHJ lemperalure ~5S lo I 100 'C CP
Tor'R
-~· .. --~~-----~--~·- ------~~--~---~ --- -------------------
L oc.d Solcler 'lernperalure Tsm 260 lor 1o sec 'C 01
~~- --------- ----- z_.....
EMITTER
w
,IJC/Avor,···1ge l'orward lnpul Curre111
----- ·-·-------- ---
----~--------- ·------------~-- .
Each Channel (Nole 1)
-----------------
11_ (avo) 25 nrA
(.]1

01
II l'<)dK hnwarcllnpu1 Curren! (50°o duly cycle, 1ms PW.) Each Channel (No1e 2)
If' (pk) bll rnA z_.....
w
l 0 oak Transrenllnpul Curren!- ('.1 ps PW, 300 pps) IF (lrans) 10 A 01

Each Channel
:c
11r,ver Sl) lnpul Voltage Each Channel
,. v C'"l
VR ,)
"'0
lrrpul Power Dissrpalrn11 (6~1135/6N 136 ami HCI'L-2503/4502) 100 mW
r-
l'u 0
N
(HCPL 2530/2531 ) Each Cl1annel (Nole 3) 4Ci (.]1
c::>
DETECTOR w
--- --·-~-·~ .. -----------~-~--·----~-~-~~---------~~ --·--~-------,------

Averaqe Ou1pul Crrrrer11 Eacl1 Channell 10 (avg) 8 rnA :c


C'"l
1\:ak Oulpul Curren! Eacl1 Channel lo (pk) 16 "'0
r-
Lrnillur-f-Jase Reverse Volta\)e (6N 135, 6N136 and HCPI_ ~2503 only) VEBR 5 v 0

+:-
(.]1
~)rrpply Vol! age Vee 0 5 lo 30 v 0
N
Oulput Voltngc Vo -0 5 lo 20 v Cl
s::::
Base Curren! (6N135, 6N136 ancJ HCPL 2:>03 only) In :, OJ
--~-~-- ~------ --+-- '
I Oulpu1 power (6N135. 6N136, HCPL-2503. HCPL~4502) (Note 4) PD 100 rnW ("")
---------- ::::r
[ ct1ss1patior1 OJ
(HCPL-2530, HCPL -2531) Each Channel 3b nrW :::1
----~-~------~~~--~~~---~----~~-~- --~-----

:::1
CP

:::r:
r.J
''"0
1-
1..:..,
r.n
i:.V
0

:::c
1:"')
'"0
r-
o
f'-l
(:Jl
(JJ
.-I.

::r:
lCl
::r
c:n
"l:J
Cll
CP
C:J..

:::;i
C))
:tl
til

-....
·r-·
"'co
Q
....co
-c:::l

c!'l
co
d:
-c:::l
Cb
.,..
C(.l

2 www l(lHCillltJse1nl uHn


:,IIHJI<: dtannel· GI~13C>, 6N13G , HCPL-2503, HCPL-4t>02 Duai~Channel: HCPL 2530, HCPL-2531 Rev. 10 3
91
/lni;J l'ac/( C
Appendix G

[R5/ Temperature sensor ic


Data Slteet LM35CZ and LM~J5DZ
RS stock numbers 317-954 and 317-960

l'IH' I,Hy; 1.'' 'I l'l'?•'lslull :'PIIIIColldLUjOI le1npetc1lure Fei!lures


''C>JJ.s•JJ './l'lllllJ '111 "lilpul nf I 0111V pe1 r.lec~I ee
'·'"llfllfl'i'ln l_lnlil·_p riPvice,s Wilh flltlpuls ptupuillollill e Oulpul pioporliOIIilllo "C
lr1 IIi'' ii'.''Uiiilf• lr-?fll)'f?ICJJU!P !Ill rir:'•-!lees Kelvin) !here tt Wide le11q '!:'It11ui e ra11qe - 1lln: ''-' ' l )(l''l:
1." IHl J;i!CfP u(f.•:r:'l '"'llili_Jp Which, Ill lllilS( upplic<JIIOIIS, (C/, verston)
'·NJIIJi;I'IP lr1 l_,p IPIJII''IP•i
/\• r'lllci•'IP.•: ,,f l/1 'r' ,JJI"UIIIIPIJ1}-l8J;JI11Je or 1/, "C[)\!pf
e 1\cclllale 1! 1''C al roollllelnpeialllle lyplt',ll

1/Jn (1 JlliPifiJ •Pi ill ill PI ;]flU!:' '11 P IYJ-'ICC!i


1 e /JilleaJ Ulllpul U ;~or__; lypical
e Low C'UJJ en I eli ain (GOp/\ lyplc'ill)
e Low .sell he"llill<;f (0 OWC: typic·;1/)
\I lSili!Jir' lllitXillltlllll<llings ft\)ole lU) • Uulpul itnpeclaw~e 0.1 U ill ln1/\
·:111 ')'IV '"•II:IUP 1-JSV lu lUV e SI<11Kimd '1'082 packr1q~:
I 11 llJ•IIl '/I lll'll/f' I GV k1- I UV
I ,, I I pi II I 'I Ill "'Ill
IO!Jt/\ ----·-----
._,,,lciUPIPIIII'"'i'1111''' Tl_l-!l~;,,ilr·kiH.JP -GU"Ciu 1-IGcrc: J'/11 UlllllPCiiUIIS
J,,,,i<li<'fllJ'PI;IJIItP (c;•Jkle>llflr/. li,l;.;er_:rJJidS) ____ ;_',(3fYC
T0-92
. 'I'"' 'fliP• I ''I lPf ill II tc(ir'f r IJ JPI al111 f-; 1ill t~JP
Plastic packagA
THHJ lo T,,1Ax (i11ole :::)
I ,f I '''' -,~ •IO"C lu 1-lllrC
1.r 1.\' '' '/. _o"1: ''-' 1-1 url'{'C:

BOTTOM VIEW

l'rll:knge details

.t <1<1!i-" ogq ,.._ - <1 "-"!i·-" (l~q t;()' 11rHr1

pll'lf1!:~
S•. Ollnq-
t---i-
-[~-)- -11551
·- \

--=-i-
fll:t

qr --:=
_'L
-~
S" no~>,

L____J~~t
11

~,::
1

~
rnln norn unr.ontr nil lid
HI 2 lOA
!nntf dill

-
__
o.J5o- o <oo
rvo
---~-~-0 Jr>!ll 'J loll
Typ
I I •1:1- I.J97 hnfnrn ht~rl
lltli!lh

1 lAO
11

______"_'._'"_'"_'_
"H~~,~~r. . IU'«<HH ------ J
q;
. ~
232-2958

;\jJjJlic<1lion tllJirs Fic;me 4

I iqii1P l r----- ---------·--~---·-----

I
'V.:: 1
f<1V to JOV)
I Out
LMJ5

~}
I
__l_
Outrwt --,-
f)n1V ~ 10 OmVI'r: 1 0.1 nF bypi1!J!J
opliomJI
I
I
L ... - - - - -

The CIICUIIS below sl10W Sf'll\P IVpll'i!l app\icall"IL'' r'[


1.. 11'' r'll<'llil ·''iluwll Ill l'IUill"' I IS ;:1 \lilS\(' Sll\lf\P P1Jrled
these \elllpet al\li e sensurs
l<'lll\""lril111P ~PI\S<ll 'lrljl'1)!\P rA 1\\f'c\SUIII\lf l>p\'NPpll
1 .~ '( · :111rl 1 1OD"I: "I 1 llln~: depPwllliU c.111 •;etstutL
T'.' 1\\PiJ.SUl e 1tf'lfrlllve lf'lll}!Pl a till es a neqatlve supply
FicJI!lP 5 Two-wire re111o\P tenqwrilture Sl'll:iill
!'' 1"' 11111 "'I d.': shc>Wl\ i11 I iqu1" ;; wllh sensur gruUIHIPd
SV
J'IL\1 II P ,',
·'le. t·

I.~L~··
Vn111- I0111VI"C !T M-'f!ift.l 1U
frOP1 ~ 2"( !O I dO'I:
'lour

L~r 1-
-'I~

r, ... i,t'!d pair


200
I\ I ·:IJrll J]rJ I'"' .select''' I ,Js fc,lluws 1'/"

\1
lil·c--'-
';1 \ II 1 I\ y

r ·,,J '-' 11111.sl l1e \;J kr:'11 wliPll r ll1VIW1 capacitiVP loi!r.l, sud1
·!'' I111Jrc1 r:<Jl !IPS "1 ill IV lll;lr.\ I'XC'PPdlll(j 50pF
]'1' 1''11 11 ''i" ill"' P[[PI'\ 11[ c<lf-'il'.:iiiVP loi!ds the circUit
Fiqure G Two-wire renmle !t'lllpPtil!Ure 'WI\Sill'
:! 111\f!l\ I 1'.11 11 n \ ,<:}1111 ild 1lP IISPll. however the l esistor IS
11lrlnrllu t!Jroll\l\j.'ill1111f'P'_i;J11l'" JllCJkliKI thiS cnr:Ult SUil- '·V
.Jl•\co [rq r'l'llJ\Pd\1_ 1 11 \11 h1qh itll}ll'dilll';f' lo"ldS 11!1\y
I l<.fl II P 1 .r:\Jr."''"' rl '.;\! r_:\11\ 'NilPll Will r_ll.l\cl<;UillP thiS pl o\1-
\r'll I . JJJr\ ,J};-:c' L[II.IP 1-'1 11 \f'r:llr 'I\ [tO\\ I I i\<.\ici\E'd.llllE'l [Plf'lll'P
11 '· 1111 1P\i\ ys <'l :my r 1ihcc1 •:out r·r; of electrical noise "
/_.,'> Twi!led!lf"'

----
Vnu1- IOmV/'C ITu,IIHf'lf • !"C)
!'lr_tllll' \ frotn 1 2 ·c
to ~ <10"C

l
~ ---;:-;;,-.:;~;,;;J-::;;;;-n-;;;;;---

0,~-
)1!1 t~-----·--
--====-=---..
Tn hlgh.!rnp!ldAnce
ln~d~ nn!y

------------ ----------

93
.,

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