References:: 111 Richard Valantine, "Motor Control Electronics Handbook", 1998, ISBN 0-07-066810-8
References:: 111 Richard Valantine, "Motor Control Electronics Handbook", 1998, ISBN 0-07-066810-8
References:: 111 Richard Valantine, "Motor Control Electronics Handbook", 1998, ISBN 0-07-066810-8
111 Richard Valantine, "Motor Control Electronics Handbook", 1998, ISBN 0-07-066810-8
12] David Bension, "PIC Micro Controller Application Guide", Version 2.0
141 Sanath Alahakoon, "Digital Motion Control Techniques for Electrical Drives",
ISBN -91-7170-555-4
!51 Ned Moohan, Tore M. Undeland, William P. Robbins "Power Electronics" Second
Edition
ISBN -10-0-19-567092-2
ISBN 81-297-0139-1
64
Appendix A
**************************************************************************
include <pi 8f443,1.inc>
include <AAinc>
**************************************************************************
CO\'W\G _CONF\G \ H, \Jx\J2
CONFIG _CONFIG2L, OxOC
CONFIG _ CONFIG2I-I, Ox3E
CONFIG _ CONFJGJL, Ox3C
! I J\GS hits
:!define TIMERO OV FLAGO
:define OFFSET! FLAG l
.:Jcfine OFFSET2 FLAG 2
:define OFFSET3 FLAG 3
1dcfinc RUN 4
ldcfincSTOP 5
'dcflncFREQ UPDATE 6
'"cys parameters
idellnc KEY PORT PORTO
rJefine RUN STOP KEY 7
I ·D parameters
1dcJine LED PORT PORTO
tdcfinc RUN STOP LED 0
**************************************************************************
1\;\M locations in Access hank, initialized
**************************************************************************
l IDATA ACS
I J\L3LE OFFSET! res
I ;\BLE OFFSET2 res
! ABLE OFFSET3 res
I 1>/\GS res
I RI~:Q REF_ H res
65
FREQ REF_L res
I·REQUENCY res
J'EMP res
\\ . _M\) \ \es \
TEMP LOCATION res 2
PDCOL TEMP res
J>DCOI-I TEMP res
PDClL--TEMP res
PDC1H --TEMP res
PDC2L TEMP res
PDC2ll - TEMP res
SINE TABLE
--
res Oxl4 ;Sine table
temp res 1
[Cill p 1 res I
**************************************************************************
RESETANDINTERRUPTVECTORS
**************************************************************************
STARTUP code OxOO
goto Start ;Reset Vector address
CODE Ox08
goto ISR HIGH ;High priority ISR at Ox0008
PROG LOW CODE OxO 18
goto JSR LOW ;Low priority ISR at OxOO 18
**************************************************************************
INITIALIZATION
**************************************************************************
Start
clrf FREQUENCY
clrf FLAGS
call INIT PCPWM
call INlT TMRO
call INIT PORTO
call COPY - TABLE- TO- RAM
call lNIT - MOTOR - START
WAIT HERE
call KEY CHECK
btfss FLAGS,RUN
bra WAIT HERE
clrf FLAGS
call !NIT INTERRUPTS
66
**************************************************************************
MAJN LOOP
**************************************************************************
MAIN LOOP
bttss FLAGS,TIMERO_ OV_FLAG
bra bypass
call UPDATE·-- PWM- DUTYCYCLES
call UPDATE- TABLE- OFFSET
bcf FLAGS,TIMERO _ OV FLAG
bypass
bt1sc FLAGS I ,FREQ__ UPDATE
call CALCULATE TIMERO- RELOAD
-~
btfss ADCONO, GO
bsf ADCONO, GO
call KEY CHECK
call KEY PRESSED
**************************************************************************
INTERRUPT SERVICE ROUTINES
**************************************************************************
ISR HIGH
btfsc INTCON,TMROIF
bra TIMERO OVERFLOW
RETFIE FAST
TIMERO OVERFLOW
movff FREQ_REF_H,TMROH
rnovff FREQ_REF_ L,TMROL
bsf FLAGS,TIMERO_OV_FLAG
bcf INTCON,TMROIF
RETFIE FAST
*************************************************************************
Low priority interrupt service routine
**************************************************************************
ISR LOW
RETFIE FAST
67
l
READ -- ADC RESULTS
~
movff ADRESH,FREQUENCY
movlw Ox30
cpfsgt FREQUENCY
movwf FREQUENCY
movlw OxFO
cpfslt FREQUENCY
movwf FREQUENCY
bsf FLAGS I, FREQ~ UPDATE
bcf PIRI,ADIF
RETFIE FAST
**************************************************************************
UPDATE PWM DUTYCYCLES
~ ~
**************************************************************************
movf TABLE_OFFSETI,W
movf PLUSWO,W
mulwf FREQUENCY, W
movff PRODJ-l,PDCOH~TEMP
movff PRODL,PDCOL~_TEMP
UPDATE PWM2
movf TABLE~ OFFSET2,W
movf PLUSWO,W
mulwfFREQUENCY, W
movffPRODH,PDC I H__TEMP
movtTPRODL,PDClL_JEMP
UPDATE PWM3
movf TABLE_OFFSETJ,W
movf PLUSWO,W
mulwf FREQUENCY, W
movff PRODH,PDC2H~TEMP
movff PRODL,PDC2L~TEMP
TRUNCATE PWMI23
bcf STATUS,C
rlcf PDCOL~TEMP,F
rlcf PDCOI-I_TEMP,F
rlcf PDCOL_TEMP,F
68
..
rlcf PDCOH_TEMP,F
rlcf PDCOL~TEMP,W
andlw Ox3
movfT PDCOI-I~TEMP,PDCOL ~TEMP
movwfPDCOI I TEMP
bcf STATUS,C
rlcf PDCII,_TEMP,F
riel' PDC 11-l_TEMP,F
rlcf PDCIL~TEMP,F
rlcf PDC Ill TEMP,F
rlcf PDC 1L_TEMP, W
andhv Ox3
moviT PDCII-1 TEMP,PDCI L_TEMP
movwf PDC Ill TEMP
bcf STATUS,C
rlcf PDC2L TEMP,F
rlcf PDC2H_TEMP,F
rlcf PDC2L TEMP,F
rlcf PDC211 TEMP,F
rlcf PDC2L~ TEMP,W
andlw Ox3
movff PDC2HTEMP,PDC2L TEMP
movwf PDC21-l TEMP
return
**************************************************************************
TABU: OFFSET
**************************************************************************
UPDATE TABLE---OFFSET
-
69
bra DECREMENT OFFSET!
movlw (SINE_TABLE_ENTRIES-1)
cpfslt TABLE_OFFSET 1
bra CLEAR--OFFSET! FLAG
-
inct' TABLEOFFSETI,F
bra UPDATE OFFSET2
Dl~CREMENT OFFSET I
dcfsnz T AI3 LE _ 0 FFSET 1,F
bsf FLAGS,OFFSET1_FLAG
l JPDATE OFFSET2
btfss FLAGS,OFFSET2 _FLAG
bra DECREMENT OFFSET2
movlw (SINE TABLE-- ENTRIES-I)
~~
DFCREMENT OFFSET2
dctsnz TABLE CWFSET2,F
bsf FLAGS,OFFSET2 __ FLAG
UPDATE OFFSET3
btlss FLAGS,OFFSET3 FLAG
bra DECREMENT OFFSET3
movlw (SlNE_TABLE __ ENTRlES-1)
cpfslt TABLE_OFFSET3
bra CLEAR OFFSET3 FLAG
incf TABLE_OFFSETJ,F
return
DECREMENT OFFSETJ
clcfsnz TABLE_OFFSETJ,F
hsf FLAGS,OFFSET3 _FLAG
return
70
**************************************************************************
CALCULATE- TIMERO - RELOAD
**************************************************************************
continue subtraction
rnovf FREQUENCY,W
btfsc STATUS,Z
return
bsf STATUS,C
movf FREQUENCY,W
subwtbTEMP _LOCATION I l,F
clrf WREG
subw1bTEMP _LOCATlON,F
btfss STATUS,C
goto Result
incf TEMP,F
btfsc STATUS,C
incf TEMPI,F
goto continue subtraction
Result
bsf STATUS,C
movlw OxFF
subfwbTEMP,F
subfwbTEMPI ,F
movtf TEMP I ,FREQ_REF_H
movff TEMP,FREQ_REF_ L
return
71
**************************************************************************
Check limits routine
**************************************************************************
CIIECK LIMITS
movf PDCOH_TEMP, F
bnz Cl-IK- PWM I- MIN
movlw MINL- DUTY ·-CYCLE
C'Yl'S\!:,\. \1 DCm. ~Y~MP
movwfPDCOL TEMP
STOP MOTOR
bcf PIE I ,A DIE
bcf lNTCON,TMROIE
clrf OVDCOND
clrf TABLE OFFSET I
clrf TABLE OFFSET2
clrf TABLE OFFSETJ
bcf FLAGS, TIMERO_OV _FLAG
bsf FLAGS I ,STOP
return
72
**************************************************************************
Starts motor from previous stop with motor parameters initialized
**************************************************************************
RUN MOTOR
bsf FLAGSJ,RUN
bcf FLAGS,FLAG}'AULT
bsf PIE 1,ADIE
call !NIT--- MOTOR START ·-·
bsf INTCON,TMROIE
movlw b'llllllll'
movwf OVDCOND
return
**************************************************************************
KEY SWITCH SUBROUTINES
**************************************************************************
KEY CHECK
KEY PRESSED
**************************************************************************
Initialize High-Speed ADC
**************************************************************************
!NIT HSADC
movlw b'OOOOOOOO'
movwfADCON I
73
movlw b'OO I I 00 I0'
movwfADCON2
movlw b'OOOOOOOO'
movwfADCON3
movlw b'IIOOIIII'
movwf ADCIIS
movlw b'OOOOOO I0'
movwfANSELO
movlw b'OOOOOO 10'
movwfTRISA
**************************************************************************
Initialize PCPWM
**************************************************************************
!NIT PCPWM
movlw b'OOOOOOOO'
movwf PTCONO
movlw OxF9
movwf PTPERL
movl w OxOO
movwfPTPERI I
74
lllllFU
I 13ID'NO.JJ.NI JSq
'13ID'NO.:J1NI JSq
NO.Jtl JMAOUl
,[ [()()l()()[,qM!AOUI
d!OV' I tid I _pq
~l!OV' I ~lid _1sq
d!Olll!\!J.'ZNO.J.LNI JSq
!:l!Otll!\!J~'NO.J.LNI JSq
-
S.Ldnt~lElLNI .LIN!
*************************************************************************~
SldllJJ0lUl 0Zl!Hllllll
*************************************************************************~
UJOPJ
'JO(Jli\J.lJA\AOUI
:;-J~X() 11:\!AOLU
I IO(IV\!.LJh\AOUI
~:JX() MJAOUI
NO:JOJJMAOlll
,()() J 0()()0 \,q 1-AJAOlll
Olll!\l.L .Ll N:
*************************************************************************•
()JZlllllj~ ZlZI!l~lllli
*************************************************************************'
UJO)dJ
OS llLlJII:\Aotll
I I 000000 I ,q M!AOlll
O.U!Od .LIN
*************************************************************************'
ClUIOd ZlZf!UI)Ill
*************************************************************************
UJHPJ
HSitiJ.JII:\AOUl
.oooooooo,q A\[Aow
~LL(IOd .LI r·\
*************************************************************************
.J.DIOd ZlZ'Il~l)ltl
************************************************************************~-
**************************************************************************
Initialize Motor
**************************************************************************
!NIT MOTOR START
movlw Ox09
movwfT ABLE OFFSET I
bsf FLAGS,OFFSETl _FLAG
movlw0x03
movwfTABLE OFFSET2
bcf FLAGS,OFFSET2_FLAG
movlw OxOF
movwfTABLE OFFSETJ
bcf FLAGS,OFFSETJ_ FLAG
bsf PORTC,O
bra CONT !NIT MOT
**************************************************************************
COPY TABLE TO RAM
**************************************************************************
COPY TABLE -- TO RAM
-- -
76
< WY AGAIN
TBLRD*+
movff TABLAT,POSTINCO
dccfsz TEMP,F
bra COPY AGAIN
'*************************************************************************
SINE TABLE
•*************************************************************************
; 1\BLE code Ox0600
.Jnc table
· lx00,0x02,0x08,0x II ,Ox I E,Ox2E,Ox40,0x54,0x69,0x80,0x96,0xAB,OxBF,OxD I ,OxE I J)xEE
· h:F7,0xFD,OxFF
'*************************************************************************
END
77
i
l
File AA.inc
**************************************************************************
Oscillator frequency
**************************************************************************
TimcrO prcscalcr;
1
: dcllncTIMERO PRESCALE d'l6'
•••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••••
**************************************************************************
I RU)UENCY__ SCALE=
"*************************************************************************
P\VM frec1uency definition
M···························~··············································
78
II File: 18f443l.lkr
/I Sample linker script for the PIC 18F4431 processor
LIBPATH.
79
Appendix B
PIC18F2331/2431/4331/4431
Pin Diagrams
·---~---- ------· --------~----~-----------....---..---~~~--------~--------------· -----------·-----~------------
RA2/AN2NREF-/CAP1/INDX · - [~ - - RB4/KBIO/PWM5
RA3/AN3NREF+/CAP2/QEA •~-~-,. ~ RB3/PWM3
RA4/AN4/CAP3/QEB ____,. [:: 6 RB2/PWM2
RC2/CCP1/FLTB [_ 13 16 ] RC!i/INT2/SCK/SCL
40-Pin PDIP
~..-
7 34 J _ , . RB1/PWM1
RA51AN5/LVDIN --
REO/AN6 8 33 . _ - - - - RBO/PWMO
M 32 J •--Voo
RE1//\N7 9
10
~ 31 ::J • - - - Vss
RE2/AN8 u.
CCI 30 ] •----- RD7/PWM7
1\Voo 11 ..-
AVss 12 u 29 •- ______.._ RD6/PWM6
ii: 28 •·---- ... R05/PWM41 4l
OSC1/CLKIIRA7 13 3
OSC2/CLI<OiRA6 14 27 J •------ RD4/FLTA1 l
28 ..,______,._ RC7/RX/DTISDOI 1l
RCOfT1 OSO/T1 CKI 15
25 _ . . . RC6/TX/CK/SS
RC 1fT1 OSI/CCP2/FLTA 16 1
24 J •-·-- ,._ RC5/INT2/SCK(1)/SCLI l
RC2/CCP1/FLTB 17 1
18 23 • - - RC4/INT1/SOII 1ltSDA1 l
RC3fTOCKI(1)fT5CKI(1)/INTO _____...
19 22 _ _____.. RD3/SCK/SCL
RDO/TOCKI/T5CI<I · -
20 21 l _,____ RD2/SDI/SDA
RDI/SDO
-~- ~
Not~ I: RC3 is the alternate pin for TOCKI/T5CKI; RC4 is the allernate pin for SDI!SDA; RC5 is the alternate pin
for SCK/SCL
2: Low-voltage programming must be enabled.
3: RD4 is the alternate pin for FLTA.
4: RD5 rs ttm Allernale pin for PWM4.
80
Appendix C
PIC18F2331/2431/4331/4431
TABLE 1-3: PIC18F4331/4431 PINOUT 1/0 DESCRIPTIONS
Pin Name
Pin Number ~in Buffer Description
DIP TQFP QF_N_ Type Type
--·c:::-c.:::cc:c_~:=:==---=.::t:cc-::=- - - - - - - - - - - 1===1================= -------
MCLR/V~'P/RE3 18 18 Master Clear (input) or programming voltage (input).
MCLR ST Master Clear (Reset) input. This pin is an active-low
Reset to the device.
VP~' p Programming voltage input.
REJ I ST Digital input. Available only when MCLR is disabled.
OSC 1/CLKI/RA 7 13 30 I 32 Oscillator crystal or external clock input.
OSC1 Oscillator crystal input or external clock source input.
ST
ST buffer when configured in RC mode. CMOS otherwise.
CLI\1 I I CMOS I External clock source input. Always associated with pin
function OSC1. (See related OSC1/CLKI. OSC2/CLKO pins.)
, F\A7 1/0 TTL General purpose 1/0 pin.
I
. OSC2/CLKO/RA6 t4- r- 3-1--t-3f 1-----1- ·-----loscillalor C:i-Y-Siaf-orcTockoutJ;-ut.-- ------ · -- -
OSC2 0 Oscillator crystal output. Connects to crystal or resonator
in C1ystal Oscillator mode.
CLI<O 0 In RC mode, OSC2 pin outputs CLI<O. which has 1/4 the
frequency of OSC 1 and denotes the instruction cycle rate.
RAG
-!--
1/0
-----
1 TTL j General purpose 1/0 pin.
---~-----------------··--------·- ------------~---- -----------
PORTA is a bidirectional 1/0 port.
1-\/\0/AND 2 19 19
RAO
AND
1/0
I
TTL
Analog
I Digital I/O.
Analog input 0.
RA1/AN1 I 3 I 20 20 I 110
R/\ 1
AN1 I
TTL
Analog
I Digital I/O.
Analog input 1.
I-\A2/AN21VREF-/CAP1/I 4 I 21 21
INDX I
R/\2 1/0 TTL Digital I/O.
/\N2 I Analog Analog input 2.
VF<EF- I Analog NO Reference Voltage (Low) input.
C/\P1 I ST Input capture pin 1.
INDX I ST Quadrature Encoder Interface index input pin.
i R/\3//\N31Vr<EF+/ 5 22 22
IC/\P2/QEA
1-\/\3
I 1/0 TTL Digital I/O.
AN3 I Analog Analog input 3.
VF<EF+ I Analog ND Reference Voltage (High) input.
CAP2 I ST Input capture pin 2.
QEA I ST Quadrature Encoder Interface channel A input pin.
I-\/\4/AN4/C/\P3/QEB I 6 I 23 23 I
RA4 1/0 TTL Digital 1/0.
AN4 I Analog Analog inpul4.
CAP3 I ST Input capture pin 3.
QEB I ST Quadrature Encoder lnte1iace channel B input pin.
f\/\5//\N5/LVDIN
RA5
AN5
LVDIN
I 7 I 24 24
I
1/0
I
I
________ L . _____ L_________
~~TTL
Analog
Analog
l Digitall/0.
Analog input 5.
Low-voltage Deled input.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - --------- --------
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I = Input
0 =Output P =Power
OD = Open-Dram (no diode to Voo)
XI
....
PIC18F2331/2431/4331/4431
TABLE 1-3: PIC18F4331/4431 PINOUT 1/0
r-·
DESCRIPTIONS (CONTINUED)
~~ -~~~--~----~ ~~-~~~~~-----~~-~ ~-- ~- ·----
i Pin Number Pin Buffer
Pin Name -- Description
: DIP TQFP QFN Type Type
~-- ~ t--~ - - r-~- ~
REO/AN6 8 25 25
REO 1/0 ST Digital I/O.
AN6 I Analog Analog input 6.
RE1/AN7 9 26 26
RE1 1/0 ST Digital I/O. I
I
I
AN7 I Analog Analog input 7. I
lf'{E2/AN8 10 27 27
I RE2 1/0 ST Digital I/O.
I AN8 I Analog Analog input 8.
I
-- --- -~------- -·· - ~-~- - - - - - r--~-- ---~-~---~---~~ ~~~-~-----~----~- -~~~--~-~-~--~~- ~~
fvss
I
12, 6,29 6, 30, p - Ground reference for logic and 1/0 pins.
I
31 31 I
iVoo 11, 32 7,28 7, 8, p - Positive supply for logic and 1/0 pins.
28,
29
NC
-~. ~ ---- ~-~~ ~-- ~--
I --
--·---- ------- ----------
12,
13,
13
-~-
NC
t------
NC No connect
---~-------
i
I ~~-
- - - - -----··-- -~ -~j33,_~L~-- -~--- ~~ ~~-L___-~- ---~~~-~ -------- I
Legend: TTL =TTL compatible input CMOS =CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I =Input
0 =Output P =Power
OD =Open-Drain (no diode to Voo)
82
PIC18F2331/2431/4331/4431
TABLE 1-3: PIC18F4331/4431 PINOUT 110 DESCRIPTIONS (CONTINUED)
-----
~-,----· ---~----------- ------------
Pin Number Pin Buffer
Pin Name De$cription
DIP TQFP QFN Type Type
-
PORTO is a bidirectional 1/0 port, or a Parallel Slave Port
(PSP) for interfacing to a microprocessor port. These pins
have TIL input buffers when PSP module is enabled.
f~DO!TOCK' 19 38 38
ROO 1/0 ST Digital I/O.
TOCKI I ST TimerO external clock input.
T5CKI I ST Timer5 input clock.
~ RD1/SDO 20 39 39
RD1 1/0 ST Digital I/O.
SDO 0 - SPI Data out.
RD2/SDI/S 21 40 40
RD2 110 ST Digital ItO.
SOl I ST SPI Data in.
SDA 1/0 ST 12 C Data 1/0.
.RD3/SCK 22 41 41
RD3 1/0 ST Digital I/O.
SCK 1/0 ST Synchronous serial clock inpuUoutput for SPI mode.
SCL 1/0 ST Synchronous serial clock input/output for 12C mode.
IRD4/FLTA 27 2 2
. RD4 1/0 ST Digital I/O.
FLTA I ST Fault interrupt input pin.
R05/PWM 28 3 3
RDS 1/0 ST Digital I/O.
PWM4 0 TTL PWM output 4.
IR06/PWM 29 4 4
~ RD6 1/0 ST Digital I/O.
PWM6 0 TTL PWM output 6.
:RD7/PWM 30 5 5
RD7 1/0 ST Digital 1/0.
i
PWM7
--~-~-
0 TTL PWM output 7.
Legend: TTL =TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I =Input
0 =Output P =Power
00 = Open-Drain (no diode to Voo)
83
..
PIC18F2331/2431/4331/4431
fABLE 1-3: PIC18F4331/4431 PINOUT 110 DESCRIPTIONS (CONTINUED)
-------------Pin Number- ~Pi~ Buff;-·~----~~-------~~.-----~----------
Pin Name Descnption
-=l
DIP TQFP QFN Type Type
PORTC is a bidirectional 1/0 port.
I\CD/T1 0 SO/T1CKI 15 32 34
RCD 1/0 ST Digital I/O.
T10 0 0 - Timer1 oscillator output.
T1C I ST Timer1 external clock input.
1\C1/T10 SI/CCP2J 16 35 35
fLTA
RC1 1/0 ST Digital i/O.
T10 I I CMOS Timer1 oscillator input.
CCP 1/0 ST Capture2 input, Compare2 output, PWM2 output.
FLTA I ST Fault interrupt input pin.
I\C2/CC '1/FLTB 17 36 36
RC2 1/0 ST Digital i/O.
CCP 1/0 ST Capture1 input/Compare1 outpu!/PWM1 output.
FLTB I ST Fault interrupt input pin.
HC3/TDC KI/T5CKI/ 18 37 37
INTO
RC3 1/0 ST Digital i/O.
TOC I I ST TimerO alternate clock input.
T5C I I ST TimerS alternate clock input.
INTO I ST External interrupt 0.
HC4/INT /SDI/SDA 23 42 42
RC4 110 ST Digital I/O.
INT1 I ST External interrupt 1.
SO/ I ST SPI Data in.
SDA 1/0 ST 12C Data 1/0.
I'C5/INT '/SCK/SCL 24 43 43
RC5 1/0 ST Digital I/O.
INT2 I ST External interrupt 2.
SCK 110 ST Synchronous serial clock input/output for SPI mod1
SCL 1/0 ST Synchronous serial clock input/output for 12C modE
RC6/TX ~KISS 25 44 44
RC6 110 ST Digital 1/0.
TX 0 - USART Asynchronous Transmit.
CK 1/0 ST USART Synchronous Clock (see related RX/DT).
ss I ST SPI Slave Select input.
HC7/RX JT/SDO 26 1 1
RC7 110 ST Digital i/O.
RX I ST USART Asynchronous Receive.
DT 110 ST USART Synchronous Data (see related TX/CK).
SDO
-· - . ----- __I__ - ___ j ______ 0
-~---~ ~----~-
SPI Data out.
----------~--~ ------~-~-------·--------
______ j
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I =Input
0 =Output P =Power
OD = Open-Drain (no diode to Voo)
84
PIC18F2331/2431/4331/4431
TABLE 1-3: PIC18F4331/4431 PINOUT 110 DESCRIPTIONS (CONTINUED)
---------- ------------------ -------- r - - - - - - - ----
~------- ·-·-· -·-·-·--------------- ·---- ""l
Pin Number Pin Buffer
PinNa me Description
f-DIP 'TQFP QFN Type Type
"-- ·-- "-
PORTS is a bidirectional I/O port. PORTS can be software
programmed for internal weak pull-ups on all inputs.
~f~BO/PWMO 33 8 9
RBO 1/0 TTL Digital I/O.
PWMO 0 TTL PWM output 0.
RB1/PWM1 34 9 10
RB1 1/0 TTL Digital I/O.
PWM1 0 TTL PWM output 1.
IIRB2/PWM2 35 10 11
RB2 1/0 TTL Digital I/O.
PWM2 0 TTL PWM output 2.
f~B3/PWM3 36 11 12 I
RB3 1/0 TTL Digital 1/0.
PWM3 0 TTL PWM output 3.
RB4/KBIO/PW M5 37 14 14
RB4 1/0 TTL Digital 1/0.
KBIO I TTL Interrupt-on-change pin.
PWM5 I 0 TTL PWM output 5.
II
RB5/KBI1/PW M4/ 38 15 15
PGM
RB5 1/0 TTL Digita~ 1/0.
KBI1 I TTL Interrupt-on-change pin. I
PWM4 0 TTL PWM output 4.
PGM 1/0 ST Low-voltage ICSP programming entry pin.
~
RB6/KBI2/PG ~ 39 16 16
RB6 1/0 TTL Digital I/O.
KBI2 I TTL Interrupt-on-change pin.
PGC 1/0 ST In-Circuit Debugger and ICSP prog(amming clock pin.
L17 _I ~7 .
I RB7/KBI3/PG )
1
:
RB7
KBI3 _1_40 1/0
I
TTL
TTL
Digital 1/0.
Interrupt-on-change pin.
I PGD 1/0 ST In-Circuit Debugger and ICSP programming data pin.
I - ~-- -·-- ------~--------------~--~----------------------------------
Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels I =Input
0 =Output P =Power
OD = Open-Drain (no diode to Voo)
85
...
Appendix n
lr-)ternotionol
I~~R Rectifier IR2130/IR2132
-------------------------------------------------------------------~-~~.~-----------------------
3-PHAS'E BRIDGE DRIVER
Features I Product Summary
• Floating channel designed for bootstrap operation
Fully operational to +600V VoFFSET 600V max.
, Tolerant to negative transient voltage I
•
'irnir1 FALJLT signal indicates if an over-current or 20 Lead PDIP
inlclor-voltage shutdown has occurred. The output driv-
erc; feature a high pulse current buffer stage designed
lor rninirnurn driver cross-conduction. Propagation 44 Lead PLCC w/o 12 Leads
~lolays are matched to simplify use at high frequen-
~los. Tt1e floating channels can be used to drive N- channel power MOSFETs or IGBTs in the high ·
Ji configuration which operate up to GOO volts.
i
•I•
.I.
:nVpical Connection
~-r··_.--
:1
'
'~cc <>-------- ± T I
fliNDJ " ~
Clfli2]
r hlllT cr----· 1-.-.h.l L......__ !.-.....-..---<>
10
·--o LOAD
·--0
CIIC' o--~.--
L1r iU o--- -
t-~
_.._~---
I. ____ _
<
\,1\l
International
IR2130/IR2132 I~~R Rectifier
-
(28 Lead SOIC) - 78 ·crw
-- (44 Lead PLCC) - 63
TJ Junction Temperature - 150
Note 1: Logic operational lor Vs of (Vso- 5V) to (Vso + 600V). Logic stale held lor Vs of (Vso- 5V) to (Vso- Vss).
192
87
Appendix E
PD -91587A
International
I\iR Rectifier IRG4PC30KD
INSULATED GATE BIPOLAR TRANSISTOR WITH Short Circuit Rated
ULTRAFAST SOFT RECOVERY DIODE .----____,...,--__, UltraFast IGBT
Features "
• High short circuit rating optimized for motor control, VcES =600V
lsc =101Js, @360V VeE (start), TJ::: 125"C,
VGE = 15V
• Combines low conduction losses with high VCE(on) typ. = 2.21 V
G,
switching speed
• Tighter parameter distribution and higher efficiency @VGE::: 15V, lc = 16A
E
than previous generations
• IGBT co-packaged with HEXFRED™ ultrafast, n-channel
uitrasoft recovery antiparallel diodes
Benefits
• Latest generation 4 IGBTs offer highest power density
motor controls possible
• HEXFRED™ diodes optimized for performance with IGBTs.
Minimized recovery characterisllcs reduce noise, EMI and
switching losses
• This part replaces the IRGBC30K02 and IRGBC30MD2
products
• For hints see design tio 97003 T0.247AC
Absolute Maximum ~atings
Parameter Max. Units
VcES Collector-to-Emitter Voltage BOO v
lc@ Tc" 2s·c Continuous Collector Current ~8
=
lc@ Tc 100"C Continuoua Collector Current 15
IeM Pulsed Collector Current <D 56 A
it.M Clamped Inductive load Current Ill 58
lr@ Tc = 1oo·c Diode Continuous Forward Current 12
IFM Diode Maximum Forward Current 56
lsc S!10rt Circuit Withstand Time 10 us
Vc>~ Gate-to-Emitter Voltage :t20 v
Po@ Tc"' 25"C Maximum Power Dissipation 100
w
Pn @ T c = 1OO"C Maximum Power Dissipation 42
T,r Oparallng Junotlon and -55 to +150
Tsw Storage Tempen:lture Range ·c
Soldering Temperature, for 10 sec. 300 (O.Ojl3 ln. (1.6mm) from case)
Mounting Torque, G-32 or M3 Screw. 1o lbf•ln (1.1 N•m)
Th~nnal Resistance
Parameter Min. Typ. Max. Units
Rux; Junction-to-Case - IGBT - - 1.2
RuJC Junction-to-Case - Diode - - 2.5 "C/W
RQCS Case-to-Sink, flat, greased surface - 0.24 -
~k!A Junr.tion-to-Ambient, _typical socket mount - ~
40
Wt Weight --- ---
- -
6 (0,21) ..
g_ (oz)
www.irf.com
4/15/2000
88
Inlernational
IRG4PC30KD IOR Rectifier
Electrical Characteristics@ TJ =2fi°C (unless otherwise specified)
Param~t~r Min. Typ. Max. Units Conditions
V(HR)CES Collectcr-to-Emltter Breakdown VoltageQl 600 - - v VGE ::: OV, lc = 250~A
tW(!lR)CESii'ITJ Tempemb.re Coeff. of B.-ed«lown Voltage - 0.54 - vrc VGE = OV, lc =1.0rnA
VcE(on) Collector-to-Emitter Saturation Voltage - 2.21 2.7 le = 16A =
VGE 15V
- 2.88 - v lc = 28A See Fig. 2, 5
- 2.36 - lc: 16A, TJ = 150'C
VGE(IIll Gate Threshold Voltage 3.0 - 6.0 VeE = VGe, le = 250~A
AVGE(u,YATJ Temperature Coeff. of Threshold Voltage - -12 - mVI'C VeE= VGE. le =
250pA
9te Forward Transconductance @) 5.4 8.1 - s Vee= 100V, le = 16A
IcEs Zero Gate Voltage Collector Current - - 250 pA VGE = OV, VeE= 600V
- - 2500 VGE = OV, VeE= 600V, TJ =150'C
VrM Diode Forward Voltage Drop - 1.4 1. 7 v le = 12A See Fig. 13
- 1.3 1.6 le =12A, TJ = 150'C
IGES Gate-to-Emitter Leakage Current - - ±100 nA VoE =±20V
Switching Characteristics @ T J =25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
Q, Total Gate Charge (turn-on) - 67 100 lc =16A
Q!L".__ Gate - Emitter Charge (turn-on) - 11 16 nC Vee= 400V See Flg.8
-
Ogc
-- Gate - Collector Charge (tum-on) - 25 37 VGE = 15V
l.:J(on) Tum-On Delay Time - 60 -
I, Rise Time - 42 - ns
TJ =25'C
ld(ofl) Tum-Off Delay Time - 160 250 =
le 16A, Vee= 480V
It Fall Time - 80 120 =
VGE 15V, RG =23(2
Eon Turn-On Switching Loss - 0.60 - Energy losses include "tall"
Eoff Turn-Off Switching Loss - 0.58 - mJ and diode reverse recovery
E1s Total Switching Loss - 1.18 1.6 See Fig. 9,10,14
l,c Short Cirruit Withstand nme 10 - - IJS Vee= 360V, T.1=125oC
=
VGE 15V, RG = 10!l, VcPK < 500V
t.l(oll) Turn-On Delay Time - 58 - TJ = 150'C, See Fig. 11,14
t, Rise Time - 42 - le "' 16A, Vee = 480V
ns
4l(off) Turn-Off Delay Time - 210 - VGE = 15V, RG = 23rl,
tr Fall Time - 160 - Energy losses include "tall"
E1s Total Switching Loss - 1.69 - mJ and diode reverse recovery
LE Internal Emitter Inductance - 13 - nH Measured 5mm from package
C;es Input Capacitance - 920 - VGE = OV
Caes Output Capacitance - 110 - pF Vee" 30V See Fig. 7
Cres Reverse Transfer Capacitance - 27 - f" 1.0MHz
lrr Diode Reverse Recovery Time - 42 60 ns TJ"' 25"C See Fig.
- 80 120 TJ = 125"C 14 IF= 12A
irr Diode Peak Reverse Recovery Current - 3.5 6.0 A T.1 =25'C See Fig.
- 5.6 10 T.1 = 125"C 15 VR =200V
Q,, Diode Reverse Recovery Charge - 80 160 nC TJ = 25'C See Fig.
- 220 600 TJ = 125"C 16 dl/dt =200AIJ~
1
dl(re<;)Mfdt Diode Peak Rate of Fall of Recovery
During tb
-=-
-
180
160
1---
-
NIJS
- -
=
TJ 25"C
TJ = 125'C
See Fig.
17
2 www.irf.com
89
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C/)
en
Features Description z
-'-
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w
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• I l11nl CIIAnnel HCI'L -2530/HCPL 2531 lo a high speed pl10lodetecto1 translsto1 . :r:
()
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• I lo1 rille wu1ldno volla(Je-<11.10V llMS A separate COIIIIecl/nn for the bias of the plmtodiudn ilnpruvos I
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capaciltlllce of Ills inpul lransislor w
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---------- ::::r
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