90-To 265-V AC, 91% Efficiency, 0.94 PF Buck-PFC Plus 24-V, 30-W Brushless DC Motor Drive Reference Design
90-To 265-V AC, 91% Efficiency, 0.94 PF Buck-PFC Plus 24-V, 30-W Brushless DC Motor Drive Reference Design
90-To 265-V AC, 91% Efficiency, 0.94 PF Buck-PFC Plus 24-V, 30-W Brushless DC Motor Drive Reference Design
UCC 28180
3.3-V DC
DRV10983 Speed MSP430
IR
Direction Sensor
U V W
An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and other
important disclaimers and information.
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www.ti.com System Description
2 System Description
The use of brushless DC (BLDC) motors has been steadily increasing in applications where a wide range
of speed variation is required, because BLDC motors are highly efficient as compared to induction motors.
For very-low power applications, using low voltage motors offers several advantages, such as operation
over universal voltage input conditions, cost savings on motors and passives, compact printed circuit
board (PCB), and so forth. Moreover, highly integrated and protected low-voltage motor-driver integrated
circuits (ICs) make the motor easier to control and more efficient. However, the use of a low voltage motor
does require an efficient and low-cost AC-DC conversion stage. The TIDA-00652 design addresses this
application requirement in a simple and efficient manner. The PCB also integrates an efficient and feature-
rich motor controller stage, which enables customers to use this platform for applications such as ceiling
fans, exhaust fans, ventilation fans, oven fans, and other low-power BLDC drives used in home and
industrial appliances.
As Figure 1 shows, a buck power factor correction (PFC) power stage converts the 90- to 265-V,
50/60-Hz AC input to a regulated 24-V DC output. This design utilizes a UCC28180 PFC IC to control this
power stage. The 24-V DC generated by the power stage is used to power the three-phase, sensorless
BLDC motor controller DRV10983, which in turn drives the motor to control its speed. The DRV10983
controller also generates a 3.3-V supply, which powers the microcontroller (MCU). The MCU transmits the
speed reference to the DRV10983 controller in the form of a 1.5-KHz pulse-width modulation (PWM)
signal (producing a duty cycle proportional to the desired speed). This 1.5-KHz PWM signal is based on
the signal received from the infrared (IR) sensor, which in turn is activated by a general-purpose IR remote
control. Customizing the firmware of the MCU is easy for any given remote control data format.
3.3 V
VM ±24 V
90- to 265-V AC
Buck PFC DC-DC
47 to 63 Hz
UCC
28180
DRV10983
3.3 V
Speed
MSP430G2201 Dir
IR
Sensor
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3 Block Diagram
UCC 28180
3.3-V DC
DRV10983 Speed MSP430
IR
Direction Sensor
U V W
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www.ti.com Block Diagram
The DRV10983 has features that are highly useful for fan applications, such as:
• Programmable motor parameters for optimal working conditions with different motors
• Current limit, lock detection, and fault handling
• Thermal shutdown
• 180° sensorless control scheme
• Reliable starting of motor under different initial conditions
– Motor stationary
– Motor spinning in forward direction
– Motor spinning in reverse direction
• Commutation control angle advance
• Motor initialization
– Align
– Initial position detect (IPD)
• Acceleration settings
• Figure 3 and Figure 4 show the start-up and operation waveforms of the DRV10983 device driving a
fan load.
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www.ti.com System Design Theory
4.1 Overview
The PFC stage converts the incoming rectified line voltage to a DC voltage on the output capacitor bank
Co. The power transfer occurs during instances when the line voltage is greater than the output voltage.
The resulting conduction angle is a function of both the incoming line and output voltages. In the current
TIDA-00652 design, the output voltage is set to 24-V DC. This output voltage is low enough to allow
conduction angles sufficient to achieve a power factor (PF) of at least 0.94 over a wide-input voltage range
from 90-V AC to 265-V AC. Other output voltage levels (below 26 V) can be set by altering the voltage
sensing network at the VSENSE pin (see Section 4.4). Figure 5 shows a basic buck PFC power stage. This
low-side switched buck stage has the same performance as the more commonly used high-side switched
buck converter. The incoming AC line is fed through a rectifier and filter stages (not fully shown in this
figure). The resulting unipolar voltage is then fed into the power stage. The MOSFET is switched at a
constant frequency of 100 KHz. The output voltage (Vo) is developed across capacitor Co. The system is
operated in discontinuous conduction mode (DCM) to achieve good input current THD and power factor.
Figure 6 and Figure 7 show an abstract of the current and voltage waveforms at various locations in the
converter under DCM operation. For clarification purposes, note that the switching frequency in the figures
is deliberately shown to only be a few times higher than the line frequency (50 Hz to 60 Hz). However, in
practice, the switching frequency is usually selected to be many times higher than the line frequency.
CM I/P filter
Choke inductor
Cin Co 24-V DC Vo
UCC S Buck
28180
inductor
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Cin Co Vo R3 R1
Q
UCC S
28180 R2
Rsense Vsense
Refer to the following seminar (SLUP264) for a more detailed equation that includes the effect of the
transistor current gain. Adjusting the value of RSENSE sets the Vo voltage under closed-loop operation [ 1].
4.5 Control
The UCC28180 is a boost PFC IC by design; however, the flexibility offered by the IC makes it easily
adaptable to control a buck PFC topology. This adaptation is possible by bypassing the current loop by
placing a Zener-based constant voltage source at the ICOMP pin of the UCC28180 device. The user must
be careful to ensure that the potential of the ICOMP pin is kept above 3 V.
The voltage at the VCOMP pin is automatically adjusted by the closed-loop operation such that desired ramp
slope is achieved, which in turn produces the desired duty cycle to maintain the output voltage at the
desired level (24 V in this design).
From the datasheet of UCC28180, the ramp slope is provided by Equation 7:
f KHz V
M » sw ´ 0.1223 ´ (VCOMP - 0.5)2 ; for 0.5 £ VCOMP £ 4.6 V
65 KHzμs
dM f KHz V/μs
Þ = sw ´ 0.1223 ´ 2 ´ (VCOMP - 0.5) ; for 0.5 £ VCOMP £ 4.6 V
dVCOMP 65 KHz V (7)
The peak of the ramp voltage is given by Equation 8:
M
VRAMP_PEAK »
fsw (8)
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For an ICOMP voltage of 3.3 V, the duty cycle D can be calculated by using Equation 9:
VRAMP_PEAK - 3.3
D »
VRAMP_PEAK (9)
Also, assuming a 100% conduction angle, the operating duty cycle D can be calculated using Equation 10:
1 PIN ´ 4 ´ L
D » ´
Vm Tsw (10)
When VIN = 90-V AC (assuming an efficiency of 0.9), the maximum expected value of duty cycle D can be
calculated using Equation 11:
æ 36 ö -6
ç 0.9 ÷ ´ 4 ´ 34 ´ 10
D »
1
´ è ø = 0.183
127.26 10 ´ 10-6 (11)
This result from Equation 11 corresponds to a VRAMP_PEAK of 4.038, which in turn corresponds to an M of
approximately 0.4038 V/µs and a VCOMP of 1.86 V. Having established these corresponding values, the
user can place a Zener diode at the VCOMP pin (DZCOMP in Figure 9) to limit the voltage to 1.9 V (if required).
This Zener diode placement also limits the minimum input voltage at which the rated voltage output is
guaranteed.
The compensation network is almost the same as that used for a boost PFC circuit, except for the value of
the capacitor CCOMP2, which must be adjusted so that the output voltage ripple has a minimal effect on the
duty cycle and sufficient time is allowed for a soft-start operation. The capacitor cannot be made too small
because during overload conditions the IC may connect a 4-kΩ resistor in parallel to this capacitor (soft
overcurrent limit). A capacitor with a large enough value stabilizes the voltage at the VCOMP pin, in spite of
the soft overcurrent limit, which occurs only in transients in the case of controlling a buck converter.
The user can add a high value resistor (between 300 kΩ to 1 MΩ) in parallel to the capacitor CCOMP2, if
voltage droop characteristics with increase in load and decrease in input voltage is desired.
A small signal diode, DST, is required to bias the VSENSE pin to a positive voltage during start-up, which is
required for the IC to begin operation.
VCC
ICOMP VCOMP
RCOMP1
DZCOMP
DST
UCC28180 CCOMP1 CCOMP2 (optional)
VSENSE
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www.ti.com Getting Started Firmware
2. Build the project, by first left-clicking the project title and then clicking the Build button, as the following
Figure 11 shows. Close the TI resource explorer window.
3. Download the code by clicking the Debug button (bug icon). If the “ULP Advisor™” window appears,
click the Proceed button (see Figure 12). The user can choose to enable the option “Do not show this
message again” to avoid its appearance in future launches.
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4. After successfully downloading the code, the following window in Figure 13 appears. Match the
console message and click the Resume button (the “play” arrow icon in the taskbar).
5. Insert a breakpoint by right-clicking at line 112 (right side of 112) and then selecting the Breakpoint
(Code Composer Studio) option from the cursor prompt (see Figure 14).
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6. Point the remote toward the IR sensor and press the increment key. If the previous steps have been
performed correctly, the code halts at line 112. Move the cursor to the “Switch” variable on line 110
and a pop-up window appears as the following Figure 15 shows. Note the hex code as this is the code
for the increment key of the remote in use.
7. Resume the code as outlined in Step 4. Point the remote toward the IR sensor and press the
decrement key. Repeat the process in Step 6.
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8. Repeat Step 6 and Step 7 two to three times and ensure that both key codes are the same every time.
Upon successful repetition, move the cursor to line 112 and disable the breakpoint by right-clicking
exactly at the breakpoint (left side of line 112) and selecting the Toggle Breakpoint option from the
pop-up window (see Figure 16). Terminate the debug launch by clicking the Stop button (red square
icon) next to the Resume button.
9. Navigate to the main.c file under the main taskbar pane and change the key codes at line 64 and 65.
Re-flash the new code as Step 3 and Step 4 outline. The new code is now ready to use for speed
control with the remote (see Figure 17).
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7 Test Setup
Testing of the TIDA-00652 design was performed with a resistive load on the buck PFC converter.
Figure 18 shows the block diagram of the test setup with a resistive load.
Testing of the TIDA-00652 design was also performed with a fan load. Figure 19 shows the block diagram
of the test setup with a fan load.
Fluke
multimeter
(to measure
voltage)
Figure 18. Block Diagram of Test Setup With Resistive Load
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8 Test Data
0.925 19%
iTHD = 265-V I/P
0.92 iTHD = 230-V I/P
iTHD = 190-V I/P
0.915 17% iTHD = 140-V I/P
0.91
Power Supply Efficiency
15%
0.9
13%
0.895
0.89
11%
0.885
Figure 20. Power Supply Efficiency versus Output Power Figure 21. Input Current THD versus Output Power
With Resistive Load
Figure 22 shows the output power versus the input power factor curves.
1.05
0.95
Input Power Factor
0.9
0.85
0.8
PF = 265 V, 50-Hz AC
0.75 PF = 230 V, 50-Hz AC
PF = 190 V, 50-Hz AC
PF = 140 V, 50-Hz AC
0.7
0 10 20 30 40
Output Power (W) D003
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Figure 23 shows the output power versus the input power factor curves.
A) At 140-V Input and Approximately 30-W Output Power B) At 230-V Input and Approximately 30-W Output Power
C) At 140-V Input and Approximately 10-W Output Power D) At 230-V Input and Approximately 10-W Output Power
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35 25%
iTHD = 265-V I/P
iTHD = 230-V I/P
30 iTHD = 190-V I/P
iTHD = 140-V I/P
20%
25
15%
20
15
10%
10
5%
I/P power = 265-V I/P
5 I/P power = 230-V I/P
I/P power = 190-V I/P
I/P power = 140-V I/P
0 0
100 150 200 250 300 100 150 200 250 300
Speed (RPM) D004
Speed (RPM) D005
Figure 24. Input Power versus Fan Speed Figure 25. Input Current THD versus Fan Speed
Figure 26 shows the speed versus the input power factor curves.
1.2
0.8
Input Power Factor
0.6
0.4
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Figure 27 and Figure 28 show the front and rear thermal images of the board working with the fan load at
an ambient of 22.5°C. These images are produced while operating at an input voltage of 230–V AC and
the fan running at 280 RPM.
Figure 27. Thermal Image of Front View of Board While Running Fan Load at 280 RPM
Figure 28. Thermal Image of Back View of Board While Running Fan Load at 280 RPM
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9 Design Files
9.1 Schematics
To download the Schematics for each board, see the design files at TIDA-00652.
10 Software Files
To download the software files for this reference design, see the link at TIDA-00652.
11 References
1. Texas Instruments, Power Factor Correction Using the Buck Topology—Efficiency Benefits and
Practical Design Considerations, SEM1900 - Topic 4 Power Supply Design Seminar (SLUP264)
2. Texas Instruments, Buck PFC Controller, UCC29910 Datasheet and Application Notes (SLUSAK8)
3. Texas Instruments, BLDC Ceiling Fan Controller with Sensor-less Sinusoidal Current Control, TIDA-
00386, TIDA-00386 Test Results (TIDU699)
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www.ti.com Revision A History
Revision A History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
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