ES Assignment
ES Assignment
ES Assignment
1801227411
EMBEDDED SYSTEMS
ASSIGNMENTS
Branch- CSE Sub code – CS40111
Sem- 7TH
Unit – 1
Unit – 3
Determine whether the following set of periodic task is schedulable on a uniprocessor [L3,CO-3]
using RMA: T1=(e1=25,p1=150,d1=100)ms; T2=(e2=7,p2=40,d2=40)ms;
1.
T3=(e3=10,p3=60,d3=50)ms;
T4=(e4=10,p4=30,d4=20)ms.
Briefly explain why the traditional unix kernel is not suitable to be used in a [L2,CO-3]
2.
multiprocessor environment? Differentiate between a spin lock and kernel level lock.
Unit – 4
2.
It is designed such that it can cater to It is designed such that it can cater to a
multiple tasks as per requirement. particular predefined task.
The Operating system and other software The operating system(mostly RTOS i.e Real
for the general purpose computers, are Time Operating System) and other software
normally complicated and occupy more occupy less memory space.
memory space
Unit-2
1. Different types of processors used in embedded system are:-
a)General Purpose Processor (GPP)
o Microprocessor A microprocessor is a single VLSI chip having a CPU.
In addition, it may also have other units such as coaches, floating point
processing arithmetic unit, and pipelining units that help in faster
processing of instructions. Earlier generation microprocessors’ fetch-and-
execute cycle was guided by a clock frequency of order of ~1 MHz.
Processors now operate at a clock frequency of 2GHz.
o Microcontroller A microcontroller is a single-chip VLSI unit (also
called microcomputer) which, although having limited computational
capabilities, possesses enhanced input/output capability and a number of
on-chip functional units. Microcontrollers are particularly used in
embedded systems for real-time control applications with on-chip
program memory and devices.
o Embedded Processor An embedded processor is a type of
microprocessor designed into a system to control electrical and
mechanical functions. Embedded processors are usually simple in design,
limited in computational power and I/O capabilities, and have minimal
power requirements. At a basic level, embedded processors are a CPU
chip placed in a system that it helps control.
o Digital Signal Processor A digital signal processor (DSP) is a
specialized microprocessor (or a SIP block), with its architecture
optimized for the operational needs of digital signal processing. The goal
of DSP is usually to measure, filter or compress continuous real-
world analog signals.
o Media Processor A media processor, mostly used as an image/video
processor, is a microprocessor-based system-on-a-chip which is designed
to deal with digital streaming data in real-time rates. These devices can
also be considered a class of digital signal processors.
b)Application Specific System Processor (ASSP)
The application-specific system processor is a semiconductor integrated
circuit product used to implements a specific function. The performance,
characteristics and die size of the application-specific system processor is the
same as the ASIC. The ASSP’s are used in various types of industries to
perform video encoding or decoding and audio encoding or decoding. In place
of embedded software, the application-specific system processor is used to run
the application and it provides the solution faster. Example: IIM7100, W3100A
c)Application Specific Instruction Processors (ASIPs)
The application-specific instruction-set processors are designed for specific
applications. These processors have low power consumption, high
computational speed, and good flexibility. Due to programmability, the data
path utilization is high in ASIPs, and the performance of this instruction set
processor is good.
d)GPP core(s) or ASIP core(s) on either an Application Specific Integrated
Circuit (ASIC) or a Very Large Scale Integration (VLSI) circuit.
GPP is used for processing signal from input to output by controlling the
operation of system bus, address bus and data bus inside an embedded system.
The application-specific instruction-set processors are designed for specific
applications. These processors have low power consumption, high
computational speed, and good flexibility. Due to programmability, the data
path utilization is high in ASIPs, and the performance of this instruction set
processor is good.
2.
Smart Card Hardware
Microcontroller MC68HC11D0 or PIC16C84 or a smart card processor Philips Smart
XA or an ASIP Processor. Needs 8 kB+ internal RAM and 32 kB EPROM and 2/3
wire protected memory. CPU special features, for example, a security lock
CPU locks certain section of memory - protect 1 kB or more data from modification
and access by any external source or instruction outside that memory. Other way of
protecting - CPU access through the physical addresses, which are different from
logical address used in the program.
EEPROM or Flash scalable – only needed part unlocks when storing P.I.N., unlocking
P.I.N., access condition, card-user data, post activation application run generated non-
volatile data, invalidation lock to invalidate card after the expiry date or server
instruction
Unit-3
1. Let us first compute the total CPU utilization achieved due to the given tasks.
25 7 10 10
U = ∑4𝑖=1 𝑢i = + + + = 0.84 ≤ 1
150 40 60 30
Therefore, the necessary condition is satisfied. The sufficiency condition is given by
∑𝑛𝑖=1 𝑢i ≤ n(21/𝑛 -1)
Therefore, 0.84 ≤ 4(21/4-1) = 0.84 ≤ 0.76 →Not satisfied.
Although, the given set of tasks fails the Liu and Layland’s test which is pessimistic in
nature, we need to carry out Lehoczky’s test. We need to reorder the tasks according to
their decreasing priorities.
Task Start Time (ms) Processing Time (ms) Period (ms) Deadline (ms)
T4 25 10 30 20
T2 40 7 40 40
T3 60 10 60 50
T1 20 25 150 100
Testing for task T4: Since e4<= d4, therefore, T4 would meet its first deadline.
40
Testing for task T2: 7 + [ ] * 10 40
30
→ Satisfied.
→ Task T2 would meet its first deadline.
60 60
Testing for task T3: 10 + [ ] * 7 + [ ] * 10 50
40 30
→ Satisfied.
→ Task T3 would meet its first deadline.
150 150
Testing for task T1: 25 + [ ] * 10 + * 10 100
60 30
→ Not Satisfied.
→ Therefore, Task T1 would meet its first deadline.
Hence, the given task set is not RMA schedulable.
(f) Deployment Deployment is the process of launching the first fully functional
model of the product in the market. It is also known as First Customer Shipping (FCS).
Tasks performed during this phase are:
Notification of Product Deployment: Tasks performed here include:
Deployment schedule
Brief description about the product
Targeted end user
Extra features supported
Product support information
Execution of training plan
Proper training should be given to the end user top get them acquainted with the new
product.
Product installation
Install the product as per the installation document to ensure that it is fully functional.
Product post Implementation Review
After the product launch, a post implementation review is done to test the success of
the product.
(g)SupportThe support phase deals with the operational and maintenance of the
product in the production environment. Bugs in the product may be observed and
reported. The support phase ensures that the product meets the user needs and it
continues functioning in the production environment. Activities involved under
support are
Setting up of a dedicated support wing: Involves providing 24 x 7 supports for the
product after it is launched.
Identify Bugs and Areas of Improvement: Identify bugs and take measures to
eliminate them.
o Editor Program : At first, we use an editor for type in a program. Editors like
MS-DOS program that comes with all Microsoft operating systems can be used
for creating or edit a program. The editor produces an ASCII file. The ?asm?
extension for a source file is used by an assembler during next step.
o Assembler Program: The "asm" source file contain the code created in Step 1.
It is transferred to an 8051 assembler. The assembler is used for converting the
assembly language instructions into machine code instructions and it produced
the .obj file (object file) and .lst file (list file). It is also called as source file
because some assembler requires that this file must have "src" extension.
o Linker Program: The linker program is used for generating one or more object
files and produces an absolute object file with an extension "abs".
o OH Program: The OH program fetches the "abs" file and fed it to a program
called "OH". OH is called as object to hex converter it creates a file with an
extension "hex" that is ready for burn in to the ROM.
Unit – 5
1. An emulator is a hardware device or software program that enables one computer
system (also known as a host) to imitate the functions of another computer system
(known as the guest). It enables the host system to run software, tools, peripheral
devices and other components which are designed for the guest system.
Following are the components:-
a)CPU Emulator The CPU emulator is often the most complicated part of an
emulator. Many emulators are written using "pre-packaged" CPU emulators, in order
to concentrate on good and efficient emulation of a specific machine. The simplest
form of a CPU emulator is an interpreter, which is a computer program that follows the
execution flow of the emulated program code and, for every machine code instruction
encountered, executes operations on the host processor that are semantically equivalent
to the original instructions. This is made possible by assigning a variable to each
register and flag of the simulated CPU. The logic of the simulated CPU can then more
or less be directly translated into software algorithms, creating a software re-
implementation that basically mirrors the original hardware implementation.
b) Input/output (I/O) Most emulators do not emulate the main system bus; each I/O
device is thus often treated as a special case, and no consistent interface for virtual
peripherals is provided. This can result in a performance advantage, since each I/O
module can be tailored to the characteristics of the emulated device; designs based on a
standard, unified I/O API can, however, rival such simpler models, if well thought-out,
and they have the additional advantage of "automatically" providing a plug-in service
through which third-party virtual devices can be used within the emulator. A unified
I/O API may not necessarily mirror the structure of the real hardware bus: bus design
is limited by several electric constraints and a need for hardware concurrency
management that can mostly be ignored in a software implementation.
Even in emulators that treat each device as a special case, there is usually a common
basic infrastructure for:
managing interrupts, by means of a procedure that sets flags readable by the CPU
simulator whenever an interrupt is raised, allowing the virtual CPU to "poll for
(virtual) interrupts"
writing to and reading from physical memory, by means of two procedures similar to
the ones dealing with logical memory (although, contrary to the latter, the former can
often be left out, and direct references to the memory array be employed instead)
c) Memory subsystem It is possible for the memory subsystem emulation to be
reduced to simply an array of elements each sized like an emulated word; however,
this model fails very quickly as soon as any location in the computer's logical memory
does not match physical memory. This clearly is the case whenever the emulated
hardware allows for advanced memory management (in which case, the MMU logic
can be embedded in the memory emulator, made a module of its own, or sometimes
integrated into the CPU simulator). Even if the emulated computer does not feature an
MMU, though, there are usually other factors that break the equivalence between
logical and physical memory: many (if not most) architectures offer memory-mapped
I/O; even those that do not often have a block of logical memory mapped to ROM,
which means that the memory-array module must be discarded if the read-only nature
of ROM is to be emulated. Features such as bank switching or segmentation may also
complicate memory emulation. As a result, most emulators implement at least two
procedures for writing to and reading from logical memory, and it is these procedures'
duty to map every access to the correct location of the correct object.
An in-circuit emulator (ICE) is a hardware device that plugs into the CPU socket of a
computer. The advantage of using an ICE is that various portions of the system
memory may be re-mapped, complex breakpoints can be used and an execution trace
history can be collected. All this can be done at or near real-time execution speed.
ACVM Specifications
ACVM Hardware
The heart of an ACVM is a Microcontroller or ASIP (Application Specific Instruction
Set Processor). A RAM is used for storing temporary variables and the stack, and a
ROM for application codes, and the RTOS codes for scheduling the tasks. It also has
flash memory for storing user preferences, contact data, user address, a user date of
birth, user identification code and answers to frequently asked questions (FAQs).
Timer and Interrupt controller are also needed to control the process of ACVM. It has
a TCP/IP port (Internet broadband connection) to the ACVM for remote control and
for providing the system status reports to the owner. It also has an ACVM specific
hardware and a power supply.
ACVM Software
Software is required to handle the following:
Read input from keypad, display text/graphics, control coins reader, and control
delivery port (to deliver the chocolate). In addition to these, we also need the TCP/IP
stack communication for remote control, and an RTOS (say, MUCOS), to run the
ACVM software.
ACVM Requirements
The purpose of ACVM is to build a system from which children can automatically
purchase the chocolates, and the payment is by inserting the coins to the appropriate
denomination coin-slot.
Inputs Coin slot to insert the coins of different denominations and the keypad to
enter the user commands.
Signals, events and Notifications An interrupt is generated at each port after the coin
is received in the coin slot. Each port interrupt starts an Interrupt Service Routine
(ISR), which increases value of amount collected by corresponding rupees (1, 2, 5 or
10). A notification is generated for each selection in the menu.
Outputs The display is used to show the GUIs, time and date, advertisements,
welcome and thanks messages. Chocolate and signal (IPC) to the system that subtracts
the cost from the value of amount collected.
Functions of the system:
A child (user) sends commands to the ACVM using a GUI (graphic user interface).
GUI consists of the LCD and keypad units. At first, the child inserts the coins (
Task_Collect through Port_Collect) for the cost of chocolate and the machine delivers
the chocolate in the delivery slot. If the coins are not inserted as per the cost of
chocolate for a reasonable amount of time, then all coins are refunded (Task_Refund
through Port_Refund). If the inserted coins amount is more than the cost of chocolate,
the excess amount is refunded along with chocolate (Task_ExcessRefund through
Port_ExcessRefund). If the chocolate is of different rupees, then the port is assigned to
each rupee, and then the interrupt is sent to the corresponding port (Task_ReadPorts
through Port_Read). After that chocolate is delivered through the delivery slot
(Task_Deliver through Port_Deliver). The coins for the chocolates purchased collect
inside the machine in a collector channel (Task_Collect), so that owner can get the
money, again through appropriate commands using the GUI (Task_Display). USB
wireless modem enables communication through Internet to the ACVM system owner.
Design metrics
The design of the system is measured in terms of four design metrics and are explained
as follows
● Power Dissipation: Maximum (tolerance) amount of heat it can generate while
working as required by mechanical units, display units and computer system.
● Performance: Based on assumption, one chocolate will be delivered in two minutes
and 256 chocolates before next filling of chocolates into the machine.
● Process Deadlines: Machine waits for maximum 30s for the coins and it should
deliver the chocolate within 60s.
● User Interfaces(UI): Graphics at LCD or touchscreen display on LCD, and
commands by children or machine owner through fingers on keypad or touch screen,
form the UI in the ACVM.
Apart from these metrics, the manufacturing and engineering cost is also considered
for the design metrics.
Test and validation conditions
The test and validation conditions are expressed to check whether all user commands
function correctly and all the graphic displays and menus appear as per the program.
Then each task should be tested with test inputs, and it should be tested for 60 users
per hour.
Basic system of ACVM
The flow diagram of an ACVM is shown in figure 2. ACVM system consists of a slot
into which a child inserts the coins for buying the chocolate. Whenever a coin is
inserted, a mechanical system directs each coin of value Rs 1 or 2 or 5 to port -1, port -
2, port -5 respectively. When a port is receiving a coin, the port generates an interrupt.
The interrupt signal is sent by the corresponding read ports for reading the coin value
at the ports and also to increase the amount of chocolate. The machine should have an
LCD, keypad and touchscreen. Let the interface port be called port-display. The time
and date appear in the LCDs right-hand bottom side. ACVM has a port-deliver where
the buyer collects the chocolate from the bowl. The customer also receives the full
refund or excess amount at the bowl. It should also be possible to reprogram and
relocate the codes in the system ROM or flash ROM whenever the following happens:
a) The price of chocolate increases.
b) The messages lines or menus need to be changed.
c) Machine features change.
Q. Design an embedded system for a simple digital camera. Briefly explain about
its features and specifications.
Specifications
i)CCD Array
Camera records the pictures using a charge coupled devices (CCD) array.
The array consisting of large number of horizontal rows and vertical columns of
CCD cells for the picture
A number of CCD cell unexposed to the picture in each row of cells but those
used for off-set corrections in the each-row output from the picture cells.
ii) Camera Picture resolution
2592 x 1944 pixels, there are 2592 x 1944 = 5038848 set of cells.
Each set of pixel has three cells, for the red, green and blue components in a
pixel.
Each cell gets exposed to a picture when shutter of camera opens on a user
command.
iii) Controllers, LCD display, Switches and buttons
A set of controllers to control shutter, flash, auto focus and eye-ball image
control.
LCD display for graphics and GUI
Switches and buttons for inputs at camera.
User gives commands for switching on the camera, flash, shutter, adjust
brightness, contrast, color, save and transfer.
When a button for opening the shutter is pressed, a flash lamp glows and a self-
timer circuit switches off the lamp automatically.
iv) Picture transfer Ports
JPEG file for a picture can be copied or transferred to a memory stick using a
controller
Sony memory stick Micro (M2) size 15×12.5×1.2 mm, flash memory of 2 GB
and 160 Mbps data transfer rate.
A picture jpg can be copied to a computer connected through USB port
controller.
Requirements
i) Purpose
Digital recording and display of pictures
Processing to get the pictures of required brightness, contrast and color.
Permanent saving of picture in file in a standard format at a flash-memory stick
or card
Transfer files to a computer and printer through a USB port
ii) Inputs
Intensity and color values for each picture horizontal and vertical rows and
columns of pixels in a picture frame.
Intensity and color values for unexposed (dark) area in each horizontal rows and
columns of pixels.
User control inputs
iii) Signals, Events and Notifications
User commands given as signals from switches/buttons
iv) Outputs
Encoded file for a picture
Permanent store of the picture at a file on flash memory stick
Screen display of picture from the file after decoding
File output to an interfaced computer and printer.
Design Metrics
Power Dissipation: Battery operation. Battery recharging after 400 pictures
(assumed)
Resolution: High-resolution pictures with options of 2592 x 1944 pixels =
5038848 pixels, 2592 x 1728 = 3.2 M, 2048 x 1536 = 3M and 1280 x 960 = 1M.
Performance: Shooting a 4M pixels still picture in 0.5 s. 25 pictures per m
[Assumed]
Process Deadlines: Exposing camera process maximum 0.1 s. Flash
synchronous with shutter opening and closing. Picture display latency maximum
0.5 s.
User Interfaces: Graphic at LCD or touch screen display on LCD and commands
by camera user through fingers on touch screen and switches and buttons
Engineering Cost: US$ 50000 (assumed)
Manufacturing Cost: US$ 50 (assumed)
Camera tasks
Camera tasks are modeled by four class diagrams are divided
Picture_FileCreation, Picture_FileDisplay, Picture_FileTransfer and
Controller_tasks
Task objects
Instances of the classes
(i) ExposedArea_CCDBytesStream, DarkArea_CCDBytesStream,
Task_CCD Preprocessor,
Task_PictureProcessor and
Task_Encoding
Controller_Tasks
Tasks_Initialization for initialization of tasks
Tasks_Shoot for shooting task
Initiates CCD processor (CCDP) to Initialize_Picture_FileCreation
Initiate Picture_FileDisplay tasks, which run on initiation of display processor
(DisplP),
Initiates ASIP memory save MemP,
Initiates ASIP for printer PrintP
Initiates ASIP for USB port (USB_P),
Task_LightLevel for control level control
Task_flash
Hardware architecture
Software architecture
We learnt,
Camera tasks are modeled by four class diagrams are divided
Picture_FileCreation,Picture_FileDisplay,Picture_FileTransferandController_tas
ks
Microcontroller and the several ASIPs are required for expected camera
performance.
A microcontroller executes the Controller_Tasks. The controller tasks are the
following: (i) Task_LightLevel control (ii) Task_flash (ii) initialization of tasks,
(iii) shooting task,
Single purpose CCD processor does Picture_FileCreation tasks, which execute
on a for the dark current corrections,
Single purpose ASIP does the DCT compression, Huffman encoding, DCT
decompression, Huffman decoding and file save,
Single purpose display processor (DisplP) initiates Picture_FileDisplay tasks,
which execute on decoded and compressed file image display after the required
file byte stream processing for shift or rotate or stretching or zooming or
contrast or color and resolution,
Single purpose ASIP initiates memory stick save on notification from
Picture_FileTransfer file system object using a single purpose transfer processor
(MemP),
Single purpose ASIP initiates printing on a notification from
Picture_FileTransfer using a single purpose print processor (PrintP),
Single purpose ASIP initiates USB port controller on notification from
Picture_FileTransfer using a single purpose USB processor (USB_P).