12/12/2021, 16:46 Quiz 1: Computer Organization and Software Systems (S1-21_DSECCZG516)

Quiz 1
Due
Dec 12 at 23:59
Points
5
Questions
10
Available
Dec 11 at 18:00 - Dec 12 at 23:59
1 day
Time Limit
30 Minutes

Instructions
Dear Students,

The Quiz is between  6 pm on 11th December 2021 to 11.59pm on 12th December 2021

You are allowed to login between the specified time and once you login, you will be given 30 minutes
time to answer 10 questions.

Note that the Quiz 1 will be MCQ based.

All the Best!

Attempt History
Attempt Time Score
LATEST Attempt 1
20 minutes 5 out of 5

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Correct answers will be available Dec 16 at 0:00 - Dec 19 at 0:00.

Score for this quiz:

Question 1 0.5
/ 0.5 pts

One of the internal registers of a CPU is MDR. MDR stands for

 
Memory Data Resolve

https://bits-pilani.instructure.com/courses/1074/quizzes/2245 1/5
12/12/2021, 16:46 Quiz 1: Computer Organization and Software Systems (S1-21_DSECCZG516)

 
Memory Data Resource

 
Memory Driver Register

 
Memory Data Register

Question 2 0.5
/ 0.5 pts

In the which addressing mode operands are exclusively stored on

 
two addressing mode

 
three addressing mode

 
zero addressing mode

 
one addressing mode

Question 3 0.5
/ 0.5 pts

Consider main memory contains 4K blocks of 128 bytes each, then the
size of tag field in case of Associative mapping is

 
19 Bits

 
4 Bits

 
12 Bits

 
13 Bits

https://bits-pilani.instructure.com/courses/1074/quizzes/2245 2/5
12/12/2021, 16:46 Quiz 1: Computer Organization and Software Systems (S1-21_DSECCZG516)

Question 4 0.5
/ 0.5 pts

How many sets are there in a 4 way Set Associate Cache of size 64
bytes and line size 2 bytes

 
2

 
16

 
8

 
4

Question 5 0.5
/ 0.5 pts

In x86, Ordinal is

 
unsigned integer

 
character

 
string

 
signed integer

Question 6 0.5
/ 0.5 pts

In SW instruction, data is written from ______ to ________

 
Memory to Processor

 
Memory to Memory

https://bits-pilani.instructure.com/courses/1074/quizzes/2245 3/5
12/12/2021, 16:46 Quiz 1: Computer Organization and Software Systems (S1-21_DSECCZG516)

 
Memory to Disk

 
Processor to Memory

Question 7 0.5
/ 0.5 pts

beq $s1, $s2, label, uses _________type of instruction format

 
M-Type

 
R-Type

 
I-Type

 
J-Type

Question 8 0.5
/ 0.5 pts

Consider a byte addressable memory where addresses 1000, 1001,

 
None of the options

 
A5A03542

 
4235A0A5

 
24530A5A

Question 9 0.5
/ 0.5 pts
https://bits-pilani.instructure.com/courses/1074/quizzes/2245 4/5
12/12/2021, 16:46 Quiz 1: Computer Organization and Software Systems (S1-21_DSECCZG516)

Let a= C3H, logical shift left eight times results in

 
0FH

 
86H

 
00H

 
87H

Question 10 0.5
/ 0.5 pts

How can processor communicate between the system mode and the
user mode?

 
Using System calls

 
Using simple function calls

 
Using Indirect calls

 
Using Direct calls

Quiz Score:
5 out of 5

https://bits-pilani.instructure.com/courses/1074/quizzes/2245 5/5