Lab Manual: Meerut Institute of Engineering & Technology
Lab Manual: Meerut Institute of Engineering & Technology
Lab Manual: Meerut Institute of Engineering & Technology
LAB MANUAL
To be an excellent department that imparts value based quality education and uplifts innovative
research in the ever-changing field of technology.
Mission of Department
1. To fulfill the requirement of skilled human resources with focus on quality education.
2. To create globally competent and socially responsible technocrats by providing value
and need based training.
3. To improve Industry-Institution Interaction and encourage the innovative research
activities.
1. Students will have the successful careers in the field of computer science and allied
sectors as an innovative engineer.
2. Students will continue to learn and advance their careers through participation in
professional activities, attainment of professional certification and seeking advance
studies.
3. Students will be able to demonstrate a commitment to life-long learning.
4. Students will be ready to serve society in any manner and become a responsible and
aware citizen.
5. Establishing students in a leadership role in any field.
Program Outcomes
1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering
fundamentals, and an engineering specialization to the solution of complex engineering
problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems and
design system components or processes that meet the specified needs with appropriate
consideration for the public health and safety, and the cultural, societal, and environmental
considerations
4. Conduct investigations of complex problems: Use research-based knowledge and research
methods including design of experiments, analysis and interpretation of data, and synthesis of
the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering activities
with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant
to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and
need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or leader in
diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and
write effective reports and design documentation, make effective presentations, and give and
receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member and
leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to engage in
independent and life-long learning in the broadest context of technological change.
Program Specific Outcomes
1. Ability to apply and analyze computational concepts in the areas related to
algorithms, machine learning, cloud computing, web designing and web services.
2. Ability to apply standard practices and methodologies in software development and
project management.
3. Ability to employ fundamental concepts and emerging technologies for innovative
research activities, carrier opportunities & zeal for higher studies.
Course Outcomes
CO-1 To implement adder circuits using basic gates
CO-4 To understand the various circuits for ALU, datapath and control units.
List of Experiments
Exp. Experiment Name Course
No. Outcome
1 To design the circuit of half adder. CO1
2 To design the circuit of full adder. CO1
3 To design the circuit of half subtractor. CO1
4 To design the circuit of full subtractor. CO1
5 To design an 8×1 Multiplexer. CO3
6 To design a 4 bit combinational shifter. CO2
7 To design a BCD adder. CO1
8 To design a 4-bit adder subtractor. CO1
Value added Programs
9 To design an ALU.
CO4
10 To design 2:4 Decoder
CO4
Digital Circuits
1) Click the capture lite icon from desktop or from the start menu.
2) Click on file, then on new, and then click on project.
3) Write the name of the project and choose the location to store it, then click “OK” and make
sure to choose analog or mixed A/D option and then again click “OK”.
4) Next pop-up window opens Pspice project on this choose a blank project option, then click
“OK”.
5) Now realize the circuits using proper components.
6) Now choose Pspice option on top toolbar and click on new simulation profile.
7) Enter the name of the profile and then click on “OK”.
8) In the next window choose options and then choose gate level simulation. Choose the option
and initialize all flip-flops to zero, then click on “OK”.
9) Now place voltage where we need to see the outputs.
10) Lastly click the “Run” button in Pspice or Run option to see the resulting output.
Analog Circuits
Procedure for simulation of circuits on ORCAD capture tool:
The use of resistors and capacitors:-
1) Click on “place part” on the right hand side of the window.
2) Then click on analog library and select the required resistor and capacitor.
For Output:-
1) Click Pspice simulation.
2) Select new simulation.
3) Select analysis type which can be different for different experiments.
EXPERIMENT NO.1
THEORY: A half adder is a logical circuit that performs an additional operation on two binary digits.
The half adder produces a sum and a carry value which are both binary digits.
A half adder circuit has two inputs A and B and two outputs – S representing sum and C representing
carry.
TRUTH TABLE:
A B S C
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
SCHEMATIC DIAGRAM:
WAVEFORM:
THEORY: A full adder is a logical circuit that performs an additional operation on three binary digits.
The half adder produces a sum and a carry value which are both binary digits.
A full adder circuit has three inputs A,B and Cin and two outputs – S representing sum and Cout
representing carry.
S = A xor B xor C
TRUTH TABLE:
A B Cin S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
SCHEMATIC DIAGRAM:
WAVEFORM:
THEORY: A half subtractor is a logical circuit that performs an subtraction operation on two binary
digits. The half subtractor produces a Difference and a borrow value which are both binary digits.
A half subtractor circuit has two inputs X, Y and two outputs – D representing difference and B
representing borrow.
B = A’B
TRUTH TABLE:
X Y D B
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
SCHEMATIC DIAGRAM:
WAVEFORM:
THEORY: A full subtractor is a logical circuit that performs an subtraction operation on three binary
digits. The full subtractor produces a difference and a borrow value which are both binary digits.
A Full adder circuit has three inputs A,B and C and two outputs – DIFF representing difference and
BOR representing borrow.
S = A xor B xor C
TRUTH TABLE:
A B C DIF BOR
F
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1
SCHEMATIC DIAGRAM:
WAVEFORM:
RESULT: The output waveform of full subtractor is verified.
EXPERIMENT NO.5
THEORY: A multiplexer is a device that performs multiplexing i.e. it selects one of many analog or
digital input signals and forwards the selected input into a single line. A multiplexer of 2 n inputs has n
select lines, which are used to select which input line to be sent to the output.
TRUTH TABLE:
S0 S1 S2 Z
0 0 0 A
0 0 1 B
0 1 0 C
0 1 1 D
1 0 0 E
1 0 1 F
1 1 0 G
1 1 1 H
SCHEMATIC DIAGRAM:
WAVEFORM:
THEORY: An n-bit shift circuit has a single n-bit data input A, and a single n-bit output R and a
number of control inputs to determine the shift amount ( 0 to n-1).
In this case the possible shift operations are SHIFT LEFT and SHIFT RIGHT. This shifting depends
on selection line input S. If S = 0 then SHIFT RIGHT operation takes place , else SHIFT LEFT
operation takes place.
SCHEMATIC:
WAVEFORM:
RESULT: The circuit of 4-bit combinational shifter is designed and output is verified.
EXPERIMENT NO.7
THEORY:
It is possible to perform addition in BCD by first adding in binary, and then converting to BCD
afterwards. Conversion of the simple sum of two digits can be done by adding 6 (that is, 16 – 10)
when the result has a value greater than 9.
For example:
9 + 8 = 17 = 1 1
In BCD, there cannot exist a value greater than 9 (1001) per nibble. To correct this, 6 (0110) is added
to that sum to get the correct first two digits:
1 1+ 0 6= 1 7
This gives two nibbles, 0001 and 0111, which correspond to the digits "1" and "7". This yields "17"
in BCD, which is the correct result. This technique can be extended to adding multiple digits, by
adding in groups from right to left, propagating the second digit as a carry, always comparing the 5-
bit result of each digit-pair sum to 9.
SCHEMATIC:
WAVEFORM:
THEORY:
It is a combinational circuit which can act as both a binary adder and a binary subtractor. It is
constructed using 4 full adders.Block diagram of the circuit is shown below:
In this case if sub is 0, then the circuit acts as an adder,else subtractor. Subtraction is done by adding
two’s compliment of B to A, which effectively results in A - B.
SCHEMATIC:
WAVEFORM:
THEORY: In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic
and logical operations. The ALU is a fundamental building block of the central processing unit (CPU)
of a computer, and even the simplest microprocessors contain one for purposes such as maintaining
timers. The processors found inside modern CPUs and graphics processing units (GPUs)
accommodate very powerful and very complex ALUs; a single component may contain a number of
ALUs.
SCHEMATIC:
WAVEFORM:
THEORY: A decoder is a device which does the reverse of an encoder, undoing the encoding so that
the original information can be retrieved. The same method used to encode is usually just reversed in
order to decode.
In digital electronics, a decoder can take the form of a multiple-input, multiple-output logic circuit
that converts coded inputs into coded outputs, where the input and output codes are different.
Decoders have 2 inputs and 4 outputs. The binary input fed at input will be decoded to provide
either logical high or low on one of the 4 outputs, which is termed as octal equivalent for that binary
input. For a binary input 100, which is 4 in octal number system, the output pin called O4 will go
either high or low.
SCHEMATIC:
d1A
OFFTIME = .3uSDSTM1 1
ONTIME = .3uS CLK 3
DELAY = V
2
STARTVAL = 0 V
0
OPPVAL = 1 7408
0
0
U2B d2B
3 4 4
6
OFFTIME = .4uSDSTM2 7404 5
ONTIME = .4uS CLK V
DELAY = 7408
0
STARTVAL = 0
OPPVAL = 1
d3C
9
U2A 8
1 2 10
1 V
V 7404 7408
0
d4D
12
11
13
V
7408
1
1
WAVEFORM:
RESULT: 2:4 decoder is designed and its output is verified.