Datasheet

Low Noise Quasi-Resonant Control

DC/DC converter IC for AC/DC Converter
BD7682FJ-LB BD7683FJ-LB BD7684FJ-LB BD7685FJ-LB
General Description Key Specifications
This is the product guarantees long time support in the  Operating Power Supply Voltage Range:
Industrial market. VCC 15.0V to 27.5V
BD768xFJ series is a Quasi-resonant controller type  Normal Operating Current: 0.80mA(Typ)
DC/DC converters that provide an optimum system for  Burst Operating Current: 0.50mA(Typ)
all products that include an electrical outlet.  Maximum Frequency: 120kHz(Typ)
Quasi-resonant operation enables soft switching and  Operating Temperature: -40°C to +105°C
helps to keep EMI low. Design with a high degree of
flexibility is achieved with switching MOSFETs and
current detection resistors as external devices. Package 4.90mm x 6.00mm x 1.65mm pitch 1.27mm
The built-in brown out function monitors the input (Typ.) (Typ.) (TYP.) (TYP.)
voltage as part of system optimization. The burst mode
function reduces input power at low power.
BD768xFJ series include various protection functions,
such as a soft start function, burst function, per-cycle
over-current limiter function, overvoltage protection
function, overload protection function, and brown out
function.
BD768xFJ series include a gate-clamp circuit for
optimal driving SIC-MOSFET.
SOP-J8
Features
4.90mm x 6.00mm x 1.65mm
 Pin 8 : SOP-J8 Package
(6.00mm × 4.90mm : 1.27mm pitch <TYP>)
 Quasi-resonant type (low EMI)
 Frequency reduction mode
 Low current consumption (19µA), during standby Lineup
 Low current consumption when no load (burst FBOLP VCCOVP
operation when light load) BD7682FJ AutoRestart Latch
 Maximum frequency (120kHz) BD7683FJ Latch Latch
 CS Pin Leading-Edge Blanking BD7684FJ AutoRestart AutoRestart
 VCC UVLO (Under Voltage Drop Out protection) BD7685FJ Latch AutoRestart
 VCC OVP (Over Voltage Protection)
 Per-cycle over-current protection circuit
 Soft start Applications
 ZT trigger mask function Industrial equipment, AC Adaptor, Household appliances
 Voltage protection function (brown out)
 ZT OVP (Over Voltage Protection)
 Gate-clamp circuit

Typical Application Circuit

FUSE

Diode
Filter Bridge

8 7 6 5
BO VCC MASK OUT

ERROR
AMP
ZT FB CS GND

１ 2 3 4

○Product structure：Silicon monolithic integrated circuit ○This product has no designed protection against radioactive rays
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Pin Descriptions
ESD Diode
No. Pin Name I/O Function
VCC GND
1 ZT I Zero Current Detect pin - ✓
2 FB I Feedback signal input pin ✓ ✓
3 CS I Current Sense pin ✓ ✓
4 GND I/O GND pin ✓ -
5 OUT O MOSFET drive pin ✓ ✓
6 MASK O External TR drive - ✓
7 VCC I Power Supply pin - ✓
8 BO O Brown IN/OUT monitor pin - ✓

Block Diagram

VH VOUT
FUSE
RH Rstart
Diode
Filter Bridge
RL Va

Cvcc

8 7
BO VCC
BO
Comp.
+ VCC UVLO
+
-
-
15uA
4.0V 18.0V
1.0V 18.5V/14.0V Regulator Internal
Supply
Clamper
NOUT
+
-
ZT ACSNS Comp. +
-
+ VCC OVP
- ZT OVP Comp. OSC
Rzt1 29.5V/23.0V OSC
(LATCH)

ZT
ZT Comp. 1 shot
1 +
- AND OR ERROR
TimeOut AMP
Czt 7V ( 15 usec ) POUT
Rzt2 100mV ZT Blanking AND S Q
OUT(H->L)
/200mV NOUT
5 OUT
0.60us PRE
FBOLP_OH AND
Driver
OR NOUT
MAX
+
Blanking
+
Frequency R
VREF(4V) - (120kHz)
1.25V
20k Burst
FB
Comp.
2 +
- MASK
6
Cfb 0.50V 0.6μs
OLP
+ Timer FBOLP_OH Delay
NOR
- (128ms)

Soft Start
DCDC
200kΩ Comp.
FB/2 -
200kΩ 1.00V - SS1ms SS4ms
+

CURRENT SENSE (V-V Change) Leading Edge CS

3
Normal : ×1.0 Blanking

RS

4
GND

PC

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BD768xFJ-LB Series

Absolute Maximum Ratings (Ta= 25 °C)

Parameter Symbol Rating Unit Conditions
Maximum Applied Voltage 1 Vmax1 -0.3 to +32.0 V OUT, VCC, MASK
Maximum Applied Voltage 2 Vmax2 -0.3 to +6.5 V ZT, CS, FB, BO
Maximum Applied Voltage 3 Vmax3 -0.3 to +25.0 V OUT
ZT Pin Maximum Current1 ISZT1 -3.0 mA
ZT Pin Maximum Current2 ISZT2 3.0 mA
(Note1)
Power Dissipation Pd 0.67 W
Operating Temperature Range Topr -40 to +105 °C
MAX Junction Temperature Tjmax 150 °C
Storage Temperature Range Tstr -55 to +150 °C
(Note1) SOP-J8 : When mounted (on 70 mm × 70 mm, 1.6 mm thick, glass epoxy on single-layer substrate)
De-rated by 5.4mW/°C when operating above Ta=25°C.
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.

Recommended Operating Conditions (Ta=25 C)

Parameter Symbol Rating Unit Conditions
Power Supply Voltage Range VCC 15.0 to 27.5 V VCC pin voltage

Electrical Characteristics (unless otherwise noted, Ta = 25 °C, VCC= 24 V)

Specifications
Parameter Symbol Unit Conditions
MIN TYP MAX
[Circuit Current]
VCC=18.0V
Circuit Current (OFF) IOFF 10 19 30 µA
(VCC UVLO=Disable)
FB=1.0V
Circuit Current (ON) 1 ION1 300 800 1500 µA
(at pulse operation)
FB=0.0V
Circuit Current (ON) 2 ION2 150 500 1000 µA
(at burst operation)
Circuit Current (Protect circuit is on) Iprotect 800 1600 2200 µA FBOLP,VCCOVP,ZTOVP
[Brown Out Block (B.O.)]
B.O. Detection Voltage VBO 0.920 1.000 1.080 V
B.O. Detection Hysteresis Current IBO 10 15 20 µA
[VCC Pin Protection Functions]
VCC UVLO Voltage 1 VUVLO1 19.00 19.50 20.00 V VCC rise
VCC UVLO Voltage 2 VUVLO2 13.00 14.00 15.00 V VCC fall
VCC UVLO Hysteresis VUVLO3 - 5.50 - V VUVLO3= VUVLO1-VUVLO2
VCC OVP Voltage 1 VOVP1 27.50 29.50 31.50 V VCC rise
VCC OVP Voltage 2 VOVP2 21.00 23.00 25.00 V VCC fall
VCC OVP Hysteresis VOVP3 - 6.50 - V VOVP3= VOVP1-VOVP2
Latch Release Voltage VLATCH - VUVLO2-3.5 - V VCC voltage
Latch Mask Time tLATCH 50 150 250 µs

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Electrical Characteristics – continued (unless otherwise noted, Ta = 25 °C, VCC=24 V)

Specifications
Parameter Symbol Unit Conditions
MIN TYP MAX
[DCDC Converter Block (Turn OFF)]
FB Pin pull-up Resistance RFB 15 20 25 kΩ
CS Over-Current Sensor Voltage 1A VLIM1A 0.950 1.000 1.050 V FB=2.2V (IZT>-1mA)
CS Over-Current Sensor Voltage 1B VLIM1B 0.620 0.700 0.780 V FB=2.2V (IZT<-1mA)
CS Over-Current Sensor Voltage 2A VLIM2A 0.200 0.300 0.400 V FB=0.6V (IZT>-1mA)
CS Over-Current Sensor Voltage 2B VLIM2B 0.140 0.210 0.280 V FB=0.6V (IZT<-1mA)
CS Switching ZT Current IZT 0.900 1.000 1.100 mA
CS Leading Edge Blanking Time tLEB - 0.250 - µs
Minimum ON Width tMIN - 0.500 - µs
[DCDC Converter Block (Turn ON)]
Maximum Operating Frequency 1 fSW1 106 120 134 kHz FB=2.0V
Maximum Operating Frequency 2 fSW2 20 30 40 kHz FB=0.5V
Frequency Reduction Start FB Voltage VFBSW1 1.100 1.250 1.400 V
Frequency Reduction End FB Voltage 1 VFBSW2 0.400 0.500 0.600 V
Frequency Reduction End FB Voltage 2 VFBSW3 - 0.550 - V
Voltage Gain AVCS 1.700 2.000 2.300 V/V ⊿VFB/⊿VCS
ZT Comparator Voltage 1 VZT1 60 100 140 mV ZT fall
ZT Comparator Voltage 2 VZT2 120 200 280 mV ZT rise
For noise prevention
ZT Trigger Mask Time tZTMASK 0.25 0.60 0.95 µs
after OUT H ⇒L
Count from final ZT
ZT Trigger Timeout Period 1 tZTOUT 8.0 15.0 24.0 µs
trigger (1-stage)
Count from final ZT
ZT Trigger Timeout Period 2 tZTOUT2 2.0 5.0 8.0 µs
trigger (2-stage)
Maximum ON Time tZTON 27.0 45.0 62.0 µs
[DCDC Protection Functions]
Soft Start Time 1 tSS1 0.600 1.000 1.400 ms
Soft Start Time 2 tSS2 2.400 4.000 5.600 ms
FB OLP Voltage 1 VFOLP1 2.500 2.800 3.100 V FB rise
FB OLP Voltage 2 VFOLP2 2.300 2.600 2.900 V FB fall
FB OLP Timer tFOLP 90 128 166 ms
ZT OVP Voltage VZTL 3.250 3.500 3.750 V
[OUT Pin]
OUT Pin Clamp Voltage VOUT 16.00 18.00 20.00 V
OUT pin Nch MOS Ron RNOUT 2.0 4.5 9.0 Ω
[MASK Pin]
MASK Pin Delay Time tMASK 0.25 0.60 0.95 µs
MASK Pin Ron RMASK 20 50 80 Ω

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BD768xFJ-LB Series

Application Information

Description of Blocks
(1) Start-Up sequences (FBOLP:auto recovery mode)
The BD768xFJ’s start up sequence is shown in Figure 1.
See the sections below for detailed descriptions.

VH

1.0V
BO
19.5V
VCC 14.0V

Internal REF 128msec 128msec 128msec

Pull Up VFOLP1

FB

Vout Over
Normal Load
Load Light
LOAD
Iout
Burst mode

Switing
Soft
Start

A BC D E F GH I J K

Figure 1. Start-up Sequence Timing Chart

A: Input voltage VH is applied

B: VCC pin voltage rises due to start resistor RSTART, and this IC starts operating when VCC > VUVLO1 (19.5V typ).
Switching starts when the status of the brown out function is normal (BO > 1.0 V), other protection functions are also
considered normal. At that time, the VCC value always drops due to the pin's consumption current, so VCC > VUVLO2
(14.0 V typ) should be set.
C: There is a soft start function which regulates the voltage level at the CS pin to prevent a rise in voltage and current.
D: When the switching operation starts, VOUT rises.
Once the output voltage starts, set the rated voltage to within the TFOLP period (128ms typ).
E: When there is a light load, burst operation is order to keep power consumption down.
F: Overload operation.
G: When the FB pin voltage keeps FB > VFOLP1 (=2.8V typ) at or above TFOLP (128ms typ), switching is stopped by the
overload protection circuit.
If the FB pin voltage status becomes FB < VFOLP2 even once, the IC’s internal 128ms timer is reset.
H: If the VCC voltage drops to VCC < VUVLO2 (14.0V typ) or below, restart is executed.
I: The IC’s circuit current is reduced and the VCC pin value rises. (Same as B)
J: Same as F
K: Same as G

Start resistance RSTART is the resistance required to start the IC.

When the start resistance RSTART value is reduced, standby power is increased and the startup time is shortened.
Conversely, when the start resistance RSTART value is increased, standby power is reduced and the startup time is
lengthened.
When BD768xFJ is in standby mode, current IOFF becomes 30µA Max
However, this is the minimum current required to start the IC. Use the appropriate current for the set target.

Example: Start Resistance RSTART Setting

RSTART  VMIN  VUVLO max / IOFF
When VAC = 100 V, if the margin is -20%, then VMIN = 113V
Since VUVLO1 (max) = 20.0V,
And since RSTART < (113-20) / 30µA = 3.10 MΩ, the start resistance is 3.0MΩ. (Set according to the start time.)
In this case: RSTART power consumption Pd RSTART   VH  VCC 2 / RSTART  141V  14V 2 / 3.0M  5.4mW

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(2) Brown Out function (B.O.)

BD768xFJ has a built-in brown out function. When the input VH value is low, the brown out function stops the
DC/DC operations (The IC itself continues to operate). An example is shown in Figure 2. The input voltage which
is resistance-divided is inputted to the BO pin. If the BO pin value exceeds VBO (1.0 V typ), the circuit detects as
normal state, and DCDC operations are started. There is a current hysteresis IBO in the circuit.

The current hysteresis flow is described below.

・ BO < VBO (1.0 V typ) (abnormal) IBO with sync
・ BO≧ VBO (1.0 V typ) (normal status) IBO without sync

VH
FU SE

D io d e RH
F ilte r
B rid g e
RL

BO
BO
Com p.
+
-
15µA
15uA

1 .0 0 V C o n tro lle r

BD768x

Figure 2. Block Diagram of Brown Out Function

Example: RH and RL Setting

In the following example, VHON is the operation start VH voltage (L to H), and VHOFF is the operation stop VH voltage
(H to L).
IC operation start (OFF => ON) (VHON-1.0) /RH = 1.0/RL +15*10e-6
IC operation stop (ON => OFF) (VHOFF-1.0) /RH = 1.0/RL

Based on the above, RH and RL can be calculated as follows.

RH  VHON  VHOFF  / 15 * 10e  6, RL  1.0 / VHOFF  1.0 * RH

Example 1: When using 100 V AC (140 V DC)

When RH = 2350kΩ and RL = 34kΩ, VHON = 105.8V (-25%) and VHOFF = 70.8V (-51%)
Current consumption is 8.0mW for both RH and RL.

Example 2: When using 230V AC (322V DC)

RH = 5200kΩ, RL = 42kΩ
VHON = 202.8V (-37%), VHOFF = 124.8V (-62%)

Current consumption is 20.1 mW for both RH and RL.

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(3) VCC Pin Protection Function

BD768xFJ includes the VCC low voltage protection function VCC UVLO (Under Voltage Protection) and the VCC
over voltage protection function VCC OVP (Over Voltage Protection). These functions prevent abnormal
voltage-related damage in MOSFETs used for switching.
The VCC UVLO function uses an auto recovery type comparator with voltage hysteresis and the VCC OVP
function uses latch mode or auto recovery.
After latch function is detected by VCCOVP, latching is released (reset) when the condition VCC< VLATCH (typ=
VUVLO2 -3.5V) is met.
This operation is shown in Figure 3.
VCCOVP has a built-in mask time tLATCH (typ = 150 µs).
This function masks any surges, etc., that occur at the pin.

VH

29.5Vtyp

VCC
19.5Vtyp

Vlatch= 14.0Vtyp
VCCuvlo2-
3.5Vtyp
ON ON
Time

OFF
VCC UVLO
OFF
ON

VCC OVP OFF OFF

ON ON
OUT
Switching OFF OFF OFF

Internal L : Normal
Latch Signal H : Latch

Time
A B C DE F G H I J K L M N A

Figure 3. VCC UVLO / OVP (Latch Mode)

A: VH is applied, VCC voltage rises

B: When VCC > VUVLO1, DC/DC operation starts.
C: When VCC < VUVLO2, DC/DC operation stops.
D: When VCC > VUVLO1, DC/DC operation starts.
E: VCC voltage drops until DC/DC operation starts.
F: VCC rises.
F: When VCC > VOVP1, DC/DC operation stops (latch mode). Switching is stopped by an internal latch signal.
G: When DC/DC operation stops, power supply from the auxiliary coil stops and VCC voltage drops.
H: When VCC < VUVLO2, VCC voltage rises because IC current consumption drops.
I: When VCC > VUVLO1, latching occurs and so there are no DC/DC operations. VCC voltage drops because IC
current consumption is lowered.
K: Same as H
L: Same as I
M: VH is OPEN (unplugged). VCC drops.
N: When VCC < VLATCH, latch is released.

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BD768xFJ-LB Series

(4) DCDC Converter Function

BD768xFJ uses PFM (Pulse Frequency Modulation) mode control.
The FB pin, ZT pin, and CS pin are all monitored to provide a system optimized for DC/DC.
The switching MOSFET ON width (turn OFF) is controlled via the FB pin and CS pin, and the OFF width (turn ON)
is controlled via the ZT pin.
PFM mode sets the maximum frequency to meet noise standards.
A detailed description appears below. (See Figure 4)

VH

Rstart

Va

Cvcc

7
VCC

NOUT
+
-
ZT ACSNS Comp.

+
- ZT OVP Comp.
Rzt1 18.0V
(LATCH)
Clamper
ZT
ZT Comp. 1 shot
1 +
- AND OR VCC OVP
TimeOut
Czt 7V ( 15 usec ) POUT
Rzt2 100mV ZT Blanking AND S Q
OUT(H->L)
/200mV NOUT
5 OUT
0.60us PRE
FBOLP_OH AND
Driver
OR NOUT
MAX
+
Blanking
+
Frequency R
VREF(4V) - (120kHz)
1.25V
20k Burst
FB
Comp.
2 +
- MASK
6
Cfb 0.50V 0.6μs
OLP
+ Timer FBOLP_OH Delay
NOR
- (128ms)

Soft Start
DCDC
200kΩ Comp.
FB/2 -
200kΩ 1.00V - SS1ms SS4ms
+

CURRENT SENSE (V-V Change) Leading Edge CS

3
Normal : ×1.0 Blanking

RS

4
GND

Figure 4. Block Diagram of DC/DC Operations

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(a) Determination of ON Width (Turn OFF)

ON width is controlled via the FB pin and CS pin.
The ON width is determined by comparing FB pin voltage at 1/ AVCS (typ = 1/2) with the CS pin voltage.
In addition, it is compared with the IC's internally generated VLIM1A (1.0V typ) voltage and the comparator level
changes linearly, as is shown in Figure 5.
The CS pin is also used for the per-pulse over-current limiter circuit.
Changes at the FB pin result in changes in the maximum blanking frequency and over-current limiter level.
 mode1: Burst operation
 mode2: Frequency reduction operation (reduces maximum frequency)
 mode3: Maximum frequency operation (operates at maximum frequency)
 mode4: Overload operation (pulse operation is stopped when overload is detected)

MAX
Fsw[kHz]
fSW [kHz]
mode1 mode2 mode3 mode4
120kHz

30kHz

0.0V 0.5V 1.25V 2.0V 2.8V FB [V]

CS　
Limiter[V] mode1 mode2 mode3 mode4
Vlim1
VLIM1

Vlim2
VLIM2

0.0V 0.5V 1.25V 2.0V 2.8V FB [V]

Figure 5. Relationship of FB Pin to Over-Current Limiter and Maximum Frequency

The over-current limiter level is adjusted for soft start function (section 5) and over-current protection of the input
voltage compensation (section 4 (c))
In this case, the VLIM1 and VLIM2 values are as listed below.

Table 1 Over-Current Protection Voltage

IZT ≥ -1.0mA IZT < -1.0mA
Soft Start
VLIM1 VLIM2 VLIM1 VLIM2
Start to 1ms 0.250V (25.0%) 0.063V (6.0%) 0.175V (17.5%) 0.047V (4.5%)
1ms to 4ms 0.500V (50.0%) 0.125V (12.0%) 0.350V (35.0%) 0.094V (9.0%)
>4ms 1.000V (100.0%) 0.250V (25.0%) 0.700V (70.0%) 0.188V (18.8%)
(Note) Values in parentheses are relative values when compared to VLIM1 (1.0V typ) during IZT ≥ -1.0mA.

(b) LEB (Leading Edge Blanking) Function

When the switching MOSFET is turned ON, surge current occur at each capacitor component and drive
current. Therefore, when the CS pin voltage rises temporarily, detection errors may occur in the over-current
limiter circuit.
To prevent detection errors, BD768xFJ has the blanking function. This function masks the CS voltage for TLEB
(typ = 250ns) after the OUT pin changes from low to high.
This blanking function reduces CS pin filter.

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(c) CS Over-Current Protection Switching Function

When the input voltage (VH) becomes high, the ON time is shortened and the operating frequency increases.
As a result, the maximum rated power is increased for a certain over-current limiter. As a countermeasure,
switching is performed by the IC's internal over-current protection function.
When at high voltage, the over-current comparator value which determines the ON time is always multiplied
by 0.7.
Detection is performed by monitoring the ZT inflow current and then switching.
When the MOSFET is turned ON, Va becomes a negative voltage dependent upon the input voltage (VH).
The ZT pin is clamped to nearly 0V in the IC.
The formula used to calculate this is shown below. A block diagram is shown in Figure 6. Also, graphs are
shown in Figure 7, Figure 8 and Figure 9.

IZT  Va  V\ ZT  / R ZT1  Va / R ZT1  VH * Na / Np / R ZT1

R ZT1  Va / IZT

Therefore, the VH voltage is set with a resistance value (RZTL). The ZT bottom detection voltage has now been
determined, so CZT should be used to set the timing.

Np
VH

Izt =(VH*Na)/(Np*Rzt1)
Na

7
VCC Va

NOUT
+
- 18V
ZT ACSNS Comp.
Clamper
+
- ZT OVP Comp.
Rzt1
(LATCH)

ZT
ZT Comp. 1 shot
1 +
- AND OR
TimeOut
Czt 7V ( 15 usec )
Rzt2 POUT
100mV ZT Blanking AND S Q
/200mV OUT(H->L) Rzt
NOUT PRE OUT
0.60us FBOLP_OH AND 5
Driver
OR
NOUT
+ MAX Blanking
+ Frequency
- (120kHz) R
VREF(4V)
Czt
1.25V
20k Burst
FB
Comp.
2 +
- MASK
6
Cfb 0.50V 0.6μs
OLP1
FBOLP_OH Delay
+ Timer NO
- (128ms) R
OSC

Soft Start
DCDC
200kΩ Comp.
FB/2 -
200kΩ 1.00V - SS1ms SS4ms
+

CURRENT SENSE (V-V Change) Leading Edge CS

3
Normal : ×1.0 Blanking

RS

4
GND

Figure 6. Block Diagram of CS Switching Current

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BD768xFJ-LB Series

Izt<1.0mA

CS　Limiter[V]
Y CS　
mode1 mode2 mode3 mode4
Limiter[V] Y
Vlim1
Vlim1
Vlim1*0.7
Izt>1.0mA

Vlim2

X X
2.8V
0.0V 0.5V 1.0V 1.5V 2.0V
FB [V] 1.0mA Izt[mA]
Figure 7. CS Switching: FB Voltage vs CS Voltage Figure 8. CS Switching: ZT Current vs CS Voltage

Example: Setup method (for switching between 100-V AC and 220-V AC.)
100-V AC: 141V ±42V (±30% margin)
220-V AC: 308V ±62V (±20% margin)
In the above cases, the CS current is switched in the range from 182V to 246V. This is done when => VH =
214 VH.
Given: Np = 100, Na = 15.

Va  VIN * Na / Np  214V * 15 / 100 *  1  32.1V

R ZC  Va / IZT   32.1V /  1mA  32.1kΩ

According to the above, RZT = 32 KΩ is set.

CS　
Limiter[V] Y

Vlim1
Vlim1*0.7

X
214V VH[V]
Figure 9. CS Switching: VH Voltage vs CS Voltage

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(d) Determination of OFF Width (Turn ON)

OFF width is controlled at the ZT pin.
When switching is OFF, the power stored in the coil is supplied to the secondary-side output capacitor.
When this power supply ends, there is no more current flowing to the secondary side, so the switching MOS
drain pin voltage drops.
Consequently, the voltage on the auxiliary coil side also drops.
A voltage that was resistance-divided from the ZT pin by RZT1 and RZT2 is applied. When this voltage level
drops to VZT1 (100 mV typ) or below, switching is turned ON by the ZT comparator. Since zero current status is
detected at the ZT pin, time constants are generated using CZT, RZT1, and RZT2.
Additionally, a ZT trigger mask function (described in section 4 (e)) and a ZT timeout function (described in
section 4 (f)) are built in.

(e) ZT Trigger Mask Function (Figure 10)

When switching is set ON / OFF, superposition of noise may occur at the ZT pin.
At this time, the ZT comparator is masked for the TZTMASK time to prevent ZT comparator operation errors.

DCDC ON OFF ON OFF ON

OUT

ZT

Tztmask Tztmask
ZT mask

A B C D E F G

Figure 10. ZT Trigger Mask Function

A: DC/DC OFF=>ON
B: DC/DC ON=>OFF
C: Noise occurs at ZT pin, and ZT comparator is not operated by TZTMASK.
D: Same as A
E: Same as B
F: Same as C
G: Same as A

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(f) ZT Timeout Function

 ZT Timeout Function1
When ZT pin voltage is not higher than VZT2 (typ=200mV) for tZTOUT (typ=15µs) such as start or low output
voltage, ZT pin short, IC turns on MOSFET by force.

 ZT Timeout Function 2
After ZT comparator detects bottom, IC turns on MOSFET by force when IC does not detect next bottom
within tZTOUT2 (typ =5µs). After ZT comparator detects bottom at once, the function operates. For that, it
does not operate at start or at low output voltage. When IC is not able to detect bottom by decreasing
auxiliary winding voltage, the function operates.

ZT pin GND
short
VZT2
ZT VZT1

Bottom
detection
5us 5us
5us
timeout
15us 15us 15us
timeout

CS

OUT

A B C D E F G H I
Figure 11. ZT Time-out Function

A: At starting, IC starts to operate by ZT timeout function1 for ZT=0V.

B: MOSFET turns ON
C: MOSFET turns OFF
D: ZT voltage is lower than VZT2(typ=200mV) by ZT dump decreasing.
E: MOSFET turns ON by ZT timeout fucntion2 after tZTOUT2(typ=5µs) from D point.
F: ZT voltage is lower than VZT2(typ=200mV) by ZT dump decreasing.
G: MOSFET turns ON by ZT timeout fucntion2 after tZTOUT2(typ=5µs) from F point.
H: ZT pin is short to GND.
I: MOSFET turns ON by ZT timeout function1 after tZTOUT(typ=15µs)

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(5) Soft Start Operations

Normally, a large current starts flowing to the AC/DC power supply when the AC power supply is turned ON.
BD768xFJ includes a soft start function to prevent large changes in the output voltage and output current during
startup.
This function is reset when the VCC pin voltage is at VUVLO2 (14.0V typ) or below, or when the BO pin is at the B.O.
detection voltage (1.00V typ) or below (that is, when the AC power supply is unplugged), and soft start is
performed again at the next AC power-ON.

During a soft start, the following post-startup operations are performed. ( See turn OFF described above in section
(4)- (a)).
・Start to 1ms => Set to 25% of normal CS limiter value
・ 1ms to 4ms => Set to 50% of normal CS limiter value
・ > 4 ms… => Normal operation

(6) Over Load Protection Function

The overload protection function monitors the overload status of the secondary output current at the FB pin, and
fixes the OUT pin at low level when overload status is detected.
During overload status, current no longer flows to the photo-coupler, so the FB pin voltage rises.
When this status continues for the TFOLP time (128ms typ), it is considered an overload and the OUT pin is fixed at
low level.
Once the FB pin voltage exceeds VFOLP1 (2.8V typ), if it drops to lower than VFOLP2 (2.6V typ) within the TFOLP time
(128ms typ), the overload protection timer is reset.
At startup, the FB voltage is pulled up to the internal voltage by a pull-up resistor and operation starts once the
voltage reaches VFOLP1 (2.8V typ) or above. Therefore, the design must be set the FB voltage at VFOLP2 (2.6V typ)
or below within the tFOLP (128ms typ) time.
In other words, the secondary output voltage start time must be set to within TFOLP (128ms typ) after IC startup.

To release latching after selecting latch mode, first unplug the power supply, and then set V CC< VLATCH (typ= VUVLO2
-3.5V)

(7) ZT Pin OVP (Over Voltage Protection)

ZT OVP (Over Voltage Protection) function is built in for ZT pin.
When the ZT pin voltage reaches VZTL (typ = 3.5V), overvoltage status is detected. ZT pin OVP protection is
performed in latch mode.
A mask time defined as tLATCH (typ = 150µs) is built in for the ZT pin OVP function. When ZT OVP status continues
within 150 µs, overvoltage is detected. This function masks any surges (etc.) that occur at the pin. See the
illustration in Figure 12.
(A similar tLATCH (typ = 150µs) is VCCOVP)

⊿T1＜tLATCH (typ=150us) ⊿T2=tlatch (typ=150us)

⊿T1 ⊿T2

VZTL　
(TYP=3.5V)
PULSE
ZT

ON

DC/DC OFF

A B C D E

Figure 12. ZTOVP and Latch Mask Function

A: DC/DC pulse operation, ZT pin also has pulse operation

B: ZT pin voltage > VZTL (typ = 3.5V)
C: ZT pin voltage > VZTL (typ = 3.5V) status is within tLATCH (typ = 150µs) period, so DC/DC normal operations are
reset
D: ZT pin voltage > VZTL (typ = 3.5V)
E: ZT pin voltage > VZTL (typ = 3.5V) status continues for tLATCH (typ = 150µs), so latching occurs and DC/DC OFF
is set

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(8) MASK Pin Function

The MASK pin is used for control that maintains constant voltage at the BD768xFJ's power supply pin (VCC pin).
Figure 13 shows an application diagram using the MASK signal.
At the timing of DC/DC ON => OFF switching, a surge voltage in the auxiliary coil makes Va pin voltage rise. This
also causes the VCC pin voltage to rise. The MASK pin outputs a signal that has been delayed by the time TMASK
relative to the OUT pin. (See Figure 14)

The MASK pin is an open drain output, and an external transistor is used for ON/OFF control. This function is able
to maintain a constant VCC pin voltage.
During a soft start, the MASK pin is fixed at Hiz level. Consequently, the external transistor status is ON. (See
Figure 13)

Leave open when not using the MASK pin.

VOUT
VH VS
FUSE
NP
AC Diode
85- Filter Bridge VP NS CM
265Vac
Va

ND

8 7 6 5
BO VCC MASK OUT

BD768x
ERROR
AMP
ZT FB CS GND

１ 2 3 4

RS

PC

Figure 13. Application Circuit Example Using MASK Pin

(Note) In case of low output power, it isn’t much power from the aux. window to VCC pin.
Please adjust a set value.

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ON OFF ON OFF ON OFF

DC/DC

OUT
VDD[V]

VP
VDD * NS / NP

VS

Va VOUT * ND / NS VOUT * ND / NS VOUT * ND / NS

Hi-Z Hi-Z Hi-Z Hi-Z

MASK L Tmask L Tmask L Tmask

A B C A B C A B C

Figure 14. MASK Pin Timing Chart (Normal Operation)

A : DC/DC OFF=>ON
B : DC/DC ON=>OFF
C : During TMASK time, MASK pin is L

ON OFF ON OFF ON OFF

DC/DC

OUT
VDD[V]

VP
VDD * NS / NP

VS

Va VOUT * ND / NS VOUT * ND / NS VOUT * ND / NS

MASK Hi-Z

A B C A B C A B C

Figure 15. MASK Pin Timing Chart (Soft Start Operation)

A: DC/DC OFF => ON

B: DC/DC ON => OFF
C: MASK pin is fixed at Hiz level.

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(9) OUT Pin Gate Clamp Circuit

OUT pin is connected to external MOSFET’s gates.
For MOSFET’s gates is safety, OUT voltage is clamped to Gate Clamp circuit.

(10) Thermal Shut-Down Function

Thermal Shut-Down function is auto restart type. When VCC UVLO is released, BD768xFJ starts on State2
because of preventing from thermal error of external parts. At start up, it does not start until T1 below.

State2
DC/DC
OFF

DC/DC State1
ON

T1=135℃ T2=185℃
(typ) （typ) Temp [℃]

Figure 16. Thermal Shut-Down

Protection Circuit Operation Modes

Table 2 below lists the operation modes of the various protection functions.

Table 2 Protection Circuit Operation Modes

Item Operation Mode

Brown Out Protection Auto recovery

VCC Under Voltage Locked Out Auto recovery
BD7682/7683 = Latch
VCC Over Voltage Protection
BD7684/7685 = Auto recovery
BD7682/7684 = Auto recovery
FB Over Limited Protection
BD7683/7685 = Latch
ZT Over Voltage Protection Latch
Thermal Shutdown Auto recovery

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Power Dissipation

The thermal design should be set operation for the following conditions.
(Since the temperature shown below is the guaranteed temperature, be sure to take a margin into account.)

1. The ambient temperature Ta must be 105°C or less.

2. The IC’s loss must be within the allowable dissipation Pd.

The thermal dissipation characteristics are as follows.

(PCB: 70 mm × 70mm × 1.6 mm, mounted on glass epoxy substrate)

1000

900

800

700

600
Pd[mW]

500

400

300

200

100

0
0 25 50 75 100 125 150

Ta[℃]

Figure 17. SOP-J8 Thermal De-rating Curve

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I/O Equivalent Circuit

1 ZT 2 FB 3 CS 4 GND
Internal
VCC Reg
VCC

GND

ZT

5 OUT 6 MASK 7 VCC 8 BO

VCC

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●Characteristic Data ( They are only reference data )

40.0 1500 950

1350 850
35.0

Circuit Current (ON) 1 [uA]

Circuit Current (OFF) [uA]

Circuit Current (ON) 2 [uA]

1200 750

30.0
1050 650

25.0 900 550

750 450
20.0
600 350

15.0
450 250

10.0 300 150

-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Tempature [℃] Tempature [℃] Tempature [℃ ]

Circuit Current (OFF) Circuit Current (ON) 1 Circuit Current (ON) 2

2000 1.080 18.0

Circuit Current (Protect circuit is on) [uA]

B.O. Detect. Hysteresis Current [uA]

1.060 17.0
[V]

1800 1.040 16.0

B.O. Detection Voltage

1.020 15.0

1600 1.000 14.0

0.980 13.0

1400 0.960
12.0

0.940
11.0

0.920
1200 10.0
-40 -20 0 20 40 60 80 100 120
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Tempature [℃]
Tempature [℃] Tempature [℃]

Circuit Current (Protect circuit is on) B.O. Detection Voltage B.O. Detection Hysteresis Current

20.00 14.50 6.00

19.90 14.40 5.90

19.80 14.30 5.80

VCC UVLO Voltage 1 [V]

VCC UVLO Hysteresis [V]

VCC UVLO Voltage 2 [V]

19.70 14.20 5.70

19.60 14.10 5.60

19.50 14.00 5.50

19.40 13.90 5.40

19.30 13.80 5.30

19.20 13.70 5.20

19.10 13.60 5.10

19.00 13.50 5.00

-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Tempature [℃] Tempature [℃] Tempature [℃]

VCC UVLO Voltage 1 VCC UVLO Voltage 2 VCC UVLO Hysteresis

30.50 25.0 1.050

CS Over-Current Sensor Volt. 1A [V]

1.040
FB Pin pull-up Resistance [kΩ]

30.00
23.0 1.030
VCC OVP Voltage 1 [V]

29.50 1.020
21.0 1.010
29.00 1.000
19.0
0.990
28.50
0.980
17.0
28.00 0.970

0.960
27.50 15.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 0.950
-40 -20 0 20 40 60 80 100 120
Tempature [℃] Tempature [℃]
Tempature [℃]

VCC OVP Voltage 1 FB Pin pull-up Resistance CS Over-Current Sensor Voltage 1A

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●Characteristic Data ( They are only reference data )

0.740 0.350 0.250
CS Over-Current Sensor Voltage 1B [V]

CS Over-Current Sensor Voltage 2A [V]

CS Over-Current Sensor Voltage 2B [V]

0.730 0.240
0.335
0.720
0.230
0.320
0.710
0.220
0.700 0.305
0.210
0.690 0.290
0.200
0.680
0.275
0.190
0.670
0.260 0.180
0.660

0.650 0.245 0.170

-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Tempature [℃] Tempature [℃] Tempature [℃]

CS Over-Current Sensor Voltage 1B CS Over-Current Sensor Voltage 2A CS Over-Current Sensor Voltage 2B

1.10 0.850 136.0

Maximum Operating Frequency 1 [kHz]

1.08
131.0
CS Switching ZT Current [mA]

1.06 0.700
Minimum ON Width [us]

1.04 126.0
1.02 0.550
121.0
1.00

0.98 0.400
116.0
0.96
0.250
0.94 111.0

0.92
0.100 106.0
0.90 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
-40 -20 0 20 40 60 80 100 120
Tempature [℃] Tempature [℃]
Tempature [℃]

CS Switching ZT Current Minimum ON Width Maximum Operating Frequency 1

36.0 1.400 0.600

Frequency Reduction Start FB Voltage [V]

Frequency Reduction End FB Voltage 1 [V]

Maximum Operating Frequency 2 [kHz]

34.0 1.350
0.550

32.0 1.300

30.0 1.250 0.500

28.0 1.200
0.450

26.0 1.150

24.0 1.100 0.400

-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Tempature [℃] Tempature [℃] Tempature [℃]

Maximum Operating Frequency 2 Frequency Reduction Start FB Voltage Frequency Reduction End FB Voltage 1

0.650 2.300 140.0

Frequency Reduction End FB Voltage 2 [V]

130.0
ZT Comparator Voltage 1 [mV]

2.200
0.600
120.0
Voltage Gain [V/V]

2.100
110.0
0.550
2.000 100.0

0.500 90.0
1.900

80.0
0.450 1.800
70.0
1.700
0.400 -40 -20 0 20 40 60 80 100 120 60.0
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Tempature [℃]
Tempature [℃] Tempature [℃]

Frequency Reduction End FB Voltage 2 Voltage Gain ZT Comparator Voltage 1

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●Characteristic Data ( They are only reference data )

21.0 54.0 1.400

51.0 1.300
ZT Trigger Timeout Period 1 [us]

19.0

Maximum ON Time [us]

48.0
1.200

Soft Start Time 1 [ms]

17.0 45.0
1.100
42.0
15.0 1.000
39.0
0.900
13.0 36.0
0.800
33.0
11.0
30.0 0.700

9.0 27.0 0.600

-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Tempature [℃] Tempature [℃] Tempature [℃]

ZT Trigger Mask Time Maximum ON Time Soft Start Time 1

3.100 2.900
5.600

5.200
3.000 2.800

4.800
Soft Start Time 2 [ms]

FB OLP Voltage 2 [V]

2.700
FB OLP Voltage 1 [V]

2.900
4.400

4.000 2.800 2.600

3.600
2.700 2.500
3.200

2.600 2.400
2.800

2.400 2.300
-40 -20 0 20 40 60 80 100 120 2.500
-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Tempature [℃] Tempature [℃]
Tempature [℃]

Soft Start Time 2 FB OLP Voltage 1 FB OLP Voltage 2

4.00 20.00
165.0
3.90
19.50
ZT OVP Voltage [V]

3.80
OUT Pin Clamp Voltage [V]

150.0
19.00
3.70
FB OLP Timer [ms]

3.60 18.50
135.0
3.50 18.00

120.0 3.40
17.50
3.30
17.00
105.0 3.20

3.10 16.50

90.0 3.00 16.00

-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120
Tempature [℃] Tempature [℃] Tempature [℃]

FB OLP Timer ZT OVP Voltage OUT Pin Clamp Voltage

9.50 1.0 80.0

0.9
70.0
OUT pin Nch MOS Ron [Ω]

8.00
MASK Pin Ron [Ω]
MASK Pin Delay Time [ns]

0.8
60.0
6.50 0.7
50.0
0.6
5.00
40.0
0.5

3.50 30.0
0.4

2.00 0.3 20.0

-40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120

Tempature [℃] Tempature [℃] Tempature [℃]

OUT pin Nch MOS Ron MASK Pin Delay Time MASK Pin Ron

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Operational Notes

1. Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
terminals.

2. Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Separate the GND and supply lines of the digital
and analog blocks to prevent noise in the GND and supply lines of the digital block from affecting the analog block.
Furthermore, connect a capacitor to GND at all power supply pins. Consider the effect of temperature and aging on the
capacitance value when using electrolytic capacitors.

3. GND Voltage
Ensure that no pins are at a voltage below that of the GND pin at any time, even during transient condition.

4. GND Wiring Pattern

When using both small-signal and large-current GND traces, the two GND traces should be routed separately but
connected to a single GND at the reference point of the application board to avoid fluctuations in the small-signal GND
caused by large currents. Also ensure that the GND traces of external components do not cause variations on the GND
voltage. The GND lines must be as short and thick as possible to reduce line impedance.

5. Thermal Consideration
Should by any chance the power dissipation rating be exceeded, the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum rating,
increase the board size and copper area to prevent exceeding the Pd rating.

6. Recommended Operating Conditions

These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.

7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of GND wiring, and routing of
connections.

8. Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

9. Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned OFF completely before connecting or removing it from the test setup during the inspection process.
To prevent damage from static discharge, GND the IC during assembly and use similar precautions during transport
and storage.

10. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to GND, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.

11. Unused Input Terminals

Input terminals of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance
and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input terminals should be connected to
the power supply or GND line.

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Operational Notes – continued

12. Regarding Input Pins of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor Transistor (NPN)
Pin A Pin B B Pin B
C
Pin A E

P B C
P+ P+ P+ N P P+
N N N N Parasitic N N N
E
Elements
Parasitic
P Substrate P Substrate
Elements
GND GND GND GND
Parasitic Parasitic N Region
Elements Elements close-by

Figure 17. Example of Monolithic IC Structure

13. Ceramic Capacitor

When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.

14. Area of Safe Operation (ASO)

Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).

15. Thermal Shutdown Circuit(TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. The IC should be powered
down and turned ON again to resume normal operation because the TSD circuit keeps the outputs at the OFF state
even if the Tj falls below the TSD threshold. Note that the TSD circuit operates in a situation that exceeds the absolute
maximum ratings and therefore, under no circumstances, should the TSD circuit be used in a set design or for any
purpose other than protecting the IC from heat damage.

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Ordering Information

B D 7 6 8 X F J - L B E 2

Product name Package Product class

FJ : SOP-J8 LB for Industrial applications
Packaging and forming specification
E2: Embossed tape and reel

Marking Diagram

SOP-J8 (TOP VIEW)

Part Number Marking

D768□ LOT Number

1PIN MARK

Product name Part Number Marking

1 BD7682FJ-LB D7682
2 BD7683FJ-LB D7683
3 BD7684FJ-LB D7684
4 BD7685FJ-LB D7685

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BD768xFJ-LB Series

Physical Dimension, Tape and Reel Information

Package Name SOP-J8

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TSZ22111・15・001 29.Nov.2018. Rev.003
BD768xFJ-LB Series

Revision History

Date Revision Changes

23.Mar.2015 001 New Release
29.Jun.2016 002 P2 values in the Block diagram
P3 an explanation of Absolute Maximum Rating
P7 a value of Figure 3
P8 values of Figure 4
P10 values of Figure 6
P11 a value of Figure 8
P14 an explanation of Soft start operations
P14 a value of Figure 12
P17 an explanation of Table 2
29.Nov.2018 003 P26 Package of Ordering Information

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 Notice
Precaution on using ROHM Products
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN USA EU CHINA
CLASSⅢ CLASSⅡb
CLASSⅢ CLASSⅢ
CLASSⅣ CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.

Notice-PAA-E Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
 Datasheet

General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.

2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.

3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.

Notice – WE Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.