Network Synthesis (2 Files Merged)
Network Synthesis (2 Files Merged)
Network Synthesis (2 Files Merged)
Cauer Method
Network Synthesis
Differences between Network synthesis and Network
Analysis are:
• In network synthesis, there are many different
answers to that particular problems, whereas, in
network analysis there is only one answer.
C1
L1
1/2kc 1/2kd
Ka
1/Kb
L2 L3
Example One:
Determine Foster’s first approximation for the
function below;
2𝑠
𝑆3 +2𝑠
2𝑆 4 + 8𝑆 2 + 6
2𝑆 4 + 4𝑆 2
4𝑆 2 +6
The Impedance Equation can now be re-written as
4𝑆 2 + 6
𝑍 𝑠 = 2𝑠 + 3
𝑆 + 2𝑆
4𝑆 2 + 6
Resolve Into partial fraction
𝑆 3 + 2𝑆
4𝑆 2 +6 𝐴 𝐵𝑠
= + 1
𝑆 3 +2𝑆 𝑆 𝑆 2 +2
Resolving equation 1 into partial fraction gives
A = 3 and B = 1
𝐾𝑎 = 2, 𝐾𝑏 = 3, 2𝐾𝑐 = 1, 𝑤𝑐 2 = 2
C1
L1
1/2kc 1/2kd
Ka
1/Kb
L2 L3
1
𝐿1 = 𝐾𝑎 = 2𝐻, 𝐶2 = = 1F
2𝐾𝑐
1 1 2𝐾𝑐 1
C1 = = 𝐹 , 𝐿2 = = 𝐻
𝐾𝑏 3 𝑤𝑐 2 2
1F
1/3F
2H
1/2kc
1/2H
Ka
1/Kb
L2
Foster’s Second Approximation.
The steps involved in this are as follows:
• Take the reciprocal of Z(s), to obtain the admittance
C1 L1
C2 C3
1 𝑆(𝑆 2 +2) 1 𝐴𝑠 𝐵𝑠
𝑌 𝑠 = = ( + )
2 (𝑆 2 +3)(𝑆 2 +1) 2 𝑆 2 +3 𝑆 2 +1
A = ½ and B = ½
1 0.5𝑠 0.5𝑠
𝑌 𝑠 = ( + )
2 𝑆 2 +3 𝑆 2 +1
1 1
𝑌 𝑠 = 4𝑠 + 4𝑠 ∗∗
2
𝑆 +3 𝑆 +1 2
Compare eq ** with the foster 2nd approximation eqn.
! 1
2𝐾𝑐 = 𝑤ℎ𝑖𝑐ℎ 𝑖𝑚𝑝𝑙𝑖𝑒𝑠 𝑡ℎ𝑎𝑡𝐾𝑐 ! = 1/8 , 𝑤𝑐 2 = 3
4
1 1
2𝐾𝑑 = which implies that 𝐾𝑑 = , 𝑤𝑑2 = 1
! !
4 8
1 1
𝐿1 = = = 4H
2𝐾𝑐 ! 1/4
1 1
L2 = = = 4H
2𝐾𝑑 ! 1/4
2𝐾𝑐 ! 1/4 1
C1 = = = 𝐹
𝑤𝑐 2 3 12
2𝐾𝑑! 1/4 1
C2 = 2 = = 𝐹
𝑤𝑑 1 4
The circuit then becomes
L2
4H
4H L1
1/12F C1 1/4F C2
CAUER’S SYNTHESIS.
Like Foster’s synthesis, this technique also has two
forms: They are named Cauer I and Cauer II.
CAUER I.
In this technique, the impedance equation which is
synthesized can be written in the form;
Note that here the numerator is always more or
higher than the denominator.
The circuit such an equation represents is given
below:
α1 α3
α2 α4
Figure 1
Example on Cauer 1
Given that
S/4
4𝑠2 +6 𝑆 3 + 2𝑆
𝑆 3 + 1.5𝑆
0.5𝑠
8S
0.5𝑠 4𝑠 2 + 6
4𝑆 2
6
(4). Divide divisor of the last step by the remainder of
last step.
S/12
6 0.5𝑠
0.5𝑠
0
(5). There is no remainder in step 4 and the division is stopped
at this point.
2H 8H
¼F α2 1/12 F α4
CAUER II
In this technique, the impedance equation which is
synthesized can be written in the form;
b2 b4
Figure 2
Examples on Cauer II:
Draw a Cauer II representation for the impedance equation
below;
Solution:
First, arrange the numerator and denominator in ascending
power of S.
2𝑠+𝑆3 6 + 8𝑆 2 + 2𝑆 4
6 + 3𝑆 2
5𝑆 2 + 2𝑆 4
2𝑠 + 𝑆 3
5𝑠2 + 2𝑆4
2𝑆 + 4/5𝑆 3
𝑆3
5
Divide the divisor of the above by the remainder
25
𝑆
𝑆3
5 5𝑠 2 + 2𝑆 4
5𝑠 2
2𝑆 4
Again , divide the divisor of the previous by the
remainder 1
10𝑆
𝑆3
2𝑆4
5
𝑆3
5
There is no remainder in the last step so we stop the
division.
Note the following as we refer to equation ****
1
For step 1, the quotient 3/s reps 𝑏1 𝑠
2 1
For step 2, the quotient reps
5𝑠 𝑏2𝑠
25 1
For step 3, the quotient reps
𝑠 𝑏3 𝑠
1 1
For step 4, the quotient reps
10𝑠 𝑏4 𝑠
Referring to figure 2
1
3/s reps 𝑤ℎ𝑖𝑐ℎ 𝑖𝑚𝑝𝑙𝑖𝑒𝑠 𝑡ℎ𝑎𝑡𝑏1 = 1/3
𝑏1𝑠
1
𝐶1 = 𝑏1 = 𝐹
3
2 1
reps 𝑤ℎ𝑖𝑐ℎ 𝑖𝑚𝑝𝑙𝑖𝑒𝑠 𝑡ℎ𝑎𝑡𝑏2 = 5/2
5𝑠 𝑏2𝑠
5
𝐿1 = 𝑏2 = 𝐻
2
25 1
reps 𝑤ℎ𝑖𝑐ℎ 𝑖𝑚𝑝𝑙𝑖𝑒𝑠 𝑡ℎ𝑎𝑡𝑏3 = 1/25
𝑠 𝑏3𝑠
1
𝐶2 = 𝑏3 = 𝐹
25
1 1
reps 𝑤ℎ𝑖𝑐ℎ 𝑖𝑚𝑝𝑙𝑖𝑒𝑠 𝑡ℎ𝑎𝑡𝑏4 = 10
10𝑠 𝑏4𝑠
𝐿2 = 𝑏4 = 10𝐻
The equivalent circuit is as shown below
b1 b3
1/3F 1/25F
10H
2.5H b4
b2
Figure 2
Assignment
Find Cauer’s first and second approximation for
the expression below:
Find Cauer’s first and second approximation for the
expression below:
Solution.
For Cauer I
=
• Bandwidth
• Hence w1 and w2 are called the half-power frequencies. The half-power
frequencies are obtained by setting Z equal to 2R and writing
+
20sinwt C
-
Quality Factor
• It is regarded as a measure of the energy storage property of a circuit
in relation to its energy dissipation property.
• In the series RLC circuit, the peak energy stored is , while the
energy dissipated in one period is Hence,
Quality Factor Cont’d
• Also, it could be defined as the ratio of potential drop across the
inductance or capacitance at resonance to he potential drop across
the resistance (or the applied voltage)
wo LI 1 L
Q
RI R C
I
woC 1 L
Q
RI R C
• Notice that the quality factor is dimensionless. The relationship
between the bandwidth B and the quality factor Q is obtained as:
Quality factor is dimensionless and is defined as the ratio
of the circuit’s resonant frequency to its bandwidth. i.e
+
20sinwt C
-
Parallel Resonance
• The parallel RLC circuit below is the dual of the series RLC circuit. The
admittance is
V 1/jwC
I = Im< 0 R JwL
-
The Admittance is = = +
Or
Or
LC = 1
=
Note that at resonance, the parallel LC combination acts
like an open circuit, so that the entire current flows
through R.
-
Again, for high- Q circuits (Q ≥ 10).
-
Example
In the parallel RLC circuit of Fig. above, let R 8k , L 0.2mH , and C 8 F, (a) Calculate o , Q, and B. (b) Find 1 and 2 (c) Determine the power dissipated at o , 1 and 2