4GB GDDR5, 256b, 128Mx32 Tall Dvi-I + DP + DP + Dp/Hdmi + DP
4GB GDDR5, 256b, 128Mx32 Tall Dvi-I + DP + DP + Dp/Hdmi + DP
4GB GDDR5, 256b, 128Mx32 Tall Dvi-I + DP + DP + Dp/Hdmi + DP
PG401 A02
4GB GDDR5, 256b, 128Mx32
1 1
16 DACA Interface
17 IFPAB DVI-I-DL
18 IFPEF with IFPE DP
19 IFPF DP
20 IFPC HDMI/DP
21 IFPD DP
22 MIOA/B Interface and Frame Lock
23 MISC1: Fan, Thermal, JTAG, GPIO, Stereo
24 MISC2: ROM, XTAL, Straps
25 PS: 5V, PEX_VDD
4 4
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL Table of Contents
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 1 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
Power Supply
1 EXT_12V 2x3 PWR 1 1
NVVDD-PH3
(NORTH)
Power Supply
NVVDD-PH4 EXT_12V 2x3 PWR 2/
EXT_12V 2x4 PWR 2
(NORTH)
DYNAMIC OPTION
2
QD:2-WAY SLI with FRAME LOCK 2
Power Supply
NVVDD-PH2 EXT_12V 2x3 PWR 2/
MEM C MEM C MEM B
EXT_12V 2x4 PWR 2
MEM D Power Supply
QD:DP
LO HI LO (NORTH)
HDMI/
HI NVVDD-PH5
MEM A
DP
GM204
LO
Power Supply PEX_12V Finger
5V Linear
MEM A
DVI-I
FBVDD/FBVDDQ
4
QD:STEREO PEX_VDD
4
PEX_3V3 Finger
Open_Vreg option
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL Block Diagram
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 2 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
R1146 0ohm
Page3: PCI Express 3V3_F
04020.05 ohm COMMON MICRO-STAR INT'L CO.,LTD
12V
PLACE 0603 4.7UF FOOTPRINT
3V3_F MS-V317
ON TOP OF 0805 FOOTPRINT
MSI
NONPHY-X16
CN2 Size Document Description Rev
R1132 C1189
Custom PCIE 1.0
C223 C908 C50 C857 C850 CON_X16 10k 0.1uF
4.7uF 4.7uF 4.7uF 4.7uF 0.1uF COMMON 5% 16V
@electro_mechanic.con_pci_express(sym_1):page3_i662 0402 10%
Date: Wednesday, August 20, 2014 Sheet 3 of 37
16V 16V 16V 16V 16V
DNI X7R
10% 10% 10% 10% 10%
R709 0ohm 0402 PEX_RST_BUF*
X5R X5R X5R X5R X7R
0603 0603 0805 0805LP 0402 B1 +12V TRST* JTAG1 B9 0402 0.05 ohm DNI
DNI DNI COMMON COMMON COMMON B2 +12V TCLK JTAG2 A5 COMMON
5
1
A2 +12V TDI JTAG3 A6 U52 GND 1
3V3 A3 +12V TDO JTAG4 A7 PEX_TDO PEX_RST* 1 INS16823418
B3 +12V/RSVD TMS JTAG5 A8 3V3_F 4
GND PEX_RST_MCU* 2 SC70-5
B8 +3V3 DNI
C843 C842 A9 +3V3
3
4.7uF 0.1uF R1152
A10 +3V3
6.3V 16V R65 R66 10k
20% 10% 2.2k 2.2k 5%
X5R X7R B10 +3V3AUX 0402
5% 5%
0603 0402 DNI
0402 0402
COMMON COMMON
COMMON COMMON
PEX_PRSNT* A1 PRSNT1 SMCLK B5 PEX_SMCLK R61 0ohm I2CS_SCL
PEX_SMDAT R62 0ohm I2CS_SDA
OUT 23
B17 PRSNT2 SMDAT B6 04020.05 ohm DNI
23 G1A
OUT
04020.05 ohm DNI
@digital.u_gpu_gb3b_256(sym_1):page3_i849 GND GND Place between
GND BGA1745 GPU and PS
RSVD2_POWER_BRAKE COMMON
B12 RSVD
1/21 PCI_EXPRESS
B4 B11 PEX_VDD
GND WAKE
A4 GND BJ21 PEX_WAKE Place near balls
R109 B7 AW33
0ohm GND PEX_IOVDD
A12 A11 PEX_RST* PEX_RST_BUF* BE20 AY32
0.05 ohm
GND PERST 34 IN PEX_RST PEX_IOVDD C709 C694 C696 C715 C102 C108 C109 C642
0402
B13 GND PEX_IOVDD AY33
STUFF FOR 1uF 1uF 1uF 4.7uF 10uF 22uF 10uF 22uF
DNI A15 GND BB20 PEX_CLKREQ PEX_IOVDD AY35
TESLA ONLY 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
B16 GND PEX_IOVDD BA33
10% 10% 10% 20% 20% 20% 20% 20%
POWER_BRAKE* B18 A13 PEX_REFCLK
PEX_REFCLK BD20 BA35
OUT GND REFCLK PEXGEN3_SIGNALS PEX_REFCLK PEX_IOVDD X5R X5R X5R X5R X5R X5R X5R X5R
A18 GND REFCLK A14 PEX_REFCLK*
PEX_REFCLK PEXGEN3_SIGNALS BC20 PEX_REFCLK PEX_IOVDD BB33 0402 0402 0402 0603 0805 0805 0805 0805LP
COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
UNSTUFF FOR PEX_TXX0 C815 0.22uF PEX_TX0
PERP0 A16 PEX_TXX0 PEXGEN3_SIGNALS PEXGEN3_SIGNALS BC21 PEX_TX0
DT/QUADRO R110 A17 PEX_TXX0* 0402 6.3V C816 0.22uF PEX_TX0* BD21
PERN0 PEX_TXX0 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX0
0ohm 10% 10%
GND 0402 6.3V
2 0.05 ohm PEX_RX0
COMMON X7R X7R COMMON 2
0402 PETP0 B14 PEX_RX0 PEXGEN3_SIGNALS BH21 PEX_RX0 GND
B15 PEX_RX0* PEX_RX0 BG21
DNI PETN0 PEXGEN3_SIGNALS PEX_RX0
END OF X1 PEX_VDD
B31 A21 PEX_TXX1 C796 0.22uF PEX_TX1 BE22
PRSNT2 PERP1 PEX_TXX1 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX1
A19 A22 PEX_TXX1* 0402 6.3V C797 0.22uF PEX_TX1* BE23 AY24
RSVD PERN1 PEX_TXX1 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX1 PEX_IOVDDQ
RSVD4_POWER_BRAKE B30 10% 0402 6.3V 10% AY26
RSVD COMMON X7R X7R COMMON PEX_IOVDDQ C707 C684 C682 C718 C634 C630 C100 C633
A32 B19 PEX_RX1 PEX_RX1 BG23 AY27
RSVD PETP1 PEXGEN3_SIGNALS PEX_RX1 PEX_IOVDDQ 1uF 1uF 1uF 4.7uF 10uF 22uF 10uF 22uF
B20 PEX_RX1* PEX_RX1 BH23 AY29
PETN1 PEXGEN3_SIGNALS PEX_RX1 PEX_IOVDDQ 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
A20 GND PEX_IOVDDQ AY30
C792 0.22uF 10% 10% 10% 20% 20% 20% 20% 20%
B21 A25 PEX_TXX2 PEX_TXX2 PEX_TX2 BD23 BA24
GND PERP2 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX2 PEX_IOVDDQ X5R X5R X5R X5R X5R X5R X5R X5R
B22 A26 PEX_TXX2* 0402 6.3V C793 0.22uF PEX_TX2* BC23 BA26
GND PERN2 PEX_TXX2 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX2 PEX_IOVDDQ 0402 0402 0402 0603 0805LP 0805LP 0805 0805LP
A23 10% 0402 6.3V 10% BA27 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
GND COMMON X7R X7R COMMON PEX_IOVDDQ
A24 B23 PEX_RX2 PEX_RX2 BJ23 BA29
GND PETP2 PEXGEN3_SIGNALS PEX_RX2 PEX_IOVDDQ
B25 B24 PEX_RX2* PEX_RX2 BJ24 BA30
GND PETN2 PEXGEN3_SIGNALS PEX_RX2 PEX_IOVDDQ
B26 GND PEX_IOVDDQ BA32
A27 A29 PEX_TXX3 C776 0.22uF PEX_TX3 BC24 BB24
GND PERP3 PEX_TXX3 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX3 PEX_IOVDDQ GND
A28 A30 PEX_TXX3* 0402 6.3V C777 0.22uF PEX_TX3* BD24 BB27
GND PERN3 PEX_TXX3 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX3 PEX_IOVDDQ
B29 GND COMMON
10% 0402 6.3V 10%
COMMON PEX_IOVDDQ BB30
PEX_RX3 X7R X7R
A31 GND PETP3 B27 PEX_RX3 PEXGEN3_SIGNALS BH24 PEX_RX3
B32 B28 PEX_RX3* PEX_RX3 BG24
GND PETN3 PEXGEN3_SIGNALS PEX_RX3
END OF X4
A35 PEX_TXX4 C750 0.22uF PEX_TX4 BE26
PERP4 PEX_TXX4 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX4
A36 PEX_TXX4* 0402 6.3V C748 0.22uF PEX_TX4* BE25
PERN4 PEX_TXX4 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX4
GND B48 PRSNT2 COMMON
10% 0402 6.3V 10%
COMMON
PEX_RX4 X7R X7R
A33 RSVD PETP4 B33 PEX_RX4 PEXGEN3_SIGNALS BG26 PEX_RX4
B34 PEX_RX4* PEX_RX4 BH26
PETN4 PEXGEN3_SIGNALS PEX_RX4
A34 GND 3V3_RUN
B35 A39 PEX_TXX5 C738 0.22uF PEX_TX5 BD26
GND PERP5 PEX_TXX5 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX5
B36 A40 PEX_TXX5* 0402 6.3V C731 0.22uF PEX_TX5* BC26
GND PERN5 PEX_TXX5 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX5
A37 10% 0402 6.3V 10% AW30
3 GND COMMON X7R X7R COMMON PEX_PLL_HVDD 3
A38 B37 PEX_RX5 PEX_RX5 BJ26
GND PETP5 PEXGEN3_SIGNALS PEX_RX5
B39 B38 PEX_RX5* PEX_RX5 BJ27 AW32
GND PETN5 PEXGEN3_SIGNALS PEX_RX5 PEX_SVDD_3V3
B40 C687 C693 C808 C822
GND 0.1uF 0.1uF 4.7uF 4.7uF
A41 A43 PEX_TXX6 C727 0.22uF PEX_TX6 BC27
GND PERP6 PEX_TXX6 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX6
PEX_TXX6* C722 0.22uF PEX_TX6* 16V 16V 6.3V 6.3V
A42 GND PERN6 A44 PEX_TXX6 PEXGEN3_SIGNALS 0402 6.3V PEXGEN3_SIGNALS BD27 PEX_TX6 10% 10% 20% 20%
B43 GND COMMON
10% 0402 6.3V 10%
COMMON X7R X7R X5R X5R
PEX_RX6 X7R X7R
B44 GND PETP6 B41 PEX_RX6 PEXGEN3_SIGNALS BH27 PEX_RX6 0402 0402 0603 0603
A45 B42 PEX_RX6* PEX_RX6 BG27 COMMON COMMON COMMON COMMON
GND PETN6 PEXGEN3_SIGNALS PEX_RX6
A46 GND
B47 A47 PEX_TXX7 C714 0.22uF PEX_TX7 BE28
GND PERP7 PEX_TXX7 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX7
B49 A48 PEX_TXX7* 0402 6.3V C710 0.22uF PEX_TX7* BE29
GND PERN7 PEX_TXX7 PEXGEN3_SIGNALS PEXGEN3_SIGNALS PEX_TX7
A49 10% 0402 6.3V 10%
GND COMMON X7R X7R COMMON
B45 PEX_RX7 PEX_RX7 BG29 GND
PETP7 PEXGEN3_SIGNALS PEX_RX7
B46 PEX_RX7* PEX_RX7 BH29
END OF X8 PETN7 PEXGEN3_SIGNALS PEX_RX7
GND
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PCI Express
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 3 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
CMD0 CAS*
CMD1 CKE*
CMD2 RST*
CMD3 RAS*
CMD4 A1_A9
CMD5 A0_A10
3V3_RUN
FBA_EDC<0> U45 FBB_EDC<0> J30
5 BI 0 FBA_DQS_WP0 07 BI 0 FBB_DQS_WP0
FBA_EDC<1> Y43 FBB_EDC<1> H33
5 BI 1 FBA_DQS_WP1 07 BI 1 FBB_DQS_WP1
FBA_EDC<2> AF42 LB501 FBB_EDC<2> D39
5 BI 2 FBA_DQS_WP2 07 BI 2 FBB_DQS_WP2
FBA_EDC<3> AC44 30ohm FBB_EDC<3> J35
5 BI 3 FBA_DQS_WP3 07 BI 3 FBB_DQS_WP3
FBA_EDC<4> AV47 FBB_EDC<4> R42
06 BI 4 FBA_DQS_WP4 COMMON 8 BI 4 FBB_DQS_WP4
FBA_EDC<5> AN43 FBB_EDC<5> M48
06 BI 5 FBA_DQS_WP5 BEAD_0603 8 BI 5 FBB_DQS_WP5
FBA_EDC<6> AJ42 FBB_EDC<6> F49
06 BI 6 FBA_DQS_WP6 8 BI 6 FBB_DQS_WP6
FBA_EDC<7> AK47 AJ39 3V3_PLL FBB_EDC<7> J47 L36 3V3_PLL
4 06 BI 7 FBA_DQS_WP7 FBA_PLL_AVDD OUT 4,09,16,17,18,20,21 8 BI 7 FBB_DQS_WP7 FBB_PLL_AVDD IN 4,09,16,17,18,20,21 4
AC39 FB_REFPLL_DLL_AVDD0
L21 R596 R595 R635 R594
FB_REFPLL_DLL_AVDD1 10k 10k 10k 10k
C653 C725 5% 5% 5% 5%
0.1uF 0.1uF 0402 0402 0402 0402
COMMON COMMON COMMON COMMON
16V 16V FBA_CMD<1> FBB_CMD<1>
10% 10%
FBA_CMD<17> FBB_CMD<17>
X7R X7R
0402 0402
COMMON COMMON FBA_CMD<2> FBB_CMD<2>
FBA_CMD<18> FBB_CMD<18>
GND
5%
0402
5%
0402
5%
0402
5%
0402
MS-V317
COMMON COMMON COMMON COMMON MSI
Size Document Description Rev
5
Custom MEMORY: GPU Partition A/B 1.0 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MEMORY: GPU Partition A/B
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 4 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
M7C
M7B @memory.u_mem_sd_ddr5_x32(sym_7):page5_i361
BGA170_MIRR FBVDDQ
@memory.u_mem_sd_ddr5_x32(sym_5):page5_i360
COMMON
BGA170_MIRR
COMMON FBVDDQ
Mirrored R600
M7D M7A FBA_MF1_A 1k
FBA_CMD<3>
4 L3 RAS SOE*/MF_VDD J1
@memory.u_mem_sd_ddr5_x32(sym_2):page5_i358 @memory.u_mem_sd_ddr5_x32(sym_4):page5_i359 FBA_CMD<3> 3
BGA170_MIRR BGA170_MIRR FBA_CMD<0>
4 G3 CAS add 1k to VDD 0402 1% COMMON
FBA_CMD<0> 0
2
COMMON COMMON FBA_CMD<10>
4 G12 WE B10 VSS VDD C10 2
FBA_CMD<10> 10
FBA_CMD<15>
4 L12 CS B5 VSS VDD C5
MIRRORED MIRRORED FBA_CMD<15> 15
D10 VSS VDD D11
x32 x16 x32 x16 FBA_CMD<7>
4 J4 ABI G10 VSS VDD G1
FBA_D<0> FBA_D<16> FBA_CMD<7> 7
4 V4 DQ0 4 A11 DQ16 FBVDDQ G5 VSS VDD G11
Fba_D<0> 0
FBA_D<1>
NC Fba_D<16> 16
FBA_D<17>
NC
4 V2 DQ1 4 A13 DQ17 FBA_CMD<5>
4 K4 A0_A10 H1 VSS VDD G14
Fba_D<1> 1
FBA_D<2>
NC Fba_D<17> 17
FBA_D<18>
NC FBA_CMD<5> 5
4 T4 DQ2 4 B11 DQ18 FBA_CMD<4>
4 K5 A1_A9 H14 VSS VDD G4
Fba_D<2> 2
FBA_D<3>
NC Fba_D<18> 18
FBA_D<19>
NC FBA_CMD<4> 4
4 T2 DQ3 4 B13 DQ19 FBA_CMD<13>
4 K11 A2_BA0 K1 VSS VDD L1
Fba_D<3> 3
FBA_D<4>
NC Fba_D<19> 19
FBA_D<20>
NC R103 FBA_CMD<13> 13
4 N4 DQ4 4 E11 DQ20 FBA_CMD<14>
4 K10 A3_BA3 K14 VSS VDD L11
Fba_D<4> 4
FBA_D<5>
NC Fba_D<20> 20
FBA_D<21>
NC 549ohm FBA_CMD<14> 14
4 N2 DQ5 4 E13 DQ21 FBA_CMD<12>
4 H11 A4_BA2 L10 VSS VDD L14
Fba_D<5> 5
FBA_D<6>
NC Fba_D<21> 21
FBA_D<22>
NC 1% FBA_CMD<12> 12
FBVDDQ
4 M4 DQ6 4 F11 DQ22 FBA_CMD<11>
4 H10 A5_BA1 L5 VSS VDD L4
Fba_D<6> 6
FBA_D<7>
NC Fba_D<22> 22
FBA_D<23>
NC 0402 FBA_CMD<11> 11
4 M2 DQ7 4 F13 DQ23 COMMON FBA_CMD<8>
4 H5 A6_A11 P10 VSS VDD P11
Fba_D<7> 7 NC Fba_D<23> 23 NC FBA_CMD<8> 8
FBA_CMD<9>
4 H4 A7_A8 T10 VSS VDD R10
FBA_EDC<0> FBA_EDC<2> FBA_VREFD FBA_CMD<9> 9
4 R2 EDC0 4 C13 EDC2 06 FBA_CMD<6>
4 J5 RFU_A12 T5 VSS VDD R5
BI
FBA_DBI<0>
NC BI
FBA_DBI<2>
GND OUT FBA_CMD<6> 6
4 P2 DBI0 NC 4 D13 DBI2 NC
BI BI
A1 VSSQ VDDQ B1
1.05V 0.140A A12 VSSQ VDDQ B12
V10 FBA_VREFD A10 A14 B14
VREFD VREFD VSSQ VDDQ
FBA_D<8> V11 FBA_D<24> A4 R102 A3 B3
4 Fba_D<8> 8 DQ8 4 Fba_D<24> 24 DQ24 931ohm VSSQ VDDQ
FBA_D<9> V13 FBA_D<25> A2 FBA_CMD<2> J2 C1 D1
4 Fba_D<9> 9 DQ9 4 Fba_D<25> 25 DQ25 C137 R104 1% FBA_CMD<2> 2 4 RESET VSSQ VDDQ
FBA_D<10> T11 FBA_D<26> B4 FBA_CMD<1> J3 C11 D12
4 Fba_D<10> 10 DQ10 4 Fba_D<26> 26 DQ26 820pF 1.33k 0402 FBA_CMD<1> 1 4 CKE VSSQ VDDQ
FBA_D<11> T13 FBA_D<27> B2 C12 D14
4 Fba_D<11> 11 DQ11 4 Fba_D<27> 27 DQ27 50V 1%
COMMON VSSQ VDDQ
FBA_D<12> N11 FBA_D<28> E4 FBA_CLK0 J12 C14 D3
4 Fba_D<12> 12 DQ12 4 Fba_D<28> 28 DQ28 10% 0402 4 IN CLK VSSQ VDDQ
FBA_D<13> N13 FBA_D<29> E2 FBA_CLK0* J11 C3 E10
4 Fba_D<13> 13 DQ13 4 Fba_D<29> 29 DQ29 X7R COMMON 4 IN CLK VSSQ VDDQ
FBA_D<14> M11 FBA_D<30> F4 0402 C4 E5
4 Fba_D<14> 14 DQ14 4 Fba_D<30> 30 DQ30 R611 R615 VSSQ VDDQ
FBA_D<15> M13 FBA_D<31> F2 COMMON E1 F1
4 Fba_D<15> 15 DQ15 4 Fba_D<31> 31 DQ31 40.2ohm 40.2ohm VSSQ VDDQ
E12 VSSQ VDDQ F12
FBA_EDC<1> FBA_EDC<3> 1% 1%
4 R13 EDC1 4 C2 EDC3 0402 0402
E14 VSSQ VDDQ F14
BI BI
FBA_DBI<1> P13 FBA_DBI<3> D2 GND GND E3 F3
4 BI DBI1 4 BI DBI3 COMMON COMMON VSSQ VDDQ
F10 VSSQ VDDQ G13
FBA_WCK01 P4 FBA_WCK23 D4 FBA_CLK0_RC F5 G2
3 4 IN WCK01 4 IN WCK23 VSSQ VDDQ 3
FBA_WCK01* P5 FBA_WCK23* D5 H13 H12
4 IN WCK01 4 IN WCK23 C609 VSSQ VDDQ
A5 NC_RFU_A5 H2 VSSQ VDDQ H3
10nF
V5 NC_RFU_V5 K13 VSSQ VDDQ K12
16V
K2 VSSQ VDDQ K3
10%
1.05V FBVDDQ X7R M10 VSSQ VDDQ L13
1G1D1S 3 0.350 0402 M5 VSSQ VDDQ L2
D Q15 COMMON N1 M1
VSSQ VDDQ
@discrete.q_fet_n_enh(sym_2):page5_i328 R93 N12 M12
SOT23_1G1D1S 549ohm VSSQ VDDQ
07,10,12,23
GPIO10_FBVREF_SEL 1G COMMON GND N14 VSSQ VDDQ M14
IN 1%
S 2 N3 VSSQ VDDQ M3
0402 OUT 06
60V COMMON R1 VSSQ VDDQ N10
0.26A
3000mohm@10V / [email protected] / [email protected] R11 VSSQ VDDQ N5
0.31A
0.3W 0.350 1.05V R12 VSSQ VDDQ P1
20V
FBA_VREFC J14 R14 P12
VREFC VSSQ VDDQ
R3 VSSQ VDDQ P14
R605 121ohm FBA_ZQ_1_B J13 R4 P3
GND ZQ VSSQ VDDQ
R89 R94 C116 0402 COMMON V1 T1
1% VSSQ VDDQ
1.33k 931ohm 820pF R591 1k FBA_SEN_1 J10 SEN V12 VSSQ VDDQ T12
1% 1% 50V
0402 0402
0402 1% COMMON V14 VSSQ VDDQ T14
10%
COMMON COMMON X7R V3 VSSQ VDDQ T3
0402
COMMON
GND GND
FBA_VREF_Q
GND
GND
4 4
FBVDDQ
GND
MICRO-STAR INT'L CO.,LTD
FBVDDQ
MS-V317
MSI
Size Document Description Rev
C587 C130 C127 C120 C125 C113 C110 C916
5
Custom 5: MEMORY: FBA Partition 31..0 10 5
10uF 4.7uF 4.7uF 1uF 1uF 1uF 1uF 47uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V
20%
Date: Wednesday, August 20, 2014 Sheet 5 of 37
20% 20% 10% 10% 10% 10% 20%
X5R X5R X5R X5R X5R X5R X5R X5R
0805LP 0603 0603 0402 0402 0402 0402 0805LP
COMMON COMMON COMMON COMMON COMMON COMMON COMMON DNI
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
GND ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MEMORY: FBA[31:0]
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 5 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
M8C
M8B @memory.u_mem_sd_ddr5_x32(sym_6):page6_i109
@memory.u_mem_sd_ddr5_x32(sym_5):page6_i55 BGA170
COMMON
BGA170
COMMON FBVDDQ
2 Normal 2
GND GND
4 4
GND
FBVDDQ
FBVDDQ
GND
MICRO-STAR INT'L CO.,LTD
MS-V317
C588 C135 C132 C112 C129 C123 C115 C915
MSI
Size Document Description Rev
10uF 4.7uF 4.7uF 1uF 1uF 1uF 1uF 47uF
Custom 6: MEMORY: FBA Partition 63..32 1.0
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V
5 20% 20% 20% 10% 10% 10% 10% 20% 5
X5R X5R X5R X5R X5R X5R X5R X5R Date: Wednesday, August 20, 2014 Sheet 06 of 37
0805LP 0603 0603 0402 0402 0402 0402 0805LP
COMMON COMMON COMMON COMMON COMMON COMMON COMMON DNI
NVIDIA CORPORATION
GND 2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MEMORY: FBA[63:32]
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 6 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
M5C
M5B @memory.u_mem_sd_ddr5_x32(sym_7):page7_i381
@memory.u_mem_sd_ddr5_x32(sym_5):page7_i380 BGA170_MIRR
BGA170_MIRR
COMMON FBVDDQ
COMMON
Mirrored
M5D M5A FBB_MF1_A R636 1k FBVDDQ
FBB_CMD<3>
4 L3 RAS SOE*/MF_VDD J1
@memory.u_mem_sd_ddr5_x32(sym_2):page7_i378 @memory.u_mem_sd_ddr5_x32(sym_4):page7_i379 Fbb_Cmd<3> 3
BGA170_MIRR BGA170_MIRR FBB_CMD<0>
4 G3 CAS add 1k to VDD 0402 1% COMMON
Fbb_Cmd<0> 0
COMMON COMMON FBB_CMD<10>
4 G12 WE B10 VSS VDD C10
Fbb_Cmd<10> 10
FBB_CMD<15>
4 L12 CS B5 VSS VDD C5
MIRRORED MIRRORED Fbb_Cmd<15> 15
2
D10 VSS VDD D11 2
x32 x16 x32 x16 FBB_CMD<7>
4 J4 ABI G10 VSS VDD G1
FBB_D<0> FBB_D<16> Fbb_Cmd<7> 7
4 V4 DQ0 4 A11 DQ16 FBVDDQ G5 VSS VDD G11
Fbb_D<0> 0
FBB_D<1>
NC Fbb_D<16> 16
FBB_D<17>
NC
4 V2 DQ1 4 A13 DQ17 FBB_CMD<5>
4 K4 A0_A10 H1 VSS VDD G14
Fbb_D<1> 1
FBB_D<2>
NC Fbb_D<17> 17
FBB_D<18>
NC Fbb_Cmd<5> 5
4 T4 DQ2 4 B11 DQ18 FBB_CMD<4>
4 K5 A1_A9 H14 VSS VDD G4
Fbb_D<2> 2
FBB_D<3>
NC Fbb_D<18> 18
FBB_D<19>
NC Fbb_Cmd<4> 4
4 T2 DQ3 4 B13 DQ19 FBB_CMD<13>
4 K11 A2_BA0 K1 VSS VDD L1
Fbb_D<3> 3
FBB_D<4>
NC Fbb_D<19> 19
FBB_D<20>
NC R100 Fbb_Cmd<13> 13
4 N4 DQ4 4 E11 DQ20 FBB_CMD<14>
4 K10 A3_BA3 K14 VSS VDD L11
Fbb_D<4> 4
FBB_D<5>
NC Fbb_D<20> 20
FBB_D<21>
NC 549ohm Fbb_Cmd<14> 14
4 N2 DQ5 4 E13 DQ21 FBB_CMD<12>
4 H11 A4_BA2 L10 VSS VDD L14
Fbb_D<5> 5
FBB_D<6>
NC Fbb_D<21> 21
FBB_D<22>
NC 1% Fbb_Cmd<12> 12
FBVDDQ
4 M4 DQ6 4 F11 DQ22 FBB_CMD<11>
4 H10 A5_BA1 L5 VSS VDD L4
Fbb_D<6> 6
FBB_D<7>
NC Fbb_D<22> 22
FBB_D<23>
NC 0402 Fbb_Cmd<11> 11
4 M2 DQ7 4 F13 DQ23 COMMON FBB_CMD<8>
4 H5 A6_A11 P10 VSS VDD P11
Fbb_D<7> 7 NC Fbb_D<23> 23 NC Fbb_Cmd<8> 8
FBB_CMD<9>
4 H4 A7_A8 T10 VSS VDD R10
FBB_EDC<0> FBB_EDC<2> FBB_VREFD Fbb_Cmd<9> 9
4 R2 EDC0 4 C13 EDC2 8 FBB_CMD<6>
4 J5 RFU_A12 T5 VSS VDD R5
BI
FBB_DBI<0>
NC BI
FBB_DBI<2>
GND OUT Fbb_Cmd<6> 6
4 P2 DBI0 NC 4 D13 DBI2 NC
BI BI
A1 VSSQ VDDQ B1
1.05V 0.140A A12 VSSQ VDDQ B12
V10 FBB_VREFD A10 A14 B14
VREFD VREFD VSSQ VDDQ
FBB_D<8> V11 FBB_D<24> A4 R99 A3 B3
4 Fbb_D<8> 8 DQ8 4 Fbb_D<24> 24 DQ24 931ohm VSSQ VDDQ
FBB_D<9> V13 FBB_D<25> A2 FBB_CMD<2> J2 C1 D1
4 Fbb_D<9> 9 DQ9 4 Fbb_D<25> 25 DQ25 Fbb_Cmd<2> 2 4 RESET VSSQ VDDQ
FBB_D<10> T11 FBB_D<26> B4 C644 R101 1%
FBB_CMD<1> J3 C11 D12
4 Fbb_D<10> 10 DQ10 4 Fbb_D<26> 26 DQ26 820pF 1.33k 0402 Fbb_Cmd<1> 1 4 CKE VSSQ VDDQ
FBB_D<11> T13 FBB_D<27> B2 C12 D14
4 Fbb_D<11> 11 DQ11 4 Fbb_D<27> 27 DQ27 50V 1%
COMMON VSSQ VDDQ
FBB_D<12> N11 FBB_D<28> E4 FBB_CLK0 J12 C14 D3
4 Fbb_D<12> 12 DQ12 4 Fbb_D<28> 28 DQ28 10% 0402 4 IN CLK VSSQ VDDQ
FBB_D<13> N13 FBB_D<29> E2 FBB_CLK0* J11 C3 E10
4 Fbb_D<13> 13 DQ13 4 Fbb_D<29> 29 DQ29 X7R COMMON 4 IN CLK VSSQ VDDQ
FBB_D<14> M11 FBB_D<30> F4 0402 C4 E5
4 Fbb_D<14> 14 DQ14 4 Fbb_D<30> 30 DQ30 VSSQ VDDQ
FBB_D<15> M13 FBB_D<31> F2 COMMON R626 R627 E1 F1
4 Fbb_D<15> 15 DQ15 4 Fbb_D<31> 31 DQ31 40.2ohm 40.2ohm VSSQ VDDQ
E12 VSSQ VDDQ F12
FBB_EDC<1> FBB_EDC<3> 1% 1%
4 R13 EDC1 4 C2 EDC3 0402 0402
E14 VSSQ VDDQ F14
BI BI
FBB_DBI<1> P13 FBB_DBI<3> D2 GND GND E3 F3
4 BI DBI1 4 BI DBI3 COMMON COMMON VSSQ VDDQ
F10 VSSQ VDDQ G13
FBB_WCK01 P4 FBB_WCK23 D4 FBB_CLK0_RC F5 G2
4 IN WCK01 4 IN WCK23 VSSQ VDDQ
FBB_WCK01* P5 FBB_WCK23* D5 H13 H12
4 IN WCK01 4 IN WCK23 C632 VSSQ VDDQ
3
A5 NC_RFU_A5 H2 VSSQ VDDQ H3 3
10nF
1.05V V5 NC_RFU_V5 K13 VSSQ VDDQ K12
16V
1G1D1S 3 0.350 K2 VSSQ VDDQ K3
D 10%
Q16 FBVDDQ X7R M10 VSSQ VDDQ L13
@discrete.q_fet_n_enh(sym_2):page7_i328 0402 M5 VSSQ VDDQ L2
SOT23_1G1D1S
5,10,12,23
GPIO10_FBVREF_SEL 1G COMMON
COMMON N1 VSSQ VDDQ M1
IN R85
S 2 N12 VSSQ VDDQ M12
549ohm
60V GND N14 VSSQ VDDQ M14
0.26A 1%
3000mohm@10V / [email protected] / [email protected]
0402 8 N3 VSSQ VDDQ M3
0.31A OUT
0.3W COMMON R1 VSSQ VDDQ N10
20V
R11 VSSQ VDDQ N5
0.350 1.05V R12 VSSQ VDDQ P1
FBB_VREFC J14 R14 P12
VREFC VSSQ VDDQ
GND R3 VSSQ VDDQ P14
R625 121ohm FBB_ZQ_1_B J13 R4 P3
R86 R91 C104 ZQ VSSQ VDDQ
0402 1% COMMON V1 VSSQ VDDQ T1
1.33k 931ohm 820pF R628 1k FBB_SEN_1 J10 SEN V12 VSSQ VDDQ T12
1% 1% 50V
0402 0402
0402 1% COMMON V14 VSSQ VDDQ T14
10%
COMMON COMMON X7R V3 VSSQ VDDQ T3
0402
COMMON
GND GND
FBB_VREF_Q
GND
GND
4 4
FBVDDQ
GND
FBVDDQ
MICRO-STAR INT'L CO.,LTD
C635 C107 C98 C106 C99 C105 C103 C914
MS-V317
5 10uF 4.7uF 4.7uF 1uF 1uF 1uF 1uF 47uF
MSI 5
Size Document Description Rev
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V
Custom 7: MEMORY: FBB Partition 31..0 1.0
20% 20% 20% 10% 10% 10% 10% 20%
X5R X5R X5R X5R X5R X5R X5R X5R
0805LP 0603 0603 0402 0402 0402 0402 0805LP Date: Wednesday, August 20, 2014 Sheet 07 of 37
COMMON COMMON COMMON COMMON COMMON COMMON COMMON DNI
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
GND ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MEMORY: FBB[31:0]
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 7 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
M6C
M6B @memory.u_mem_sd_ddr5_x32(sym_6):page8_i109
@memory.u_mem_sd_ddr5_x32(sym_5):page8_i55 BGA170
COMMON
BGA170
COMMON FBVDDQ
Normal
FBB_CMD<19> G3 RAS R601 1k FBB_MF2_A J1 MF_VSS/SOE*
Fbb_Cmd<19> 19 4
FBB_CMD<16>
4 L3 CAS 0402 1% COMMON add 1k to VSS
Fbb_Cmd<16> 16
FBB_CMD<26>
4 L12 WE B10 VSS VDD C10
Fbb_Cmd<26> 26
FBB_CMD<31>
4 G12 CS B5 VSS VDD C5
Fbb_Cmd<31> 31
D10 VSS VDD D11
FBB_CMD<23>
4 J4 ABI G10 VSS VDD G1
Fbb_Cmd<23> 23
G5 VSS VDD G11
FBB_CMD<21>
4 H4 A0_A10 H1 VSS VDD G14
Fbb_Cmd<21> 21
2
FBB_CMD<20>
4 H5 A1_A9 H14 VSS VDD G4 2
Fbb_Cmd<20> 20
FBB_CMD<29>
4 H11 A2_BA0 K1 VSS VDD L1
M6D M6A Fbb_Cmd<29> 29
FBB_CMD<30>
4 H10 A3_BA3 K14 VSS VDD L11
@memory.u_mem_sd_ddr5_x32(sym_1):page8_i11 @memory.u_mem_sd_ddr5_x32(sym_3):page8_i51 Fbb_Cmd<30> 30
BGA170 BGA170 FBB_CMD<28>
4 K11 A4_BA2 L10 VSS VDD L14
Fbb_Cmd<28> 28
COMMON COMMON FBB_CMD<27>
4 K10 A5_BA1 L5 VSS VDD L4
Fbb_Cmd<27> 27
FBB_CMD<24>
4 K5 A6_A11 P10 VSS VDD P11 FBVDDQ
NORMAL NORMAL Fbb_Cmd<24> 24
FBB_CMD<25> K4 T10 R10
Fbb_Cmd<25> 25 4 A7_A8 VSS VDD
FBB_D<32> A4 FBB_D<48> V11 FBB_CMD<22> J5 T5 R5
4 Fbb_D<32> 32 DQ0 4 Fbb_D<48> 48 DQ16 Fbb_Cmd<22> 22 4 RFU_A12 VSS VDD
FBB_D<33> A2 FBB_D<49> V13
4 Fbb_D<33> 33 DQ1 4 Fbb_D<49> 49 DQ17
FBB_D<34> B4 FBB_D<50> T11 A1 B1
4 Fbb_D<34> 34 DQ2 4 Fbb_D<50> 50 DQ18 VSSQ VDDQ
FBB_D<35> B2 FBB_D<51> T13 A12 B12
4 Fbb_D<35> 35 DQ3 4 Fbb_D<51> 51 DQ19 VSSQ VDDQ
FBB_D<36> E4 FBB_D<52> N11 A14 B14
4 Fbb_D<36> 36 DQ4 4 Fbb_D<52> 52 DQ20 VSSQ VDDQ
FBB_D<37> E2 FBB_D<53> N13 A3 B3
4 Fbb_D<37> 37 DQ5 4 Fbb_D<53> 53 DQ21 VSSQ VDDQ
FBB_D<38> F4 FBB_D<54> M11 FBB_CMD<18> J2 C1 D1
4 Fbb_D<38> 38 DQ6 4 Fbb_D<54> 54 DQ22 Fbb_Cmd<18> 18 4 RESET VSSQ VDDQ
FBB_D<39> F2 FBB_D<55> M13 FBB_CMD<17> J3 C11 D12
4 Fbb_D<39> 39 DQ7 4 Fbb_D<55> 55 DQ23 Fbb_Cmd<17> 17 4 CKE VSSQ VDDQ
C12 VSSQ VDDQ D14
FBB_EDC<4> C2 FBB_EDC<6> R13 FBB_CLK1 J12 C14 D3
4 BI EDC0 4 BI EDC2 4 IN CLK VSSQ VDDQ
FBB_DBI<4> D2 FBB_DBI<6> P13 FBB_CLK1* J11 C3 E10
4 BI DBI0 4 BI DBI2 4 IN CLK VSSQ VDDQ
A10 FBB_VREFD V10 FBB_VREFD C4 E5
VREFD IN 07 VREFD VSSQ VDDQ
E1 VSSQ VDDQ F1
x32 x16 x32 x16 R612 R609 E12 F12
40.2ohm 40.2ohm VSSQ VDDQ
FBB_D<40> A11 FBB_D<56> V4 C136 E14 F14
4 Fbb_D<40> 40 DQ8 NC 4 Fbb_D<56> 56 DQ24 NC 820pF 1% 1%
VSSQ VDDQ
FBB_D<41> A13 FBB_D<57> V2 E3 F3
4 Fbb_D<41> 41 DQ9 NC 4 Fbb_D<57> 57 DQ25 NC 50V 0402 0402 VSSQ VDDQ
FBB_D<42> B11 FBB_D<58> T4 F10 G13
4 Fbb_D<42> 42 DQ10 NC 4 Fbb_D<58> 58 DQ26 NC 10%
COMMON COMMON VSSQ VDDQ
FBB_D<43> B13 FBB_D<59> T2 F5 G2
4 Fbb_D<43> 43 DQ11 NC 4 Fbb_D<59> 59 DQ27 NC X7R VSSQ VDDQ
FBB_D<44> E11 FBB_D<60> N4 0402 FBB_CLK1_CM H13 H12
4 Fbb_D<44> 44 DQ12 NC 4 Fbb_D<60> 60 DQ28 NC VSSQ VDDQ
FBB_D<45> E13 FBB_D<61> N2 COMMON A5 H2 H3
4 Fbb_D<45> 45 DQ13 NC 4 Fbb_D<61> 61 DQ29 NC NC_RFU_A5 VSSQ VDDQ
FBB_D<46> F11 FBB_D<62> M4 V5 K13 K12
4 Fbb_D<46> 46 DQ14 NC 4 Fbb_D<62> 62 DQ30 NC NC_RFU_V5 VSSQ VDDQ
FBB_D<47> F13 FBB_D<63> M2 C607 K2 K3
4 Fbb_D<47> 47 DQ15 NC 4 Fbb_D<63> 63 DQ31 NC 10nF VSSQ VDDQ
GND M10 VSSQ VDDQ L13
FBB_EDC<5> FBB_EDC<7> 16V
3 4 C13 EDC1 GND 4 R2 EDC3 NC
M5 VSSQ VDDQ L2 3
BI BI 10%
FBB_DBI<5> D13 FBB_DBI<7> P2 N1 M1
4 BI DBI1 NC 4 BI DBI3 NC X7R VSSQ VDDQ
0402 N12 VSSQ VDDQ M12
FBB_WCK45 D4 FBB_WCK67 P4 COMMON N14 M14
4 IN WCK01 4 IN WCK23 VSSQ VDDQ
FBB_WCK45* D5 FBB_WCK67* P5 N3 M3
4 IN WCK01 4 IN WCK23 VSSQ VDDQ
R1 VSSQ VDDQ N10
GND R11 VSSQ VDDQ N5
R12 VSSQ VDDQ P1
FBB_VREFC J14 R14 P12
07 IN VREFC VSSQ VDDQ
R3 VSSQ VDDQ P14
R603 121ohm FBB_ZQ_2B J13 ZQ R4 VSSQ VDDQ P3
C118 0402 COMMON V1 T1
1% VSSQ VDDQ
820pF R592 1k FBB_SEN_2 J10 SEN V12 VSSQ VDDQ T12
50V
0402 1% COMMON V14 VSSQ VDDQ T14
10%
X7R V3 VSSQ VDDQ T3
0402
COMMON
GND GND
GND
4 4
FBVDDQ
FBVDDQ
GND
MICRO-STAR INT'L CO.,LTD
MS-V317
C585 C131 C134 C111 C114 C122 C128 C913
MSI
Size Document Description Rev
10uF 4.7uF 4.7uF 1uF 1uF 1uF 1uF 47uF
5
Custom MEMORY: FBB Partition 63..32 1.0 5
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V
20% 20% 20% 10% 10% 10% 10% 20%
X5R X5R X5R X5R X5R X5R X5R X5R Date: Wednesday, August 20, 2014 Sheet 8 of 37
0805LP 0603 0603 0402 0402 0402 0402 0805LP
COMMON COMMON COMMON COMMON COMMON COMMON COMMON DNI
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
GND
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MEMORY: FBB[63:32]
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 8 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
FBC_CMD<2> FBD_CMD<2>
FBC_CMD<18> FBD_CMD<18>
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MEMORY: GPU Partition C/D
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 9 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
M3C
M3B @memory.u_mem_sd_ddr5_x32(sym_7):page10_i381
BGA170_MIRR FBVDDQ
@memory.u_mem_sd_ddr5_x32(sym_5):page10_i380
COMMON
BGA170_MIRR
COMMON FBVDDQ
Mirrored
M3D M3A FBC_MF1_A R673 1k
FBC_CMD<3>
09 L3 RAS SOE*/MF_VDD J1
@memory.u_mem_sd_ddr5_x32(sym_2):page10_i378 @memory.u_mem_sd_ddr5_x32(sym_4):page10_i379 Fbc_Cmd<3> 3
BGA170_MIRR BGA170_MIRR FBC_CMD<0>
09 G3 CAS add 1k to VDD 0402 1% COMMON
Fbc_Cmd<0> 0
COMMON COMMON FBC_CMD<10>
09 G12 WE B10 VSS VDD C10
Fbc_Cmd<10> 10
FBC_CMD<15>
09 L12 CS B5 VSS VDD C5
MIRRORED MIRRORED Fbc_Cmd<15> 15
D10 VSS VDD D11
x32 x16 x32 x16 FBC_CMD<7> J4 ABI G10 VSS VDD G1
2 FBC_D<0> FBC_D<16> Fbc_Cmd<7> 7 09 2
09 V4 DQ0 09 A11 DQ16 FBVDDQ G5 VSS VDD G11
Fbc_D<0> 0
FBC_D<1>
NC Fbc_D<16> 16
FBC_D<17>
NC
09 V2 DQ1 09 A13 DQ17 FBC_CMD<5>
09 K4 A0_A10 H1 VSS VDD G14
Fbc_D<1> 1
FBC_D<2>
NC Fbc_D<17> 17
FBC_D<18>
NC Fbc_Cmd<5> 5
09 T4 DQ2 09 B11 DQ18 FBC_CMD<4>
09 K5 A1_A9 H14 VSS VDD G4
Fbc_D<2> 2
FBC_D<3>
NC Fbc_D<18> 18
FBC_D<19>
NC Fbc_Cmd<4> 4
09 T2 DQ3 09 B13 DQ19 FBC_CMD<13>
09 K11 A2_BA0 K1 VSS VDD L1
Fbc_D<3> 3
FBC_D<4>
NC Fbc_D<19> 19
FBC_D<20>
NC R82 Fbc_Cmd<13> 13
09 N4 DQ4 09 E11 DQ20 FBC_CMD<14>
09 K10 A3_BA3 K14 VSS VDD L11
Fbc_D<4> 4
FBC_D<5>
NC Fbc_D<20> 20
FBC_D<21>
NC 549ohm Fbc_Cmd<14> 14
09 N2 DQ5 09 E13 DQ21 FBC_CMD<12>
09 H11 A4_BA2 L10 VSS VDD L14
Fbc_D<5> 5
FBC_D<6>
NC Fbc_D<21> 21
FBC_D<22>
NC 1% Fbc_Cmd<12> 12
FBVDDQ
09 M4 DQ6 09 F11 DQ22 FBC_CMD<11>
09 H10 A5_BA1 L5 VSS VDD L4
Fbc_D<6> 6
FBC_D<7>
NC Fbc_D<22> 22
FBC_D<23>
NC 0402 Fbc_Cmd<11> 11
09 M2 DQ7 09 F13 DQ23 COMMON FBC_CMD<8>
09 H5 A6_A11 P10 VSS VDD P11
Fbc_D<7> 7 NC Fbc_D<23> 23 NC Fbc_Cmd<8> 8
FBC_CMD<9>
09 H4 A7_A8 T10 VSS VDD R10
FBC_EDC<0> FBC_EDC<2> FBC_VREFD Fbc_Cmd<9> 9
09 R2 EDC0 09 C13 EDC2 11 FBC_CMD<6>
09 J5 RFU_A12 T5 VSS VDD R5
BI
FBC_DBI<0>
NC BI
FBC_DBI<2>
GND OUT Fbc_Cmd<6> 6
09 P2 DBI0 NC 09 D13 DBI2 NC
BI BI
A1 VSSQ VDDQ B1
1.05V 0.140A A12 VSSQ VDDQ B12
V10 FBC_VREFD A10 A14 B14
VREFD VREFD R81 VSSQ VDDQ
FBC_D<8> V11 FBC_D<24> A4 A3 B3
09 Fbc_D<8> 8 DQ8 09 Fbc_D<24> 24 DQ24 931ohm VSSQ VDDQ
FBC_D<9> V13 FBC_D<25> A2 FBC_CMD<2> J2 C1 D1
09 Fbc_D<9> 9 DQ9 09 Fbc_D<25> 25 DQ25 C76 R84 1% Fbc_Cmd<2> 2 09 RESET VSSQ VDDQ
FBC_D<10> T11 FBC_D<26> B4 FBC_CMD<1> J3 C11 D12
09 Fbc_D<10> 10 DQ10 09 Fbc_D<26> 26 DQ26 820pF 1.33k 0402 Fbc_Cmd<1> 1 09 CKE VSSQ VDDQ
FBC_D<11> T13 FBC_D<27> B2 C12 D14
09 Fbc_D<11> 11 DQ11 09 Fbc_D<27> 27 DQ27 50V 1%
COMMON VSSQ VDDQ
FBC_D<12> N11 FBC_D<28> E4 FBC_CLK0 J12 C14 D3
09 Fbc_D<12> 12 DQ12 09 Fbc_D<28> 28 DQ28 10% 0402 09 IN CLK VSSQ VDDQ
FBC_D<13> N13 FBC_D<29> E2 FBC_CLK0* J11 C3 E10
09 Fbc_D<13> 13 DQ13 09 Fbc_D<29> 29 DQ29 X7R COMMON 09 IN CLK VSSQ VDDQ
FBC_D<14> M11 FBC_D<30> F4 0402 C4 E5
09 Fbc_D<14> 14 DQ14 09 Fbc_D<30> 30 DQ30 R658 R659 VSSQ VDDQ
FBC_D<15> M13 FBC_D<31> F2 COMMON E1 F1
09 Fbc_D<15> 15 DQ15 09 Fbc_D<31> 31 DQ31 40.2ohm 40.2ohm VSSQ VDDQ
E12 VSSQ VDDQ F12
FBC_EDC<1> FBC_EDC<3> 1% 1%
09 R13 EDC1 09 C2 EDC3 0402 0402
E14 VSSQ VDDQ F14
BI BI
FBC_DBI<1> P13 FBC_DBI<3> D2 GND GND E3 F3
09 BI DBI1 09 BI DBI3 COMMON COMMON VSSQ VDDQ
F10 VSSQ VDDQ G13
FBC_WCK01 P4 FBC_WCK23 D4 FBC_CLK0_RC F5 G2
09 IN WCK01 09 IN WCK23 VSSQ VDDQ
FBC_WCK01* P5 FBC_WCK23* D5 H13 H12
09 IN WCK01 09 IN WCK23 C772 VSSQ VDDQ
A5 NC_RFU_A5 H2 VSSQ VDDQ H3
10nF
3 1.05V V5 NC_RFU_V5 K13 VSSQ VDDQ K12 3
16V
1G1D1S 3 0.350 K2 VSSQ VDDQ K3
D 10%
Q14 FBVDDQ X7R M10 VSSQ VDDQ L13
@discrete.q_fet_n_enh(sym_2):page10_i328 0402 M5 VSSQ VDDQ L2
SOT23_1G1D1S
5,07,12,23
GPIO10_FBVREF_SEL 1G COMMON
COMMON N1 VSSQ VDDQ M1
IN R77
S 2 N12 VSSQ VDDQ M12
549ohm
60V GND N14 VSSQ VDDQ M14
0.26A 1%
3000mohm@10V / [email protected] / [email protected]
0402 11 N3 VSSQ VDDQ M3
0.31A OUT
0.3W COMMON R1 VSSQ VDDQ N10
20V
R11 VSSQ VDDQ N5
0.350 1.05V R12 VSSQ VDDQ P1
FBC_VREFC J14 R14 P12
VREFC VSSQ VDDQ
GND R3 VSSQ VDDQ P14
R657 121ohm FBC_ZQ_1_B J13 R4 P3
R78 R79 C88 ZQ VSSQ VDDQ
0402 1% COMMON V1 VSSQ VDDQ T1
1.33k 931ohm 820pF R660 1k FBC_SEN_1 J10 SEN V12 VSSQ VDDQ T12
1% 1% 50V
0402 0402
0402 1% COMMON V14 VSSQ VDDQ T14
10%
COMMON COMMON X7R V3 VSSQ VDDQ T3
0402
COMMON
GND GND
FBC_VREF_Q
GND
GND
4 4
FBVDDQ
GND
MICRO-STAR INT'L CO.,LTD
FBVDDQ
MS-V317
MSI
Size Document Description Rev
C799 C83 C74 C81 C82 C79 C75 C912
5
Custom 10: MEMORY: FBC Partition 31..0 1.0 5
10uF 4.7uF 4.7uF 1uF 1uF 1uF 1uF 47uF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V
20% 20%
Date: Wednesday, August 20, 2014 Sheet 10 of 37
20% 10% 10% 10% 10% 20%
X5R X5R X5R X5R X5R X5R X5R X5R
0805LP 0603 0603 0402 0402 0402 0402 0805LP
COMMON COMMON COMMON COMMON COMMON COMMON COMMON DNI
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
GND ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MEMORY: FBC[31:0]
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 10 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
M4C
M4B @memory.u_mem_sd_ddr5_x32(sym_6):page11_i109
@memory.u_mem_sd_ddr5_x32(sym_5):page11_i55 BGA170
COMMON
BGA170
COMMON FBVDDQ
Normal
FBC_CMD<19> G3 R638 1k FBC_MF2_A J1
Fbc_Cmd<19> 19 09 RAS MF_VSS/SOE*
FBC_CMD<16>
09 L3 CAS 0402 1% COMMON add 1k to VSS
Fbc_Cmd<16> 16
FBC_CMD<26>
09 L12 WE B10 VSS VDD C10
Fbc_Cmd<26> 26
FBC_CMD<31>
09 G12 CS B5 VSS VDD C5
Fbc_Cmd<31> 31
D10 VSS VDD D11
FBC_CMD<23>
09 J4 ABI G10 VSS VDD G1
Fbc_Cmd<23> 23
G5 VSS VDD G11
FBC_CMD<21>
09 H4 A0_A10 H1 VSS VDD G14
Fbc_Cmd<21> 21
FBC_CMD<20>
09 H5 A1_A9 H14 VSS VDD G4
Fbc_Cmd<20> 20
2
FBC_CMD<29>
09 H11 A2_BA0 K1 VSS VDD L1 2
Fbc_Cmd<29> 29
FBC_CMD<30>
09 H10 A3_BA3 K14 VSS VDD L11
Fbc_Cmd<30> 30
FBC_CMD<28>
09 K11 A4_BA2 L10 VSS VDD L14
M4D M4A Fbc_Cmd<28> 28
FBC_CMD<27>
09 K10 A5_BA1 L5 VSS VDD L4
@memory.u_mem_sd_ddr5_x32(sym_1):page11_i11 @memory.u_mem_sd_ddr5_x32(sym_3):page11_i51 Fbc_Cmd<27> 27
BGA170 BGA170 FBC_CMD<24>
09 K5 A6_A11 P10 VSS VDD P11 FBVDDQ
Fbc_Cmd<24> 24
COMMON COMMON FBC_CMD<25>
09 K4 A7_A8 T10 VSS VDD R10
Fbc_Cmd<25> 25
FBC_CMD<22>
09 J5 RFU_A12 T5 VSS VDD R5
NORMAL NORMAL Fbc_Cmd<22> 22
GND GND
GND
4 4
FBVDDQ
GND ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MEMORY: FBC[63:32]
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 11 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
M2C
M2B @memory.u_mem_sd_ddr5_x32(sym_7):page12_i381
BGA170_MIRR FBVDDQ
@memory.u_mem_sd_ddr5_x32(sym_5):page12_i380
COMMON
BGA170_MIRR
COMMON
Mirrored
M2D M2A FBD_MF1_A R705 1k FBVDDQ
FBD_CMD<3>
09 L3 RAS SOE*/MF_VDD J1
@memory.u_mem_sd_ddr5_x32(sym_2):page12_i378 @memory.u_mem_sd_ddr5_x32(sym_4):page12_i379 Fbd_Cmd<3> 3
BGA170_MIRR BGA170_MIRR FBD_CMD<0>
09 G3 CAS add 1k to VDD 0402 1% COMMON
Fbd_Cmd<0> 0
COMMON COMMON FBD_CMD<10>
09 G12 WE B10 VSS VDD C10
Fbd_Cmd<10> 10
FBD_CMD<15>
09 L12 CS B5 VSS VDD C5
MIRRORED MIRRORED Fbd_Cmd<15> 15
D10 VSS VDD D11
x32 x16 x32 x16 FBD_CMD<7>
09 J4 ABI G10 VSS VDD G1
FBD_D<0> FBD_D<16> Fbd_Cmd<7> 7
2 09 V4 DQ0 09 A11 DQ16 FBVDDQ G5 VSS VDD G11 2
Fbd_D<0> 0
FBD_D<1>
NC Fbd_D<16> 16
FBD_D<17>
NC
09 V2 DQ1 09 A13 DQ17 FBD_CMD<5>
09 K4 A0_A10 H1 VSS VDD G14
Fbd_D<1> 1
FBD_D<2>
NC Fbd_D<17> 17
FBD_D<18>
NC Fbd_Cmd<5> 5
09 T4 DQ2 09 B11 DQ18 FBD_CMD<4>
09 K5 A1_A9 H14 VSS VDD G4
Fbd_D<2> 2
FBD_D<3>
NC Fbd_D<18> 18
FBD_D<19>
NC Fbd_Cmd<4> 4
09 T2 DQ3 09 B13 DQ19 FBD_CMD<13>
09 K11 A2_BA0 K1 VSS VDD L1
Fbd_D<3> 3
FBD_D<4>
NC Fbd_D<19> 19
FBD_D<20>
NC R58 Fbd_Cmd<13> 13
09 N4 DQ4 09 E11 DQ20 FBD_CMD<14>
09 K10 A3_BA3 K14 VSS VDD L11
Fbd_D<4> 4
FBD_D<5>
NC Fbd_D<20> 20
FBD_D<21>
NC 549ohm Fbd_Cmd<14> 14
09 N2 DQ5 09 E13 DQ21 FBD_CMD<12>
09 H11 A4_BA2 L10 VSS VDD L14
Fbd_D<5> 5
FBD_D<6>
NC Fbd_D<21> 21
FBD_D<22>
NC 1% Fbd_Cmd<12> 12
FBVDDQ
09 M4 DQ6 09 F11 DQ22 FBD_CMD<11>
09 H10 A5_BA1 L5 VSS VDD L4
Fbd_D<6> 6
FBD_D<7>
NC Fbd_D<22> 22
FBD_D<23>
NC 0402 Fbd_Cmd<11> 11
09 M2 DQ7 09 F13 DQ23 COMMON FBD_CMD<8>
09 H5 A6_A11 P10 VSS VDD P11
Fbd_D<7> 7 NC Fbd_D<23> 23 NC Fbd_Cmd<8> 8
FBD_CMD<9>
09 H4 A7_A8 T10 VSS VDD R10
FBD_EDC<0> FBD_EDC<2> FBD_VREFD Fbd_Cmd<9> 9
09 R2 EDC0 09 C13 EDC2 13 FBD_CMD<6>
09 J5 RFU_A12 T5 VSS VDD R5
BI
FBD_DBI<0>
NC BI
FBD_DBI<2>
GND OUT Fbd_Cmd<6> 6
09 P2 DBI0 NC 09 D13 DBI2 NC
BI BI
A1 VSSQ VDDQ B1
1.05V 0.140A A12 VSSQ VDDQ B12
V10 FBD_VREFD A10 A14 B14
VREFD VREFD R59 VSSQ VDDQ
FBD_D<8> V11 FBD_D<24> A4 A3 B3
09 Fbd_D<8> 8 DQ8 09 Fbd_D<24> 24 DQ24 931ohm VSSQ VDDQ
FBD_D<9> V13 FBD_D<25> A2 FBD_CMD<2> J2 C1 D1
09 Fbd_D<9> 9 DQ9 09 Fbd_D<25> 25 DQ25 Fbd_Cmd<2> 2 09 RESET VSSQ VDDQ
FBD_D<10> T11 FBD_D<26> B4 C55 R57 1%
FBD_CMD<1> J3 C11 D12
09 Fbd_D<10> 10 DQ10 09 Fbd_D<26> 26 DQ26 820pF 1.33k 0402 Fbd_Cmd<1> 1 09 CKE VSSQ VDDQ
FBD_D<11> T13 FBD_D<27> B2 C12 D14
09 Fbd_D<11> 11 DQ11 09 Fbd_D<27> 27 DQ27 50V 1%
COMMON VSSQ VDDQ
FBD_D<12> N11 FBD_D<28> E4 FBD_CLK0 J12 C14 D3
09 Fbd_D<12> 12 DQ12 09 Fbd_D<28> 28 DQ28 10% 0402 09 IN CLK VSSQ VDDQ
FBD_D<13> N13 FBD_D<29> E2 FBD_CLK0* J11 C3 E10
09 Fbd_D<13> 13 DQ13 09 Fbd_D<29> 29 DQ29 X7R COMMON 09 IN CLK VSSQ VDDQ
FBD_D<14> M11 FBD_D<30> F4 0402 C4 E5
09 Fbd_D<14> 14 DQ14 09 Fbd_D<30> 30 DQ30 VSSQ VDDQ
FBD_D<15> M13 FBD_D<31> F2 COMMON R694 R692 E1 F1
09 Fbd_D<15> 15 DQ15 09 Fbd_D<31> 31 DQ31 40.2ohm 40.2ohm VSSQ VDDQ
E12 VSSQ VDDQ F12
FBD_EDC<1> FBD_EDC<3> 1% 1%
09 R13 EDC1 09 C2 EDC3 0402 0402
E14 VSSQ VDDQ F14
BI BI
FBD_DBI<1> P13 FBD_DBI<3> D2 GND GND E3 F3
09 BI DBI1 09 BI DBI3 COMMON COMMON VSSQ VDDQ
F10 VSSQ VDDQ G13
FBD_WCK01 P4 FBD_WCK23 D4 FBD_CLK0_RC F5 G2
09 IN WCK01 09 IN WCK23 VSSQ VDDQ
FBD_WCK01* P5 FBD_WCK23* D5 H13 H12
09 IN WCK01 09 IN WCK23 VSSQ VDDQ
C844 A5 H2 H3
10nF NC_RFU_A5 VSSQ VDDQ
1.05V V5 NC_RFU_V5 K13 VSSQ VDDQ K12
16V
3 1G1D1S 3 0.350 K2 VSSQ VDDQ K3 3
D 10%
Q11 FBVDDQ X7R M10 VSSQ VDDQ L13
@discrete.q_fet_n_enh(sym_2):page12_i328 0402 M5 VSSQ VDDQ L2
SOT23_1G1D1S
5,07,10,23
GPIO10_FBVREF_SEL 1G COMMON
COMMON N1 VSSQ VDDQ M1
IN R70
S 2 N12 VSSQ VDDQ M12
549ohm
60V GND N14 VSSQ VDDQ M14
0.26A 1%
3000mohm@10V / [email protected] / [email protected]
0402 13 N3 VSSQ VDDQ M3
0.31A OUT
0.3W COMMON R1 VSSQ VDDQ N10
20V
R11 VSSQ VDDQ N5
0.350 1.05V R12 VSSQ VDDQ P1
FBD_VREFC J14 R14 P12
VREFC VSSQ VDDQ
GND R3 VSSQ VDDQ P14
R699 121ohm FBD_ZQ_1_B J13 R4 P3
ZQ VSSQ VDDQ
R71 R69 C68 0402 COMMON V1 T1
1% VSSQ VDDQ
1.33k 931ohm 820pF R713 1k FBD_SEN_1 J10 SEN V12 VSSQ VDDQ T12
1% 1% 50V
0402 0402
0402 1% COMMON V14 VSSQ VDDQ T14
10%
COMMON COMMON X7R V3 VSSQ VDDQ T3
0402
COMMON
GND GND
FBD_VREF_Q
GND
GND
4 4
FBVDDQ
GND ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MEMORY: FBD[31:0]
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 12 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
M1C
M1B @memory.u_mem_sd_ddr5_x32(sym_6):page13_i109
@memory.u_mem_sd_ddr5_x32(sym_5):page13_i55 BGA170
COMMON
BGA170
COMMON FBVDDQ
Normal
FBD_CMD<19> G3 R700 1k FBD_MF2_A J1
Fbd_Cmd<19> 19 09 RAS MF_VSS/SOE*
FBD_CMD<16>
09 L3 CAS 0402 1% COMMON add 1k to VSS
Fbd_Cmd<16> 16
FBD_CMD<26>
09 L12 WE B10 VSS VDD C10
Fbd_Cmd<26> 26
FBD_CMD<31>
09 G12 CS B5 VSS VDD C5
Fbd_Cmd<31> 31
D10 VSS VDD D11
FBD_CMD<23>
09 J4 ABI G10 VSS VDD G1
Fbd_Cmd<23> 23
G5 VSS VDD G11
FBD_CMD<21>
09 H4 A0_A10 H1 VSS VDD G14
Fbd_Cmd<21> 21
FBD_CMD<20>
09 H5 A1_A9 H14 VSS VDD G4
M1D M1A Fbd_Cmd<20> 20
2
FBD_CMD<29>
09 H11 A2_BA0 K1 VSS VDD L1 2
@memory.u_mem_sd_ddr5_x32(sym_1):page13_i11 @memory.u_mem_sd_ddr5_x32(sym_3):page13_i51 Fbd_Cmd<29> 29
BGA170 BGA170 FBD_CMD<30>
09 H10 A3_BA3 K14 VSS VDD L11
Fbd_Cmd<30> 30
COMMON COMMON FBD_CMD<28>
09 K11 A4_BA2 L10 VSS VDD L14
Fbd_Cmd<28> 28
FBD_CMD<27>
09 K10 A5_BA1 L5 VSS VDD L4
NORMAL NORMAL Fbd_Cmd<27> 27
FBD_CMD<24> K5 P10 P11
A6_A11 VSS VDD FBVDDQ
FBD_D<32> FBD_D<48> Fbd_Cmd<24> 24 09
09 A4 DQ0 09 V11 DQ16 FBD_CMD<25>
09 K4 A7_A8 T10 VSS VDD R10
Fbd_D<32> 32
FBD_D<33> Fbd_D<48> 48
FBD_D<49> Fbd_Cmd<25> 25
09 A2 DQ1 09 V13 DQ17 FBD_CMD<22>
09 J5 RFU_A12 T5 VSS VDD R5
Fbd_D<33> 33
FBD_D<34> Fbd_D<49> 49
FBD_D<50> Fbd_Cmd<22> 22
09 B4 DQ2 09 T11 DQ18
Fbd_D<34> 34
FBD_D<35> Fbd_D<50> 50
FBD_D<51>
09 B2 DQ3 09 T13 DQ19 A1 VSSQ VDDQ B1
Fbd_D<35> 35
FBD_D<36> Fbd_D<51> 51
FBD_D<52>
09 E4 DQ4 09 N11 DQ20 A12 VSSQ VDDQ B12
Fbd_D<36> 36
FBD_D<37> Fbd_D<52> 52
FBD_D<53>
09 E2 DQ5 09 N13 DQ21 A14 VSSQ VDDQ B14
Fbd_D<37> 37
FBD_D<38> Fbd_D<53> 53
FBD_D<54>
09 F4 DQ6 09 M11 DQ22 A3 VSSQ VDDQ B3
Fbd_D<38> 38
FBD_D<39> Fbd_D<54> 54
FBD_D<55>
09 F2 DQ7 09 M13 DQ23 FBD_CMD<18>
09 J2 RESET C1 VSSQ VDDQ D1
Fbd_D<39> 39 Fbd_D<55> 55 Fbd_Cmd<18> 18
FBD_CMD<17>
09 J3 CKE C11 VSSQ VDDQ D12
FBD_EDC<4> FBD_EDC<6> Fbd_Cmd<17> 17
09 C2 EDC0 09 R13 EDC2 C12 VSSQ VDDQ D14
BI BI
FBD_DBI<4> D2 FBD_DBI<6> P13 FBD_CLK1 J12 C14 D3
09 BI DBI0 09 BI DBI2 09 IN CLK VSSQ VDDQ
A10 FBD_VREFD V10 FBD_VREFD FBD_CLK1* J11 C3 E10
VREFD IN 12 VREFD 09 IN CLK VSSQ VDDQ
C4 VSSQ VDDQ E5
x32 x16 x32 x16 E1 VSSQ VDDQ F1
FBD_D<40> A11 FBD_D<56> V4 C54 R693 R695 E12 F12
09 Fbd_D<40> 40 DQ8 NC 09 Fbd_D<56> 56 DQ24 NC 820pF 40.2ohm 40.2ohm VSSQ VDDQ
FBD_D<41> A13 FBD_D<57> V2 E14 F14
09 Fbd_D<41> 41 DQ9 NC 09 Fbd_D<57> 57 DQ25 NC 50V 1% 1%
VSSQ VDDQ
FBD_D<42> B11 FBD_D<58> T4 E3 F3
09 Fbd_D<42> 42 DQ10 NC 09 Fbd_D<58> 58 DQ26 NC 10% 0402 0402 VSSQ VDDQ
FBD_D<43> B13 FBD_D<59> T2 F10 G13
09 Fbd_D<43> 43 DQ11 NC 09 Fbd_D<59> 59 DQ27 NC X7R COMMON COMMON VSSQ VDDQ
FBD_D<44> E11 FBD_D<60> N4 0402 F5 G2
09 Fbd_D<44> 44 DQ12 NC 09 Fbd_D<60> 60 DQ28 NC VSSQ VDDQ
FBD_D<45> E13 FBD_D<61> N2 COMMON FBD_CLK1_CM H13 H12
09 Fbd_D<45> 45 DQ13 NC 09 Fbd_D<61> 61 DQ29 NC VSSQ VDDQ
FBD_D<46> F11 FBD_D<62> M4 A5 H2 H3
09 Fbd_D<46> 46 DQ14 NC 09 Fbd_D<62> 62 DQ30 NC NC_RFU_A5 VSSQ VDDQ
FBD_D<47> F13 FBD_D<63> M2 V5 K13 K12
09 Fbd_D<47> 47 DQ15 NC 09 Fbd_D<63> 63 DQ31 NC C845 NC_RFU_V5 VSSQ VDDQ
GND K2 VSSQ VDDQ K3
FBD_EDC<5> FBD_EDC<7> 10nF
09 C13 EDC1 GND 09 R2 EDC3 NC
M10 VSSQ VDDQ L13
BI BI 16V
FBD_DBI<5> D13 FBD_DBI<7> P2 M5 L2
09 BI DBI1 NC 09 BI DBI3 NC 10% VSSQ VDDQ
3 X7R N1 VSSQ VDDQ M1 3
FBD_WCK45 D4 FBD_WCK67 P4 0402 N12 M12
09 IN WCK01 09 IN WCK23 VSSQ VDDQ
FBD_WCK45* D5 FBD_WCK67* P5 COMMON N14 M14
09 IN WCK01 09 IN WCK23 VSSQ VDDQ
N3 VSSQ VDDQ M3
R1 VSSQ VDDQ N10
GND R11 VSSQ VDDQ N5
R12 VSSQ VDDQ P1
FBD_VREFC J14 R14 P12
12 IN VREFC VSSQ VDDQ
R3 VSSQ VDDQ P14
R698 121ohm FBD_ZQ_2B J13 R4 P3
C67 ZQ VSSQ VDDQ
0402 1% COMMON V1 VSSQ VDDQ T1
820pF R712 1k FBD_SEN_2 J10 SEN V12 VSSQ VDDQ T12
50V
0402 1% COMMON V14 VSSQ VDDQ T14
10%
X7R V3 VSSQ VDDQ T3
0402
COMMON
GND GND
GND
4 4
FBVDDQ
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
GND
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MEMORY: FBD[63:32]
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 13 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
16/21 GND_1/2 17/21 GND_2/2 18/21 VDD_1/2 19/21 VDD_2/2 20/21 FBVDDQ
A2 GND GND AJ25 BB32 GND GND K2 AA14 VDD VDD AH31 BA39 VDD VDD BH48 AA39 FBVDDQ FBVDDQ J43
A3 GND GND AJ27 BB34 GND GND K4 AA16 VDD VDD AJ14 BA42 VDD VDD BH49 AC11 FBVDDQ FBVDDQ K24
A47 GND GND AJ29 BB35 GND GND K42 AA18 VDD VDD AJ16 BA43 VDD VDD BJ39 AD10 FBVDDQ FBVDDQ K26
1
A48 GND GND AJ31 BB36 GND GND K45 AA20 VDD VDD AJ18 BA44 VDD VDD BJ41 AD39 FBVDDQ FBVDDQ K29 1
AA15 GND GND AK14 BB8 GND GND K46 AA22 VDD VDD AJ20 BA45 VDD VDD BJ42 AF11 FBVDDQ FBVDDQ K30
AA17 GND GND AK16 BC2 GND GND K48 AA24 VDD VDD AJ22 BA46 VDD VDD BJ44 AF39 FBVDDQ FBVDDQ K32
AA19 GND GND AK18 BC4 GND GND K5 AA26 VDD VDD AJ24 BB37 VDD VDD BJ45 AG39 FBVDDQ FBVDDQ L14
AA21 GND GND AK20 BC48 GND GND K8 AA28 VDD VDD AJ26 BB38 VDD VDD BJ46 AK39 FBVDDQ FBVDDQ L15
AA23 GND GND AK22 BC5 GND GND L13 AA30 VDD VDD AJ28 BB39 VDD VDD BJ47 AM39 FBVDDQ FBVDDQ L17
AA25 GND GND AK24 BE10 GND GND L16 AA32 VDD VDD AJ30 BB40 VDD VDD BJ48 AM40 FBVDDQ FBVDDQ L18
AA27 GND GND AK26 BE13 GND GND L19 AB15 VDD VDD AJ32 BB41 VDD VDD P15 AN40 FBVDDQ FBVDDQ L20
AA29 GND GND AK28 BE16 GND GND L22 AB17 VDD VDD AK15 BB42 VDD VDD P17 B47 FBVDDQ FBVDDQ L23
AA31 GND GND AK30 BE19 GND GND L25 AB19 VDD VDD AK17 BB43 VDD VDD P19 C45 FBVDDQ FBVDDQ L24
AB11 GND GND AK32 BE2 GND GND L28 AB21 VDD VDD AK19 BB44 VDD VDD P21 C46 FBVDDQ FBVDDQ L27
AB14 GND GND AL11 BE21 GND GND L31 AB23 VDD VDD AK21 BB45 VDD VDD P23 C47 FBVDDQ FBVDDQ L29
AB16 GND GND AL15 BE24 GND GND L34 AB25 VDD VDD AK23 BB46 VDD VDD P25 D44 FBVDDQ FBVDDQ L30
AB18 GND GND AL17 BE27 GND GND L37 AB27 VDD VDD AK25 BB47 VDD VDD P27 D45 FBVDDQ FBVDDQ L32
AB2 GND GND AL19 BE30 GND GND N11 AB29 VDD VDD AK27 BC38 VDD VDD P29 D46 FBVDDQ FBVDDQ L33
AB20 GND GND AL2 BE33 GND GND N2 AB31 VDD VDD AK29 BC39 VDD VDD P31 E44 FBVDDQ FBVDDQ L35
AB22 GND GND AL21 BE36 GND GND N39 AC14 VDD VDD AK31 BC41 VDD VDD R14 E45 FBVDDQ FBVDDQ L41
AB24 GND GND AL23 BE37 GND GND N4 AC16 VDD VDD AL14 BC42 VDD VDD R16 F42 FBVDDQ FBVDDQ P11
AB26 GND GND AL25 BE4 GND GND N41 AC18 VDD VDD AL16 BC45 VDD VDD R18 F44 FBVDDQ FBVDDQ P39
AB28 GND GND AL27 BE7 GND GND N42 AC20 VDD VDD AL18 BC46 VDD VDD R20 F45 FBVDDQ FBVDDQ R11
AB30 GND GND AL29 BF10 GND GND N45 AC22 VDD VDD AL20 BD38 VDD VDD R22 G41 FBVDDQ FBVDDQ R40
AB32 GND GND AL31 BF13 GND GND N46 AC24 VDD VDD AL22 BD39 VDD VDD R24 G42 FBVDDQ FBVDDQ U11
AB39 GND GND AL39 BF16 GND GND N48 AC26 VDD VDD AL24 BD41 VDD VDD R26 H41 FBVDDQ FBVDDQ U39
AB4 GND GND AL4 BF19 GND GND N5 AC28 VDD VDD AL26 BD42 VDD VDD R28 H42 FBVDDQ FBVDDQ V11
AB41 GND GND AL41 BF22 GND GND N8 AC30 VDD VDD AL28 BD44 VDD VDD R30 H43 FBVDDQ FBVDDQ V39
AB42 GND GND AL42 BF23 GND GND N9 AC32 VDD VDD AL30 BD45 VDD VDD R32 J38 FBVDDQ FBVDDQ V40
AB45 GND GND AL45 BF24 GND GND P14 AD15 VDD VDD AL32 BD46 VDD VDD T15 J39 FBVDDQ FBVDDQ Y11
AB46 GND GND AL46 BF25 GND GND P16 AD17 VDD VDD AM15 BD47 VDD VDD T17 J42 FBVDDQ FBVDDQ Y40
AB48 GND GND AL48 BF26 GND GND P18 AD19 VDD VDD AM17 BD48 VDD VDD T19
2
AB5 GND GND AL5 BF27 GND GND P20 AD21 VDD VDD AM19 BD49 VDD VDD T21 2
AB8 GND GND AL8 BF28 GND GND P22 AD23 VDD VDD AM21 BE38 VDD VDD T23
AB9 GND GND AL9 BF29 GND GND P24 AD25 VDD VDD AM23 BE39 VDD VDD T25
AC15 GND GND AM14 BF30 GND GND P26 AD27 VDD VDD AM25 BE40 VDD VDD T27
AC17 GND GND AM16 BF31 GND GND P28 AD29 VDD VDD AM27 BE41 VDD VDD T29
AC19 GND GND AM18 BF32 GND GND P30 AD31 VDD VDD AM29 BE42 VDD VDD T31 16MIL
AC21 AM20 BF33 P32 AE14 AM31 BE43 U14 R49 FBVDDQ_SENSE_GPU
GND GND GND GND VDD VDD VDD VDD FBVDDQ_SENSE OUT 31
AC23 GND GND AM22 BF34 GND GND R15 AE16 VDD VDD AM32 BE44 VDD VDD U16
AC25 GND GND AM24 BF35 GND GND R17 AE18 VDD VDD AN39 BE45 VDD VDD U18 FB_CLAMP BB48
AC27 GND GND AM26 BF36 GND GND R19 AE20 VDD VDD AP39 BE46 VDD VDD U20
AC29 GND GND AM28 BF37 GND GND R21 AE22 VDD VDD AR39 BE47 VDD VDD U22 FB_VREF R39
AC31 GND GND AM30 BF5 GND GND R23 AE24 VDD VDD AR40 BE48 VDD VDD U24
AD14 GND GND AP11 BF7 GND GND R25 AE26 VDD VDD AR41 BE49 VDD VDD U26 FBVDDQ Testpoint this net
AD16 GND GND AP2 BG1 GND GND R27 AE28 VDD VDD AT39 BF38 VDD VDD U28 GND
AD18 GND GND AP4 BH1 GND GND R29 AE30 VDD VDD AT40 BF39 VDD VDD U30 PROBE_FBVDDQ AG11
AD20 GND GND AP41 BH10 GND GND R31 AE32 VDD VDD AT41 BF40 VDD VDD U32 * Connect Probe_XXXX
AD22 GND GND AP42 BH13 GND GND T11 AF15 VDD VDD AU39 BF41 VDD VDD V15 PROBE_FB_GND AF10 to Pwr/Gnd
AD24 GND GND AP45 BH16 GND GND T14 AF17 VDD VDD AU41 BF42 VDD VDD V17
AD26 AP46 BH19 T16 AF19 AU42 BF43 V19 GND FBVDDQ
GND GND GND GND VDD VDD VDD VDD
AD28 GND GND AP48 BH2 GND GND T18 AF21 VDD VDD AV41 BF44 VDD VDD V21
AD30 GND GND AP5 BH22 GND GND T2 AF23 VDD VDD AV42 BF45 VDD VDD V23 FB_CAL_PD_VDDQ P40 FB_CAL_PD_VDDQ R632 40.2ohm
AD32 GND GND AP8 BH25 GND GND T20 AF25 VDD VDD AV43 BF46 VDD VDD V25 0402 1% COMMON
AE11 GND GND AP9 BH28 GND GND T22 AF27 VDD VDD AV44 BF47 VDD VDD V27 FB_CAL_PU_GND R48 FB_CAL_PU_GND R87 40.2ohm
AE15 GND GND AT42 BH31 GND GND T24 AF29 VDD VDD AW35 BF48 VDD VDD V29 0402 1% COMMON
AE17 AU11 BH34 T26 AF31 AW36 BF49 V31 R47 FB_CAL_TERM_GND R88 60.4ohm
GND GND GND GND VDD VDD VDD VDD FB_CALTERM_GND
AE19 GND GND AU2 BH37 GND GND T28 AG14 VDD VDD AW37 BG39 VDD VDD W14 0402 1% COMMON
AE2 GND GND AU4 BH5 GND GND T30 AG16 VDD VDD AW41 BG41 VDD VDD W16
AE21 GND GND AU45 BH7 GND GND T32 AG18 VDD VDD AW42 BG42 VDD VDD W18
AE23 GND GND AU46 BJ2 GND GND T39 AG20 VDD VDD AW43 BG44 VDD VDD W20
AE25 GND GND AU48 BJ3 GND GND T4 AG22 VDD VDD AW44 BG45 VDD VDD W22 GND
3
AE27 GND GND AU5 C1 GND GND T41 AG24 VDD VDD AW45 BG46 VDD VDD W24 3
AE29 GND GND AU8 C3 GND GND T42 AG26 VDD VDD AY36 BG47 VDD VDD W26
AE31 GND GND AU9 C49 GND GND T45 AG28 VDD VDD AY42 BG48 VDD VDD W28
AE39 GND GND AW13 D10 GND GND T46 AG30 VDD VDD AY45 BG49 VDD VDD W30
AE4 GND GND AW16 D13 GND GND T48 AG32 VDD VDD BA36 BH39 VDD VDD W32
AE41 GND GND AW19 D16 GND GND T5 AH15 VDD VDD BA37 BH40 VDD VDD Y15
AE42 GND GND AW22 D19 GND GND T8 AH17 VDD VDD BA38 BH41 VDD VDD Y17
AE45 GND GND AW25 D22 GND GND T9 AH19 VDD VDD Y31 BH42 VDD VDD Y19
AE46 GND GND AW29 D25 GND GND U15 AH21 VDD BH43 VDD VDD Y21
AE48 GND GND AW31 D28 GND GND U17 AH23 VDD BH44 VDD VDD Y23
AE5 GND GND AW34 D31 GND GND U19 AH25 VDD BH45 VDD VDD Y25
AE8 GND GND AY2 D34 GND GND U21 AH27 VDD BH46 VDD VDD Y27
AE9 GND GND AY4 D37 GND GND U23 AH29 VDD BH47 VDD VDD Y29
AF14 GND GND AY46 D4 GND GND U25
AF16 GND GND AY48 D40 GND GND U27
AF18 GND GND AY5 D43 GND GND U29 G1J
AF20 GND GND AY8 D7 GND GND U31 INS16852651
AF22 GND GND B1 E10 GND GND V14 BGA1745
COMMON
AF24 GND GND B10 E13 GND GND V16
AF26 B13 E16 V18 3V3_RUN
GND GND GND GND 21/21 NC/3V3
AF28 GND GND B16 E19 GND GND V20
AF30 GND GND B19 E22 GND GND V22 AK10 NC VDD33 AW15
AF32 GND GND B2 E25 GND GND V24 AM10 NC VDD33 AY15
AG15 GND GND B22 E28 GND GND V26 AY14 NC
AG17 B25 E31 V28 BC11 3V3_RUN
GND GND GND GND NC
AG19 GND GND B28 E34 GND GND V30 BF12 NC GK104 GM204
AG21 GND GND B31 E37 GND GND V32 BF18 NC 3V3MISC 3V3_AON AW17
AG23 GND GND B34 E40 GND GND W11 3V3MISC 3V3_AON AY17
AG25 GND GND B37 E43 GND GND W15
AG27 GND GND B40 E46 GND GND W17
4
AG29 GND GND B43 E48 GND GND W19 4
AG31 GND GND B45 E5 GND GND W2
AH11 GND GND B48 E7 GND GND W21 3V3AUX_NC AW14
AH14 GND GND B49 F6 GND GND W23
AH16 GND GND B7 G2 GND GND W25
AH18 GND GND BA13 G4 GND GND W27
AH2 GND GND BA16 G45 GND GND W29
AH20 GND GND BA19 G46 GND GND W31
AH22 GND GND BA22 G48 GND GND W39
AH24 GND GND BA25 G5 GND GND W4
AH26 GND GND BA28 H10 GND GND W41
AH28 GND GND BA31 H13 GND GND W42
AH30 GND GND BA34 H16 GND GND W45
AH32 GND GND BB10 H19 GND GND W46
AH39 GND GND BB13 H22 GND GND W48
AH4 GND GND BB16 H25 GND GND W5
AH41 GND GND BB19 H28 GND GND W8
AH42 GND GND BB22 H31 GND GND W9
AH45 GND GND BB23 H34 GND GND Y14
AH46 GND GND BB25 H37 GND GND Y16
AH48 GND GND BB26 H40 GND GND Y18
AH5 GND GND BB28 H8 GND GND Y20
AH8 GND GND BB29 J13 GND GND Y22
AH9 GND GND BB31 J16 GND GND Y24
AJ15 Y32 J19 Y26
AJ17
GND
GND
GND
GND AW24 J22
GND
GND
GND
GND Y28 MICRO-STAR INT'L CO.,LTD
AJ19 BB21 J25 Y30
AJ21
GND
GND
GND
J28
GND
GND
GND
GND J34 MS-V317
AJ23 GND J31 GND GND J37 MSI
Size Document Description Rev
5
Custom GPU PWR and GND 1.0 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL GPU PWR and GND
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 14 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
GND
GND
GND
GND
3V3_F 3V3_RUN
C732 C733 C702 C664 C757 C703 C657 C677 C736 C730 C622 C621
LB24 220ohm 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF
C819 C803 C773 C765 C769 BEAD_0805 COMMON
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
4.7uF 1uF 0.1uF 0.1uF 0.1uF 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10% 10%
4 X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R 4
6.3V 6.3V 16V 16V 16V LB25 220ohm 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402
20% 10% 10% 10% 10%
BEAD_0805 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
X5R X5R X7R X7R X7R
0603 0402 0402 0402 0402
COMMON COMMON COMMON COMMON COMMON
GND
GND
3V3_AON
3V3_RUN
NVIDIA CORPORATION
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PAGE DETAIL GPU Decoupling
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 15 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 50OHM_NETCLASS1 50OHM_NETCLASS1 1
50OHM_NETCLASS1 R46 56ohm DACA_I2C_SCL_R LB1 0.068uH DACA_I2C_SCL_DVI
BI 17
0402 5% COMMON 0603 COMMON
R43 C43
2.2k 2.2pF
DDC_5V
5% 50V
0402 0.1pF
COMMON C0G
0402
COMMON
R44
GND
2.2k
5%
0402
COMMON
50OHM_NETCLASS1 50OHM_NETCLASS1
50OHM_NETCLASS1 R47 56ohm DACA_I2C_SDA_R LB2 0.068uH DACA_I2C_SDA_DVI
BI 17
0402 5% COMMON 0603 COMMON
C44
2.2pF
50V
0.1pF
C0G
0402
COMMON
GND
2 2
50OHM_NETCLASS1
50OHM_NETCLASS1 L501 0.027uH DACA_HS_DVI
OUT 17
0603 COMMON
C866
2.2pF
50V
0.1pF
C0G
0402
COMMON
GND
C869
2.2pF
G1L 50V
@digital.u_gpu_gb3b_256(sym_6):page16_i527 0.1pF
BGA1745
C0G
COMMON
0402
6/21 DACA COMMON
DAC_RGB
L505 0.047uH DACA_GREEN_DVI
OUT 17
0603 COMMON
DAC_RGB
L502 0.047uH DACA_BLUE_DVI
OUT 17
0603 COMMON
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL DACA Interface
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 16 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
16 90DIFF_NETCLASS1
BI
16 90DIFF_NETCLASS1
BI
1 1
G1M
@digital.u_gpu_gb3b_256(sym_7):page17_i378
BGA1745
COMMON
GK104 GM204
IFPA_AUX_SDA BG5
NC
IFPA_AUX_SCL BJ5
NC C38
1uF
6.3V
IFPB_AUX_SDA BF15
NC 10%
IFPB_AUX_SCL BE15 X5R
NC
PEX_VDD 0402
COMMON SHIELD1
25
SHIELD2
26
DP_SIGNALS
SHIELD3
27
DP LVDS/DVI/HDMI DP_SIGNALS GND SHIELD4
28
R696
0ohm IFPAB_TXC* C891 0.1uF IFPAB_TXD0_C* TX0-
IFPA_TXC BD18 IFPAB_TXC DP_SIGNALS DP_SIGNALS 17 J5
0.05 ohm IFPAB_TXC C859 0.1uF IFPAB_TXD0_C TX0+
2 0402 DPA_L3 IFPA_TXC BC18 IFPAB_TXC DP_SIGNALS
COMMON
DP_SIGNALS 18 2
@design_lib.con_dvi_i(sym_8):page17_i506
DNI
COMMON
DP_SIGNALS
IFPAB_TXD1_C* TX1-
9
17 9 1 DVI_I_(SLIM_)SHLD_B
R644 1k IFPAB_RSET BE18 IFPAB_RSET DP_SIGNALS
IFPAB_TXD1_C TX1+
10
0402 COMMON BG14 IFPAB_TXD0* C887 0.1uF IFPAB_TXD2_C* TX2-
1 DVI_I_TALL_9SHLD
1% IFPA_TXD0 IFPAB_TXD0 DP_SIGNALS DP_SIGNALS
BH14 IFPAB_TXD0 COMMON C856 0.1uF IFPAB_TXD2_C TX2+
2 COMMON
DPA_L2 IFPA_TXD0 IFPAB_TXD0 DP_SIGNALS DP_SIGNALS
COMMON SHLD24
3
GND SHLD13
11
3V3_PLL R697 0ohm IFPAB_PLLVDD BB15 BC15 IFPAB_TXD1* C877 0.1uF SHLD05
19
4,09,16,18,20,21 IN IFPAB_PLLVDD IFPA_TXD1 IFPAB_TXD1 DP_SIGNALS
04020.05 ohm COMMON BD15 IFPAB_TXD1 COMMON C832 0.1uF IFPAB_TXD4_C* TX3-
12
DPA_L1 IFPA_TXD1 IFPAB_TXD1 DP_SIGNALS
COMMON IFPAB_TXD4_C TX3+
13
C78 C751 C77 IFPAB_TXD5_C* TX4-
4
4.7uF 1uF 0.1uF IFPAB_TXD2* C875 0.1uF IFPAB_TXD5_C TX4+
IFPA_TXD2 BE17 IFPAB_TXD2 DP_SIGNALS 5
6.3V 6.3V 16V IFPAB_TXD2 C818 0.1uF IFPAB_TXD6_C* TX5-
DPA_L0 IFPA_TXD2 BF17 IFPAB_TXD2 DP_SIGNALS
COMMON 20
20% 10% 10%
COMMON IFPAB_TXD6_C TX5+
21
X5R X5R X7R
0603 0402 0402 DACA_I2C_SCL_DVI DDCC
6
COMMON COMMON COMMON
IFPA_TXD3 BC17 DACA_I2C_SDA_DVI DDCD
7
BD17 VDDC
14
IFPA_TXD3
GND
15
PEX_VDD IFP_IOVDD SHLDC
22
BG18 IFPAB_TXC_C* TXC-
24
IFPB_TXC
GND DPB_L3 IFPB_TXC BH18 IFPAB_TXC_C TXC+
23
R130 R703 DACA_VS_DVI VSYNC
8
0ohm 0ohm 16 IN
DVIA_HPD_C HPD
BB17 IFPAB_IOVDD 16
0.05 ohm 0.05 ohm 24 16 8
BA17 BJ14 IFPAB_TXD4* C868 0.1uF
0402 0402 IFPAB_IOVDD IFPB_TXD4 IFPAB_TXD4 DP_SIGNALS DP_SIGNALS
BJ15 IFPAB_TXD4 COMMON C810 0.1uF DACA_RED_DVI R C1
COMMON DNI DPB_L2 IFPB_TXD4 IFPAB_TXD4 DP_SIGNALS DP_SIGNALS 16 IN
BA18 IFPB_IOVDD COMMON DACA_GREEN_DVI G C2
IFPAB_IOVDD
16 IN
DACA_BLUE_DVI B C3
BB18 IFPB_IOVDD 16
C865 0.1uF IN C3 C1
IFPB_TXD5 BH15 IFPAB_TXD5* IFPAB_TXD5 DP_SIGNALS DP_SIGNALS
AGND1
C5
BG15 IFPAB_TXD5 COMMON C794 0.1uF
DPB_L1 IFPB_TXD5 IFPAB_TXD5 DP_SIGNALS DP_SIGNALS
C791 C795 C742 C740 COMMON AGND2
C5A
C5 C5A
TOWS_con_dvii
GND
IFPAB GND
U100 U101
IFPAB_TXD0_C* 1 NC 10 IFPAB_TXD0_C* IFPAB_TXD2_C* 1 NC 10 IFPAB_TXD2_C*
IFPAB_TXD0_C 2 NC 9 IFPAB_TXD0_C IFPAB_TXD2_C 2 NC 9 IFPAB_TXD2_C
8
499ohm R598
R795 COMMON 0402 VVVV284260 VVVV284260
1%
10k 499ohm R537 D0G-05A0300-I14 D0G-05A0300-I14
5% ESD_2_5X1 ESD_2_5X1
COMMON 1% 0402
0402
COMMON
499ohm R536 COMMON COMMON
COMMON 1% 0402
GPIO14_IFPA_HPD
PLACE CLOSE 499ohm R535
23 3 1B1C1E TO CONNECTOR
OUT C
Q529 COMMON 1% 0402
4 4
1 B DVIA_HPD_R_Q
@discrete.q_npn(sym_1):page17_i376 R821 100k DVIA_HPD_R R823 0ohm 499ohm R534 U102 U103
SOT23_1B1C1E
COMMON
0402 5% COMMON 06030.05 ohm COMMON COMMON 1% 0402 IFPAB_TXD5_C* 1 NC 10 IFPAB_TXD5_C* IFPAB_TXC_C* 1 NC 10 IFPAB_TXC_C*
2 499ohm R530 IFPAB_TXD5_C 2
E
R822 C893 C896 NC 9 IFPAB_TXD5_C IFPAB_TXC_C 2 NC 9 IFPAB_TXC_C
COMMON 1% 0402
100k 220pF 220pF 499ohm R608 IFPAB_TXD6_C* 4 7 IFPAB_TXD6_C* 4 7
5% 50V 50V NC NC
0402 5% 5%
COMMON 1% 0402 IFPAB_TXD6_C 5 NC 6 IFPAB_TXD6_C 5 NC 6
COMMON
499ohm R607
C0G C0G
0402 0402 COMMON 1% 0402 ESD-ESD3V3U4ULC-RH ESD-ESD3V3U4ULC-RH
8
COMMON DNI 499ohm R526
GND COMMON 1% 0402 VVVV284260 VVVV284260
499ohm R528 D0G-05A0300-I14 D0G-05A0300-I14
GND GND GND COMMON 1% 0402 ESD_2_5X1 ESD_2_5X1
499ohm R532 COMMON COMMON
0V
1G1D1S 3
D Q44
@discrete.q_fet_n_enh(sym_2):page17_i384
SOT23_1G1D1S
1G COMMON
S 2
60V
0.26A
3000mohm@10V / [email protected] / [email protected]
0.31A
0.3W
20V MICRO-STAR INT'L CO.,LTD
MS-V317
GND MSI
5
Size Document Description Rev 5
Custom IFPAB DVI-I-DL 1.0
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL IFPAB DVI-I-DL
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 17 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
2
U14 DP_PWR_EF
3V3_F COMMON D9
@analog.u_sw_pwr_tps2031(sym_1):page18_i338 16V
SO8 3.3V [C_AUX_COUP*_DP] @discrete.d_3pin_ac(sym_1):page18_i380
C31 0.1uF 10%
1
COMMON 1.0A 3 0.1A X7R 1
2 100V
IN OUT 8 0.406 0402 16V
SOT23
0402
3 IN OUT 7 C28 10%
DNI
DNI
R620 C789 C591 X7R
OUT 6 560uF
1
C726 4.7k 0.1uF 22uF COMMON
0.1uF R95 10k 3V3_DP_PWR_EF_EN 5% 16V 6.3V COMMON
4 EN 0402 20% GND
16V 10% 20%
0402 5% COMMON 6.3V IFPE_AUX_BYP* 12V_F
COMMON X7R X5R 90DIFF_NETCLASS1
10%
X7R 5 OC* GND 1 0402 0805LP AL-Polymer
COMMON COMMON [email protected],100KHz S D D S
0402 3V3_F
0.008ohm
COMMON
TH_D63P25 2 3[Q_AUX_FET1*_DP] 3 2[Q_AUX_FET2*_DP] GND [R_MODE_BJT_PU1_DP]
R769
COMMON COMMON
SOT23_1G1D1S 10k
GND GND GND GND G @discrete.q_fet_n_enh(sym_6):page18_i355 G @discrete.q_fet_n_enh(sym_7):page18_i358
[R_MODE_BJT_PU2_DP]
Q527 Q9 5% R767
0402 4.7k
GND GND SOT23_1G1D1S COMMON
1
5%
[Q_MODE_BJT2_DP] 0402
IFPE_MODE 3 1B1C1E COMMON
Q511 C
[Q_MODE_BJT1_DP]
1B IFPE_MODE*
@discrete.q_npn(sym_1):page18_i378 3
[C_AUX_GATE_DP] 1B1C1E
DP_PWR_EF C902 SOT23_1B1C1E
Q513 C
COMMON [R_MODE_DP]
10nF
[Q_AUX_FET1_DP] 2 E 1 B IFPE_MODE_R
@discrete.q_npn(sym_1):page18_i392 R765 4.7k
16V SOT23_1B1C1E
SOT23_1G1D1S [Q_AUX_FET2_DP] 0402 5% COMMON
COMMON
1
G G 10%
Q515 Q10 X7R 2 E
@discrete.q_fet_n_enh(sym_6):page18_i354 @discrete.q_fet_n_enh(sym_7):page18_i357 0402
SOT23_1G1D1S
COMMON
COMMON COMMON [D_AUX_CLAMP_DP]
2
C974 C973 C972 C971 C970 2 S D 3 3 D S 2
22UF 22UF 22UF 22UF 22UF D10
@discrete.d_3pin_ac(sym_1):page18_i373
6.3V 6.3V 6.3V 6.3V 6.3V IFPE_AUX_BYP
90DIFF_NETCLASS1 3 0.1A GND GND GND
20% 20% 20% 20% 20%
100V
X5R X5R X5R X5R X5R SOT23
0805 0805 0805 0805 0805 DNI
COMMON COMMON COMMON COMMON COMMON
2 [R_AUX_CONN_PD_DP] 2
1
VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV284260 R30
C11-2267014-T04 C11-2267014-T04 C11-2267014-T04 C11-2267014-T04 C11-2267014-T04 100k
[C_AUX_COUP_DP]
C30 0.1uF 5%
GND GND GND GND GND 0402
0402 16V COMMON
10%
X7R DP_PWR_EF DP_PWR_EF
COMMON
[R_AUX_PD*_DP] [R_AUX_PD_DP]
R92 R90
[C_DP_PWR_DP]
100k 100k C895
5% 5% 0.1uF
0402 0402 GND
16V
G1N COMMON DNI
10%
@digital.u_gpu_gb3b_256(sym_10):page18_i306 X7R
BGA1745 0402
COMMON DNI
J4
10/21 IFPEF
GND GND
DVI/HDMI DP IFPE_C_HPD_C 18 Hot_Det 20
DP_PWR GND
IFPE_MODE_C
BE5 IFPE_L3* C33 0.1uF IFPE_L3_C* 12 ML_Lane_3n
IFPE_L3 IFPE_L3_C DP_SIGNALS DP_SIGNALS IFPE_L3_C
R653 1k IFPEF_RSET TXC IFPE_L3 C34 0.1uF IFPE_L3_C
BF11 IFPEF_RSET IFPE_L3 BD5 IFPE_L3_C DP_SIGNALS
COMMON
DP_SIGNALS IFPE_L3_C 10 ML_Lane_3p
[R_MODE_PD_DP]
TXC COMMON R763
0402 1%
IFPE_L2* C35 0.1uF IFPE_L2_C* 1M
COMMON IFPE_L2 BE6 IFPE_L2_C DP_SIGNALS DP_SIGNALS IFPE_L2_C 9 ML_Lane_2n
TXD0 BD6 IFPE_L2 COMMON C36 0.1uF IFPE_L2_C 7 ML_Lane_2p 5%
IFPE_L2 IFPE_L2_C DP_SIGNALS DP_SIGNALS IFPE_L2_C 0402
TXD0 COMMON
GND COMMON
BB9 BG6 IFPE_L1* C40 0.1uF IFPE_L1_C* 6 ML_Lane_1n
IFPEF_PLLVDD IFPE_L1 IFPE_L1_C DP_SIGNALS DP_SIGNALS IFPE_L1_C
3V3_PLL TXD1 IFPE_L1 C41 0.1uF IFPE_L1_C ML_Lane_1p
3 4,09,16,17,20,21 IFPE_L1 BF6 IFPE_L1_C DP_SIGNALS
COMMON
DP_SIGNALS IFPE_L1_C 4 3
IN TXD1 COMMON
C802 BF8 IFPE_L0* C48 0.1uF IFPE_L0_C* 3 ML_Lane_0n
IFPE_L0 IFPE_L0_C DP_SIGNALS DP_SIGNALS IFPE_L0_C
0.1uF TXD2 IFPE_L0 C101 0.1uF IFPE_L0_C
IFPE_L0 BE8 IFPE_L0_C DP_SIGNALS
COMMON
DP_SIGNALS IFPE_L0_C 1 ML_Lane_0p
GND
16V TXD2 COMMON MEC1
10% MEC1
X7R IFPE
0402 3V3_F
COMMON
R652 19
PWR_RTN
10k
PEX_VDD X1 X1
5%
GND 0402 X2 X2
COMMON X3 X3
BC8 3
Hotplug Detection PLACE CLOSE
13 MODE
X4 X4
2
IFPEF_IOVDD DVI-DL DVI/HDMI DP C
1B1C1E TO CONNECTOR GND_0
BD8 IFPEF_IOVDD Q530 GND_1 5
1B
@discrete.q_npn(sym_1):page18_i326 IFPE_C_HPD_R_Q R684 100k IFPE_C_HPD_R R597 0ohm GND_2 8
C817 C809 C787 C788 BC9 SOT23_1B1C1E
0402 COMMON 0603 COMMON 11
IFPF_IOVDD COMMON 5% 0.05 ohm GND_3
4.7uF 1uF 0.1uF 0.1uF IFPF_AUX*
BD9 IFPF_IOVDD IFPF_AUX_SDA BH4 19 2 E 14 CEC GND_6 16
6.3V 6.3V 16V 16V BI R676 C611 C598
BJ4 IFPF_AUX
20% 10% 10% 10% IFPF_AUX_SCL BI 19 100k 220pF 220pF
X5R X5R X7R X7R
5% 50V 50V _ DP_W/GASKET
0603 0402 0402 0402
0402 5% 5%
COMMON COMMON COMMON COMMON BH6 IFPF_L3* VVVV314_10
TXC IFPF_L3 BI 19 COMMON C0G C0G
BJ6 IFPF_L3 N5W-20M0610-A43
TXC IFPF_L3 BI 19 0402 0402 GND
GND COMMON DNI
23 OUT
GPIO18_IFPE_HPD MICRO-STAR INT'L CO.,LTD
MS-V317
MSI
Size Document Description Rev
5
Custom IFPEF with IFPE DP 1.0 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL IFPEF with IFPE DP
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 18 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
Page19: IFPF DP
DP_PWR_EF
Two cases to be considered:
2
COMMON D12
16V
[C_AUX_COUP*_DP] @discrete.d_3pin_ac(sym_1):page19_i45 10%
C237 0.1uF 3 0.1A X7R
0402 16V 100V
0402
SOT23
10% DNI
DNI
X7R
1
COMMON
GND
IFPF_AUX_BYP* 90DIFF_NETCLASS1 12V_F
S D D S 3V3_F
2 3[Q_AUX_FET1*_DP] 3 2[Q_AUX_FET2*_DP] GND [R_MODE_BJT_PU1_DP]
R768
COMMON COMMON
SOT23_1G1D1S 10k
G @discrete.q_fet_n_enh(sym_6):page19_i26 G @discrete.q_fet_n_enh(sym_7):page19_i30 5%
[R_MODE_BJT_PU2_DP]
R766
Q516 Q46
0402 4.7k
SOT23_1G1D1S COMMON
1
5%
[Q_MODE_BJT2_DP] 0402
IFPF_MODE 3 1B1C1E COMMON
Q510 C
[Q_MODE_BJT1_DP]
1B IFPF_MODE*
@discrete.q_npn(sym_1):page19_i43 3
[C_AUX_GATE_DP] 1B1C1E
C897 SOT23_1B1C1E
Q512 C
COMMON [R_MODE_DP]
10nF
[Q_AUX_FET1_DP] 2 E 1 B IFPF_MODE_R
@discrete.q_npn(sym_1):page19_i55 R764 4.7k
16V SOT23_1B1C1E
SOT23_1G1D1S [Q_AUX_FET2_DP] 0402 5% COMMON
2 COMMON 2
1
G G 10%
Q514 Q45 X7R 2 E
@discrete.q_fet_n_enh(sym_6):page19_i25 @discrete.q_fet_n_enh(sym_7):page19_i29 0402
SOT23_1G1D1S
COMMON
COMMON COMMON [D_AUX_CLAMP_DP]
2
2 S D 3 3 D S 2 D11
@discrete.d_3pin_ac(sym_1):page19_i38
IFPF_AUX_BYP 90DIFF_NETCLASS1 3 0.1A GND GND GND
100V
SOT23
DNI
[R_AUX_CONN_PD_DP]
1
R96
100k
[C_AUX_COUP_DP]
C239 0.1uF 5%
0402
0402 16V COMMON
10%
X7R DP_PWR_EF DP_PWR_EF
COMMON
[R_AUX_PD*_DP] [R_AUX_PD_DP]
R771 R770
[C_DP_PWR_DP]
100k 100k C27
5% 5% 0.1uF
0402 0402 GND
16V
COMMON DNI
10%
X7R
0402
DNI
J7
GND GND
IFPF_HPD_C 18 Hot_Det
DP_PWR 20 GND
R648
10k
PWR_RTN 19
5%
0402 Hotplug Detection X1 X1
X2
COMMON X2
GPIO8_IFPF_HPD 3 1B1C1E X3 X3
23 OUT C MODE
Q531 13 X4 X4
1B
@discrete.q_npn(sym_1):page19_i5 IFPF_HPD_R_Q R683 100k IFPF_HPD_R R569 0ohm GND_0 2
SOT23_1B1C1E
COMMON
0402 5% COMMON 0603 0.05 ohm COMMON GND_1 5
2 E GND_2 8
R674 C610 11
GND_3
100k 220pF C597 14 CEC GND_6 16
5% 50V 220pF
0402 5% PLACE CLOSE 50V
COMMON C0G 5%
GND 0402 _ DP_W/GASKET
4 TO CONNECTOR C0G 4
COMMON 0402
VVVV314_10
DNI N5W-20M0610-A43
GND
GND GND
GND
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL IFPF DP
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 19 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
DEFAULT_CAPACITOR_10000pF_2_1
A B C D E F G H
10nF
16V
10%
X7R
R752
0402
COMMON
0ohm
DDC_5V
HDMI 0.05 ohm
0402
COMMON
ALL
R786
3V3_F GND
0ohm
1
DP HDMI
G
Q519 0.05 ohm
1G1D1S
1 @discrete.q_fet_n_enh(sym_2):page20_i158 0402 1
R728
D
SOT23_1G1D1S DNI
10k COMMON
5% HDMI HDMI
3
0402
DVI_HDMI_SIGNALS COMMON
I2CW_SDA_Q
60V
0.3A
2000mohm@10V / [email protected] / [email protected]
0.8A
0.35W
20V
IFPC_ESD R801
DP 2k
DP 5% HDMI
DDC_5V 0402
2
D507 D506 COMMON
@discrete.d_3pin_ac(sym_1):page20_i47 @discrete.d_3pin_ac(sym_1):page20_i58
0.1A 3 3 0.1A DDC_5V
100V 100V
ALL SOT23 SOT23 R802
3V3_F DNI DNI
2k
1
G
Q522
1
1G1D1S DP 5% HDMI
@discrete.q_fet_n_enh(sym_2):page20_i159 0402
R734 C1
D
SOT23_1G1D1S COMMON
10k COMMON 1uF
5% HDMI HDMI 6.3V
GND GND
3
0402 10%
DVI_HDMI_SIGNALS COMMON X5R
I2CW_SCL_Q 0402
G1O
COMMON J2501
@digital.u_gpu_gb3b_256(sym_8):page20_i99
60V
0.3A 19
BGA1745
2000mohm@10V / [email protected] / [email protected]
0.8A 18 HP_DET
0.35W GND
COMMON 20V
17 +5V
DP GND X1
8/21 IFPC
I2CW_SDA_C 16 SHELL1
2 1k R645 IFPC_RSET DP I2CW_SCL_C SDA 2
BB14 IFPCD_RSET 15 X2
COMMON 1% 0402
SCL SHELL2
DVI/HDMI DP
DP
14 MEC1
13 NC MEC1
GND BB12 BF2 I2CW_AUX* CE Remote
IFPCD_PLLVDD IFPC_AUX_SDA
BG2 I2CW_AUX 12
IFPC_AUX_SCL
3V3_PLL 11 CK-
4,09,16,17,18,21 IN C771 CK_Shield
10
0.1uF IFPC_TXC* C879 0.1uF IFPC_TXC_C1* CK+
TXC IFPC_L3 BE11 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
16V IFPC_TXC C880 0.1uF IFPC_TXC_C1
TXC IFPC_L3 BD11 DVI_HDMI_SIGNALS 0402 COMMON DVI_HDMI_SIGNALS 9
10%
0402 COMMON 8 D0-
X7R
0402 BC12 IFPC_TXD0* C881 0.1uF IFPC_TXD0_C1* 7 D0_Shield
TXD0 IFPC_L2 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
COMMON BD12 IFPC_TXD0 0402 COMMON C882 0.1uF IFPC_TXD0_C1 D0+ MEC2
TXD0 IFPC_L2 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
0402 COMMON 6 MEC2
IFPC IFPC_L1 BE14 IFPC_TXD1* DVI_HDMI_SIGNALS
C883 0.1uF IFPC_TXD1_C1* DVI_HDMI_SIGNALS 5 D1- X3
TXD1 D1_Shield SHELL3
GND BF14 IFPC_TXD1 0402 COMMON C884 0.1uF IFPC_TXD1_C1 4
TXD1 IFPC_L1 DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
0402 COMMON
D1+ X4
BD14 IFPC_TXD2* C885 0.1uF IFPC_TXD2_C1* 3 SHELL4
TXD2 IFPC_L0 IFPC_TXD2_C_DP DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
PEX_VDD BC14 IFPC_TXD2 0402 COMMON C886 0.1uF IFPC_TXD2_C1 2 D2-
TXD2 IFPC_L0 IFPC_TXD2_C_DP DVI_HDMI_SIGNALS DVI_HDMI_SIGNALS
0402 COMMON 1 D2_Shield
3V3_F
D2+
BA11 IFPCD_IOVDD HDMI19PSM_BLACK-RH-5
BA12 HDMI_S19_16 GND
IFPCD_IOVDD R18 COMMON
C833 C825 C752 C1211 10k VVVV30316S1
4.7uF 1uF 0.1uF 0.1uF 5% N5Y-19M0760-W06
6.3V 6.3V 16V 16V 0402
COMMON
20% 10% 10% 10% GPIO15_IFPC_HPD
X5R X5R X7R X7R 23 3 1B1C1E GND
OUT C
0603 0402 0402 0402 Q1
3
COMMON COMMON COMMON COMMON 1B HDMI_C_HPD_R_Q
@discrete.q_npn(sym_1):page20_i88 R5 100k HDMI_C_HPD_R R9 0ohm HDMI_C_HPD_C
3
SOT23_1B1C1E
0402 5% COMMON 0603 0.05 ohm COMMON
COMMON
2 E
R2 C8 C5
100k 220pF 220pF
GND
5% 50V 50V
0402 5% 5%
COMMON C0G C0G
GND 0402 0402
COMMON DNI
1
1G1D1S 3 IFPC_TERM_EN_D
D Q524
@discrete.q_fet_n_enh(sym_2):page20_i104
1G SOT23_1G1D1S R816 R815 R808 R807 R814 R813 R812 R811
COMMON 499ohm 499ohm 499ohm 499ohm 499ohm 499ohm 499ohm 499ohm
S 2
1% 1% 1% 1% 1% 1% 1% 1%
60V
0.26A
0402 0402 0402 0402 0402 0402 0402 0402
3000mohm@10V / [email protected] / [email protected] COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
0.31A
0.3W
1 1 1 1 1 1 1
4 20V 4
GND
Fused DP_PWR
DP-SKU
DP_PWR
U5 DP_PWR
3V3_F
@analog.u_sw_pwr_tps2031(sym_1):page20_i164
SO8 3.3V
COMMON 1.0A U105 U106
2 IN OUT 8 0.406 IFPC_TXC_C1* 1 NC 10 IFPC_TXC_C1* IFPC_TXD1_C1* 1 NC 10 IFPC_TXD1_C1*
3 IN OUT 7 C29 IFPC_TXC_C1 2 NC 9 IFPC_TXC_C1 IFPC_TXD1_C1 2 NC 9 IFPC_TXD1_C1
6 R619 C783 C590 C969 C968 C967 C966 C965
OUT 4.7k 0.1uF 22uF 470uF 22UF 22UF 22UF 22UF 22UF
C32 IFPC_TXD0_C1* 4 7 IFPC_TXD0_C1* IFPC_TXD2_C1* 4 7 IFPC_TXD2_C1*
0.1uF R647 10k 3V3_DP_PWR_EN 5% 16V 6.3V COMMON 6.3V 6.3V 6.3V 6.3V 6.3V NC NC
4 EN 0402 20% IFPC_TXD0_C1 5 NC 6 IFPC_TXD0_C1 IFPC_TXD2_C1 5 NC 6 IFPC_TXD2_C1
16V 10% 20% 20% 20% 20% 20% 20%
0402 5% COMMON COMMON 6.3V
10% X7R X5R X5R X5R X5R X5R X5R
X7R 5 OC* GND 1 0402 0805LP TA-Polymer 0805 0805 0805 0805 0805 ESD-ESD3V3U4ULC-RH ESD-ESD3V3U4ULC-RH
8
COMMON COMMON 7.3A@45degC,100KHz COMMON COMMON COMMON COMMON COMMON
0402
0.005ohm
COMMON VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV30321S VVVV30321S
SMD_7343
C11-2267014-T04 C11-2267014-T04 C11-2267014-T04 C11-2267014-T04 C11-2267014-T04 D0G-05A0300-I14 D0G-05A0300-I14
ESD_2_5X1 ESD_2_5X1
GND GND GND GND GND GND GND GND GND
COMMON COMMON MICRO-STAR INT'L CO.,LTD
GND GND
MS-V31714ci203
MSI
5
Size Document Description Rev 5
Custom IFPC HDMI 1.0
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL IFPC HDMI/DP
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 20 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
Page21: IFPD DP
DP_PWR
Two cases to be considered:
2
COMMON D508
16V
@discrete.d_3pin_ac(sym_1):page21_i249 10%
C871 0.1uF 3 0.1A X7R
0402 16V 100V
0402
SOT23
10% DNI
DNI
X7R
1
COMMON
GND
IFPD_AUX_BYP* 90DIFF_NETCLASS1 12V_F
S D D S 3V3_F
2 3 3 2 GND
R36
COMMON COMMON
SOT23_1G1D1S 10k
G @discrete.q_fet_n_enh(sym_6):page21_i219 G @discrete.q_fet_n_enh(sym_7):page21_i247 5% R37
Q6 Q4
0402 4.7k
SOT23_1G1D1S COMMON
1
5%
0402
DP_MODE 3 1B1C1E COMMON
Q8 C
1B DP_MODE*
@discrete.q_npn(sym_1):page21_i280 3 1B1C1E
C42 SOT23_1B1C1E
Q3 C
10nF COMMON
2 E 1 B DP_MODE_R
@discrete.q_npn(sym_1):page21_i284 R11 4.7k
16V SOT23_1B1C1E
SOT23_1G1D1S 0402 5% COMMON
2 COMMON 2
1
G G 10%
Q7 Q5 X7R 2 E
@discrete.q_fet_n_enh(sym_6):page21_i218 @discrete.q_fet_n_enh(sym_7):page21_i241 0402
SOT23_1G1D1S
COMMON
COMMON COMMON
2
2 S D 3 3 D S 2 D509
@discrete.d_3pin_ac(sym_1):page21_i244
IFPD_AUX_BYP 90DIFF_NETCLASS1 3 0.1A GND GND GND
100V
SOT23
DNI
1
R789
100k
C872 0.1uF 5%
0402
0402 16V COMMON
10%
X7R DP_PWR DP_PWR
COMMON
G1P R745 R746
@digital.u_gpu_gb3b_256(sym_9):page21_i315 100k 100k
BGA1745
C3
COMMON 5% 5% 0.1uF
0402 0402 GND
16V
9/21 IFPD COMMON DNI
10%
X7R
GM204 GK104 0402
DNI
R654 1k IFPD_RSET BE12 J1
NC RSET
0402 1% COMMON DVI/HDMI DP GND GND
DP_D_HPD_C 18 Hot_Det
DP_PWR 20 GND
3 3V3_PLL C775 3
DP_MODE_C
16,17,18,20 IN 0.1uF IFPD_L3* C14 0.1uF IFPD_L3_C* ML_Lane_3n
TXC IFPD_L3 BH9 IFPD_L3_C DP_SIGNALS DP_SIGNALS 12
16V IFPD_L3 C15 0.1uF IFPD_L3_C
TXC IFPD_L3 BG9 IFPD_L3_C DP_SIGNALS
COMMON
DP_SIGNALS 10 ML_Lane_3p
10% R12
COMMON
X7R 1M
BG11 IFPD_L2* C9 0.1uF IFPD_L2_C* 9 ML_Lane_2n
0402 IFPD_L2 IFPD_L2_C DP_SIGNALS DP_SIGNALS
TXD0 IFPD_L2 C10 0.1uF IFPD_L2_C 5%
COMMON
TXD0 IFPD_L2 BH11 IFPD_L2_C DP_SIGNALS
COMMON
DP_SIGNALS 7 ML_Lane_2p
0402
COMMON
IFPD BJ11 IFPD_L1* IFPD_L1_C
C16 0.1uF IFPD_L1_C* 6 ML_Lane_1n
COMMON
TXD1 IFPD_L1 DP_SIGNALS DP_SIGNALS
GND BJ12 IFPD_L1 COMMON C17 0.1uF IFPD_L1_C 4 ML_Lane_1p
TXD1 IFPD_L1 IFPD_L1_C DP_SIGNALS DP_SIGNALS
COMMON
BH12 IFPD_L0* C11 0.1uF IFPD_L0_C* 3 ML_Lane_0n
IFPD_L0 IFPD_L0_C DP_SIGNALS DP_SIGNALS
TXD2 IFPD_L0 C12 0.1uF IFPD_L0_C ML_Lane_0p
PEX_VDD
TXD2 IFPD_L0 BG12 IFPD_L0_C DP_SIGNALS
COMMON
DP_SIGNALS 1 GND
COMMON MEC1
MEC1
BA14 IFPD_IOVDD
BA15 IFPD_IOVDD
C1212 C1213 C1214 C770 19
PWR_RTN
4.7uF 1uF 0.1uF 0.1uF
X1 X1
6.3V 6.3V 16V 16V
X2 X2
20% 10% 10% 10%
X5R X5R X7R X7R X3 X3
13 MODE X4
0603 0402 0402 0402 X4
COMMON COMMON COMMON COMMON
GND_0 2
GND_1 5
3V3_F GND_2 8
GND_3 11
14 CEC GND_6 16
GND R26
10k
5% _ DP_W/GASKET
4 0402
VVVV314_10 4
GPIO17_IFPD_HPD
COMMON
3
Hotplug Detection N5W-20M0610-A43
23 OUT
1B1C1E GND
Q2 C
1B DP_D_HPD_R_Q
@discrete.q_npn(sym_1):page21_i307 R10 100k DP_D_HPD_R R4 0ohm
SOT23_1B1C1E
0402 5% COMMON 0603 0.05 ohm COMMON
COMMON
2 E
R17 C13 C6
100k 220pF 220pF
5% 50V 50V
0402 5% 5%
COMMON C0G C0G
GND 0402 0402
COMMON DNI
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL IFPD DP
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 21 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
CN1B
@design_lib.con_mio_26(sym_9):page22_i665
G1R NONPHY_DUAL_6GND
1 @digital.u_gpu_gb3b_256(sym_11):page22_i635 MIO_SIGNALS 1
BGA1745 MIOA_D[11..0] COMMON
3V3_RUN COMMON
SLI_B - EMI SHIELD
11/21 MIOA 2/2
MIOA_D0
C2 C7 SLI_LED
0 DR<0> SLI_LED IN 22,35
AJ10 VDD33 MIOAD0 AJ7 MIOA_D0 MIOA_D1
D4 DR<1>
0 1
AJ11 VDD33 MIOAD1 AJ2 MIOA_D1 MIOA_D2
C4 DR<2> GND D3
1 2
AK11 AJ6 MIOA_D2 3V3_RUN MIOA_D3
C5 D7
C804 C762 C800 C764 VDD33 MIOAD2 2 3 DR<3> GND
MIOAD3 AJ5 MIOA_D3 MIOA_D4
MIOA_D4_DE D6 DR<4> GND D11
4.7uF 1uF 0.1uF 0.1uF 3 4
MIOAD4 AK4 MIOA_D4 MIOA_D5
C6 DR<5> GND C3
6.3V 16V 16V 16V 4 5
MIOAD5 AJ4 MIOA_D5 MIOA_D6
C8 DR<6> GND C11
20% 10% 10% 10% 5 R749 6
X5R X5R X7R X7R MIOAD6 AK9 MIOA_D6 MIOA_D7
D9 DR<7>
6 1k 7
0603 0402 0402 0402 MIOAD7 AK3 MIOA_D7 MIOA_D8
D10 DR<8>
7 1% 8
COMMON COMMON COMMON COMMON
MIOAD8 AM3 MIOA_D8
0402
MIOA_D9
C10 DR<9>
8 9
0.305 MIOAD9 AK7 MIOA_D9
COMMON
MIOA_D10
D12 DR<10> GND
9 10
2.5V MIOAD10 AM2 MIOA_D10 MIOA_D11
C12 DR<11>
10 11
R670 49.9ohm MIOA_CAL_PD_VDDQ AJ9 MIOACAL_PD_VDDQ MIOAD11 AK6 MIOA_D11
C13 DR<12>
11
0402 1% COMMON D5 DR<13>
GND R671 49.9ohm MIOA_CAL_PU_GND AJ8 GPIO23_RASTER_SYNC1 R732 33ohm MIOA_RASTER_SYNC1 C9
MIOACAL_PU_GND 23 BI DR<14>
0402 1% COMMON 0.0V 0.305 MIO_SIGNALS 0402 5% COMMON
MIOA_DE_D4 D13
R677 DR_CMD
D8 DR_CLK
1k
AM1 MIOA_VREF
1%
GND 0402
C1 RASTER_SYNC GND 5
GPIO22_SWAPRDY_IN D1 6
COMMON 22,23 BI SWAP_RDY GND
0.305 GND 4
1.65V D2 EXT_REFCLK
MIOA_VREF
AK5 MIOA_CTL3
MIOA_CTL3 MIO_SIGNALS
AJ1 MIOA_HSYNC
2 MIOA_HSYNC MIO_SIGNALS 2
C824 R678 AK8 MIOA_VSYNC GND
0.1uF 1k MIOA_VSYNC MIO_SIGNALS
AM4 MIOA_DE
16V 1%
MIOA_DE MIO_SIGNALS
10% 0402
X7R COMMON
0402
COMMON AK1 MIOA_CLKOUT
MIOA_CLKOUT MIO_SIGNALS
MIOA_CLKOUT AK2
AJ3 MIOA_CLKIN
MIOA_CLKIN MIO_SIGNALS
GND
3 3
CN1A
G1Q @design_lib.con_mio_26(sym_10):page22_i664
@digital.u_gpu_gb3b_256(sym_12):page22_i636 MIO_SIGNALS
BGA1745 MIOB_D[11..0] NONPHY_DUAL_6GND
3V3_RUN COMMON COMMON
GND
MIO_SIGNALS
23 BI
GPIO21_RASTER_SYNC0 R738 33ohm MICRO-STAR INT'L CO.,LTD
0402 COMMON
5%
MS-V317
MSI
5
Size Document Description Rev 5
Custom MIOA/B Interface and FRAME LOCK 1.0
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MIOA/B Interface and Frame Lock
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 22 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
U505
1 GND 1
@analog.u_temp_ad1032(sym_1):page23_i354
SO8_122MIL
DNI
THERM_DP 2 1
D+ VDD
THERM_DN 3 D-
4 THERM_OVERT*
THERM
ALERT 6
GPIO9_THERM_ALERT*
8 SCL
7 SDA GND 5
GND
OUT 34
3
IN
BF20 AW7 GPIO9_THERM_ALERT* 50OHM_NETCLASS1
JTAG_TMS GPIO9 5% 5%
@discrete.d_3pin_cc(sym_2):page23_i301
0.05 ohm 0.05 ohm
BG20 JTAG_TDI GPIO10 AT6 0402 0402
30V
0805 0805
GPIO11_LOGO_LED 0.2A
BH20 JTAG_TDO GPIO11 AV2 35 GND COMMON COMMON COMMON COMMON
OUT SOT23
BF21 AV4 GPIO12_LOW_PERF*
JTAG_TRST GPIO12 33,35
2
IN COMMON
AT5 GPIO13_FAN_TACH
GPIO13
AW5 GPIO14_IFPA_HPD GPIO16_FAN_PWM
GPIO14 IN 17
R687 AV6 GPIO15_IFPC_HPD GPIO13_FAN_TACH 1 J200
10k GPIO15 IN 20
AW2 GPIO16_FAN_PWM 50OHM_NETCLASS1 25MIL FAN_PWR 2
5%
GPIO16 MALE
AW6 GPIO17_IFPD_HPD 3
0402 GPIO17 IN 21 R165 C501 C502
2.0MM
AW3 GPIO18_IFPE_HPD 4 N/A
COMMON GPIO18 IN 18 10k 820pF 1uF
GPIO19 AT8
5% 50V 16V COMMON
AV5 GPIO20_SLI_LED_DIM
GPIO20 IN 35 0402 10% 10%
AT3 GPIO21_RASTER_SYNC0
GPIO21 MIO_SIGNALS BI 22 DNI X7R X5R TOWS_TIN_BHEAD1X4_2MM
AR9 GPIO22_SWAPRDY_IN MIO_SIGNALS 0402 0603
GPIO22 BI 22
AV3 GPIO23_RASTER_SYNC1 MIO_SIGNALS COMMON COMMON
GPIO23 BI 22
AT2 GPIO24_SWAPRDY_OUT
3 GPIO24 3
GPIO25_NC GPIO25 AV9 J201
GND GPIO26_NC GPIO26 AR10 6
AN10 GPIO27_FLASH_PROTECT GND 5
GPIO27_NC GPIO27 FOR DT SKU
4
3
2
1
R1281 R1276
3V3_RUN 10k 10k
BH1X6H-2PITCH-RH-1
5% 5%
0402 0402 1G1D1S 3 FOR WS SKU
D Q523
COMMON COMMON TOWS_BHEAD1X6_1
@discrete.q_fet_n_enh(sym_2):page23_i394 R73 R817 R818 R804 R666
SOT23_1G1D1S 10k 1k 10k 10k 10k
1G DNI
1% 5% 5% 5% 5% 3V3_RUN
S 2 60V
0402 0402 0402 0402 0402
R747 0.26A
3000mohm@10V / [email protected] / [email protected] COMMON COMMON DNI DNI COMMON
10k 0.31A
0.3W 7511_FAN_TACH IN
32
5% 20V
0402
GND DNI 7511_FAN_PWM IN
32
GND
4 4
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MISC1: Fan, Thermal, JTAG, GPIO, Stereo
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 23 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
10k 0001 1001 0001 32Mx32 256-bit Elpida 0001 128Mx32 256-bit Elpida
STRAP1 3GIO_PADCFG_LUT_ADR* 0000* 5K PD Desktop*
15k 0010 1010 0010 32Mx32 256-bit Hynix 0010 128Mx32 256-bit Hynix
1 1
25K PD -425 GPU*
20k 0011 1011 0011 32Mx32 256-bit Samsung 0011 128Mx32 256-bit Samsung
STRAP2 PCI_DEVID [3:0]* 0100 - (0x1184)*
25k 0100 1100 0100 Reserved 0100 Reserved
45K PU*
30k 0101 1101 0101 64Mx32 256-bit Elpida 0101 64Mx32 256-bit Elpida
STRAP3 SOR_EXPOSED [3:0]* 1111*
35k 0110 1110 0110 64Mx32 256-bit Hynix 0110 64Mx32 256-bit Hynix
45k 0111 1111 0111 64Mx32 256-bit Samsung 0111 64Mx32 256-bit Samsung
STRAP4 DP_PLL_VDD_33V* 1* FOR 3_3V*
1000 Reserved
45K PD*
RAMCFG[2]* 1* RAMCFG[2]* 0* 3V3_RUN
R51 U4
RAMCFG[3]* 0* RAMCFG[3]* 0* G1U 10k @memory.u_mem_fl_ser_256kx8(sym_1):page24_i66
@digital.u_gpu_gb3b_256(sym_15):page24_i149 SO8
5%
BGA1745 SO8
0402
COMMON COMMON
COMMON
VGA_DEVICE* 1* VGA_DEVICE* 1* 15/21 MISC_2 7 HOLD VCC 8
3 WP
BA3 ROM_CS* R519 33ohm ROM_CS_R 1 C49
ROM_CS CS 0.1uF
0402 5% COMMON
ROM_SI R724 33ohm ROM_SI_R 16V
SMB_ALT_ADDR* 0* 30k PD* SMB_ALT_ADDR* 0* ROM_SI BA5 5 SI 10%
BA4 ROM_SO 2
ROM_SO 10K PD* STRAP0
ROM_SO
ROM_SCLK
0402
R723
5% COMMON
33ohm ROM_SCLK_R
SO X7R
BA6 STRAP0 ROM_SCLK BA2 6 SCK GND 4 0402
STRAP1 AW8 0402 5% COMMON COMMON
STRAP1
STRAP2 BA7
FB[0]_APERTURE_SIZE* 1* For 128MB* PCIE_CFG* 0* STRAP3
STRAP2
BA8 STRAP3
STRAP4 BB6 STRAP4
AW9 GPU_BUFRST*
BUFRST OUT 34
PEX_PLL_EN_TERM100* 0* DISABLED* SOR0_EXPOSED* 1*
3 3
R710 40.2k MULTISTRAP_REF0_GND BB7 MULTISTRAP_REF0_GND
PCI_DEVID_EXT[5]* 0* For 0x1184* 25K PD* SOR1_EXPOSED* 1*
0402 1% COMMON
45K PU*
ROM_SCLK
SUB_VENDOR* 1* Dedicated BIOS* SOR2_EXPOSED* 1*
GND
Smart Fan
G1T
@digital.u_gpu_gb3b_256(sym_14):page24_i150
1V_PLL BGA1745
COMMON
KEPLER
PCI_DEVID_EXT[4]* 0* For 0x1184* SOR3_EXPOSED* 1*
14/21 XTAL/PLL
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MISC2: ROM, XTAL, Straps
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 24 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
12V_F
5V
@power_supply.u_vreg_3pin(sym_2):page25_i27
PLACE 0603 10UF FOOTPRINT
SOT223_GOI F501
ON TOP OF 0805 FOOTPRINT U1 0.75A DDC_5V
GOI,IGOI,TO263
1 1
COMMON 1.25V 5V 1206 5V
COMMON
0.400 0.2A 0.2A
315-0372-000
12V R6 0ohm 5V_VIN_D 3 2 20MIL 1 2 0.400
IN OUT
06030.05 ohm DNI 4
C282 C7 TAB
GND/ADJ
POLYSWITCH
10uF 10uF C4 R1 C280 C900 C901 C899 C898
16V 16V 0.1uF 124ohm 10uF 10uF 4.7uF 0.1uF 10uF
20% 10% 16V 1% 16V 16V 6.3V 16V 6.3V
X5R X5R
1
10% 0402 20% 10% 20% 10% 20%
0603 0805 X7R COMMON X5R X5R X5R X7R X5R
DNI COMMON 0402 0603 0805 0603 0402 0603
@discrete.d_schottky(sym_3):page25_i8 COMMON 5V_ADJ DNI COMMON COMMON COMMON COMMON
2D1 1
R3
SOD323 383ohm PLACE 0603 10UF FOOTPRINT
20V
1A 1% ON TOP OF 0805 FOOTPRINT
COMMON 0402
COMMON GND GND
* DDC backdrive GND
Vref=1.256V
Vo_Typ=1.256*(1+383/124)+60uA*383=5.16V
GND
5V 3V3_RUN
12V_F 3V3_RUN
R5014 R5006
0ohm 0ohm
0.05 ohm 0.05 ohm
0805 0402 R5005 R5003
COMMON DNI
0ohm 0ohm
0.05 ohm 0.05 ohm
PLACE 0603 10UF FOOTPRINT 0805 0805
COMMON DNI
ON TOP OF 0805 FOOTPRINT
C907 C5001 PEX_OVREG_VIN
10uF 4.7uF
16V 16V
20% 10% C245 C2008 C2012 C244 R5013
X5R X5R 10uF 10uF 10uF 10uF 10k
0603 0805LP
16V 16V 16V 16V 5%
DNI COMMON U5000
20% 10% 10% 20% 0402
@power_supply.u_openvreg_type0(sym_1):page25_i109 X5R X5R X5R X5R DNI
0.8V 0603 0805 0805 0603
GND GND DFN10 DNI COMMON COMMON DNI
COMMON
039-0098-000
R5010 10k PEX_OVREG_PGOOD 9 3
PGOOD VIN
0402 5% COMMON OpenVReg GND GND GND GND
PS_NVVDD_PG R5011 1k PEX_OVREG_EN 10
25,27,31 OUT EN/FS
0402 5% COMMON 8 PEX_OVREG_BOOT C5003 0.1uF PEX_VDD 1V_PLL
BOOT/NC
0402 16V PEX_VDD
PEX_OVREG_VCC 2 10%
1.0V
VCC X7R
3 SW 6 COMMON 131-0832-000 2.7A 3
7 PEX_OVREG_SW 0.400 1.0V 2.7A L2 1uH <<OCC_ONLY>> LB5 30ohm
SW
GND 4 SMD_045_041 COMMON BEAD_0603 COMMON
PEX_OVREG_FB 1 5
FB GND C2007 C2006 C2005
THERM 11
0.1uF 10uF 22uF
315-0829-000 16V 6.3V 6.3V
10% 20% 20%
X7R X5R X5R
R621
0402 0805LP 0805LP
0ohm COMMON COMMON COMMON
1.053 = 0.8 * (1+7.5K/23.7K) GND
0.05 ohm
PEX_VDD 039-0123-000 039-0122-000
CCP 0402
Vout = Vref * (1+Rtop/Rbot) C5002 680pF RCP
DNI
PEX_OVREG_FB_RC R5009 0ohm
0402 50V 04020.05 ohm COMMON
10%
X7R
GND
COMMON
1%
R5008 7.5k PEX_OVREG_FB_R R5000 0ohm
0402 COMMON 04020.05 ohm COMMON
GND
4 4
3V3_RUN
U15
1.05V
@power_supply.u_vreg_5pin(sym_15):page25_i132
VID_PLL
SC705
COMMON
315-0217-000
1 IN OUT 5
1uF 1uF
6.3V 6.3V
10% 10%
X5R X5R
0402 0402
COMMON COMMON
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PS: 5V, PEX_VDD
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 25 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
Page26: NA
1 1
2 2
3 3
4 4
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PS: FBVDD/Q
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 26 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
12V_F
R286
100K
1%
0402
COMMON
R231 R230 R228 R229
3V3_F 3V3_F 3V3_F 3V3_F 470 470 470 470
0805 0805 0805 0805
+0.05R +0.05R +0.05R +0.05R C301
COMMONCOMMONCOMMONCOMMON
R858 0.1UF
1K/0402 R282 16V
5% 11K 10%
R117 0402 X7R
1%
1K/0402 COMMON 0402 0402
COMMON
COMMON
R227 R214 GND
1K/0402 1K/0402 C288
C295 C296 4.7U/0603
NCP81174MNTXG
0.1U/0402 GND
30
6
2
U20 5x5 QFN 2
PS_NVVDD_PG 0.1U/0402 3 29
VCC
12VMON
25,31 OUT
NVVDD_EN VR_RDY DRVON DRVON 28,29,30
28,33,34 4 25 28
IN EN G1 PWM1
23 OUT GPIO0_NVAPI_1_PWM_VID 2 17 CS1N 28,29
VID CS1N CSN1
23,35
IN GPIO6_PSI* 5 18 CS1 R20820/0402 28,29
PSI CS1 C287 CSN4
R215 1K/0402 R224
28,29 X_100K/0402 R20920/0402
CSP1
R2054.7K/0402
DIFFOUT 11 28,29C284
DIFFOUT CSP4
R1204.7K/0402 0.1U/X7R/0402 0.1U/X7R/0402
R223 C285 12 26 28
COMP G2 PWM2
19 CS2N 28,30
CS2N CSN2
R20275/0402 C292 1800P/0402 81174_COMP 20 CS2 R21020/0402 28,30
CS2 C291 CSN5
470P/0402 3.3K/0402 R204
28,30 X_100K/0402 R21120/0402
CSP2
R2064.7K/0402
R1221K/0402 C299 47P/0402 VFB 13 28,30C293
5V_PWM VFB CSP5
R2034.7K/0402 0.1U/X7R/0402 0.1U/X7R/0402
5V_PWM 5V R226 16.9K/0402 VDRP 14
VDRP 27
G3 PWM3 28
R219 21 CS3N 28,30
CS3N CSN3
STUFF FOR WS X_20K/0402 22 CS3 R21220/0402 28,30
CS3 CSN6
R220 1K/0402 R125 C289 R225 X_100K/0402 R21320/0402
C294
2
R772 0 R218 1K/0402 R207
CSP3 28,30
0603 +0.05R COMMON NTC1 22P/0402 4.7K/0402
12V_F 47KR 81174_VDFB 15 28,30
0.032A 1% VDFB CSP6
5V _ R1214.7K/0402 C286
1
R854 750 431CA_5V R773 0 X_100K/0402 16
81174_CSSUM 28 0.1U/X7R/0402 0.1U/X7R/0402
0.4MM 28
CSSUM G4 PWM4
0603 5% COMMON 0603 +0.05R COMMON 23 CS4N 28,29
R853 750 CS4N CSN7
R221 1K/0402 R222 680/0402 24 CS4 R234 20/0402 28,29
C300 C941 R855 CS4 CSN8
0603 5% COMMON R236 X_100K/0402 R235 20/0402
R852 750 0.1UF 1K R774 0 C303
1000PF VREF 31 R233 28,29
16V 25V 10% 5% VREF CSP7 NVVDD
3
0603 5% COMMON 0603 +0.05R COMMON R119 4.7K/0402 3
R851 750 10%
X5R 0402
0402 C926
X7R COMMON 10UF 39K/0402 28,29
CSP8
2
ROSC
C290
GND
COMMON
ILIM
10 VSN 1000P/0402 R847 0 GND_SENSE
2013/03/12 del C211
VBOOT SET AT 1V VSN
IN
3
0402 +0.05R COMMON
R201 VREF
33
5V_PWM R295
39K/0402
100
5%
C298
81174_ROSC
GND 0402
GND R126 1500P/0402 R123 R216 COMMON
0/0402 8.2K/0402 X_470K/0402
81174_ILIM
BOTTOM PAD
R124
39K/0402 R118
CONNECT TO
11K/0402 GND Through
4 VIAs
To cover both 3-R and 5-R configuartions
from nVIDIA, the external resistor can cap
network at pin VREF, REFIN and VIDBUF OCP ~ 300A
needs to be modified. Work F=400Khz
4 LOADLINE~0.3m OHM 4
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PS: NVVDD Controller
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 27 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
5V_PWM 5V_PWM
5V_PWM
R242 5V_PWM
_ 4.7/0603
R11-047AT13-R01
R111 VVVV314_10
_ 10K _ R193
VVVV314_10 _ R11-047AT13-R01 4.7/0603
R11-0103T12-R01 C165 C11-1057023-T04 _ VVVV314_10
1U VVVV314_10 R11-0103T12-R01 R128 _
VVVV314_10 10K C183C11-1057023-T04
U17 _ _ 1U VVVV314_10
16
1
NCP81162 C11-1047512-S02 C11-1047512-S02
7 14 VVVV314_10 VVVV314_10 _ U18 _ _ _
16
VCCA
VCCD
PWM3 27 PWM_IN PWMA 10 PWM3_A 30
1
R11-0242T12-R01
8 R274 2.4K R11-0242T12-R01
27,30 NCP81162 C11-1047512-S02 C11-1047512-S02
PWM_BP CSPA CSP3 VVVV314_10
VVVV314_10 7 14 VVVV314_10 VVVV314_10
VCCA
VCCD
X PWM2 27 PWM_IN PWMA PWM2_A 30
X
27,28,29,30 6 C144 8 10 R239 2.4K 27,30
DRVON DRVON <New PN> PWM_BP CSPA CSP2 <New PN>
27,28,33,34 4 9 0.1U R259 27,30
NVVDD_EN EN CSNA CSN3 XXXV314_10 XXXV314_10
5 15 X_100K 30 27,28,29,30
6 C146
RDY PWMB PWM6_B DRVON DRVON
PAD_GND
12 R275 2.4K _ 4 9 R262 _
2 CSPB CSP6 27,30
R11-0242T12-R01 NVVDD_EN 27,28,33,34 EN CSNA 0.1U CSN2 27,30 2
5V_PWM 13 5 15 X_100K R11-0242T12-R01
5V_PWM MIDA_B VVVV314_10 RDY PWMB PWM5_B 30
PAD_GND
3 C145 12 R238 2.4K VVVV314_10
R571 DBL_EN X 5V_PWM CSPB CSP5 27,30
X
2 11 0.1U R267 27,30 13
MID_HL CSNB CSN6 <New PN> 5V_PWM MIDA_B <New PN>
5% 0R X_100K 3 C147
_ XXXV314_10 R578
2 DBL_EN 11 XXXV314_10
0.1U R260 27,30
17
R11-0000012-W08 _
I33-811620C-O05 MID_HL CSNB CSN5
R266 C193 C171 5% 0R X_100K
VVVV314_10 X_0 X_10n X_10n VVVV314_10
17
VVVV314_10 R269 I33-811620C-O05 C190 C1630
VVVV314_10
R11-0000012-W08 X_0 _ X_10n X_10n
X _
R11-0000013-R01 X X X
XXXV314_10 C11-1053024 C11-1053024 R11-0000013-R01 X X
XXXV314_10 XXXV314_10 XXXV314_10 C11-1053024 C11-1053024
XXXV314_10 XXXV314_10
3 3
5V_PWM
5V_PWM
5V_PWM
5V_PWM
VVVV314_10 R258
R11-047AT13-R01 4.7/0603
_
_ R129 _ VVVV314_10 R300
R11-0103T12-R01 10K C184C11-1057023-T04 R11-047AT13-R01 4.7/0603
VVVV314_10 1U VVVV314_10 _
_ R194 _
U9 _ _ R11-0103T12-R01 10K C188C11-1057023-T04
16
1
16
PWM_BP CSPA CSP1 27,29
1
VVVV314_10
NCP81162 C11-1047512-S02 C11-1047512-S02
6 C148 X 7 14 VVVV314_10 VVVV314_10 _
VCCA
VCCD
DRVON 27,28,29,30 DRVON <New PN> PWM4 27 PWM_IN PWMA PWM7_A 29
R11-0242T12-R01
27,28,33,34 4 9 0.1U R270 27,29 8 10 R237 2.4K 27,29
NVVDD_EN EN CSNA CSN1 XXXV314_10 PWM_BP CSPA CSP7 VVVV314_10
5 15 X_100K 29
RDY PWMB PWM4_B
PAD_GND
PAD_GND
2 11 12 _
MID_HL CSNB 0.1U R268 CSN4 27,29 CSPB
R276 2.4K
CSP8 27,29
R11-0242T12-R01
5% 0R X_100K <New PN> 5V_PWM 13
VVVV314_10 XXXV314_10 5V_PWM 3 MIDA_B C143
VVVV314_10
17
R11-0000012-W08 R271 _
I33-811620C-O05 C195 C185
R775
2 DBL_EN 11 X
MID_HL CSNB 0.1U R301 CSN8 27,29
_ X_0 X_10n X_10n 5% 0R X_100K <New PN>
4 XXXV314_10 4
VVVV314_10
VVVV314_10
17
R11-0000012-W08 R303 _
I33-811620C-O05 C194 C189
XXXV314_10 X X _ X_0 X_10n X_10n
R11-0000013-R01 C11-1053024 C11-1053024
VVVV314_10
X XXXV314_10 XXXV314_10
XXXV314_10 X X
R11-0000013-R01 C11-1053024 C11-1053024
X XXXV314_10 XXXV314_10
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PS: NVVDD Phase 1,2
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 28 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
10
1
C256 C923 C221 C920
U4536
+
0.47UF 10UF 1UF 10UF
EC152
D_PAD
16V 16V 16V 16V
4 C270u16v
2
VVVV314_10 5 D1_3 10% 20%
VVVV284260
10% 20%
1 X7R X5R X5R X5R 1
R11-0010T13-R01 S2_1 0603 0805 C71-27117D1-AO5 0603 0805
_ COMMON COMMON COMMON COMMON
VVVV314_10 6 3 VVVV284260 VVVV284260 VVVV284260 VVVV284260
R11-0103T12-R01 S2_2 D1_2 C11-4742513-M09 C11-1067514-T04 C11-1057023-T04 C11-1067514-T04
VVVV314_10 _
C11-1047612-M09 R318 1/0603 7 NVVDD
_ C201 S2_3 2 GND
12V_PEX8_F2 0.1U/25V/X5R R135 10K HG1 D1_1 EL21 0.2UH VVVV31501S
PHASE1
VVVV314_10
LG1 8 1 R11-022AT14-R01
G2 G1
SW
R311 _
TP9 TP10 2.2/0805
1
NS516
NS517
VVVV314_10 R298 VVVV314_10 R316 1
9
R11-022A014-W08 R11-022AT13-R01 2.2/0603 C150 VVVV314_10
_ 2.2/0805 _ 12V_PEX8_F2 2200P C11-2222012-W08 X X
XXXV314_10 XXXV314_10
2
DFN8_5X6 _ XXXV314_10 XXXV314_10
X X
1
U19 NCP81061 N/A N/A <New PN> <New PN>
4 16
BST1
D03-7320E0C-ST8
VCC1 DRVH1
C255 C921 C260 C922
VVVV31010S 0.47UF 10UF 0.47UF 27,28
10UF CSP1
28 2 15 GND
PWM1_A PWM1 SW1 16V 16V 16V 16V
10% 20% 10% 27,28
20% CSN1
R314 5127,28,29,30 3 13 X7R X5R X7R X5R
DRVON EN1 DRVL1 0603 0805 0603 0805
VVVV314_10 10 COMMON COMMON COMMON COMMON
10
R11-0510T12-R01 GND2 U4537 VVVV284260 VVVV284260
VVVV284260 VVVV284260
_ 8 C11-4742513-M09 C11-1067514-T04
C11-4742513-M09 C11-1067514-T04
D_PAD
VCC2 4
2 GND 2
12 VVVV314_10 5 D1_3
6 DRVH2 R11-0010T13-R01 S2_1
PWM4_B 28 PWM2
PAD_GND
_
R315 51 7 11 VVVV314_10 6 3
DRVON 27,28,29,30 EN2 SW2 R11-0103T12-R01 S2_2 D1_2
BST2
VVVV314_10 14 9 _
R11-0510T12-R01 GND1 DRVL2 R319 1/0603 7
_ _ VVVV314_10 S2_3 2
17
5
SW
_ _ VVVV314_10
TP11 TP12 R312 R11-022AT14-R01
C224 0.1U/25V/X5R 1 2.2/0805 _
1
NS518
NS519
VVVV314_10
C11-1047612-M09 C151 VVVV314_10
XXXV314_10 XXXV314_10
_ DFN8_5X6 C11-2222012-W08 XXXV314_10 XXXV314_10
X X 2200P
2
BOTTOM PAD N/A N/A _ <New PN> <New PN>
X X
CONNECT TO D03-7320E0C-ST8
GND Through
6 VIAs VVVV31010S
27,28 CSP4
27,28 CSN4
12V_PEX6_F1
3 3
10
1
C264 C928 C226 C924 C950
U4543
+
0.47UF 10UF 1UF 10UF 10UF
1
EC154
+
D_PAD
2
VVVV314_10 5 D1_3 10% 20%
VVVV284260
10% 20% 20%
X7R X5R X5R X5R C270u16v X5R
2
R11-0010T13-R01 S2_1 0603 0805 C71-27117D1-AO5 0603 0805 C71-27117D1-AO5 0805
_ COMMON COMMON COMMON COMMON VVVV284260 COMMON
VVVV314_10 6 3 VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV284260
R11-0103T12-R01 S2_2 D1_2 C11-4742513-M09 C11-1067514-T04 C11-1057023-T04 C11-1067514-T04 C11-1067514-T04
12V_PEX6_F1 VVVV314_10 _
NVVDD
C11-1047612-M09 R325 1/0603 7
_ C202 HG7 S2_3 2 GND
0.1U/25V/X5R R195 10K D1_1 EL23 0.2UH VVVV31501S
PHASE7
VVVV314_10
LG7 8 1 R11-022AT14-R01
G2 G1
SW
R313 _
TP14 TP13 2.2/0805
1
NS520
NS521
VVVV314_10 R299 VVVV314_10 R323 1 12V_PEX6_F1
9
2
DFN8_5X6 _ XXXV314_10 XXXV314_10
X X
1
D03-7320E0C-ST8
VCC1 DRVH1
4 C263 C925 C262 C927 4
VVVV31010S 0.47UF 10UF 0.47UF 27,28
10UF CSP7
28 2 15 GND
PWM7_A PWM1 SW1 16V 16V 16V 16V
10% 20% 10% 27,28
20% CSN7
R322 5127,28,29,30 3 13 X7R X5R X7R X5R
DRVON EN1 DRVL1 0603 0805 0603 0805
VVVV314_10 10 COMMON COMMON COMMON COMMON
10
VCC2 4 GND
12 VVVV314_10 5 D1_3
6 DRVH2 R11-0010T13-R01 S2_1
PWM8_B 28 PWM2
PAD_GND
_
R321 51 7 11 VVVV314_10 6 3
DRVON 27,28,29,30 EN2 SW2 R11-0103T12-R01 S2_2 D1_2
BST2
VVVV314_10 14 9 _
R11-0510T12-R01 GND1 DRVL2 R326 1/0603 7
_ _ VVVV314_10 S2_3 2
17
5
_ _ VVVV314_10
TP15 TP16 R320 R11-022AT14-R01
C227 0.1U/25V/X5R 1 2.2/0805 _ MICRO-STAR INT'L CO.,LTD
9
1
NS522
NS523
VVVV314_10
C11-1047612-M09
XXXV314_10 XXXV314_10 C153 VVVV314_10 MS-V3171420314ci203
_
X X
DFN8_5X6
2200P C11-2222012-W08 XXXV314_10 XXXV314_10 MSI
2
BOTTOM PAD N/A N/A _ <New PN> <New PN> Size Document Description Rev
X X Custom 1.0
CONNECT TO D03-7320E0C-ST8 NVVDD Phase 1 & 4/ 7 & 8
5 GND Through 5
6 VIAs Date: Wednesday, August 20, 2014 Sheet 29 of 37
VVVV31010S
27,28 CSP8
27,28 CSN8
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PS: NVVDD Phase 3,4
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 29 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
10
0.47UF 10UF 10UF 10UF
U4538
16V 16V 16V 16V
D_PAD
1 10% 20% 20% 20% 1
4 X7R X5R X5R X5R NVVDD
_ 5 D1_3 0603 0805 0805 0805
VVVV314_10 S2_1 COMMON COMMON COMMON COMMON
R11-0010T13-R01 VVVV284260 VVVV284260 VVVV284260
_ 6 3 C11-4742513-M09 C11-1067514-T04 C11-1067514-T04
VVVV314_10 VVVV314_10 S2_2 D1_2 VVVV284260
GND
C11-1047612-M09 R11-0103T12-R01 C11-1067514-T04
_ R288 1/0603 7
C196 S2_3 2
12V_PEX6_F1 0.1U/25V/X5R R139 10K D1_1 EL17 0.2UH VVVV31501S
LG3 8 1 R293 _
G2 G1
SW
2.2/0805 VVVV314_10
VVVV314_10 R291 TP1 TP2 R11-022AT14-R01
1
NS506
NS507
_ R289 R11-022AT13-R01 1
9
2.2/0805 _ 2.2/0603 HG3 _
VVVV314_10
R11-022AT14-R01 XXXV314_10 XXXV314_10 C156 VVVV314_10
2
DFN8_5X6
X X PHASE3 2200P C11-2222012-W08
1
U22 NCP81061 N/A N/A
4 16
BST1
VCC1 DRVH1 27,28 CSP3
12V_PEX6_F1
27,28 CSN3
28 2 15
PWM3_A PWM1 SW1
3 13 X X
DRVON 27,28,29,30 EN1 DRVL1 XXXV314_10 XXXV314_10
_ 10 <New PN> <New PN>
R285 51
10
GND2 U4539 C251 C937 C247 C930
2 VVVV314_10 1UF 10UF 1UF 10UF 2
8 NVVDD
D_PAD
R11-0510T12-R01
VCC2 _ 4 16V 16V 16V 16V
PAD_GND
_ COMMON COMMON COMMON COMMON 125A
27,28,29,30 7 11 VVVV314_10 6 3 VVVV284260 VVVV284260 VVVV284260 VVVV284260
DRVON EN2 SW2 R11-0103T12-R01 S2_2 D1_2 C11-1057023-T04
C11-1067514-T04
C11-1057023-T04
C11-1067514-T04
BST2
_ 14 9 C959 C863 C876 C878 C888
R287 51
GND1 DRVL2 10UF 10UF 10UF 10UF 10UF
VVVV314_10 R281 1/0603 7
S2_3 2 C960 C983 C985 C984 C986 C982
6.3V 6.3V 6.3V 6.3V 6.3V
R11-0510T12-R01 VVVV314_10
17
5
SW
C11-1067313-S02 C11-1067313-S02 C11-1067313-S02 C11-1067313-S02 C11-1067313-S02
_ VVVV314_10
R11-022AT13-R01
TP3 TP4 EL18 0.2UH VVVV31501S
9
C11-1067514-T04 VVVV314_10 _
C11-1047612-M09 HG6 VVVV314_10
XXXV314_10 XXXV314_10
_ DFN8_5X6 R294 R11-022AT14-R01 GND
X X
BOTTOM PAD N/A N/A PHASE6 2.2/0805
1
NS508
NS509
CONNECT TO
GND Through C157
C977 C963 C964 C975 C976
6 VIAs 2200P C981 C980 C979 C978
2
_ 10UF 10UF 10UF 10UF 10UF
820uF_2.5V 820uF_2.5V 820uF_2.5V 820uF_2.5V
VVVV314_10 6.3V 6.3V 6.3V 6.3V 6.3V
VVVV284260 VVVV284260 VVVV284260 VVVV284260
20% 20% 20% 20% 20%
12V_PEX8_F2 C11-2222012-W08 C71-8210351-AO5C71-8210351-AO5C71-8210351-AO5C71-8210351-AO5
X5R X5R X5R X5R X5R
0603 0603 0603 0603 0603
COMMON COMMON COMMON COMMON COMMON
VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV284260
3 27,28 CSP6 X X C11-1067313-S02 C11-1067313-S02 C11-1067313-S02 C11-1067313-S02
C11-1067313-S02
3
XXXV314_10 XXXV314_10
C217 C931 C932 27,28 CSN6 <New PN> <New PN>
10
0.47UF 10UF 10UF
U4540
16V 16V 16V
GND
D_PAD
10% 20% 20%
_ 4 X7R X5R X5R
VVVV314_10 5 D1_3 0603 0805 0805 GND
R11-0010T13-R01 S2_1 COMMON COMMON COMMON
_ VVVV284260 VVVV284260
VVVV284260
VVVV314_10 6 3 C11-4742513-M09 C11-1067514-T04 C11-1067514-T04
R11-0103T12-R01 S2_2 D1_2
GND
VVVV314_10 R283 1/0603 7
C11-1047612-M09 C228 S2_3 2 EL19 0.2UH VVVV31501S
R308 VVVV314_10
LG2 8 1 2.2/0805 R11-022AT14-R01
G2 G1
SW
VVVV314_10 _
1
NS510
NS513
VVVV314_10 R277 R11-022AT13-R01 R278 TP5 TP6
R11-022AT13-R01 _ 1 C154
9
_ 2.2/0805 2.2/0603 HG2 2200P C991 C987 C988 C989 C990 C996 C992 C993 C994 C995
2
VVVV314_10 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
XXXV314_10 XXXV314_10 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
DFN8_5X6 PHASE2 C11-2222012-W08
X X
1
20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
U23 NCP81061 N/A N/A _
X5R X5R X5R X5R X5R X5R X5R X5R X5R X5R
4 16 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603
BST1
VCC1 DRVH1 COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON COMMON
27,28 CSP2
12V_PEX8_F2 VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV284260 VVVV284260
2 15 X X C11-1067313-S02 C11-1067313-S02 C11-1067313-S02 C11-1067313-S02
C11-1067313-S02 C11-1067313-S02 C11-1067313-S02 C11-1067313-S02 C11-1067313-S02
C11-1067313-S02
PWM2_A 28 PWM1 SW1 27,28 CSN2 XXXV314_10 XXXV314_10
4 <New PN> <New PN> 4
R292 51 27,28,29,30 3 13
DRVON _ EN1 DRVL1
1
10 C246 C929 C250 C936
10
+
VVVV314_10 GND2 0.47UF 10UF 0.47UF 10UF
R11-0510T12-R01 U4541 EC151
16V 16V 16V 16V
8 C270u16v GND GND
D_PAD
2
VCC2 _ 4
10% 20% 10% 20%
X7R X5R X7R X5R
12 VVVV314_10 5 D1_3 0603 0805 0603 0805
6 DRVH2 R11-0010T13-R01 S2_1 COMMON COMMON COMMON COMMON
PWM5_B 28 PWM2
PAD_GND
14 9 C71-27117D1-AO5
VVVV314_10 GND1 DRVL2
R11-0510T12-R01 R284 1/0603 7 GND
S2_3 2
VVVV314_10
17
5
_
C11-1067514-T04
TP7 TP8
C219 0.1U/25V/X5R 1 VVVV314_10
9
1
NS514
NS515
_ DFN8_5X6 PHASE5
BOTTOM PAD
X
N/A
X
N/A C155 MICRO-STAR INT'L CO.,LTD
CONNECT TO 2200P
2 MS-V317
2
VVVV314_10
GND Through
6 VIAs C11-2222012-W08 MSI
_ Size Document Description Rev
5 27,28 Custom PS: NVVDD Phase 3,6,2,5 1.0 5
CSP5
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PS: NVVDD Phase 5, 6
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 30 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1
16V 1%
+
10% 0402
GPIO12_PWR_LVL 0 PS_FBVDDQ_PSI* 0 Under power 1 PHASE OPERATION X5R COMMON EC153
0603 VVVV284260 C270u16v
2
COMMON R11-2323T12-Y01 VVVV284260
GPIO12_PWR_LVL 1 PS_FBVDDQ_PSI* floating Normal 2 PHASE OPERATION
VVVV284260 PS_FBVDDQ_VAMP C71-27117D1-AO5
C11-1057023-T04
GND
GND
PS_FBVDDQ_VREFOUT R247 25.5K XXXV284260 PS_FBVDDQ_PVCC C906 1UF
GND
0402 1% DNI <New PN> 12V 0.3MM 0603 16V 10%
X5R COMMON
R246 232K VVVV284260
R253 VVVV284260 12V_F
GND 0
0402 1% COMMON R11-2323T12-Y01 XXXV284260 C11-1057023-T04
+0.05R <New PN>
RT8809: 0402 Input ripple (Irms)/phase = [email protected]/32A
DNI
SLEW SET VVVV284260
PS_FBVDDQ_VCC R739 2.2 R11-022A012-W08
APW8700: 12V_F
5
12V 0.3MM 0402 5% COMMON
2 CURRENT BALANCE C191 C942 C944 C946 2
VVVV284260 0.5MM Q47 10UF 10UF 10UF
12V_F C905 1UF C11-1057023-T04 PS_FBVDDQ_UG1_R 0.1UF
GND 4 NTMFS4C10NT1G
VVVV284260 16V 16V 16V 16V
0603 16V 10%
COMMON 10% 10% 10% 10%
X5R D03-616BA0C-N03
X7R X5R X5R X5R
R737 10K
1
2
3
PS_FBVDDQ_PVCC
0402 5% COMMON
0402
COMMON
0805
COMMON
0805
DNI
0805
COMMON
FBVDD/Q = 1.6V @ 32A
R168 VVVV284260 VVVV284260 VVVV284260 XXXV284260 VVVV284260 FBVDDQ
10K R11-0103012-W08 C11-1042012-M09 C11-1067514-T04 C11-1067514-T04 C11-1067514-T04
VVVV284260
5%
FBVDD/Q Power Sequencing R11-0103012-W08
0402
COMMON 1B1C1E 6 U6
GND GND GND GND
VVVV31501S
L702
C Q533A VVVV284260 1 2 1.6V
VR_SW=2V
1B1C1E 3 PS_FBVDDQ_EN* E2 D02-03904G9-O05 0.3uH
C Q533B SC70_6 QFN024Q_P050_I0179_TI108X108
COMMON COMMON
PS_NVVDD_PG R736 100K NVVDD_PGOOD_RC E5 VVVV284260 B 1 R245 4.7K VVVV284260
25,27 C919 C940 C948
5
OUT SC70_6 D02-03904G9-O05 R11-0000013-W08
0402 5% COMMON COMMON 0402 5% DNI 0.5MM 1000PF 1000PF 10UF C956
C904 PS_FBVDDQ_UG1 R265 0
VVVV284260
0.1UF
B 4 XXXV284260 18 VCC12 HG1 14 Q48 820uF_2.5V
R11-0104042-Y01 <New PN> 25V 25V 6.3V
0.5MM 0603 +0.05R COMMON 4 NTMFS4C05NT1G 10%
XXXV284260
10%
VVVV284260
20%
VVVV284260
16V GND 17 13 PS_FBVDDQ_BOOT1 C175 0.1UF VVVV284260 <New PN> C11-1022013-W08 C71-8210351-AO5
10% VCC9
PS_FBVDDQ_PVCC BOOT1 X5R X5R X5R
D03-632BA0C-N03 Alternated Part
X7R RT8809: R309 0R/0603 0402 16V 10% 0603 0603 0805
1
2
3
0402 GND 2 PHASE PWM VVVV284260 X7R COMMON DNI COMMON COMMON
DNI >4.2V -- DEM PS_FBVDDQ_PSI C181 PS_FBVDDQ_PH_RC1
12 PSI 0.5MMR11-0000013-W08 VVVV284260
1000PF
VVVV284260
XXXV284260 >1.2V & <3V -- ASM
SW1 15 PS_FBVDDQ_PH1 C11-1042012-M09 R740 1 0.5MM GND C11-1067314-M09 GND
25V
GND <New PN> APW8700: 1206 5% COMMON
10%
PS_FBVDDQ_IOFS 4 IOFS 0.5MM VVVV284260 FBVDDQ
X5R
Focs(kHz) = 10000/Rrt(KR) PS_FBVDDQ_LG1 R11-0010027-R01 12V_F
LG1 16 0402
300 (kHz) = 10000/30(KR) DNI
PS_FBVDDQ_FS 3 RE/EN XXXV284260 GND
GND <New PN>
C958
5
3
VVVV284260 820uF_2.5V 3
GPIO7_FBVDD_SEL R169 1K PS_FBVDDQ_VID 23 VID 0.5MM R11-0000013-W08 0.5MM Q49 VVVV284260
23 IN
PS_FBVDDQ_UG2 R272 0 PS_FBVDDQ_UG2_R C186 C939 C943 C945 C71-8210351-AO5
0402 5% COMMON HG2 21 4 NTMFS4C10NT1G 10UF 10UF 10UF
R190 5.76K R251 7.15K PS_FBVDDQ_VREF_SET VVVV284260 0.1UF
VVVV284260 24 RSET 0.5MM 0603 +0.05R COMMON
R11-0102032-W08 R167 PS_FBVDDQ_BOOT2 C174 0.1UF D03-616BA0C-N03 16V 16V 16V 16V
10K
0402 1% COMMON 0402 1% COMMON BOOT2 22 10% 10% 10%
10%
1
2
3
VVVV284260 VVVV284260 R327 0R/0603 0402 16V 10% X5R X5R X5R
5% R2 R11-5761T12-W08 R3 R11-7151T12-W08 VVVV284260 X7R COMMON
X7R
GND
0402 0402 0805 0805 0805
GPIO7 = 1 FBVDD/Q = 1.383V
COMMON 0.5MMR11-0000013-W08 VVVV284260 COMMON COMMON DNI COMMON
GPIO7 = 0 FBVDD/Q = 1.503V PS_FBVDDQ_VREFIN PS_FBVDDQ_PH2 C11-1042012-M09
VVVV284260 1 REFIN SW2 20 VVVV284260 VVVV284260 XXXV284260 VVVV284260
R11-0103012-W08 C11-1042012-M09 C11-1067514-T04 C11-1067514-T04 C11-1067514-T04
0.5MM GND GND GND GND FBVDDQ
VID =1 SHORTS RSET AND FBRTN GND C167 0.01UF R1
R250 1.43K VVVV284260 19 PS_FBVDDQ_LG2
LG2
VREFIN = VREF X ((R2//R3) / ( R1+(R2//R3))) 0402 COMMON R11-1431T22-W08
0402 16V COMMON 1%
VREFIN = 2.0 X ((4.99//14.3)/ ( 1.65+(4.99//14.3)))
X7R 10% PS_FBVDDQ_VREFOUT 2 VREF
R305 4.99K VVVV284260 VVVV31501S
L703
VREFIN = 1.383V VVVV284260 C168 0.1UF VVVV284260 0402 1% COMMON R11-4991T12-W08 1 2
C11-1032012-W08 C11-1042012-M09 R304 4.99K VVVV284260
RT8809: 0402 16V 10% 0.3uH
5
VID =0 DISCONNECTS RSET AND FBRTN X7R COMMON 0402 1% COMMON R11-4991T12-W08
VREFIN = VREF X (R2 / ( R1+R2)) R252 0 PS_FBVDDQ_VAMP PS_FBVDDQ_ISEN_N R273 0 C949
Roc=DCR*Isum*6/8u 8 EAP CSN 10 VVVV284260 Q50 10UF
VREFIN = 2.0 X (4.99 / ( 1.65+4.99)) Roc/Css 0402 +0.05R DNI 0402 +0.05R COMMON R11-0000012-W08 4 NTMFS4C05NT1G
C918 C938
C957
VREFIN = 1.503V Set OCP trigger current=95A R188 60.4K C176 0.22UF 1000PF 1000PF 6.3V
XXXV284260 PS_FBVDDQ_SS 9 SS CSP 11 PS_FBVDDQ_ISEN_P VVVV284260 VVVV284260 820uF_2.5V
3.9m ohm: Roc = 280K ohm 25V 25V 20%
0402 1% COMMON <New PN> 0402 6.3V 10% C11-2247332-M09 D03-632BA0C-N03 XXXV284260 VVVV284260 VVVV284260
2.5m ohm: Roc = 178K ohm 10% 10% X5R
1
2
3
X5R COMMON <New PN> C11-1022013-W08 C71-8210351-AO5
VVVV284260 PGND 25 X5R X5R 0805
R11-6042T12-W08 C180 COMMON
Set OCP trigger current=65A 7 FBRTN 1000PF 0603 0603
DNI COMMON VVVV284260
1.25m ohm: Roc = 60.4K ohm 25V PS_FBVDDQ_PH_RC2 C11-1067314-M09
10% R706 1
PS_FBVDDQ_CP 5 6
APW8700: COMP FB X5R 0.5MM
GND 0402 1206 5% COMMON GND GND
Css
VVVV284260 DNI VVVV284260
SS = Vout/(22uA/Css)
GND I32-8809B1C-R11 XXXV284260 R11-0010027-R01
C170 1000PF PS_FBVDDQ_RC_CP R264 4.99K GND <New PN> GND
0402 25V 10% 0402 1% COMMON
4 PS_FBVDDQ_ISEN_F R307 1 4
X5R COMMON VVVV284260 VVVV284260
VVVV284260 R11-4991T12-W08 0402 5% COMMON R11-0010012-W08
R11-0000012-W08 C173 680PF PS_FBVDDQ_FB
0402 50V 10% R306 1 VVVV284260
X7R COMMON 0402 5% COMMON R11-0010012-W08
VVVV284260
C178
C11-6812812-T04
0.1UF
PS_FBVDDQ_VSEN R261 1K PS_FBVDDQ_FB 16V
10%
0402 1% COMMON Place near IC. X7R
VVVV284260 0402
FBVDDQ
For single slot
R11-0102T12-R01 DNI
C169 1500PF R263 0
PS_FBVDDQ_RC XXXV284260 Place on the bottom side of Power supply.
0402 50V 10% 0402 +0.05R COMMON <New PN>
X7R COMMON VVVV284260 GND
VVVV284260 R11-0000012-W08
C11-1522832-T04
VVVV284260
R11-0000012-W08
VVVV284260
R11-0471012-Y01
5 5
GND
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PS: Dynamic Power Balance Logic
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 31 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
D500
3V3_F R1018 BAS32L_LL34
10K COMMON
RES1005
5% VVVV277C10
R1016 COMMON
4.7K VVVV277C10 _ R1019 510R 5% 7511_FAN_PWM
1 Thermal IC : NCT7511Y RES1005
5%
RES1005
VVVV277C10
COMMON
1
COMMON _ D01-4148S00-N47
VVVV277C10 D
Q61
G
S
N-2N7002P_SOT23-3-HF
R11-0103012-W08
_
COMMON
Layout notice : _ VVVV277C10
R11-0511012-W08
17
16
15
14
13
U512 5% VVVV277C10 VVVV277C10
7511_TD1- _ COMMON (Not)
GND2 _
SHDL_SEL
TD2-
T_CRIT#_SET
TD2+
D02-03904C9-O05
FANIN1 R1015 1K 1% VVVV277C10 7511_FAN_TACH R720 4.7K 1% EEPROM_A0 R751 4.7K 1%
_
2
4 9 R11-0472T12-W08
_
GPIO2
R1030 R1039
R11-0103012-W08
R11-0103012-W08
RES1005 _ VVVV277C10 I2CB_SDA_R OUT 23 AT24C02C-SSHM-T-HF
10%
X5R
COMMON R11-0000012-W08 COMMON
4.7K 4.7K CAP1005
3V3_F VVVV277C10 COMMON
(Not)
RES1005
1%
RES1005
D0F-7511Y0C-N62
1% R7367 4.7K 1% _ M33-0240203-H28 VVVV277C10
R11-0472T12-W08 RES1005 DNI(Not)
DNI (Not) R11-0000012-W08 GND GND
DNI
XXXV277C10 XXXV277C10 XXXV277C10 R11-0472T12-W08 _
3V3_F _
X R1051 X R719 R7368 X 4.7K 1%
RES1005 DNI(Not)
4.7K 4.7K C11-1042012-M09
XXXV277C10 R11-0472T12-W08
3 RES1005 R11-0472T12-W08
RES1005 3
(Not)
1%
DNI
1%
DNI (Not)
X
R11-0472T12-W08 XXXV277C10 XXXV277C10
X X
R11-0472T12-W08
Fan connector option
23 IN
7511_FAN_PWM
23 IN
7511_FAN_TACH
4 4
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
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PAGE DETAIL PS: Dynamic Power Balance Phases
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 32 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
12
0402 BEAD_0805 COMMON
6.3V 10% 20% 20% 10% 10%
COMMON LB4 220ohm
VIN1P 10% X7R X5R X5R X5R X7R
4 VS X7R 0402 BEAD_0805 COMMON 0603 0805 0402 0402
GND 0805 COMMON DNI COMMON COMMON COMMON
I2CC_SCL_R 6 SCL COMMON INA3221_VIN1N R179 20ohm 12V_INN
23 IN
23
I2CC_SDA_R 7 SDA VIN1N 11 0402 1% COMMON
BI
9
OUT
04020.05 ohm DNI 0402 0603 C71-4702540-N07
COMMON COMMON
I2C Address:(1000 000b) R1273 0ohm
GND 04020.05 ohm DNI
12V_INP
PEX6 INPUT 1 - 2x3 PCIE CON 75W
12V_INN
12V_PEX6_1_INN
12V_PEX6_1_INP
3 +12V 6 3
+12V 7 COMMON 12V 12V
8 PLACE ON NORTH SIDE L22
+12V PEX6_12V TRUE 6.25A 6.25A
0.400 12V 6.25A RS502 0.005ohm 0.400 0.400
XXXV314_10
X
C511 C510 2512_2PIN_KELVIN 0.5uH
N93-08M0361-W06
0.1uF 1uF
GND 1
2 16V 16V
C159
47uF_25V
CHK_D2_7X7
GND
10% 10% L04-05A7321-L65
GND 4 X7R X5R
VVVV284260
GND 0402 0603 C71-4702540-N07
J10 SENSE_1 3 6P_SENSE_A R166 0 COMMON COMMON
6 5 0402 +0.05R COMMON
+12V SENSE_2
+12V 7 INPUT_PEX6_DT1* VVVV284260
+12V 8 POWER_HEADER R11-0000012-W08
POWCONN_D8_10 C961
GND
COMMON 47PF
XXXV314_10
50V INPUT_PEX6_DT1*
X
N93-08M0361-W06
5% OUT 34
C0G
GND 1 0402
GND 2 COMMON
4 VVVV284260
GND
GND C11-4701012-W08
SENSE_1 3
SENSE_2 5 GND
12V_PEX8_2_INP
12V_PEX8_2_INN
MICRO-STAR INT'L CO.,LTD
MS-V317
MSI
Size Document Description Rev
Custom PS: Inputs, Filtering, and Monitoring 1.0
R5015 0ohm
04020.05 ohm COMMON
INPUT_PEX8_DT2* 34
OUT
5 0.254 5
STUFF FOR 6-PIN CONNECTOR
OR REVERSE CPU 8-PIN CONNECTOR
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PS: Inputs, Filtering, and Monitoring
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 33 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
12V_F 3V3_RUN
1 1
R744 R730
10k 1k
5% 1%
0402
THERM OVERT SHUTDOWN LATCH no stuff for power supply bring-up
DNI
0402
COMMON
C858 R725
0.1uF 3.24k
16V 1%
10% 0402
DNI
X5R
0402
DNI
3V3_F
IFP_IOVDD
1G1D1S 3
R664 D Q12
2 GPU_BUFRST* 1k @discrete.q_fet_p_enh(sym_2):page34_i61 2
24 IN
0402 1% DNI 1G1D1S 3 IFP_IOVDD_EN 1G SOT23_1G1D1S LB19
D DNI
Q13 S 2 3V3_F_SW 3.3V
16MIL
220ohm
@discrete.q_fet_n_enh(sym_2):page34_i57 -20V BEAD_0805 DNI
R662 1k SOT23_1G1D1S
3
PEX_RST_BUF* GPU_RST_R* 1G DNI
-3A
-1000mohm@10V / [email protected] / [email protected]
IN
0402 1% DNI S 2 60V
R75 10k -9A
[]
C798 R663 0.26A
0402 DNI
12V
3000mohm@10V / [email protected] / [email protected] 5%
100pF 10k 0.31A
0.3W
50V 5% 20V
5% 0402
C0G DNI
0402
DNI
INPUT_HOT_UNPLUG_DT
12V_F 3V3_F D501
@discrete.d_3pin_cc(sym_1):page34_i241
30V
0.2A
R522 R523 SOT23
1B1C1E 3 INPUT_HOTUNPLUG* R515 0ohm NVVDD_EN
10k 1k COMMON C
INPUT_PEX6_DT1_R* 2 R511 Q507
5% 1% PEX Input Present 1 10k INPUT_HOT_UNPLUG_DT_R B1
0402 COMMON
0402 0402
3 @discrete.q_npn(sym_1):page34_i240 0.05 ohm
INPUT_PEX8_DT2_R* SOT23_1B1C1E
3 DNI COMMON 1 0402 5% COMMON
COMMON 3
POWER OFF
0.254 E 2
INPUT_PEX6_DT1* R521 1k INPUT_PEX6_DT1_R* ON HOTPLUG EVENT
33 IN STUFF TO LATCH
0402 1% COMMON 3V3_F
OUT 35
R520 C5005
3.24k 0.1uF INPUT_EN_HPD
1% 25V R514
0402 10% 10k
DNI X7R
5%
0603
0402
12V_F COMMON
COMMON 1B1C1E 3
3V3_F C Q509
GND INPUT_HOT_UNPLUG_R 3 INPUT_HOT_UNPLUG_Q B1 @discrete.q_npn(sym_1):page34_i239
R510 C Q506 SOT23_1B1C1E
GND 1B1C1E COMMON
R531 R527 10k B1 @discrete.q_npn(sym_1):page34_i236 E 2
10k 1k SOT23_1B1C1E
0402 5% COMMON
COMMON
5% 1% C504 E 2
0402 0402 PEX Input Present 2 0.1uF
DNI COMMON
16V
0.254 10%
INPUT_PEX8_DT2* R5016 1k INPUT_PEX8_DT2_R* INPUT_EN_HPD_Q
33 IN X7R
0402 1% COMMON 0402
C5004 OUT 35 COMMON GND 1G1D1S 3
R529 0.1uF D Q508
3.24k 25V R513 @discrete.q_fet_n_enh(sym_2):page34_i235
10%
GND
1% 10k SOT23_1G1D1S
0402 X7R 27,28,33,34
NVVDD_EN INPUT_NVVDD_EN_HPD 1G COMMON
IN
DNI 0603 0402 5% COMMON S 2 60V
GND
TP18 TP17
5
U50
1 @logic.u_and_2in(sym_1):page34_i255
4 POWER_BRAKE_R R1120 0ohm GPIO9_THERM_ALERT*
XXXV314_10
XXXV314_10 OUT 23,33
X X 2 SC70-5 04020.05 ohm DNI
N/A N/A DNI
3
GND
GND
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PS: Shutdown
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 34 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
Page35: PS: 12V Current Steering, PSI Control, and LED MICRO-STAR INT'L CO.,LTD
MS-V317
MSI
Size Document Description Rev
PEX Input - 12V Current Steering FETs Custom 12V Current Steering, PSI Control, and LED 1.0
1 1
12V_PEX8_F2
1G1D1S 3
12V_PEX8_F2_STEER_RC D Q37
12V_STEER_C @discrete.q_fet_n_enh(sym_2):page35_i101 3V3_F
SOT23_1G1D1S
1G1D1S 3 34
INPUT_PEX6_DT1_R* 1G COMMON
D IN
Q43 S 2 3V3_F
R189 1k @discrete.q_fet_n_enh(sym_2):page35_i72 60V
INPUT_PEX8_DT2_R* INPUT_PEX8_DT2_RC* 1G SOT23_1G1D1S C232 0.26A R180
5 IN COMMON 1uF
3000mohm@10V / [email protected] / [email protected]
0.31A 10k
0402 1% COMMON S 2 0.3W
16V 20V R176 5%
60V
0.26A 10% 10k 0402
3000mohm@10V / [email protected] / [email protected]
X5R DNI
0.31A 5%
0.3W 0603
2 20V
0402
GPIO6_PSI_R* R177 0ohmGPIO6_PSI* 2
COMMON GND DNI 23,27
OUT
1B1C1E 3 04020.05 ohm DNI
C Q36
GND GND 1G1D1S 3 1G1D1S 3 LOWPWR_MODE R174 100ohm B1 @discrete.q_npn(sym_1):page35_i116
D Q39 D Q38 0402 DNI
SOT23_1B1C1E
1% DNI
@discrete.q_fet_n_enh(sym_2):page35_i102 @discrete.q_fet_n_enh(sym_2):page35_i77 E 2
INPUT_PEX8_DT2_R* 1G SOT23_1G1D1S
1G SOT23_1G1D1S R175
34,35 IN COMMON DNI 100k
S 2 S 2
5%
60V 60V
0.26A 0.26A
0402
12V_F 3000mohm@10V / [email protected] / [email protected] 3000mohm@10V / [email protected] / [email protected] DNI
0.31A 0.31A
0.3W 0.3W
20V 20V
12V_F_STEER_N
C233 4.7uF
GND
0805 16V GND GND GND
10% 5
X5R
1G4D3S D
Q40
COMMON
R173 0402
@discrete.q_fet_p_enh(sym_8):page35_i132 1B1C1E 3 PS_FBVDDQ_PSI*
R186 100k C OUT 31
4G DFN3X3 Q51
COMMON
0402 5% COMMON 20k COMMON 1 B1 INS16739696
S -30V
-10.8A SOT23_1B1C1E
5% 2 18mohm@10V / [email protected] / [email protected] DNI
-80A
3 3.4W E 2
25V
GND
3 12V_F_STEER_N_R
3
1G1D1S 3
D Q42
@discrete.q_fet_n_enh(sym_2):page35_i100
SOT23_1G1D1S
1G COMMON
S 2
60V
0.26A
3000mohm@10V / [email protected] / [email protected]
0.31A
0.3W
20V
GND
R503 12V_F
3.3k
5%
R160 R159 R525 R524 0402
@discrete.q_fet_p_enh(sym_8):page35_i737
1% 1%
12V_F 12V_F
0603 0603
J6 3V3_RUN COMMON COMMON
LED 1
LED_Q* 2 R502 R506 Q505
COMMON
-10.8A
3.4W
-80A
-30V
27k 27k
DFN3X3
25V
SLI_LED_R SLI_LED
22
3
2
1
5
R146 5% 5% OUT
HEADER_1X2_SHROUDED
10k 0402 0402
3 3
D
S
1G1D1S 1B1C1E COMMON COMMON
5% D Q35 N32-1020511-J11 C Q504 GPIO5_LED_Q SLI_LED_Q
0402 R504
R142 1k @discrete.q_fet_n_enh(sym_2):page35_i234 VVVV284260 B1 @discrete.q_npn(sym_1):page35_i248 3 3
4 G
COMMON 1G1D1S 1G1D1S
R141 0ohm SOT23_1G1D1S SOT23_1B1C1E D D 0ohm
23
GPIO11_LOGO_LED GPIO11_LOGO_LED_R LED_ON 1G COMMON COMMON
Q502 Q501
IN 0.05 ohm
S 2 E 2 @discrete.q_fet_n_enh(sym_2):page35_i250 @discrete.q_fet_n_enh(sym_2):page35_i259
1G4D3S
04020.05 ohm COMMON 0402 COMMON
C197 SOT23_1G1D1S SOT23_1G1D1S 0402
1% 60V 1G COMMON 1G COMMON DNI
0.26A
0.1uF 3000mohm@10V / [email protected] / [email protected] S 2 S 2 GPIO5_LED_Q_N
0.31A
16V 0.3W 3 1G1D1S
10%
20V
Q503 D
X7R @discrete.q_fet_n_enh(sym_2):page35_i256
0402 SOT23_1G1D1S G1
GND COMMON
COMMON
2 S GND
GND GND
GND
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL PS: 12V Current Steering PSI Control and LED
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 35 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
1 1
MEC4-1
INS16973167
X8
DNI
2
1 2
MEC4-2
INS16973156
X8
DNI
2
Brackets:
Bracket Screw MEC4-3 Mechanical Holes Symbol
INS16973145
X8
DNI
BKT1
@design_lib.p2005bracket(sym_4):page36_i26
3
ATX_2X_2P
DNI MEC1 MEC10
MEC6 MEC4-4
1 H_R220D125 H_R220D125
@mechanic.mec_screw(sym_2):page36_i3 INS16973134
STD X8 1 1
DNI DNI DNI DNI
4
MEC2 MEC11
H_R220D125 H_R220D125
new LF screw --155-0001-000.
1 1
MECH. MOUNTING ALL
MEC7 MEC12
H_R220D125 H_R220D125
MEC4-6 1 1
DNI DNI
INS16973112
X8
DNI
2 MEC8 MEC13
6 H_R220D125 H_R220D125
3 3
1 1
DNI DNI
MEC4-7
INS16973101
X8 MEC9 MEC14
GND DNI H_R220D125 H_R220D125
7 1 1
DNI DNI
GND GND
J11 J17
FM1 FM2 FM3 FM4
3 1 HDMI_FEE
4 2 PCB
impedence X_PIN1*2
PCB
HDMI
$$$$$$ OPT
F_PAD_X
OPT
F_PAD_X
OPT
F_PAD_X
OPT
F_PAD_X
HDMI_FEE
109-GN982-00A COMMON
4 4
VVVV27729S FM5 FM6 FM7 FM8
COMMON Y01-RHDMI03-000
VVVV27729S
J12 PD0-0V27711-E48
J16
3 1 OPT OPT OPT OPT
4 2 F_PAD_X F_PAD_X F_PAD_X F_PAD_X
impedence
X_PIN1*2
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MECH: Bracket/Thermal
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 36 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H
A B C D E F G H
Page37:
1.P17 增加DVI ESD
2.P18~P21 修改HDMI,DP footprint, 增加HDMI ESD
3.簡化SLI線路
4.移除原本FBVDDQ線路
5.P27~P30 更換NVVD 線路
1
6.P31~32 移除dynamic power circuit/增加風扇7511線路 1
2 2
3 3
4 4
5 5
NVIDIA CORPORATION
2701 SAN TOMAS EXPRESSWAY
ASSEMBLY BASE LEVEL GENERIC SCHEMATIC ONLY SANTA CLARA, CA 95050, USA
PAGE DETAIL MICROCONTROLLER
NV_PN 600-1G401-BASE-QS1
ALL NVIDIA DESIGN SPECIFICATIONS, REFERENCE SPECIFICATIONS, REFERENCE BOARDS, FILES, DRAWINGS, DIAGNOSTICS, LISTS AND OTHER DOCUMENTS OR INFORMATION (TOGETHER AND SEPARATELY, 'MATERIALS') ARE BEING PROVIDED 'AS IS'. THE MATERIALS MAY
CONTAIN KNOWN AND UNKNOWN VIOLATIONS OR DEVIATIONS OF INDUSTRY STANDARDS AND SPECIFICATIONS. NVIDIA MAKES NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY OR OTHERWISE WITH RESPECT TO THE MATERIALS OR OTHERWISE, AND EXPRESSLY DISCLAIMS ALL PCB REV PG401-A02 PAGE 37 OF 37
IMPLIED WARRANTIES INCLUDING, WITHOUT LIMITATION, THE WARRANTIES OF DESIGN, OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, OR ARISING FROM A COURSE OF DEALING, TRADE USAGE, TRADE PRACTICE, OR INDUSTRY STANDARDS. BOM REV A DATE 04-AUG-2014
A B C D E F G H