Product Information

Allegro Package Designations

INTRODUCTION
This document provides reference information as an The options available for any specific device are
aid to differentiating the device package types used by substantially determined by the package designation
Allegro™ MicroSystems. It provides cross-references for that device. Not all options are available for any
to the package designation, an Allegro code that is particular package designation or device type, and
integrated into the device part number: provision of certain configurations may be subject
• alphabetical listing of Allegro package to minimum volume or ncnr (noncancellation, non-
designators, with differentiating specifications return) limitations.
and reference illustrations
For clarity and differentiation, the drawings are
• alphabetical listing of common or obsolete
schematic and not to scale, however, a representative
package designators, cross-referenced to Allegro
footprint is provided at approximately actual size of
designators
the package body when mounted on a pcb. The draw-
• key to interpreting Allegro part numbers for
ings do not represent all possible configurations of
package designators
that device, or any particular device, and may have
• key to interpreting Allegro terms for lead forms
features that vary according to supplier preference
The package designator is used to differentiate the within specifications, such as pin 1 index marks.
external physical characteristics of the packages for Exposed thermal pads may have several alternative
ordering purposes. layouts for any particular package designation.
To use this document, in the Allegro Package Code When applicable, references to industry-standard type
column, locate the package designator for the device. conventions, such as jedec package registrations,
Alternatively, use the drawings to identify a package, are provided. These references are for informational
or the cross-reference to common terms. purposes only, and do not necessarily indicate that the
device indicated conforms fully with those standards
A few package types have leadform options. These in all respects.
options are indicted by the instruction codes, shown
in parentheses in the Package Designation column.
Leadform options are shown in separate rows. Leadform
options are not always available for every device type.

NOTE: For information on packages and leadform

configurations offered for individual devices, refer to
the datasheet for the device.

PUB26013, Rev. 8 August 18, 2021

MCO-0000225
 PACKAGE DESIGNATORS
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals
Plastic dual in-line (DIP/PDIP/DIL/PDIL); MS-001AA 14
MS-001AC 18
Through-hole pin, 300 mil row spacing; MS-001AD 20
"BB" half-lead end pins. OBSOLETE MS-001AF 24
Plastic dual in-line (DIP/PDIP/DIL/PDIL);
Through-hole pin, 300 mil row spacing (width measured – 16
A at shoulders of leads); End pins are half-leads

Plastic dual in-line (DIP/PDIP/DIL/PDIL);

MS-010AA 22
Through-hole pin, 400 mil row spacing; OBSOLETE

Plastic dual in-line (DIP/PDIP/DIL/PDIL);

MS-011AB 28
Through-hole pin, 600 mil row spacing; OBSOLETE

Semi-tab plastic dual in-line (DIP/PDIP/DIL/PDIL)

with internally fused leads, both sides; MS-001BB 16
B
Through-hole pin, 300 mil row spacing; MS-001AF 24
"BB" half-lead end pins; OBSOLETE

Plastic case with internally fused primary conductor leads

CB-PFF for sensed current; – 5
Through-hole pin

Plastic case with internally fused primary conductor leads

CB-PSF for sensed current; – 5
Through-hole/weld pin

Plastic case with internally fused primary conductor leads

CB-PSS for sensed current; – 5
Through-hole/weld pin

Plastic case with internally fused primary conductor leads

CB-SMT for sensed current; – 5
Through-hole/weld pin

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals

CG Bare die with solder bumps (WLCSP) – Various

CW Wafer with bare die – Various –

Plastic leaded chip carrier (PLCC/PQCC);

square body; internally fused leads, two opposite sides; MS-018AB 28
EB
Socket J lead; MS-018AC 44
OBSOLETE

Plastic leadless package with quad (4) populated sides

and exposed thermal pad (MLPQ/QFN); square body,
EC MO-220WGGE 26
0.75 mm nominal (0.80 maximum) height;
Surface-mount contacts, 0.40 mm contact pitch

Plastic leaded chip carrier (PLCC/PQCC);

square body; internally fused leads, four sides;
ED MS-018AC 44
Socket J lead;
OBSOLETE

Plastic leadless package with dual (2 opposite) populated

sides and exposed thermal pad (MLPD/DFN/SON);
EE square body, variable footprint; 0.60 mm maximum height MO-229UCCD 8, 10
(ultra-thin profile)
Surface-mount contacts, 0.50 mm contact pitch

Plastic leadless package with quad (4) populated sides

and exposed thermal pad (QFN); rectangular body,
EG MO-229WDED 28
4 × 5 mm, 0.75 mm nominal (0.80 maximum) height;
Surface-mount contacts, 0.50 mm contact pitch

Plastic leadless package with dual (2 opposite) populated

sides (shorter sides) and exposed thermal pad (MLPD/
MO-229WCED
EH DFN/SON); rectangular body, 2 × 3 mm, 0.75 mm Type1
6
nominal (0.80 maximum) height;
Surface-mount contacts, 0.50 mm contact pitch
Plastic leadless package with dual (2 opposite) populated
sides and exposed thermal pad (MLPD/DFN/SON);
EJ square body, 3 × 3 mm footprint; 0.75 mm nominal (0.80 MO-229WEED 10
maximum) height;
Surface-mount contacts, 0.50 mm contact pitch
Plastic leadless package with dual (2 opposite) populated
sides and exposed thermal pad (MLPD/DFN/SON);
5,
EK square body, variable footprint; 0.75 mm nominal (0.80 MO-229WEEA
6 (OBS)
maximum) height;
Surface-mount contacts, 0.95 mm contact pitch
Plastic leadless package with dual (2 opposite) populated
sides and exposed thermal pad (MLPD/DFN/SON);
EL square body, variable footprint, 0.55 mm maximum height MO-229UCCD 3, 6
(ultra-thin profile); Surface-mount contacts, 0.50 mm
contact pitch; OBSOLETE

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals
Plastic leadless package with dual (2 opposite) populated
sides and exposed thermal pad (MLPD/DFN/SON);
square body, variable footprint, 0.45 mm nominal
EM MO-229XCCC 5
(0.50 mm maximum) height;
Surface-mount contacts, 0.65 mm contact pitch;
OBSOLETE

Plastic leaded chip carrier (PLCC/PQCC);

MS-018AA 20
square body;
EP MS-018AB 28
Socket J lead; MS-018AC 44
OBSOLETE

Plastic leadless package with quad (4) populated sides

and exposed thermal pad (MLPQ/QFN); square body, MO-220WEED 12, 16
ES
0.75 mm nominal (0.80 maximum) height; MO-220WGGD 20, 24
Surface-mount contacts, 0.50 mm contact pitch

Plastic leadless package with quad (4) populated sides

and exposed thermal pad (MLPQ/QFN); square body,
ET 5 × 5 mm maximum footprint; 0.90 mm nominal height MO-220VHHD 28, 32
(1.00 maximum);
Surface-mount contacts, 0.50 mm contact pitch
Plastic leadless package with quad (4) populated sides
and exposed thermal pad (MLPQ/QFN); square body,
EU 4 × 4 mm footprint, 0.75 mm nominal (0.80 mm MO-220WGGC 16
maximum) height;
Surface-mount contacts, 0.65 mm contact pitch
Plastic leadless package with quad (4) populated sides
and exposed thermal pad (MLPQ/QFN); square body,
MO-220VJJD 36, 40
EV variable footprint; 0.90 mm nominal (1.00 maximum) MO-220VKKD 48
height;
Surface-mount contacts, 0.50 mm contact pitch
Plastic leadless package with dual (2) populated sides
and exposed thermal pad (MLPD/DFN/SON); rectangular
MO-229X2BCD
EW body, 0.40 mm maximum height (super-thin profile) Type1
6
Surface-mount contacts, variable footprint (including
pullback contacts), 0.50 mm contact pitch

Plastic leadless package with quad (4) populated sides

and exposed current loop (MLPQ/QFN); square body,
10
EX 3 × 3 mm footprint; 0.75 mm nominal height (0.80 MO-220WEED
12
maximum);
Surface-mount contacts, 0.50 mm contact pitch

4
PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals
Plastic low-profile quad flatpack with exposed thermal
pad (LQFP, eLQFP);
JP MS-026BBCHD 32, 48
1.4 mm nominal body thickness;
Gull-wing surface-mount
Plastic thin-profile quad flatpack with exposed thermal
pad (TQFP, eTQFP);
JP
JS MS-026ADDHD 80
1.0 mm nominal body thickness;
Gull-wing surface-mount, 0.50 mm contact pitch
Plastic thin-profile quad flatpack (TQFP);
1.0 mm nominal body thickness;
JU MS-026ABC 48
Gull-wing surface-mount, 0.50 mm contact pitch;
OBSOLETE

Plastic single in-line (SIP), matrix;

Through-hole pin; – 4
Flat tie bar burr area at case top

K
(none)

Plastic single in-line (SIP), conventional;

Through-hole pin;
– 4
no tie bars at case top
OBSOLETE

K Plastic single in-line (SIP);

(TL,TS) Pins formed for horizontal body mounting – 4

K Plastic single in-line (SIP);

(TW) Pins formed for horizontal body mounting – 4

KA Plastic single in-line (SIP); – 5

(none) Through-hole pin

KA Plastic single in-line (SIP);

– 5
(TL,TS) Pins formed for horizontal body mounting

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals

Plastic single in-line (SIP);

KB – 3
Through-hole pin

Plastic single in-line (SIP);

KC – 3 See KB
Through-hole pin

Plastic single in-line (SIP);

KE – 4
Through-hole pin

Plastic single in-line (SIP);

KH – 3
Through-hole pin

Plastic single in-line (SIP);

KN – 4
Through-hole pin

Plastic single in-line (SIP);

KT – 4
Through-hole pin

KT Plastic single in-line (SIP);

– 4
(TF) Through-hole pin

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals

KT Plastic single in-line (SIP);

– 4
(TH) Through-hole pin

Plastic small-outline IC (SOIC, SO, SOP); MS-012AA 8 (NND),

L 3.90 mm/150 mil body width; MS-012AB 14 (OBS),
Gull-wing surface-mount, 1.27 mm lead pitch MS-012AC 16 (OBS)

Plastic small-outline IC (SOIC-W, SOP) with internally

fused primary conductor leads for sensed current;
LA MS-013AA 16
7.50 mm/300 mil body width;
Gull-wing surface-mount, 1.27 mm lead pitch

Plastic small-outline IC (SOIC-W, SOP) MS-013AA 16,

with internally fused leads or external semitab, both sides; MS-013AC 20 (OBS),
LB
7.50 mm/300 mil body width; MS-013AD 24,
Gull-wing surface-mount, 1.27 mm lead pitch MS-013AE 28 (OBS)

Plastic small-outline IC (SOIC, SO, SOP) with internally

fused primary conductor leads for sensed current;
LC MS-012AA 8
3.90 mm/150 mil body width;
Gull-wing surface-mount, 1.27 mm lead pitch

Plastic thin-shrink small-outline IC (TSSOP);

LD 4.4 mm body width; MO-153BD-1 38
Gull-wing surface-mount, 0.50 mm lead pitch

Plastic thin-shrink small-outline IC (TSSOP); 8,

14,
LE 4.4 mm body width; MO-153AC
20,
Gull-wing surface-mount, 0.65 mm lead pitch 24
Plastic small-outline IC (QSOP, appearance like SOIC)
sensor variant with internally fused primary conductor
LF leads for sensed current; MO-137AE 24
3.90 mm body width;
Gull-wing surface-mount, 0.635 mm lead pitch

Plastic thin-shrink small-outline IC (TSSOP);

with internally fused leads, both sides;
LG MO-153BD-1 38
4.4 mm body width;
Gull-wing surface-mount, 0.50 mm lead pitch

Plastic small-outline transistor (SOT23W-3, SOHED);

3,
LH 1.98 mm body width; –
5
Mini gull-wing surface-mount

7
PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals

Plastic small-outline IC (SOIC, SO, SOP) with exposed

thermal pad;
LJ MS-012BA 8
3.90 mm/150 mil body width;
Gull-wing surface-mount, 1.27 mm lead pitch

Plastic small-outline IC (SOIC) with exposed thermal pad;

LK 3.90 mm/150 mil body width; – 10
Gull-wing surface-mount, 1 mm lead pitch

Plastic small-outline transistor, thermally enhanced with

LL exposed ground tab (SOT89, SC-62); TO-243AA 3
Surface-mount flat lug lead

Plastic small-outline IC (SOIC, SSOP);

LN 3.90 mm/150 mil body width; – 10
Gull-wing surface-mount, 1.00 mm lead pitch

Plastic small-outline IC (SOIC, SO, SOP);

3.90 mm/150 mil body width; MS-012AA
LO 8
Gull-wing surface-mount, 1.27 mm lead pitch;
NND

Plastic thin-shrink small-outline IC with exposed thermal MO-153ABT 16

pad (TSSOP); MO-153ACT 20
LP
Gull-wing surface-mount, 0.65 mm lead pitch; MO-153ADT 24
4.4 mm body width MO-153AET 28

Plastic small-outline IC (QSOP, appearance like SOIC);

36,
LQ 7.50 mm/300mil body width; –
44
Gull-wing surface-mount, 0.80 mm lead pitch

Plastic small-outline flip-chip design IC (PSOF);

LR – 7
1.6 mm pitch primary leads with exposed current loop

Plastic small-outline flip-chip design IC (PSOF);

LS – 10
0.8 mm pitch primary leads with exposed current loop

Plastic small-outline transistor, thermally enhanced with

LT exposed ground tab (SOT89, SC-62); TO-243AA 3
Surface-mount flat lug lead

8
PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals

Plastic thin-shrink small-outline IC (TSSOP)

LU 4.4 mm body width; – 8, 14
Gull-wing surface-mount, 0.65 mm lead pitch

Plastic thin-shrink small-outline IC (TSSOP)

with exposed thermal pad;
LV MO-153BDT 38
4.4 mm body width;
Gull-wing surface-mount, 0.50 mm lead pitch

MS-013AA 16,
Plastic small-outline IC (SOIC-W, SOP); MS-013AB 18 (OBS),
LW 7.50 mm/300 mil body width; MS-013AC 20,
Gull-wing surface-mount, 1.27 mm lead pitch MS-013AD 24,
MS-013AE 28 (OBS)

Mini small-outline (MSOP, SOP: appearance like TSSOP)

LY with exposed thermal pad; MO-187BA-T 10
Gull-wing surface-mount, 0.50 mm lead pitch

Mini plastic dual in-line (DIP/PDIP);

M 300 mil row spacing, half-lead end pins; MS-001BA 8
Through-hole pin; OBSOLETE

Plastic small-outline IC (SOIC-W);

MA 7.50 mm/300 mil body width; MS-013AA 16
Gull-wing surface-mount, 1.27 mm lead pitch

Plastic small-outline IC (SOIC);

OL 3.90 mm/150 mil body width; – 8
Gull-wing surface-mount, 1.27 mm lead pitch

Plastic case (SIP);

9 mm body height;
SA – 4
Through-hole pin
OBSOLETE

Plastic case (SIP);

7 mm body height;
SB – 4
Through-hole pin
NND

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals

Plastic single in-line (SIP), round top;

Spread pins;
SE – 4
Through-hole pin;
Molded lead bar

Plastic single in-line (SIP), flat top;

Straight full pins;
SG – 4
Through-hole pin;
Molded lead bar

Plastic single in-line (SIP), flat top;

Pins 2 and 3 clipped, pins 1 and 4 wide;
SH – 4
Through-hole pin;
Molded lead bar

Plastic single in-line (SIP), flat top;

Spread pins;
SJ – 4
Through-hole pin;
Molded lead bar

Plastic single in-line (SIP);

9.65 mm diameter, 6.00 mm thick case, OR
10.0 mm diameter, 6.00 mm thick case;
SL – 3
Spread pins;
Through-hole pin;
Molded lead bar

Plastic single in-line (SIP);

8.0 mm diameter, 5.00 mm thick case;
SM Spread pins; – 3
Through-hole pin;
Molded lead bar

10
PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals

Plastic single in-line (SIP);

8.0 mm diameter, 5.00 mm thick case;
SN Spread pins; – 3
Through-hole pin;
Molded lead bar

Plastic single in-line (SIP);

8.0 mm diameter, 5.00 mm thick case;
SP Spread pins; – 3
Through-hole pin;
Molded lead bar

Plastic mini single in-line (SIP);

U Through-hole pin – 3
OBSOLETE

Conventional. Plastic ultra-mini single in-line (SIP);

– 3
Through-hole pin, 1.27 mm pin pitch, 15.75 mm leads

UA
(TI,TN,
TJ)

Matrix. Plastic ultramini single in-line (SIP);

– 3
Through-hole pin, 1.27 mm pin pitch, 14.99 mm leads

Plastic ultra-mini single in-line (SIP);

UA
Through-hole pin, 2.54 mm pin pitch, – 3
(LC,TA)
conventional or matrix

Plastic ultra-mini single in-line (SIP);

UA
Pins formed for horizontal body mounting; – 3
(TL,TS)
50 mil pin pitch, conventional or matrix

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Package JEDEC Quantity
Package Type Pictorial View/
Desig- Package of
(Common Package Designator) Representative Footprint
nator Outline Terminals

Plastic mini single in-line (SIP);

UB Through-hole pin; – 2
Molded lead bar

Plastic mini single in-line (SIP);

UC Through-hole pin; – 3
Molded lead bar

Plastic mini single in-line (SIP);

UD – 2
Through-hole pin

Plastic mini single in-line (SIP);

UE Through-hole pin; – 2
Molded lead bar

Plastic ultramini single in-line (SIP);

UF Through-hole pin. Variant of UA – gate relief package, – 3
without tiebars

Plastic ultramini single in-line (SIP);

Through-hole pin.
UG – 3
Sensors Hall device with straight leads.
4.06 mm × 4.05 mm package body with no lead bar.

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
 COMMON PACKAGE TERM CROSS-REFERENCE

Common Configuration Terms

Package Package
Term Term
Designator Designator
CSP CG K
KA
EE
KB
EF
KH
EH
KT
EJ
DFN SA
EK
SB
EL
SE
EM
SG
EW
SH
A SIP SJ
DIP B SL
M SM
SN
LQFP JP
U
MSOP LY, LZ UA
EA UB
EB UC
PLCC ED UD
EP UF
EQ UG

LR L
PSOF LC
LS
LJ
EG SOIC-N
LK
ES LN
ET LO
QFN
EU
EV LA
EX LB
SOIC-W
LW
LF MA
QSOP
LQ
SOT23 LR
SOT23-W LH
LL
SOT89
LT
JS
TQFP
JU
LD
LE
LG
TSSOP
LP
LU
LV
Wafer (undiced) CW
WLCSP CG

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
COMMON PACKAGE TERM CROSS-REFERENCE (continued)
Alternative Terms for Configurations (other industry terms or obsolete)
Package Package Package
Term Term Term
Designator Designator Designator
Bumped Die CG HTSSOP See LP L
LA
DIL See DIP See DFN and
MLP LB
QFN
eTSSOP See LP SOP LC
MLPD See DFN LJ
Flip Chip CG
MLPQ See QFN LW
SE LZ
SG PDIL See DIP
G2000 SON See DFN
SH
PDIP See DIP
SJ TDFN See DFN
PQCC See PLCC
K TSSOP appearance See MSOP
KA PQFN See QFN
KB PSON See DFN
KC
KT SC-62 LT
U L
HED UA SO LC
UB LJ
UC
UD SOHED LH
UE SOIC appearance See QSOP
UF
UG

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
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www.allegromicro.com
 QFN/DFN/SON/MLP DIMENSIONAL CROSS-REFERENCE

Sort by Contact Pitch Sort by Overall Package Height

Pitch Maximum Maximum Pitch
Size Constraint Size Constraint
(mm) Height (mm) Height (mm) (mm)
EC 0.40 0.80 EW 0.40 0.50 Type 1
EE 0.50 0.60 EM 0.50 0.65
EG 0.50 0.80 4 mm × 5 mm max EL 0.55 0.50
EH 0.50 0.80 Type 1 EE 0.60 0.50
EJ 0.50 0.80 EC 0.80 0.40
EL 0.50 0.55 EH 0.80 0.50 Type 1
ES 0.50 0.80 EJ 0.80 0.50
ET 0.50 1.00 5 mm × 5 mm max EK 0.80 0.95
EV 0.50 1.00 6 mm × 6 mm min ES 0.80 0.50
EW 0.50 0.40 Type 1 EU 0.80 0.65
EX 0.50 0.80 EX 0.80 0.50
EM 0.65 0.50 EF 1.00 1.27 Type 2
EU 0.65 0.80 ET 1.00 0.50 5 mm × 5 mm max
EK 0.95 0.80 EV 1.00 0.50 6 mm × 6 mm min
EF 1.27 1.00 Type 2

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www.allegromicro.com
Complete Part Numbers
Complete Part Number Format
("A" initial character style, general product lines)
Instructions (Special Configuration)
Package Designation

AAA NNNN A A AA AA [–]AA –A

Allegro Identifier (Device Family)
Device Type
Industrial Option
Operating Temperature Range
Instructions (Packing Leadform)
Leadframe Plating

Allegro Identifier [A, and optional 1 to 2 letters]

Device Type [3 to 4 numbers] functional type
Industrial Option [optional 1 letter] blank indicates default configuration; N: industrial
Operating Temperature Range [1 letter] ambient temperature range
Package Designation [1 or 2 letters] body configuration
Instructions (Finishing) Leadform/packing option, etc. Blank indicates default configuration
Leadframe Plating ["-" and 1 letter] nonlead (Pb-free) option

Complete Part Number Format

("A" initial character style, for all part numbers with 5-digit device type)

Instructions (Special Configuration)

Package Designation

AAA NNNNN A A AAA AA [–]AA

Allegro Identifier (Device Family)
Device Type
Industrial Option
Operating Temperature Range
Instructions (Packing Leadform)

Allegro Identifier [A, and optional 1 to 2 letters]

Device Type [5 numbers] functional type
Industrial Option [optional 1 letter] blank indicates default configuration; N: industrial
Operating Temperature Range [1 letter] ambient temperature range
Package Designation [3 letters] body configuration
Instructions (Finishing) Leadform/packing option, etc. Blank indicates default configuration

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Complete Part Numbers (continued)
Complete Part Number Format
(Sensed current range style, current sensor IC product lines)
Leadform Option
Instructions (Special Configuration)
Package Designation

ACS NNN A AA AA [–]AA [–NNNAA] –AAA [–A]

Allegro Identifier (Device Family)
Device Type
Operating Temperature Range
Instructions (Packing Leadform)
Current Sensing Range
Leadframe Plating

Allegro Identifier ACS

Device Type [3 numbers] functional type
Operating Temperature Range [1 letter] ambient temperature range
Package Designation [1 or 2 letters] body configuration
Instructions (Finishing) Leadform/packing option, etc. Blank indicates default configuration
Current Sensing Range [3 numbers] optimal sensing amperage range
[1 letter] measurable sensing range multiplier. A: 1 × optimal, B: 2 × optimal,
C: 3 × optimal
[1 letter] current direction measurable. B: bidirectional, U: unidirectional
Leadform (75x series) [3 letters] PFF: formed signal leads, formed current terminals, PSF: formed
signal leads, straight current terminals, PSS: straight signal leads, straight
current terminals
Leadframe Plating ["-" and 1 letter] nonlead (Pb-free) option

Complete Part Number Format

("U" initial character style, general product lines)

Instructions (Special Configuration)

Package Designation

UD A NNNN AA AA [–]AA –A
Allegro Identifier (Device Family)
Operating Temperature Range
Device Type
Instructions (Packing Leadform)
Leadframe Plating

Allegro Identifier UD
Operating Temperature Range [1 letter] ambient temperature range
Device Type [3 to 4 numbers] functional type
Package Designation [1 or 2 letters] body configuration
Instructions (Finishing) Leadform/packing option, etc. Blank indicates default configuration
Leadframe Plating ["-" and 1 letter] nonlead (Pb-free) option

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Terms Used to Describe Lead Configurations
Term Description Example
X Direction Separation
Straight Straight over full length, and perpendicular to package surface K
Spread Straight at package surface, with increased pitch after bend SJ
Fused leads Internally fused leads for increased thermal conductance (formerly: semi-tab) LB
Joined Straight at package surface, with merge after bend KB
Y Direction Length
Untrimmed All leads at longer length UA (TI ordering Instruction)
Trimmed All leads at shorter length UA (TL ordering Instruction)
Clipped Some leads shorter than other leads SH
Z Direction Offset
Flat Straight and perpendicular to package surface UA (TI ordering Instruction)
Offset Bent toward mounting surface, then parallel to mounting surface UA (TL ordering Instruction)

Mold Knockout Pin Indentation

Pin Index Mark

(Optional)

Branding Mark
(Optional)

X Z

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Revision History
Number Date Description
4 July 31, 2017 Added LR, LS, LU, K matrix, SM, SN, and UC packages
5 July 10, 2018 Added EX-10, KH-3, LO-8, SP-3, and UE-3 packages; corrected LU package
Updated ED, EL, LO, SB package status; corrected JP, JS references; added KT (TF) package leadform; added
6 September 19, 2019
SL package; other minor editorial updates
7 July 27, 2021 Added CB-SMT, LL, and UD packages; added LU 14 lead count package; corrected SN package lead count
Updated B package status from NND to OBSOLETE; added KT (TH) package leadform, UF and UG packages;
8 August 18, 2021
added industrial-grade option to part numbering guide

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Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit
improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor
for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.

For the latest version of this document, visit our website:

www.allegromicro.com

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PUB26013, Rev. 8 Allegro MicroSystems
955 Perimeter Road
MCO-0000225 Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com