Data Sheet TLE 6225 G

Smart Quad Low-Side Switch

Features Product Summary

• Shorted circuit protection
• Overtemperature protection
Supply voltage VS 4.5 – 32 V
• Overvoltage protection
Drain source voltage VDS(AZ)max 60 V
• Open Load Detection
• Direct parallel control of the inputs On resistance RON 1.7 Ω
• Inputs high or low active programmable Output current(each) ID(NOM) 350 mA
• General fault flag (individ.) 500 mA
• Very low standby quiescent current
• Compatible with 3V microcontrollers
• Electostatic discharge (ESD) protection
Application
• µC compatible power switch for 12 V applications
• Switch for automotive and industrial systems P-DSO 20-6
• Line, relay or lamp driver Ordering Code:
Q 67006 A9373
General description
Quad channel Low-Side Switch in Smart Power Technology (SPT) with four separate inputs
and four open drain DMOS output stages. The TLE 6225 G is protected by embedded protec-
tion functions and designed for automotive and industrial applications, to drive lines, lamps
and relays.

Block Diagram

PRG ENA VS FAULT

GND VS
Diagnostic, Vbb
Protection
IN1
Over Temp.
as Ch. 1
Logic Open Load
as Ch. 1
OUT1
Output Stage
IN4 as Ch. 1

1 4
4
Output Control OUT4
Buffer

GND

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 Data Sheet TLE 6225 G

Pin Description Pin Configuration (Top view)

Pin Symbol Function

1 IN1 Input Channel 1 IN1 1• 20 PRG
IN2 2 19 OUT1
2 IN2 Input Channel 2
FAULT 3 18 OUT2
3 FAULT General Fault Flag
GND 4 17 GND
4 GND Ground GND 5 16 GND
5 GND Ground GND 6 15 GND
6 GND Ground GND 7 14 GND
7 GND Ground VS 8 13 OUT3
8 VS Supply Voltage IN3 9 12 OUT4
9 IN3 Input Channel 3 IN4 10 11 ENA
10 IN4 Input Channel 4 P-DSO-20-6
11 ENA Enable for all channels/Standby
12 OUT4 Power Output channel 4
13 OUT3 Power Output channel 3
14 GND Ground
15 GND Ground
16 GND Ground
17 GND Ground
18 OUT2 Power Output channel 2
19 OUT1 Power Output channel 1
20 PRG Program (inputs high or low active)

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 Data Sheet TLE 6225 G

Maximum Ratings for Tj = – 40°C to 150°C

Parameter Symbol Values Unit

Supply Voltage VS -0.3 ... +40 V
Continuous Drain Source Voltage (OUT1...OUT4) VDS -0.7 ... +45 V
Input Voltage, IN1 - IN4 VIN - 0.3 ... + 7 V
Input Voltage, PRG, ENA VIN - 0.3 ... + 40 V
2)
Output Load Dump Protection VLoad Dump=UP+US; UP=13.5 V VLoad Dump 75 V
With Automotive Relay Load RL = 70 Ω
RI1)=2 Ω; td=400ms; IN = low or high
FAULT Output Voltage VFault - 0.3 ... + 40 V
Operating Temperature Range Tj - 40 ... + 150 °C
Storage Temperature Range Tstg - 55 ... + 150
Output Current per Channel (see electrical characteristics) ID(lim) ID(lim) min A
Output Clamping Energy EAS 10 mJ
ID= 0.2 A
2
Power Dissipation (DC) @ TA = 25 °C (on PCB 6 cm cool- Ptot 2.5 W
ing area)
Electrostatic Discharge Voltage (Human Body Model) VESD 2000 V
according to MIL STD 883D, method 3015.7 and EOS/ESD
assn. standard S5.1 - 1993
DIN Humidity Category, DIN 40 040 E
IEC Climatic Category, DIN IEC 68-1 40/150/56
Thermal Resistance
junction - pin RthJP 23 K/W
junction - ambient @ min. footprint RthJA 80
junction - ambient @ 6 cm2 cooling area RthJA 45

1)
RI=internal resistance of the load dump test pulse generator LD200
2)
VLoadDump is setup without DUT connected to the generator per ISO 7637-1 and DIN 40 839.
V2.1 Page 3 26.Aug. 2002
 Data Sheet TLE 6225 G

Electrical Characteristics
Parameter and Conditions Symbol Values Unit
VS = 4.5 to 32 V ; Tj = - 40 °C to + 150 °C min typ max
(unless otherwise specified)
1. Power Supply
Supply Voltage VS 4.5 32 V
Supply Current (ENA = H, Outputs ON) IS(ON) 1 2 mA
Supply Current in Standby Mode (ENA = L) IS(stby) 10 µA
2. Power Outputs
ON Resistance VS ≥ 6 V; ID = 300 mA TJ = 25°C RDS(ON) 1.7 2 Ω
TJ = 150°C 3 3.6
Output Clamping Voltage Output OFF VDS(AZ) 45 50 60 V
Current Limit ID(lim) 500 750 1000 mA
Output Leakage Current VENA = L ID(lkg) 5 µA
Turn-On Time ID = 200 mA, resistive load tON 5 10 µs
Turn-Off Time ID = 200 mA, resistive load tOFF 5 10 µs

3. Digital Inputs (IN1 – IN4, ENA, PRG)

Input Low Voltage (IN1 – IN4, PRG) VINL - 0.3 1 V
Input Low Voltage (ENA) VINL - 0.3 0.8 V
Input High Voltage VINH 2.0 V
Input Voltage Hysteresis (IN1 – IN4, PRG) VINHys 50 100 mV
Input Voltage Hysteresis (ENA) VINHys 20 100 mV
Input Pull Up Current (IN1...IN4) @ PRG = L, IIN(1..4)PU 20 50 100 µA
VIN = 0V
Input Pull Down Current (IN1...IN4) @ PRG = H, IIN(1..4)PD 20 50 100 µA
VIN < VS; VIN < 6
PRG, ENA Pull Down Current VIN = 5 V IIN(PRG,ENA) 20 50 100 µA
PRG, ENA Pull Down Current VIN = 14 V IIN(PRG,ENA) 200 µA
4. Digital Output ( FAULT )
FAULT Output Low Voltage IFAULT = 1.6 mA VFAULTL 0.4 V
5. Diagnostic Functions
Open Load/Short to Ground Detection Voltage VDS(OL) 0.4*VS 0.5*VS 0.6*VS V
Output Pull Down Current IPD(OL) 20 50 200 µA
Fault Delay Time; VS = 12V td(fault) 50 100 200 µs
Overtemperature Shutdown Threshold Tth(sd) 170 200 °C
Hysteresis Thys 10 K

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 Data Sheet TLE 6225 G

Functional Description

The TLE 6225 G is a quad channel low-side switch with four power DMOS stages. The power
transistors are protected against short to VBB, overload, overtemperature and against over-
voltage by zenerclamp.
The diagnostic logic recognises a fault condition which is indicated by a fault flag.

Circuit Description
Output Stage Control

Each output is independently controlled by an input pin and a common enable line, which en-
ables/disables all four outputs. The parallel inputs are high or low active depending on the
PRG pin. If the parallel input pins are not connected (independent of high or low activity) it is
guaranteed that the outputs 1 to 4 are switched OFF. ENA - and PRG - pin itself are internally
pulled down when they are not connected.

ENA - Enable pin. ENA = High: Active mode. Channels are enabled
ENA = Low (GND): Sleep mode. Channels are switched off. Less than
1 µA current consumption.

PRG - Program pin. PRG = High: Parallel inputs Channel 1 to 4 are high active
PRG = Low (GND): Parallel inputs Channel 1 to 4 are low active.

Power Transistors

Each of the four output stages has its own zenerclamp. This causes a voltage limitation at the
power transistors when inductive loads are switched off. The outputs are provided with a cur-
rent limitation set to a minimum of 500 mA.
Each output is protected by embedded protection functions3). In the event of an overload or
short to supply, the current is internally limited. If this operation leads to an overtemperature
condition, a second protection level (about 170 °C) will turn the effected output into a PWM-
mode (selective thermal shutdown with restart) to prevent critical chip temperatures. The tem-
perature hysteresis is typically 10K.

Diagnostic

The FAULT pin is an open drain output. The logic status depends on the programming pin
PRG.

FAULT - pin. FAULT = High no fault @ PRG = High

FAULT = Low no fault @ PRG = Low

3)
The integrated protection functions prevent an IC destruction under fault conditions and may not be used in normal operation or perma-
nently
V2.1 Page 5 26.Aug. 2002
 Data Sheet TLE 6225 G

Diagnostic Table

Enable Program Control Power Diagnostic

Operating Condition Input Input Input Output Output
ENA PRG IN OUT FAULT
Standby L X X OFF H
Normal function H L L ON L
H L H OFF L
H H L OFF H
H H H ON H
Overtemperature H L L OFF * H
H H H OFF * L
Open load or short to ground H L L ON L
H L H OFF H
H H L OFF L
H H H ON H

X = not relevant

*selective thermal shutdown for each channel at overtemperature

Fault Distinction
Open load/short to ground is recognised in OFF-state. Overtemperature as a result of an
overload or short to battery can only arise in ON-state. If there is only one fault at a time, it is
possible to distinguish which channel is affected with which fault.

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 Data Sheet TLE 6225 G

Typical electrical Characteristics

Drain-Source on-resistance
RDS(ON) = f (Tj) ; Vs = 5V

Typical Drain- Source ON-Resistance Channel 1-4

3,5

3
RDS(ON) [Ohm]

2,5

1,5

1
-50 -25 0 25 50 75 100 125 150 175
Tj[°C]

Figure 6 : Typical ON Resistance versus Junction-Temperature

Channel 1-4
Output Clamping Voltage
VDS(AZ) = f (Tj) ; Vs = 5V

Typical Clamping Voltage Channel 1-4

55

54

53
VDS (AZ) [V]

52

51

50

49

48
-50 -25 0 25 50 75 100 125 150 175
Tj[°C]

Figure 7 : Typical Clamp Voltage versus Junction-Temperature

Channel 1-4

V2.1 Page 7 26.Aug. 2002

 Data Sheet TLE 6225 G

Timing Diagrams

Power Outputs

VIN

tON tOFF
VDS
80%

20%
t

Application Circuit

+5V VBB

VS
VCC PRG
TLE
6225 G
Py.1 ENA

Px.1 IN1 OUT1

µC Px.2 IN2 OUT2

e.g. C166 Px.3 IN3 OUT3
Px.4 IN4 OUT4
+5V Line
INT FAULT

GND

V2.1 Page 8 26.Aug. 2002

 Data Sheet TLE 6225 G

Package and ordering code

all dimensions in mm
P - DSO - 20 - 6 Ordering code
TLE 6225 G Q 67006 A9373

0.35 x 45˚

2.65 max
2.45 -0.2
7.6 -0.21)
0.2 -0.1

+0.09

x
8˚ ma
0 .2 3
1.27 0.4 +0.8
2)
0.35 +0.15 0.1 10.3 ±0.3
0.2 24x

20 11

1 12.8 1) 10
-0.2 GPS05094

Index Marking
1) Does not include plastic or metal protrusions of 0.15 max per side
2) Does not include dambar protrusion of 0.05 max per side

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D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
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For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Tech-
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please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of
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is reasonable to assume that the health of the user or other persons may be endangered.

V2.1 Page 9 26.Aug. 2002

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