CH 01
CH 01
CH 01
Jin-Fu
u Li
Advanced Reliable Systems (ARES) Laboratory
Department of Electrical Engineering
National Central University
Jungli, Taiwan
Outline
VLSI Realization
Role of Testing
Trends of Architecture of VLSI Chips
Requirements
and
Specification specification Specification
Hardware Software
Detail Design Design Design Module Design
Customer’s need
Determine requirements
Write specifications
Test development
Fabrication
g test
Manufacturing
Chips to customer
Cost: cents/transistor
1 Source: SIA
0.1
0.01 Si capital/transistor
0.001
0.0001
0.00001 Test capital/transistor
0.000001
0.0000001
1982 1985 1988 1991 1994 1997 2000 2003 2006 2009 2012
RAM unit
μ
Engine
Compute unit
DDR2 DDR2
Controller Controller
4x4 mesh built with Xpipes Niagara2 (Sun) Source: IEEE Micro, 2007.
library components
1. Logic BIST
2
2. BIST for arrays
3. BISR for arrays
4. …
Design-for-Testability Features:
1. 32 Scans + ATPG
2. BIST for arrays
3. ….
Technology evolution
Bipolar
p Æ CMOS Æ Multicore Æ 3D integration
g
+ System-in-package (3D-SiP)
System-in-package
System in package
stacking dies using bonding wires
Source: ISQED
ISQED, 2008.
2008
3D integration
Stacking dies using through silicon via
(TSV)
S
Source: IBM
IBM, 2008.
2008
Yield
Design for
fo resiliency
esilienc
Thermal
Can we overcome it?
Test
Reliability
…
Source: IBM
IBM, 2008
2008.