Solid State Relay

Download as pdf or txt
Download as pdf or txt
You are on page 1of 29

California Eastern Laboratories A PPLICATION N OTE

Solid State Relays Overview And Applications


AN3000

CONTENTS

1. INTRODUCTION....................................................................................................................................................... 2

2. FEATURES, STRUCTURES, COMPOSITION AND THEORY OF OPERATION .................................................... 3


2.1 FEATURES ...................................................................................................................................................... 3
2.2 STRUCTURES................................................................................................................................................. 3
2.3 COMPOSITION................................................................................................................................................ 6
2.4 THEORY OF OPERATION .............................................................................................................................. 6

3. MAINLY CHARACTERISTICS ....................................................................................................... .......................... 7


3.1 OFFSET VOLTAGE ......................................................................................................................................... 7
3.2 TEMPERATURE CHARACTERISTICS ........................................................................................................... 8

4. CHARACTERISTICS VALUES AND MEASURING CHARACTERISTIC VALUES............................................... 15


4.1 CHARACTERISTICS VALUES ...................................................................................................................... 15
4.2 MEASURING CHARACTERISTIC VALUES .................................................................................................. 16

5. APPLICATIONS...................................................................................................................................................... 19
5.1 COMMUNICATION LINES ............................................................................................................................. 19
5.2 INPUT/OUTPUT INTERFACE ....................................................................................................................... 22
5.3 LOW-LEVEL/ANALOG SIGNAL CONTROL .................................................................................................. 24

6. COMPARISION WITH OTHER SWITCHING DEVICES......................................................................................... 25

7. CAUTIONS FOR USE............................................................................................................................................. 26

8. CONCLUSION ........................................................................................................................................................ 29
AN3000
1. INTRODUCTIION

The SSR that NEC has started marketing uses a photocoupler system with a MOS FET, explained in the following,
as an output switch and a combination of an Emitter and Photo Detector to drive the switch.
NEC’s SSR is named a “OCMOS FET (Opto-Coupled MOS FET)” as the input and output are isolated with a
photocoupler and the MOS FET switch is used as an output switch.
The OCMOS FET using a photo Detector to drive the MOS FET is a new type of SSR developed recently and
being commercialized.
An OCMOS FET operates this way: A control signal applied to the OCMOS FET input terminals triggers the output
switch of the OCMOS FET, which, in turn, opens or closes the output terminals.
A normally-off type (which is functionally the same as a “make contact” mechanical relay) leaves the output
terminals open, if there is no input signal, and short-circuits the output terminals if an input signal above the threshold
level is applied. Conversely, a normally-on type (which is functionally the same as a “break contact” mechanical
relay) keeps the output terminals short-circuited, if there is no input signal, and opens the output terminals by an
input signal.

2
AN3000
2. FEATURES, STRUCTURES, COMPOSITION AND THEORY OF OPERATION

2.1 FEATURES

The general features of OCMOS FET as follows:


1) High sensitivity and low driving power. Can be driven directly by a TTL or CMOS.
2) Can switch low to high-voltage level signals or an AC/DC load current at a low power level.
3) Extremely low offset voltage (in the on-state) and very small leakage current (in the off-state). Applicable even
to low-level signals.
4) dv/dt insensitive, No possibility of malfunction caused by noise signals due to abrupt startup. No thermal
runaway, as seen bipolar elements.
5) Use of bidirectional MOS FET support DC and AC switching.
6) A compact DIP/SOP package which can be mounted like other electronic components.

2.2 STRUCTURES

Compared with a mechanical relay, the input and output control sections, made up of the LED and PVD in the
OCMOS FET, correspond to the coil in the mechanical relay. They isolate the input from output and generate an
output control signal on receipt of an input signal.
The MOS FET in the OCMOS FET corresponds to the contact in the mechanical relay, opening and closing the
load circuit.
Figure 1 shows the OCMOS FET structure. Figure 2 shows the sectional view. The semiconductor chip, a
subcomponent of the OCMOS FET is mounted at a required position on the metal support, called a lead frame, also
serving as a terminal, using conducting paste. (The procedure is called chip mounting.)
Next, the chip electrodes are connected to a fine gold wire to the lead, which becomes a terminal. (The procedure
is called wire bonding.) Then as regards face-to-face type, the LED and PVD are covered with transparent silicone
rubber to form an optical path. This is put into a furnace for hardening and then molded with epoxy resin.
There is more than one kind of structure that links LED and PVD (called a photocoupler structure). Table 1 shows
an example of the structure type and Table 2 compares the different structures. (NEC’s OCMOS FET series are
face-to-face type and double mold type.)

3
AN3000
Figure 1. OCMOS FET STRUCTURE

LED

PHOTO-TRANSPAREN AREA

MOS FET

PHOTO DETECTOR,
CONTROL CIRCUIT

Figure 2. SECTIONAL VIEW

Face-to-face type Double mold type


PS71 ss, PS72 ss, PS75 ss PS73 ss

LED Photo Detector


LED
Photo Detector

4
AN3000
Table 1. Photocoupler Structure

No. Structure type Structure

1 Face-to-face format
LED

Silicon resin

Epoxy resin

PVD

2 Coplanar format
Transparent silicon resin

White silicon resin

Epoxy resin

LED

PVD

3 Insulated format

Glass or polymide film

White epoxy resin

4 Double mold format


Transparent epoxy resin

Silicon resin

Table 2. Photocoupler Structure (Internal view)

Optical Transmission Moisture


Structure type Insulation Productivity
Efficiency Stability Resistance

Face-to-face format Good Fair Fair Fair Fair

Coplanar format Fair Good Good Fair Excellent

Insulated format Excellent Fair Good Fair Poor

Double mold format Fair Good Excellent Good Fair

5
AN3000
2.3 COMPOSITION

As shown in Figure 3, the NEC OCMOS FET consists of an Emitter, Photo Detector, Control Circuit, and the MOS
FET.

Figure 3. OCMOS FET COMPOSITION

Control Circuit
Photo Detector
Light
Emitter

signal
Input MOS FET Output

Emitter: LED Photo Detector: PVD (Photo Voltaic Diode)

2.4 THEORY OF OPERATION

Normally-off type. Theory of operation as follows.


When an input signal current flows across the input terminals, the LED emits light. Some of the light is shot
directly into the PVD via the transparent silicon layer, while the rest of the light reaches the PVD after being reflected
from the transparent silicon boundary surface. On receiving the light, the PVD generates a current corresponding to
the amount of incident radiation received.
The current passes through the control section to charge the MOS FET gate capacity, raising the gate voltage.
When the gate voltage reaches a certain voltage value, current flows between the MOS FET drain and source. Since
the drain and source are connected to the output terminals, the external load circuit across the output terminals is
closed.
When the input signal current is disconnected, the LED stops emission and the PVD voltage drops. In this
condition, the charges stored in the MOS FET gate are not released quickly, instead the FET remains conductive. If
the control circuit is operated to cause the MOS FET gate charges to be released quickly, the MOS FET gate voltage
will be dropped. If the voltage drops to a certain level, the MOS FET drain and source will be isolated again.

6
AN3000
3. MAINLY CHARACTERISTICS

3.1 OFFSET VOLTAGE

Figure 4 shows LOAD CURRENT (IL)-LOAD VOLTAGE (VL) characteristic for the MOS FET. When VL is low, the
current changes, as in a DC in a DC resistor. That is, there is no offset voltage.

Figure 4. Comparing OCMOS FET with a Photocoupler and Thyristor

(a) OCMOS FET (b) Photocoupler


Load Current IL (mA)

Load Voltage VL (V) Load Current IL (mA) Load Voltage VL (V)

(c) Thyristor
Load Current IL (mA)

Load Voltage VL (V)

7
AN3000
3.2 TEMPERATURE CHARACTERISTICS

3.2.1 TURN-ON TIME CHARACTERISTICS

Figure 5 shows the NORMALIZED TURN-ON TIME vs. AMBIENT TEMPERATURE and the TURN-ON TIME
DISTRIBUTION of a normally-off type OCMOS FET. (Such as the PS7112, PS7113, PS7122, PS7141, PS7142 and
PS7160 OCMOS FET.)

3.2.2 TURN-OFF TIME CHARACTERISTICS

Figure 6 shows the NORMALIZED TURN-OFF TIME vs. AMBIENT TEMPERATURE and the TURN-OFF TIME
DISTRIBUTION of a normally-off type OCMOS FET. (Such as the PS7112, PS7113, PS7122, PS7141, PS7142 and
PS7160 OCMOS FET.)

3.2.3 ON-STATE RESISTANCE CHARACTERISTICS

Figure 7 shows the NORMALIZED ON-STATE RESISTANCE vs. AMBIENT TEMPERATURE and the ON-STATE
RESISTANCE DISTRIBUTION of a normally-off type OCMOS FET. (Such as the PS7112, PS7113, PS7122,
PS7141, PS7142 and PS7160 OCMOS FET.)

8
AN3000

Figure 5. NORMALIZED TURN-ON TIME vs. AMBIENT TEMPERATURE AND TURN-ON TIME DISTRIBUTION (1/2)

1) PS7112-1A, PS7112L-1A

NORMALIZED TURN-ON TIME vs. TURN-ON TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
TA = 25 ÝC, IF = 10 mA,
Normalized Turn-on Time ton
2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20

Number (pcs)
1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.1 0.2 0.3
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)

2) PS7113-1A, -2A, PS7113L-1A, -2A

NORMALIZED TURN-ON TIME vs. TURN-ON TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
TA = 25 ÝC, IF = 10 mA,
Normalized Turn-on Time ton

2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 1.0 1.1 1.2 1.3 1.4 1.5 1.6
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)

3) PS7122-1A, -2A, PS7122L-1A, -2A

NORMALIZED TURN-ON TIME vs. TURN-ON TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
TA = 25 ÝC, IF = 10 mA,
Normalized Turn-on Time ton

2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.4 0.5 0.6 0.7 0.8
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)

9
AN3000
Figure 5. NORMALIZED TURN-ON TIME vs. AMBIENT TEMPERATURE AND TURN-ON TIME DISTRIBUTION (2/2)

4) PS7141-1A, PS7141L-1A

NORMALIZED TURN-ON TIME vs. TURN-ON TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
TA = 25 ÝC, IF = 10 mA,
Normalized Turn-on Time ton

2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20

Number (pcs)
1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.3 0.4
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)

5) PS7142-1A, PS7142L-1A

NORMALIZED TURN-ON TIME vs. TURN-ON TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
TA = 25 ÝC, IF = 10 mA,
Normalized Turn-on Time ton

2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 2.0 3.0
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)

6) PS7160-1A, PS7160L-1A

NORMALIZED TURN-ON TIME vs. TURN-ON TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
2.5 TA = 25 ÝC, IF = 10 mA,
25
Normalized Turn-on Time ton

IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.6 0.7 0.8 0.9 1.0
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)

10
AN3000

Figure 6. NORMALIZED TURN-OFF TIME vs. AMBIENT TEMPERATURE AND TURN-OFF TIME DISTRIBUTION (1/2)

1) PS7112-1A, PS7112L-1A

NORMALIZED TURN-OFF TIME vs. TURN-OFF TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
TA = 25 ÝC, IF = 10 mA,
Normalized Turn-off Time toff
2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20

Number (pcs)
1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.04 0.08
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)

2) PS7113-1A, -2A, PS7113L-1A, -2A

NORMALIZED TURN-OFF TIME vs. TURN-OFF TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
TA = 25 ÝC, IF = 10 mA,
Normalized Turn-off Time toff

2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.02 0.04 0.08 0.10
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)

3) PS7122-1A, -2A, PS7122L-1A, -2A

NORMALIZED TURN-OFF TIME vs. TURN-OFF TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
TA = 25 ÝC, IF = 10 mA,
Normalized Turn-off Time toff

2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.04 0.08
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)

11
AN3000
Figure 6. NORMALIZED TURN-OFF TIME vs. AMBIENT TEMPERATURE AND TURN-OFF TIME DISTRIBUTION (2/2)

4) PS7141-1A, PS7141L-1A

NORMALIZED TURN-OFF TIME vs. TURN-OFF TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
TA = 25 ÝC, IF = 10 mA,
Normalized Turn-off Time toff

2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20

Number (pcs)
1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.04 0.08
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)

5) PS7142-1A, PS7142L-1A

NORMALIZED TURN-OFF TIME vs. TURN-OFF TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
TA = 25 ÝC, IF = 10 mA,
Normalized Turn-off Time toff

2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.04 0.08
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)

6) PS7160-1A, PS7160L-1A

NORMALIZED TURN-OFF TIME vs. TURN-OFF TIME DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
Normalized to 1.0 at n = 50 pcs,
2.5 TA = 25 ÝC, IF = 10 mA,
25
Normalized Turn-off Time toff

IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.04 0.08
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)

12
AN3000
Figure 7. NORMALIZED ON-STATE RESISTANCE vs. AMBIENT TEMPERATURE AND TURN-ON TIME DISTRIBUTION
(1/2)

1) PS7112-1A, PS7112L-1A

NORMALIZED ON-STATE RESISTANCE vs. ON-STATE RESISTANCE DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
n = 50 pcs,
Normalized On-State Resistance Ron

Normalized to 1.0 at
IF = 5 mA,
2.5 TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20

Number (pcs)
1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 2.8 2.9 3.0
Ambient Temperature TA (ÝC) On-State Resistance Ron (7)

2) PS7113-1A, -2A, PS7113L-1A, -2A

NORMALIZED ON-STATE RESISTANCE vs. ON-STATE RESISTANCE DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
n = 50 pcs,
Normalized On-State Resistance Ron

Normalized to 1.0 at
IF = 5 mA,
2.5 TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 0.8 0.9 1.0
Ambient Temperature (ÝC) On-State Resistance Ron (7)

3) PS7122-1A, 2A, PS7122L-1A, -2A

NORMALIZED ON-STATE RESISTANCE vs. ON-STATE RESISTANCE DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
n = 50 pcs,
Normalized On-State Resistance Ron

Normalized to 1.0 at
IF = 5 mA,
2.5 TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 2.8 2.9 3.0 3.1 3.2
Ambient Temperature TA (ÝC) On-State Resistance Ron (7)

13
AN3000
Figure 7. NORMALIZED ON-STATE RESISTANCE vs. AMBIENT TEMPERATURE AND TURN-ON TIME DISTRIBUTION (2/2)

4) PS7141-1A, PS7141L-1A

NORMALIZED ON-STATE RESISTANCE vs. ON-STATE RESISTANCE DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
n = 50 pcs,
Normalized On-State Resistance Ron

Normalized to 1.0
IF = 5 mA,
2.5 at TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20

Number (pcs)
1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 20 21
Ambient Temperature TA (ÝC) On-State Resistance Ron (7)

5) PS7142-1A, PS7142L-1A

NORMALIZED ON-STATE RESISTANCE vs. ON-STATE RESISTANCE DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
n = 50 pcs,
Normalized On-State Resistance Ron

Normalized to 1.0
IF = 5 mA,
2.5 at TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 20 21
Ambient Temperature TA (ÝC) On-State Resistance Ron (7)

6) PS7160-1A, PS7160L-1A

NORMALIZED ON-STATE RESISTANCE vs. ON-STATE RESISTANCE DISTRIBUTION (TA = 25 ÝC)


AMBIENT TEMPERATURE
3.0 30
n = 50 pcs,
Normalized On-State Resistance Ron

Normalized to 1.0
IF = 5 mA,
2.5 at TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20
Number (pcs)

1.5 15

1.0 10

0.5 5

0 0
–25 0 25 50 75 100 41 42 43
Ambient Temperature TA (ÝC) On-State Resistance Ron (7)

14
AN3000
4. CHARACTERISTICS VALUES AND MEASURING CHARACTERISTIC VALUES

4.1 CHARACTERISTICS VALUES

Table 3. OCMOS FET CHARACTERISTICS VALUES

Classification Symbol Item Measuring Circuit Number

LED VF Forward voltage 1

IF Forward current (DC) 1

VR Reverse voltage 2

IR Reverse current 2

Ct Input capacitance 3

PD Power dissipation ?

MOS FET VL Breakdown voltage 4

ILoff Off-state leakage current 5

Ron On-state resistence 6

CO Ou tput ca pacit an ce 7

Coupled RI-O Isolation resistence 8

BV Isolation voltage (AC voltage for 1 minute at TA = 25 ºC, RH = 60 % 9


between input and output).

CI-O Isolation capacitance 10

ton turn-on time 11

toff turn-off time 11

SOA Safe operation area (DC) ?

SOA Safe operation area (pulse) ?

15
AN3000
4.2 MEASURING CHARACTERISTIC VALUES

Table 4. Measuring OCMOS FET Characteristic Values (1/3)

Measuring
Characteristic
Circuit Measuring Method and Conditions Measuring Circuit
Value
Number

1 Forward voltage (VF) Let a required current flow across control (Control input side)
input terminals and measure the voltage. IF
IF = 10 (mA)
V VF

2 Reverse current (IR) Apply a voltage across control input


terminals in a direction opposite to normal
and measure the current.
VR = 5 V
VR = 5 (V) A
IR

3 Input capacitance (Ct) Connect an LCR meter to control input


terminals and measure the electrostatic
A
capacitance.
V
V = 0 (V), f = 1 (MHz)

LCR meter, etc.

4 Breakdown voltage (VL) Step up a voltage slowly across switching


terminals and measure the voltage at
which a required current begins flowing.
V
ID(BD) = (to be defined) A
Semiconductor
multimeter, etc.

5 Off state leakage current Apply a required voltage across switching


(ILoff) terminals and measure the current.
VD(BD) = Rated voltage (V) ILoff
A
Semiconductor
multimeter, etc.

6 On-state resistance (Ron) Let a required current flow across control


input terminals, close the switch, and IF
measure the resistance across the
V ID (on)
terminals.
A
IF = 5 (mA)
V
IL = 1 (mA) Ron =
IL

16
AN3000
Table 4. Measuring OCMOS FET Characteristic Values (2/3)

Measuring
Characteristic
Circuit Measuring Method and Conditions Measuring Circuit
Value
Number

7 Output capacitance (CO) Connect an LCR meter across switching


terminals, apply a required DC overlapping A
voltage, and measure the electrostatic
V
capacitance.
V = 0 (V), f = 1 (MHz)
LCR meter

8 Isolation resistance (RI-O) Connect an Isolation resistance meter


between control input terminals and
switching terminals, apply a required
voltage, and measure the resistance.
VI-O = 1 (kV)
VI-O
A
Isolation
resistance
RI-O = VI-O
II-O meter

9 Isolation voltage (BV) AC voltage for 1 minute at TA = 25 ºC,


RH = 60 % between input and output.

A
Dielectric
strength
II-O < 0.5 mA measuring
meter

10 Isolation capacitance Connect an LCR meter between control


(CI-O) input terminals and switching terminals
and measure the electrostatic capacitance.
V = 0 (V), f = 1 (MHz)

A LCR meter

17
AN3000
Table 4. Measuring OCMOS FET Characteristic Values (3/3)

Measuring
Characteristic
Circuit Measuring Method and Conditions Measuring Circuit
Value
Number

11 turn-on time (ton) Apply a rectangular wave AC voltage, to


turn-off time (toff) cause a required current to flow across
control input terminals, and connect a load VL
across switching terminals that satisfies a
required current and voltage. Measure the RL
waveforms for the voltages across control
input terminals and across switching V1 V2
terminals, using a time measuring Oscilloscope
instrument like an oscilloscope, as shown 90 %
at the right. V1
10 %
IF = 10 (mA)
RL 90 %
(to be defined) V2
10 %
VL
ton toff

18
AN3000
5. APPLICATIONS

With the above features and characteristics, this OCMOS FET is suitable for the following uses: And Table 5
shows OCMOS FET LINE-UP and application.

5.1 COMMUNICATION LINES

In communication lines, relative by high voltages are applied, including office power, call signals, and test signals.
Moreover, lightning surge induced in a line may unavoidably leak out to the equipment through a protective circuit.
Accordingly, a high breakdown voltage is required for the communication equipment connected to the
communication lines. A photocoupler SSR is suitable to prevent relay drive current from flowing into the lines.
Furthermore, since the polarity of the telephone line is reversed in the exchange operation, the relay contact
inserted in the line should have a bidirectional characteristic.
The OCMOS FET satisfies these conditions and is suitable for these applications. The applicable equipment
includes an office exchange, PBX, key telephone, telephone, and facsimile.
Figure 8 and Figure 9 show D/T MODEM/FAX/TEL APPLICATION. Figure 10-Figure 12 show SWITCHING
SYSTEM.

Figure 8. D/T MODEM/FAX/TEL APPLICATION

Switching Device: Signal circuit On/Off


PS7141/42-1A/2A

Ring

Telecom. Dial Modulator


Network pulse Hook Demodulator
Switch
TIP
line
“ON” “OFF”
Loop
Ring signal
current
detector
detector
line
Pulse Generator
“ON” “OFF”

CPU (NCU controller)

PS2505-1/2
Isolator b/w Signal Circuit and CPU:
Control signal transfer to CPU w/o Noise

19
AN3000
Figure 9. PC CARD/BOARD MODEM

For Space & Device Number Reduction

PS7241-AT5
Telecom. Modulator
Network Demodulator

Loop Dial
current pulse
detector

line
Hook
VCC “ON” “OFF” Ring signal Switch
detector
Pulse Generator

line
“ON” “OFF”

CPU (NCU controller)

Figure 10. SWITCHING SYSTEM

Example of NRT ( No Ringing Trank ) signal control

A/D Trans.
Sub-Scriber Line Digital
Cut Over Trank Line
D/A Trans.

PS7141/42-1A/2A
PS7221-2A

Control Circuit
Trank Line Check Circuit
Sub-Scriber Line
Check Circuit Control Circuit For Space Deduction
Switching Noise Reduction
Hi-Speed Switching

20
AN3000
Figure 11. SLOW SWITCHING TYPE

66dB Noise Reduction from M.Relay 1 k7


Test Circuit OSC-Scope
Input 20 mH

Input Signal
S/W OFF
Vp-p = 4 V
f = 10 Hz

Swiching Noise
VSp-p

Output Signal Mechanical Relay


VSp-p = 350 V
PS7142-1A
VSp-p = 25 V

PS7522-1A
VSp-p = 0.18 V

Figure 12. SWITCHING SYSTEM (LOW S/W NOISE)

Example of NRT ( No Ringing Trank ) signal control

A/D Trans.
Sub-Scriber Line Digital
Cut Over Trank Line
D/A Trans.

PS7522-1A/2A

Control Circuit
Trank Line Check Circuit
Sub-Scriber Line
Check Circuit Control Circuit For Switching Noise Free
Space Reduction

21
AN3000
5.2 INPUT/OUTPUT INTERFACE

The number of process control systems providing feedback control with microcomputers and minicomputers has
been increasing rapidly in the past few years.
In these systems, it is necessary for the microcomputer to control the current for driving the actuator and process
devices using a minute signal and to absorb the difference in signal levels or potentials between the devices.
Moreover, noise from the current turning on/off in the actuator or process device and from external devices may
cause erroneous operation of the microcomputer. Therefore such noise must be cut off by the interface.
Accordingly, the interface relay in these system must provide electrical isolation for the circuits and input/output
separation that shuts out the effect of noise produced mutually by input/output circuits and a transient load.
The opto MOS FET offers complete electrical isolation and insulation between the outputs by photo coupling. It
can control signals and loads over a wide range by input of a minute amount of power. It is therefore suitable for the
above purposes. Namely, it can be used in a sequence controller, programmable controller (PLC), robot, NC
machine tool, automatic assembling machine, motor/solenoid/valve control.
Figure 13 and Figure 14 show PLC APPLICATION.

22
AN3000

Figure 13. PLC (Input interface block)

PS7141/42/60-2A
PS7221-2A
A1 GND

Ctl1
O1
Ctl2
A2

Senser, etc. O2
(AC/DC Sig.)

A3 Logic
Processor

Ctl3
O3
Ctl4

A4
O4
COM VCC
For Space Deduction
Hi On-Resistance
Hi-Speed Switching

Figure 14. PLC (Output interface block)

PS7111/13/22-2A
PS7211-2A

L1
O1
Ctl1
Logic Load
Processor
O2
Ctl2

GND
L2

For Space Deduction


Low On-Resistance
Hi-Speed Switching

23
AN3000
5.3 LOW-LEVEL/ANALOG SIGNAL CONTROL

In many industrial systems, including production systems, high-speed detection of minute level signals and analog
signals from sensors and transducers and transmission of these signals without distortion are frequently required for
measurement, testing, inspection, monitoring, and control.
A relay to be used for these purposes must offer high-speed operation, no chattering at the time of contact, a linear
characteristic without an offset voltage in the ON state, and low leak current in the OFF state.
The OCMOS FET satisfies these needs. It can be used, for example, in a collector and measuring instrument
(multiplexer) for various kinds of data as well as in testing equipment (IC tester, board tester, etc.).
Figure 15 shows EQUIPMENT SYSTEM.

Figure 15. EQUIPMENT SYSTEM

Analog Multiplexing

Thermal Sensing

VCC

VH

Amplifier Signal Processor Data


From Control Boad VL Buffer (ADC, Add, Mpx) Out
Voltage Sensing

Vee

PS7341/42-1A, PS7360-1A
PS7141/42-2A, PS7160-2A

From Control Boad

For High Load Voltage


Low Leakage Current
Low Offset Voltage

Table 5. OCMOS FET LINE-UP AND APPLICATION

Family No. PKG Application Feature

2ch PS7241-ATX 8 pin SOP PC card, Telephone, MODEM, FAX ? 1 OCMOS FET ? 1 Photocoupler
? Small PKG

PS71XX-1A 6 pin DIP Switching System Equipment ? Long Life


? Smaller than M. Relay

1ch PS73XX-1A 6 pin DIP Equipment ? Hi-isolation b/w


Ctl & Switch circuit

PS75XX-1A 6 pin DIP Switching System ? Slow switching


(Reduction S/W Noise)

PS71XX-2A 8 pin DIP Switching System, PLC ? Long Life


? Smaller than M. Relay

2ch PS72XX-2A 8 pin SOP Switching System, PLC ? Small PKG

PS75XX-2A 8 pin DIP Switching System ? Slow switching


(Reduction S/W Noise)

24
AN3000
6. COMPARISON WITH OTHER SWITCHING DEVICES

Table 6 show the comparison OCMOS FET with other switching device.

Table 6. COMPARISON OF FEATURE

OCMOS M.Relay Tr.P.C. Triac P.C.

Signal Linearity Excellent Excellent Fair Poo r

S/W Power Small to Midium Small to Large Small Midium to Large

Power Consumption Excellent Fair to Good Excellent Fair

Number of Operation Excellent Depend on S/W Po. Excellent Excellent

S/W Noise Almost Nothing Exist Almost Nothing Almost Nothing

ton/toff Excellent Fair Good Good

Mechanical Shock Excellent Fair Exce llen t E xce llen t

Package LOW Profile SOP Multi-ch 1 PKG SMD SOP, SSOP SOP

OCMOS: Opto-coupled MOS FET, M.Relay: Mechanical Relay,


Tr.P.C.: Tr.Output Photocoupler, Triac P.C.:Triac Output Photocoupler

25
AN3000
7. CAUTIONS FOR USE
• OCMOS FET Driving Conditions
To assure normal turn-on and turn-off actions of the relay, use the following driving conditions:

(note)
min. typ. max.

Forward LED current to 2 mA 10 mA 20 mA


turn on: IF (on)

Forward LED voltage to 0V – 1V


turn off: VF (off)

Note For the conditions above, the on-state resistance, load current, turn-on time, and some other
parameters differ from those provided in the standard specifications.

Typical OCMOS FET Driving Circuits

CMOS FET drive Transistor drive

VCC VCC

R1 10 k 7 to 100 k 7 R1

VF VF

VIN
VIN VOL, VOH VOL, VOH

How to Determine LED Current-Limiting Resistance Needed to Assure Turn-On Action:

VCC - VOL - VF (on)


Current limiting resistance: R1 =
2 to 20 mA

How to Determine LED Forward Voltage Needed to Assure Turn-Off Action:

Turn-off voltage (forward LED voltage): VF(off) = VCC - VOH < 1 V

• Untimely Turn-Off Action


A sudden drop in LED drive current can cause untimely turn-off action of the OCMOS FET when it is in on-state.
• Misoperation due to Impulsive Input Current in Off-State
If a large, impulsive current flows into the OCMOS FET’s control input when it is in off-state, the OCMOS FET
may momentarily misoperate. The relay will return to off-state when the pulse current is removed, however. To
prevent such misoperation, use a pulse current with the product of its peak value (IP) with pulse width (? t) not
exceeding 700 ? 10? (ampere second).
9

• OCMOS FET’s Electrostatic Capacity


In the off-state, the output OCMOS FETs have a capacitance of several hundred picofarads. Note, therefore, that,
if the load voltage suddenly changes, a transiental charging/ discharging current flows through the load circuit
even when the OCMOS FET output is off-state.

26
AN3000
• Note on Continuous, High-Speed Switching
Relay’s maximum response speed (frequency) depends on the input current intensity:
e.g. 1000 Hz max. at IF = 10 mA
500 Hz max. at IF = 5 mA
• Surge Protection
If a reverse surge voltage is expected across the control inputs, use a Zener diode across the input pins to
suppress surge voltages exceeding 5 V. If large spikes exceeding the device’s absolute maximum ratings are
expected at the output from an inductive load, use a C/R snubber or clamping diode in parallel with the load to
suppress such spikes.

Surge Protection for Control Inputs

1 6
2 5
3 4

Spike Protections for Output Circuit

1 6
2 5
3 4

1 6
2 5
3 4

• Load Connections
PS Series (AC/DC Switching Version)
The following five types of load connections are available.
Choose one or more depending on your application purpose.

1 6
AC/DC load 2 5
IL VL
connection 3 4 (AC/DC)
L

1 6 +
L
DC load 2 5 IL VL (DC)
connection A –
3 4

1 6
DC load 2 5 –
connection A' 3 4 IL VL (DC)
L +

1 6
DC load 2 5 –
connection B 3 4 IL VL (DC)
L +

1 6 IL +
L
DC load 2 5 VL (DC)
connection C IL + IL –
3 4
IL

27
AN3000
• Input-Output Short Circuit
If an input pin is shorted to an output pin while the OCMOS FET is active, it may cause permanent damage to the
internal circuitry. Take care never to short one to the other.

• Handling Precautions
• Electrostatic damage to OCMOS FET
The output OCMOS FET has a pin-to-pin electrostatic destruction voltage of 2000 V (test condition: 100 pF, 1.5k
ohms). Care must be taken to protect the device from static electricity exceeding this value.
• Lead strength
Never apply a bend stress of more than 500 grams to any lead as it may cause damage to the OCMOS FET
package and mar the device’s performance and/or reliability.
• Soldering
Observe the following soldering conditions:
Dip soldering:
Prebake condition: 165 ºC, Not longer than 60 sec.
Soldering condition: 260 ºC, Not longer than 10 sec.
Soldering with soldering iron:
Iron tip temperature: 280 to 300 ºC
Iron wattage: 30 to 60 watts
Soldering duration: Not longer than 5 sec.
• Post-installation cleaning
Observe the following cleaning requirements for OCMOS FET mounted on a PC board:

Recommended Not
recommended

Cleaning solvent Isopropyl alcohol Trichloroethane


Ethylalcohol Toluene
Xylene

Cleaning method Yes/No

Steam No

Ultrasonic Conditional yes

Brushing No

Dipping in solvent Yes

28
AN3000
8. CONCLUSION

Demand for OCMOS FET featuring high sensitivity, low driving power, extremely low offset voltage in the on-state
and very small leak current in the off-state is steadily increasing.
At the same time, various problems will occur in their circuit design.
We hope this manual will be helpful in solving such problems.

Your source for NEC RF, Microwave, Optoelectronic,


& Fiber Optic Semiconductor Devices.
4590 Patrick Henry Drive, Santa Clara, CA 95054-1817
(408) 919-2500 • FAX (408) 988-0279 • Telex 34/6393
www.cel.com
Information and data presented here is subject to change without notice.
California Eastern Laboratories assumes no responsibility for the use of
any circuits described herein and makes no representations or warranties,
expressed or implied, that such circuits are free from patent infringement.
© California Eastern Laboratories 01/04/2006

29

You might also like