Solid State Relay
Solid State Relay
Solid State Relay
CONTENTS
1. INTRODUCTION....................................................................................................................................................... 2
5. APPLICATIONS...................................................................................................................................................... 19
5.1 COMMUNICATION LINES ............................................................................................................................. 19
5.2 INPUT/OUTPUT INTERFACE ....................................................................................................................... 22
5.3 LOW-LEVEL/ANALOG SIGNAL CONTROL .................................................................................................. 24
8. CONCLUSION ........................................................................................................................................................ 29
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1. INTRODUCTIION
The SSR that NEC has started marketing uses a photocoupler system with a MOS FET, explained in the following,
as an output switch and a combination of an Emitter and Photo Detector to drive the switch.
NEC’s SSR is named a “OCMOS FET (Opto-Coupled MOS FET)” as the input and output are isolated with a
photocoupler and the MOS FET switch is used as an output switch.
The OCMOS FET using a photo Detector to drive the MOS FET is a new type of SSR developed recently and
being commercialized.
An OCMOS FET operates this way: A control signal applied to the OCMOS FET input terminals triggers the output
switch of the OCMOS FET, which, in turn, opens or closes the output terminals.
A normally-off type (which is functionally the same as a “make contact” mechanical relay) leaves the output
terminals open, if there is no input signal, and short-circuits the output terminals if an input signal above the threshold
level is applied. Conversely, a normally-on type (which is functionally the same as a “break contact” mechanical
relay) keeps the output terminals short-circuited, if there is no input signal, and opens the output terminals by an
input signal.
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2. FEATURES, STRUCTURES, COMPOSITION AND THEORY OF OPERATION
2.1 FEATURES
2.2 STRUCTURES
Compared with a mechanical relay, the input and output control sections, made up of the LED and PVD in the
OCMOS FET, correspond to the coil in the mechanical relay. They isolate the input from output and generate an
output control signal on receipt of an input signal.
The MOS FET in the OCMOS FET corresponds to the contact in the mechanical relay, opening and closing the
load circuit.
Figure 1 shows the OCMOS FET structure. Figure 2 shows the sectional view. The semiconductor chip, a
subcomponent of the OCMOS FET is mounted at a required position on the metal support, called a lead frame, also
serving as a terminal, using conducting paste. (The procedure is called chip mounting.)
Next, the chip electrodes are connected to a fine gold wire to the lead, which becomes a terminal. (The procedure
is called wire bonding.) Then as regards face-to-face type, the LED and PVD are covered with transparent silicone
rubber to form an optical path. This is put into a furnace for hardening and then molded with epoxy resin.
There is more than one kind of structure that links LED and PVD (called a photocoupler structure). Table 1 shows
an example of the structure type and Table 2 compares the different structures. (NEC’s OCMOS FET series are
face-to-face type and double mold type.)
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Figure 1. OCMOS FET STRUCTURE
LED
PHOTO-TRANSPAREN AREA
MOS FET
PHOTO DETECTOR,
CONTROL CIRCUIT
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Table 1. Photocoupler Structure
1 Face-to-face format
LED
Silicon resin
Epoxy resin
PVD
2 Coplanar format
Transparent silicon resin
Epoxy resin
LED
PVD
3 Insulated format
Silicon resin
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2.3 COMPOSITION
As shown in Figure 3, the NEC OCMOS FET consists of an Emitter, Photo Detector, Control Circuit, and the MOS
FET.
Control Circuit
Photo Detector
Light
Emitter
signal
Input MOS FET Output
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3. MAINLY CHARACTERISTICS
Figure 4 shows LOAD CURRENT (IL)-LOAD VOLTAGE (VL) characteristic for the MOS FET. When VL is low, the
current changes, as in a DC in a DC resistor. That is, there is no offset voltage.
(c) Thyristor
Load Current IL (mA)
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3.2 TEMPERATURE CHARACTERISTICS
Figure 5 shows the NORMALIZED TURN-ON TIME vs. AMBIENT TEMPERATURE and the TURN-ON TIME
DISTRIBUTION of a normally-off type OCMOS FET. (Such as the PS7112, PS7113, PS7122, PS7141, PS7142 and
PS7160 OCMOS FET.)
Figure 6 shows the NORMALIZED TURN-OFF TIME vs. AMBIENT TEMPERATURE and the TURN-OFF TIME
DISTRIBUTION of a normally-off type OCMOS FET. (Such as the PS7112, PS7113, PS7122, PS7141, PS7142 and
PS7160 OCMOS FET.)
Figure 7 shows the NORMALIZED ON-STATE RESISTANCE vs. AMBIENT TEMPERATURE and the ON-STATE
RESISTANCE DISTRIBUTION of a normally-off type OCMOS FET. (Such as the PS7112, PS7113, PS7122,
PS7141, PS7142 and PS7160 OCMOS FET.)
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Figure 5. NORMALIZED TURN-ON TIME vs. AMBIENT TEMPERATURE AND TURN-ON TIME DISTRIBUTION (1/2)
1) PS7112-1A, PS7112L-1A
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.1 0.2 0.3
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)
2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 1.0 1.1 1.2 1.3 1.4 1.5 1.6
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)
2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.4 0.5 0.6 0.7 0.8
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)
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Figure 5. NORMALIZED TURN-ON TIME vs. AMBIENT TEMPERATURE AND TURN-ON TIME DISTRIBUTION (2/2)
4) PS7141-1A, PS7141L-1A
2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.3 0.4
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)
5) PS7142-1A, PS7142L-1A
2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 2.0 3.0
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)
6) PS7160-1A, PS7160L-1A
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.6 0.7 0.8 0.9 1.0
Ambient Temperature TA (ÝC) Turn-on Time ton (ms)
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Figure 6. NORMALIZED TURN-OFF TIME vs. AMBIENT TEMPERATURE AND TURN-OFF TIME DISTRIBUTION (1/2)
1) PS7112-1A, PS7112L-1A
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.04 0.08
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)
2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.02 0.04 0.08 0.10
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)
2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.04 0.08
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)
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Figure 6. NORMALIZED TURN-OFF TIME vs. AMBIENT TEMPERATURE AND TURN-OFF TIME DISTRIBUTION (2/2)
4) PS7141-1A, PS7141L-1A
2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.04 0.08
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)
5) PS7142-1A, PS7142L-1A
2.5 25
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.04 0.08
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)
6) PS7160-1A, PS7160L-1A
IF = 10 mA, VL = 5 V, VL = 5 V,
RL = 500 7 RL = 500 7
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.04 0.08
Ambient Temperature TA (ÝC) Turn-off Time toff (ms)
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Figure 7. NORMALIZED ON-STATE RESISTANCE vs. AMBIENT TEMPERATURE AND TURN-ON TIME DISTRIBUTION
(1/2)
1) PS7112-1A, PS7112L-1A
Normalized to 1.0 at
IF = 5 mA,
2.5 TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 2.8 2.9 3.0
Ambient Temperature TA (ÝC) On-State Resistance Ron (7)
Normalized to 1.0 at
IF = 5 mA,
2.5 TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 0.8 0.9 1.0
Ambient Temperature (ÝC) On-State Resistance Ron (7)
Normalized to 1.0 at
IF = 5 mA,
2.5 TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 2.8 2.9 3.0 3.1 3.2
Ambient Temperature TA (ÝC) On-State Resistance Ron (7)
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Figure 7. NORMALIZED ON-STATE RESISTANCE vs. AMBIENT TEMPERATURE AND TURN-ON TIME DISTRIBUTION (2/2)
4) PS7141-1A, PS7141L-1A
Normalized to 1.0
IF = 5 mA,
2.5 at TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 20 21
Ambient Temperature TA (ÝC) On-State Resistance Ron (7)
5) PS7142-1A, PS7142L-1A
Normalized to 1.0
IF = 5 mA,
2.5 at TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 20 21
Ambient Temperature TA (ÝC) On-State Resistance Ron (7)
6) PS7160-1A, PS7160L-1A
Normalized to 1.0
IF = 5 mA,
2.5 at TA = 25 ÝC, 25
IL = 1 mA
IF = 5 mA, IL = 1 mA
2.0 20
Number (pcs)
1.5 15
1.0 10
0.5 5
0 0
–25 0 25 50 75 100 41 42 43
Ambient Temperature TA (ÝC) On-State Resistance Ron (7)
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4. CHARACTERISTICS VALUES AND MEASURING CHARACTERISTIC VALUES
VR Reverse voltage 2
IR Reverse current 2
Ct Input capacitance 3
PD Power dissipation ?
CO Ou tput ca pacit an ce 7
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4.2 MEASURING CHARACTERISTIC VALUES
Measuring
Characteristic
Circuit Measuring Method and Conditions Measuring Circuit
Value
Number
1 Forward voltage (VF) Let a required current flow across control (Control input side)
input terminals and measure the voltage. IF
IF = 10 (mA)
V VF
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Table 4. Measuring OCMOS FET Characteristic Values (2/3)
Measuring
Characteristic
Circuit Measuring Method and Conditions Measuring Circuit
Value
Number
A
Dielectric
strength
II-O < 0.5 mA measuring
meter
A LCR meter
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Table 4. Measuring OCMOS FET Characteristic Values (3/3)
Measuring
Characteristic
Circuit Measuring Method and Conditions Measuring Circuit
Value
Number
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5. APPLICATIONS
With the above features and characteristics, this OCMOS FET is suitable for the following uses: And Table 5
shows OCMOS FET LINE-UP and application.
In communication lines, relative by high voltages are applied, including office power, call signals, and test signals.
Moreover, lightning surge induced in a line may unavoidably leak out to the equipment through a protective circuit.
Accordingly, a high breakdown voltage is required for the communication equipment connected to the
communication lines. A photocoupler SSR is suitable to prevent relay drive current from flowing into the lines.
Furthermore, since the polarity of the telephone line is reversed in the exchange operation, the relay contact
inserted in the line should have a bidirectional characteristic.
The OCMOS FET satisfies these conditions and is suitable for these applications. The applicable equipment
includes an office exchange, PBX, key telephone, telephone, and facsimile.
Figure 8 and Figure 9 show D/T MODEM/FAX/TEL APPLICATION. Figure 10-Figure 12 show SWITCHING
SYSTEM.
Ring
PS2505-1/2
Isolator b/w Signal Circuit and CPU:
Control signal transfer to CPU w/o Noise
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Figure 9. PC CARD/BOARD MODEM
PS7241-AT5
Telecom. Modulator
Network Demodulator
Loop Dial
current pulse
detector
line
Hook
VCC “ON” “OFF” Ring signal Switch
detector
Pulse Generator
line
“ON” “OFF”
A/D Trans.
Sub-Scriber Line Digital
Cut Over Trank Line
D/A Trans.
PS7141/42-1A/2A
PS7221-2A
Control Circuit
Trank Line Check Circuit
Sub-Scriber Line
Check Circuit Control Circuit For Space Deduction
Switching Noise Reduction
Hi-Speed Switching
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Figure 11. SLOW SWITCHING TYPE
Input Signal
S/W OFF
Vp-p = 4 V
f = 10 Hz
Swiching Noise
VSp-p
PS7522-1A
VSp-p = 0.18 V
A/D Trans.
Sub-Scriber Line Digital
Cut Over Trank Line
D/A Trans.
PS7522-1A/2A
Control Circuit
Trank Line Check Circuit
Sub-Scriber Line
Check Circuit Control Circuit For Switching Noise Free
Space Reduction
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5.2 INPUT/OUTPUT INTERFACE
The number of process control systems providing feedback control with microcomputers and minicomputers has
been increasing rapidly in the past few years.
In these systems, it is necessary for the microcomputer to control the current for driving the actuator and process
devices using a minute signal and to absorb the difference in signal levels or potentials between the devices.
Moreover, noise from the current turning on/off in the actuator or process device and from external devices may
cause erroneous operation of the microcomputer. Therefore such noise must be cut off by the interface.
Accordingly, the interface relay in these system must provide electrical isolation for the circuits and input/output
separation that shuts out the effect of noise produced mutually by input/output circuits and a transient load.
The opto MOS FET offers complete electrical isolation and insulation between the outputs by photo coupling. It
can control signals and loads over a wide range by input of a minute amount of power. It is therefore suitable for the
above purposes. Namely, it can be used in a sequence controller, programmable controller (PLC), robot, NC
machine tool, automatic assembling machine, motor/solenoid/valve control.
Figure 13 and Figure 14 show PLC APPLICATION.
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PS7141/42/60-2A
PS7221-2A
A1 GND
Ctl1
O1
Ctl2
A2
Senser, etc. O2
(AC/DC Sig.)
A3 Logic
Processor
Ctl3
O3
Ctl4
A4
O4
COM VCC
For Space Deduction
Hi On-Resistance
Hi-Speed Switching
PS7111/13/22-2A
PS7211-2A
L1
O1
Ctl1
Logic Load
Processor
O2
Ctl2
GND
L2
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5.3 LOW-LEVEL/ANALOG SIGNAL CONTROL
In many industrial systems, including production systems, high-speed detection of minute level signals and analog
signals from sensors and transducers and transmission of these signals without distortion are frequently required for
measurement, testing, inspection, monitoring, and control.
A relay to be used for these purposes must offer high-speed operation, no chattering at the time of contact, a linear
characteristic without an offset voltage in the ON state, and low leak current in the OFF state.
The OCMOS FET satisfies these needs. It can be used, for example, in a collector and measuring instrument
(multiplexer) for various kinds of data as well as in testing equipment (IC tester, board tester, etc.).
Figure 15 shows EQUIPMENT SYSTEM.
Analog Multiplexing
Thermal Sensing
VCC
VH
Vee
PS7341/42-1A, PS7360-1A
PS7141/42-2A, PS7160-2A
2ch PS7241-ATX 8 pin SOP PC card, Telephone, MODEM, FAX ? 1 OCMOS FET ? 1 Photocoupler
? Small PKG
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6. COMPARISON WITH OTHER SWITCHING DEVICES
Table 6 show the comparison OCMOS FET with other switching device.
Package LOW Profile SOP Multi-ch 1 PKG SMD SOP, SSOP SOP
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7. CAUTIONS FOR USE
• OCMOS FET Driving Conditions
To assure normal turn-on and turn-off actions of the relay, use the following driving conditions:
(note)
min. typ. max.
Note For the conditions above, the on-state resistance, load current, turn-on time, and some other
parameters differ from those provided in the standard specifications.
VCC VCC
R1 10 k 7 to 100 k 7 R1
VF VF
VIN
VIN VOL, VOH VOL, VOH
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• Note on Continuous, High-Speed Switching
Relay’s maximum response speed (frequency) depends on the input current intensity:
e.g. 1000 Hz max. at IF = 10 mA
500 Hz max. at IF = 5 mA
• Surge Protection
If a reverse surge voltage is expected across the control inputs, use a Zener diode across the input pins to
suppress surge voltages exceeding 5 V. If large spikes exceeding the device’s absolute maximum ratings are
expected at the output from an inductive load, use a C/R snubber or clamping diode in parallel with the load to
suppress such spikes.
1 6
2 5
3 4
1 6
2 5
3 4
1 6
2 5
3 4
• Load Connections
PS Series (AC/DC Switching Version)
The following five types of load connections are available.
Choose one or more depending on your application purpose.
1 6
AC/DC load 2 5
IL VL
connection 3 4 (AC/DC)
L
1 6 +
L
DC load 2 5 IL VL (DC)
connection A –
3 4
1 6
DC load 2 5 –
connection A' 3 4 IL VL (DC)
L +
1 6
DC load 2 5 –
connection B 3 4 IL VL (DC)
L +
1 6 IL +
L
DC load 2 5 VL (DC)
connection C IL + IL –
3 4
IL
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• Input-Output Short Circuit
If an input pin is shorted to an output pin while the OCMOS FET is active, it may cause permanent damage to the
internal circuitry. Take care never to short one to the other.
• Handling Precautions
• Electrostatic damage to OCMOS FET
The output OCMOS FET has a pin-to-pin electrostatic destruction voltage of 2000 V (test condition: 100 pF, 1.5k
ohms). Care must be taken to protect the device from static electricity exceeding this value.
• Lead strength
Never apply a bend stress of more than 500 grams to any lead as it may cause damage to the OCMOS FET
package and mar the device’s performance and/or reliability.
• Soldering
Observe the following soldering conditions:
Dip soldering:
Prebake condition: 165 ºC, Not longer than 60 sec.
Soldering condition: 260 ºC, Not longer than 10 sec.
Soldering with soldering iron:
Iron tip temperature: 280 to 300 ºC
Iron wattage: 30 to 60 watts
Soldering duration: Not longer than 5 sec.
• Post-installation cleaning
Observe the following cleaning requirements for OCMOS FET mounted on a PC board:
Recommended Not
recommended
Steam No
Brushing No
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8. CONCLUSION
Demand for OCMOS FET featuring high sensitivity, low driving power, extremely low offset voltage in the on-state
and very small leak current in the off-state is steadily increasing.
At the same time, various problems will occur in their circuit design.
We hope this manual will be helpful in solving such problems.
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