See discussions, stats, and author profiles for this publication at: https://www.researchgate.

net/publication/337075755

Modeling and Simulation of the Flyback Converter using SPICE Model

Article  in  International Journal of Recent Technology and Engineering · November 2019

DOI: 10.35940/ijrte.C4109.098319

CITATION READS

1 1,680

1 author:

Dhamodaran Muneeswaran
M.Kumarasamy College of Engineering
16 PUBLICATIONS   14 CITATIONS   

SEE PROFILE

All content following this page was uploaded by Dhamodaran Muneeswaran on 07 November 2019.

The user has requested enhancement of the downloaded file.

 International Journal of Recent Technology and Engineering (IJRTE)
ISSN: 2277-3878, Volume-8 Issue-3, September 2019

Modeling and Simulation of the Flyback

Converter using SPICE Model

M. Dhamodaran, S. Jegadeesan, A. Murugan, B. Ramasubramanian

 integrated passive circuits operating in power electronic

Abstract: This paper presents to find a sufficient model of circuits [3].
integrated passive structures for high frequency analysis and This study seeks to gain a confidence as to the extent of
prediction in power electronic circuits. At high frequencies there accuracy and the boundaries of application of
are many parasitic oscillations that begin to circulate in the power
circuits. Some sources of these oscillations include SPICE-compatible models, both in the frequency and time
inter-component connections and their environment begin having domains. The SPICE-compatible models include the lumped
electromagnetic significance, unmodeled characteristics in the element models, and one solution method for the distributed
semiconductor devices, Parasitic impedance characteristics of model [4].
discrete passive components, Interference from an imperfect This paper is organized as follows. Section II describes the
source and a ground plane and Interference from radiation. A
simulation model involving most of these factors can prove
analysis of flyback converter and defines the operating
valuable in distinguishing between the causes of parasitic principles. Section III involves the design of the flyback
oscillations. A designer can modify the parameters of a particular converter and derives the design equations. Section IV
parasitic element, and observe its effect on the oscillations, hence presents the converter measurements in steps. Sections V
seeing which factors are the most significant. gives the results and discussions. Finally, Section VI
Index Terms: Power electronic circuits, Integrated passive
provides the conclusions.
circuits, Higher frequencies, EMI, MOSFET, SPICE Model

I. INTRODUCTION II. ANALYSIS OF FLYBACK CONVERTER

Figure 1 shows the circuit diagram of the ideal
Traditionally, The flyback converter is an example of
discrete-component flyback converter. When the switch is closed,
switching a clamped inductive load to give a controllable
DC-DC converter. In today’s energy engineering, any power the orientation of the voltage excitation across the inductor on the
device has a chief design requirement of being as efficient as supply side will result in the diode being reverse-biased on the load
possible. Electric energy losses and manufacturing costs must side. The constant voltage excitation across the supply-side
be minimized, and spatial usage should be constrained [1]. A inductor will result in a rampant increase in the current flowing
further chief design requirement in power electronic systems through it. Thus, the magnetic energy that was stored in the supply
is that strict control on stray oscillations must be maintained, side in the switch on-cycle is captured from the load side on
because power signals with high-energy content can easily turn-off and dissipated at the load in the switch’s off-cycle.
damage the power devices to which they are connected.
Electromagnetic compatibility (EMC) is the field of
restricting the effect of a power device’s noise on the
operation of other devices that are electromagnetically
coupled to it. An integrated architecture has recently been
developed for power converter circuits, with the above
requirements acting as the main constraints and driving forces
[2]. SPICE supports good models for semi-conductor devices,
which are not easily modelled from first principles if one was
to construct their own circuit simulator. Parametric studies are
also well supported by the PSPICE A/D environment.
The main objective of this paper is to contribute towards the
development and verification of a simulation tool that can be
effectively and confidently used to predict performance of Fig. 1. Basic lumped element model for flyback converter
circuit.
Revised Manuscript Received on September 15, 2019
The expected waveforms of ideal operation are shown in Figure
M.Dhamodaran, Department of Electronics and Communication 2. This mode of operation, where the load-side current reaches
Engineering, M.Kumarasamy College of Engineering, Karur, India zero before the beginning of the next cycle is known as
S.Jegadeesan, Department of Electronics and Communication
Engineering, M.Kumarasamy College of Engineering, Karur, India Discontinuous Conduction
A.Murugan, Department of Electronics and Communication Mode (DCM).
Engineering, M.Kumarasamy College of Engineering, Karur, India
B.Ramasubramanian, Department of Electronics and Communication
Engineering, SRM TRP Engineering College, Trichy, India

Published By:
Retrieval Number: C4109098319/19©BEIESP Blue Eyes Intelligence Engineering
DOI:10.35940/ijrte.C4109.098319
946 & Sciences Publication
 Modeling and Simulation of the flyback converter using SPICE Model

The alternative mode is when the load-side current does not

reach zero before the switch turns back on, in which case the
supply-side inductor recaptures the magnetic energy and begins its
ramp up in current from a non-zero initial condition. This is known
as Continuous Conduction Mode (CCM).

Fig. 3. The parasitic circuit elements that resonate to cause

oscillations.
The parasitic circuit elements of a basic flyback converter are
shown in Figure 4. The second parasitic effect occurs in DCM,
when the diode current reaches zero, and the diode turns off.
Resonance occurs between the magnetizing inductance and the
junction capacitance of the MOSFET. No current is flowing
through the diode, so the parasitic junction capacitance of the
diode does not contribute to this oscillation [8]. Since the
Fig. 2. Waveforms of flyback ideal operation superimposed
magnetizing inductance is much greater than the leakage
with typical parasitic effects.
inductance, the frequency of this effect is significantly lower than
that of the MOSFET turn-off oscillation. The diode turn-off
III. DESIGN OF FLYBACK CONVERTER
oscillation is present even under the case of unity coupling
The design of a flyback converter requires a wide understanding between inductors, i.e. zero leakage inductance. These oscillations
of a variety of components and disciplines. The problems that have are characterized by low damping because losses are minimized in
to be dealt with during the design process are for instance, such circuits, which requires low resistance. Inserting extra
magnetics, control loop analysis and power devices such as resistance to increase damping will decrease efficiency, which is
switches, capacitors, and transformers. Therefore, a theoretical not acceptable in power electronic converters [9].
review of the operating principle of a flyback converter, circuit The third parasitic effect is a common mode current that flows
description and operation modes is done [5]. There are three main through the inter-winding parasitic capacitance. This does not
parasitic effects that must be accounted for in the design of flyback reduce the functionality of the converter, nor will it threaten to
converters. The first, and usually the most critical, is that upon the damage any components, but it must be restricted due to the
MOSFET turn-off event, a spike occurs at the MOSFET serious EMI issues it raises. The use of the planar integration
drain-source voltage. This spike is followed by high-frequency technique has some advantages to solve these problems. The much
oscillations, which usually attenuates to insignificance within the lower leakage inductance can be achieved using this architecture
off-portion of the duty cycle. This effect is caused by the presence [10]. A lower leakage inductance will decrease the voltage spike
of leakage inductance in the couple inductor system. Not all the upon MOSFET turn-off. It will also increase the frequency of
flux is captured by the load-side circuit, so the remaining current is oscillation, but at such high frequencies, the skin effect introduces
forced to dissipate through the MOSFET in as fast a time as resistance that will increase damping. Multilayer conductor
possible. This rapid change in current is resisted by the leakage technology can be used as a high-frequency filter. However, the
inductance in the form of an opposing voltage spike [6]. The inter-winding capacitance is now significantly greater. This
inductance of the interconnect path between inductor and capacitance is now well-controlled, as opposed to the wire-wound
MOSFET also contributes to this, and is usually lumped together structure. Considering this improved controllability, it is
with the inductor leakage inductance. The oscillation is caused by recommended as future work for structures to be designed that
resonance between this inductance and the junction capacitance of implement a leakage energy recapture strategy [11].
the MOSFET. This oscillation is a high frequency because both the
junction capacitance and the leakage inductance are small [7].

Published By:
Retrieval Number: C4109098319/19©BEIESP Blue Eyes Intelligence Engineering
DOI:10.35940/ijrte.C4109.098319 947 & Sciences Publication
 International Journal of Recent Technology and Engineering (IJRTE)
ISSN: 2277-3878, Volume-8 Issue-3, September 2019

area of the magnetic core. is the cross-sectional area of the air

gaps in the magnetic core: normally fringing is ignored, so is
assumed equal to . Equation 2 determines capacitance for an
ideal parallel plate capacitor: A is the area of the parallel surface, d
is the distance between parallel plates [12]-[17].
In the process of converter design, L and C are usually
determined by the required energy flow and then the structure’s
dimensions are derived. The DC bus capacitors exist to smooth the
output (load-side) and input (supply-side) voltages, ensuring a
DC-DC topology. The size of the output capacitance depends on
the magnitude of ripple voltage that may acceptably appear across
Fig. 4. Discrete component circuit diagram for a basic flyback it, and the current being drawn by the load. The supply-side
converter. capacitor has a different function. The leads coming from the
The discrete-component circuit diagram of a basic flyback supply voltage source will have a leakage inductance, which can
converter is shown in Figure 4. The integrated passive structure cause high-frequency oscillations to appear in the DC supply
will incorporate, as an example, the coupled inductors and DC bus signal. The event that excites such oscillations is the switch
capacitors – four passive components. A possible structure makes (MOSFET) turn-off event, where the current in the supply loop is
use of four parallel planar conductors, enclosed in a magnetic core. taken to zero very fast. The supply-side capacitor acts as a low pass
Figure 5 shows a connection scheme for the terminals of the filter of these oscillations that appear across the supply-side
structure’s conductors. inductor. The cutoff frequency of this filtering effect should be less
than the switching frequency. This requirement is what determines
the size of the supply-side capacitor.The required inductance of
each conductor is determined by the maximum amount of energy
that needs to be stored in the magnetic fields during each switching
cycle. Once the required L and C are determined, the structure’s
geometric dimensions and material properties can be chosen to
meet those requirements [18].
The operation of the MOSFET makes the nodes between
inductor and switch, and between inductor and diode, to be “hot”,
i.e. to have rapidly changing signals. The nodes on the opposite
Fig. 5. Connection scheme for proposed structure.
ends of the inductors are essentially static voltages – i.e. DC. The
The conductors are enclosed by a magnetic core, resulting in floating ends of the outer conductors must be arranged on the same
high coupling. As a result, conductors share a common voltage side as the hot nodes [19]. The reason for this can be visualized in
distribution profile, but at different levels with respect to ground. two ways that will now be discussed.
This is illustrated in Figure 5, where a linear voltage distribution is
assumed. The orientation of the middle conductors achieves the
function of a coupled inductor. Each outer conductor forms a DC
bus capacitor with the inner conductor adjacent to it respectively.
The outer conductors have one end floating and the other end
connected to the rest of the converter circuit.
The inter-conductor capacitances and conductor inductances are
related to the structure’s dimensions and materials through the
following well-known equations:

Fig. 6. Voltage profiles along conductors for different

N2
L (1) connections of integrated DC bus capacitor.
lc/Acc  lg/Ag o
A DC bus capacitor serves as an energy storage component to
provide small energy absorption or release while maintaining a
C=A /d constant voltage.
(2)

Where lc is the mean path length that magnetic flux would have
to flow around the magnetic core. Ac is the mean cross-sectional

Published By:
Retrieval Number: C4109098319/19©BEIESP Blue Eyes Intelligence Engineering
DOI:10.35940/ijrte.C4109.098319
948 & Sciences Publication
 Modeling and Simulation of the flyback converter using SPICE Model

The voltage is approximately constant because the bulk of the parasite must be from the numerical solution. Setting the
energy stored in the capacitor is constant, small variations are maximum time step lower significantly mitigates this problem, but
insignificant. The voltage distribution profile diagrams in Figure 6 long simulation times become problematic once the time steps
show how the capacitor energy (proportional to VC) is constant become too small.
when the DC node and the ground connection are on the same side,
and is varying drastically otherwise. The solid dots represent
conductor ends that have a fixed voltage, and the little circles
represent conductor ends with varying voltages, hence the arrows
on the diagram.
The second visualization method sees any length of conductor
as a high impedance path at high frequency (since it is inductive).
The DC bus capacitor’s function is to sink into the ground some
high frequency content appearing at a node which is to hold
constant (DC). Therefore, if the ground is connected to the same
side as the DC node, any high frequency noise on the DC bus has a
minimal inductive conductor to pass through to reach the ground.
If connected to the other end, however, high frequency noise has to
pass through the full length of the inductive conductors, thus will
not be debited readily to the ground. This is illustrated in Figure 7. Fig. 8. Flyback simulation with modal decomposition
macromodel.
An important observation from Figure 8 is that the simulations
using the macromodel have much less damping on both MOSFET
and diode turn-off oscillations than in the simulations using
lumped elements [20]. The frequency of oscillation is the same as
that of the lumped models. The reason for this not well understood.
The first thought to come to mind is the lossless nature of the
macromodel. However, higher damping is obtained by lumped
parameter model even when the lumped resistance is excluded.
Decreasing the maximum time step in the SPICE simulator
improves the convergence of the macromodel. Therefore, the
inability to converge is arising from a numerical parasitic, which is
Fig. 7. Path to ground for high frequency content on the DC caused by a sensitivity in the system to round off errors. The main
bus for different connections of integrated capacitor. problem with reducing the time step is long simulation times that
The implementation of the interconnections between the passive result. The macromodel was initially preferred because of its fast
structure’s terminals and the external circuit is also important. The execution time due to its low number of elements. This advantage
interconnecting conductors should be kept as short as possible to is clearly removed by the presence of the parasitic numerical
limit layout inductance, and to limit the possibility of unwanted oscillations.
electromagnetic coupling with external circuits. It is therefore
IV. CONVERTER MEASUREMENTS
advantageous to have both ends of the passive structure’s
This section compares measurements made on two physically
conductors to be close together. To achieve this, as well as to
constructed flyback converter circuits. The first was built using a
facilitate multiple windings, the planar conductor can be wound
discrete component architecture, with a wire-wound coupled
around an E-core. The bend in the conductor is ignored; the effect
inductor. The second circuit uses the planar inductor circuit.
of the portion of the conductors hanging outside the magnetic core
A discrete-component flyback converter circuit was constructed.
is taken as negligible because the energy stored in that portion is
The coupled inductor was constructed using an E30 core, of the
very small. For the purpose of this study, the whole winded
3C30 material, which is standard magnetic material. Ten turns
conductor layer will be treated as a uniform one-dimensional
were used to give a magnetising inductance of 17 µH and a
length. This length has a distributed inductance, as well as a
leakage inductance of 170 nH. This gives a coupling factor
distributed capacitance between itself and conductor layers that are
between supply and load side of 0.99. The discrete DC bus
immediately adjacent and that have a surface parallel to it.
capacitors were each 1 mF.
A concerning phenomenon occurs in the on-cycle of the
MOSFET. Figure 8 shows that half-way through the on-cycle
oscillations arise across the diode. The oscillations are not being
initiated by a switching event, which make it inexplicable. This

Published By:
Retrieval Number: C4109098319/19©BEIESP Blue Eyes Intelligence Engineering
DOI:10.35940/ijrte.C4109.098319 949 & Sciences Publication
 International Journal of Recent Technology and Engineering (IJRTE)
ISSN: 2277-3878, Volume-8 Issue-3, September 2019

With the same load configuration, the constructed converter

could operate comfortably at a power output of 40 W.

Figure 11: Measured voltages at MOSFET terminals for

planar inductor circuit (CH1: Vdrain-source, CH2:
Vgate-source).
Figure 9: Measured voltages at MOSFET terminals for
wire-wound inductor circuit (CH1: Vdrain-source, CH2:
Vgate-source).
The wire-wound coupled inductor was replaced with a planar
coupled inductor. A planar E-core was used of dimensions 64mm
x 10mm x 50mm. This is a large core and, in terms of spatial usage,
this is not an improvement on the wire-wound structure. However,
the large core is used to allow the use of only a single turn in the
planar case, which simplifies its modelling.
The planar conductors separated by a dielectric material gave an
inter-conductor capacitance of 370pF. Impedance measurements
indicated a magnetizing inductance of 24 µH and a leakage
inductance of 25 nH. This gives a coupling factor of
approximately 0.998. This circuit also operated comfortably at an Figure 12: Measured voltages at MOSFET terminals for
output power of 40 W. The measured waveforms are shown in planar inductor circuit (CH1: Vdrain-source, CH2:
Figures 11 and 12. One notable feature is that the damping in the Vgate-source)
planar inductor circuit is significantly greater, which can be
observed with a comparison with Figures 9 and 10. The reason for
this greater damping is unknown, and can be a subject of interest in
future simulation study.

Figure 13: The concept of horizontal windings to increase

inductance

Figure 10: Measured voltages at MOSFET terminals for

wire-wound inductor circuit (CH1: Vdrain-source, CH2:
Vgate-source)

Published By:
Retrieval Number: C4109098319/19©BEIESP Blue Eyes Intelligence Engineering
DOI:10.35940/ijrte.C4109.098319
950 & Sciences Publication
 Modeling and Simulation of the flyback converter using SPICE Model

comprehensive simulations are done to verify the design, also to

determine some of the hardware requirements. For example,
current ratings of the capacitors, inductors, cables, and so on can
be easily determined from the simulation results. For the
proposed converter the average value is reduced. Furthermore, it
is shown that the magnetizing current becomes negative, thus
eliminating the DCM. Note that for the proposed converter for a
magnetizing inductance value about lower, the current ripple is
higher, thus demonstrating the reduced ripple existing when the
two converters employ the same magnetizing inductance value.
VI. CONCLUSIONS
Figure 14: VLoad with an integrated CDC of 2.5 µF, and no This paper proposes an effective modelling of integrated passive
external CDC circuits operating in power electronic circuits. Circuit designers
One objective of using the integrated architecture is to achieve a would prefer a model that can be interfaced easily with SPICE,
more compact usage of space. Therefore, the geometrical limit to because there are many benefits to working in the SPICE
capacitance is the conductor area (width x length); with a further environment. SPICE supports good models for semi-conductor
limit of the permittivity of the dielectric. Inductance is limited by devices, which do not easily model from first principles if one was
the reluctance of the magnetic circuit enclosing it. A core size of to construct their own circuit simulator. Higher frequencies are
64x10x50 (dimensions in mm) translates into a maximum involved in the current trend towards fast switching speeds in
capacitance of 40 nF, and a maximum inductance of 34 µH. This is power electronic circuits. The presence of these frequencies
requires a circuit designer to consider the distributed nature of the
not enough for most applications involving a higher power
integrated passive structure. The distributed model for a
range (i.e. > 40W). A properly functioning DC bus capacitor
two-conductor case has been presented; this model is easily
would need a magnitude of the order of a 1 - 1000 µF, depending
extendable to multiple conductors. The solution of this model is
on the application of course. not trivial, and there exist several solution methods. The main
problem with most of the distributed model’s solution methods is
that they cannot directly interface with a circuit simulator. This
means that the boundary conditions that can be simulated are
limited to simple terminal-terminal impedances, and cannot
support a complete converter circuit. We also lose the benefit of
the SPICE-like environment to switch from time domain to
frequency domain.

REFERENCES
1. J. Sebastian et.al., “The Determination of the Boundaries Between
Continuous and Discontinuous Conduction Modes in PWM DC-to-DC
Converters Used as Power Factor Preregulators,” IEEE Transactions
Figure 15: VLoad with an integrated CDC of 2.5µF, and no
on power Electronics, Vol. 10, No.5, pp. 574-582, 1995.
external CDC 2. Yan Zhu et.al., “A Lossless Active Clamping Circuit for Current
Figures 14 and 15 show the effect of an entirely integrated DC Doubler Topologies”, IEEE Power Electronics Letters, Vol. 2, No. 3,
pp. 92-95, 2004.
bus capacitor, whose function is to smooth the load voltage into a 3. V. Tripathi et.al., “Equivalent Circuit Modelling of Losses and
DC signal. When this capacitance is reduced further, the parasitic Dispersion in Single and Coupled Lines for Microwave and
Millimeter-wave Integrated Circuits”, IEEE Transactions on
oscillations begin to grow in magnitude; but from about 2.5 µF and
Microwave Theory and Techniques, Vol. 36, No. 2, pp. 256-262,
larger, the parasitic oscillations are not significantly changed. The 1988.
observed parasitic oscillation is caused by a resonance between the 4. Paul L. Evans et.al., “Design Tools for Rapid Multidomain Virtual
Prototyping of Power Electronic Systems,” IEEE Transactions on
inter-conductor leakage inductance and capacitance.This power Electronics, Vol. 31, No. 3, pp. 2443-2455, 2016
simulation demonstrates that even for very large integrated 5. J. Strydom, “Some Limits of Integrated L-C-T Modules for Resonant
capacitance, the filtering effect is limited, i.e. there still exists a Converter at 1 MHz”, IEEE Transactions on Industry Applications,
Vol. 37, No. 3, pp. 820-828, 2001
parasitic oscillation. This is because of the coexistence of the 6. G. Zysman, “Coupled Transmission Line Networks in an
conductor inductance. Therefore, total integration of the capacitors Inhomogeneous Dielectric Medium”, IEEE Transactions on
and inductors does not result in perfect elimination of the problem Microwave Theory and Techniques, Vol. MTT-17, No. 10, pp.
753-759, 1969.
of a capacitor’s ESL. 7. A. Agrawal, “Experimental Characterisation of Multiconductor
Transmission Lines in Inhomogeneous Media Using Time Domain
V. RESULTS AND DISCUSSIONS Techniques”, IEEE Transactions on Electromagnetic Compatibility,
The performance of the proposed modelling technique has Vol. EMC-1, No. 1, pp. 28-32, 1979.

been validated by simulation. Simulation saves a lot of human

effort we can make changes in the circuitry and observe the
results thus obtained. Before the implementation step,

Published By:
Retrieval Number: C4109098319/19©BEIESP Blue Eyes Intelligence Engineering
DOI:10.35940/ijrte.C4109.098319 951 & Sciences Publication
 International Journal of Recent Technology and Engineering (IJRTE)
ISSN: 2277-3878, Volume-8 Issue-3, September 2019

8. M. Krage et.al., “Characteristics of Coupled Transmission Lines I: Murugan Arunachalam received the B.E degree in
Coupled Mode Formulation of Inhomogeneous Lines”, IEEE Electronics and Communication Engineering from
Transactions on Microwave Theory and Applications, Vol. MIT-18, Bharathiyar University in 1990, the M.E degree in
No. 4, pp.217-223, 1970. Process Control and Instrumentation from Annamalai
9. R. Vimala et. al., “Modeling and Analysis of Flyback Switching Power University in 2002 and the Ph.D. degree in the faculty of
Converter using FPGA’, International Journal of Electrical Information and Communication Engineering from Anna
Engineering, Vol. 5, No. 6, pp. 731-742, 2012. University, Chennai, in 2019. He is currently working as an Associate
10. R. Chen et.al., “Design of Planar Integrated Passive Module for professor in the ECE Department, M. Kumarasamy College of Engineering,
Zero-Voltage Switched Asymmetrical Half Bridge PWM Converter”, Karur, Tamilnadu, India. His main thirst research areas include Machine
IEEE Transactions on Industry Applications, Vol. 39, No.6, pp. 2232 Learning, Image processing, IoT, Network and Information Security.
- 2238, 2003.
11. Bunyamin Tamyurek et.al., “An Interleaved High-Power Flyback Ramasubramanian Bhoopalan is currently working as an
Inverter for Photovoltaic Applications”, IEEE Transactions on Power Associate Professor in Electronics and Communication
Electronics, Vol. 30, No.6, pp. 3228 - 3241, 2015. Engineering Department at SRM TRP Engineering
12. Bunyamin Tamyurek et.al., “A three-phase unity power factor single- College, Trichy. He has sound knowledge in subjects like
stage AC–DC converter based on an interleaved flyback topology,” Digital Signal Processing, Electronic Devices, Digital
IEEE Transactions on Power Electronics, Vol. 26, no. 1, pp. 308–318, Image Processing, Signals and Systems, Electronic
Jan. 2011. Circuits, Digital Electronics, Communication theory, etc. He completed
13. M. Dhamodaran, S.Jegadeesan and R. Praveen Kumar, “On-chip Ph.D in Anna University, Chennai and he has secured first rank and Gold
spiral inductors and on-chip spiral transistors for accurate numerical medal in his M.Tech degree in the field of Communication Systems from
modeling’, Journal of Magnetics, pp. 50-54, 2018. B.S. Abdur Rahman University, Chennai. He is having 10 years of teaching
14. M. Dhamodaran and R. Dhanasekaran, “Electromagnetic analysis of experience. He has published many papers in sound International Journals
different metallic plates,” International Journal of Applied and Conferences. He is acting as a reviewer for IET Image processing, IET
Engineering Research, vol. 10, no.55, pp. 712-716, 2015. Computer Vision and so many reputed journals.
15. R. Dhanasekaran and M. Dhamodaran, “Estimation of capacitance of
different conducting objects using triangular subsection,” IEEE
International Conference on Communication and Signal Processing
(ICCSP 2015), Melmaruvathur, Tamilnadu, India, pp. 0667-0671,
2015.
16. M. Dhamodaran, S. Jegadeesan and R. Praveen Kumar, “Analysis and
Calculation of the fluid flow and the temperature field by finite element
modeling,” Measurement Science Review, vol. 18, no. 2, pp. 59-64,
2018.
17. S.Jegadeesan, M. Dhamodaran, M. Azees and S. Sri Shanmugapriya,
“Design of High Resolution Magnetic Probe for Magnetic Field
Measurement on AES Cryptographic FPGA to Analyze the Side
Channel Attack,” Journal of Magnetics, pp. 207-213, 2018.
18. Y. Xue et.al., “Topologies of single-phase inverters for small
distributed power generators: An overview,” IEEE Transactions on
Power Electronics, Vol. 19, no. 5, pp. 1305–1314, 2004.
19. Wenhua Tan et.al, ‘‘Leakage Inductance Analytical Calculation for
Planar Components With Leakage Layers’’, IEEE Transactions on
Power Electronics, Vol. 31, no. 6, pp. 4462 – 4473, 2016.
20. Shuai Liu et.al, ‘‘Study on the Parameter Optimization of
Soft-switching DC/DC Converters with the Response Surface
Methodology, a SPICE Model, and a Genetic Algorithm’’, Journal of
Power Electronics, Vol. 15, no. 2, pp. 479 – 486, 2015.

AUTHORS PROFILE

Dhamodaran Muneeswaran has received the B.E and

M.E degrees from Madurai Kamaraj University,
Tamilnadu, India in 1993 and 1999, respectively, and
the Ph.D Degree from Anna University, India in 2016.
He is currently working as a Faculty of Electronics and
Communication Engineering Department at M.
Kumarasamy College of Engineering, Karur, India,
which is affiliated with Anna University, Chennai. He has been the
author/coauthor of over 27 technical papers published in national and
international Journals/Conference proceedings. His research interests
include Computational Electromagnetics, Wireless Communication,
Measurements, VLSI Design and EMI/EMC. He is a life member of IETE
and Society of EMC Engineers.

Jegadeesan Subramani received the B.E. Degree in

electronics and communication engineering from Periyar
University, Salem, India, in 2004 and the M.E. Degree in
communication systems from Anna University,
Coimbatore, India, in 2009. He received his Ph.D. degree
in the faculty of information and communication engineering from Anna
University, Chennai, in 2016. He is currently working as an Associate
professor in the ECE Department, M. Kumarasamy College of Engineering,
Karur, Tamilnadu, India. His main thirst research areas include energy
management in wireless sensor networks, IoT, network and information
security.

Published By:
Retrieval Number: C4109098319/19©BEIESP Blue Eyes Intelligence Engineering
DOI:10.35940/ijrte.C4109.098319
952 & Sciences Publication
View publication stats