A

MICRO PROJECT REPORT ON

“Analyze the functional block of 8086

microprocessors”

Program & Program code : CO 4I

Course : Microprocessor (MIC)

Course code : 22415

Submitted by
Name of student Enrollment No Program
1.Rahul Kishor Mahanor 2114640152 CO-4I
2.Rohit Baban Thorat 2214640228 CO-4I
3.Saurabh Ashok Tastode 2214640219 CO-4I
4.Akashay Kishor Pawar 2114640063 CO-4I

Under the Guidance of

PROF. AMBADE P. S.
In partial fulfillment of requirement for the award of
Diploma in Computer Engineering

MSBTE, Mumbai.

Academic Year: 2022-23

DEPARTMENT OF COMPUTER ENGINEERING

S.S.M. ADSUL POLYTECHNIC COLLEGE,
CHAS, AHMEDNAGAR-414 005(M.S)

DEPARTMENT OF COMPUTER ENGINEERING

 S.S.M. ADSUL POLYTECHNIC COLLEGE,
CHAS, AHMEDNAGAR-414 005(M.S)

CERTIFICATE
This is to certify that the micro project report entitled

“Analyze the functional block of 8086 microprocessors”

Submitted by
Name of student Enrollment No Program

1.Rahul Kishor Mahanor 2114640152 CO-4I

2.Rohit Baban Thorat 2214640228 CO-4I
3.Saurabh Ashok Tastode 2214640219 CO-4I
4.Akashay Kishor Pawar 2114640063 CO-4I

of semester I institute, Sau. Sundarabai Manik Adsul Polytechnic, Chas, Ahmednagar (code: 1464) has completed the
micro project satisfactorily in course (22415) for the Academic year 2022-23 as prescribed in the MSBTE curriculum.

Place: Ahmednagar Date: ………………………….

.

Prof. Ambade P. S Prof. Hole P. P Prof. Gadakh R. S

(Micro Project guide) (Head of Dept.) (Principal)

ACKNOWLEDGEMENT

I take this opportunity to acknowledge the constant encouragement and continuous help given to me by my guide
Prof. Ambade P. S convey my sincere thanks to his valuable timely suggestion.
 I would also like to thanks principal Prof. Gadakh R. S and Head of Computer Department Prof. Hole P. P would
also like to thank teaching staff of Computer Department for helping us to achieve this goal.
I am also thankful to those who directly or indirectly helped me for completing this micro project. I would like to
thank my parents without whose supports; the completion of the micro project would not have been possible.

1.Rahul Kishor Mahanor

2.Rohit Baban Thorat
3.Saurabh Ashok Tastode
4.Akashay Kishor Pawar
 PART A-PLAN

1.0 Introduction:-
MIC was developed by at Sun Microsystems Inc in the year 1995, later acquired.It
is a simple programming language.Java makes writing, compiling, and
debuggingprogramming easy.It helps to create reusable code and modular a is a
class-based, object-oriented programminglanguage and is designed to have as few
implementation dependencies as possible.A general-purpose programming language
made for developers to write once run anywhere that is code can run on all
platforms that support Java.Java applications are compiled to byte code that can
run on any Java Virtual Machine. The syntax of Java is similar to Normally, any
code can be either complied or interpreted but icase of java , java can be both
compiled as well as interpreted this is possible due Virtual MachineChanges or
Upgrades code doesn’t affectthe operating system as it consist of byte code
verifierso you can simply termed java as platform independent.

2.0 Aim/Benefits of the Micro-Project:

To prepare report on creating Dental Clinic management System

3.0 Course Outcomes integrated:

1. Apply Concept of Inheritance for code resusability
2.Develop programs using multithreading
3.Implement exception handling

4.0 Action Plan

Sr. Planned Planned Name of
Details of the activity
No. Start date Finish date Members

Formation of Group & Topic Selection All members

5.
Submission of Proposed Plan All members
Preparation of Report All members
Final valuation of a working Report All members
Presentation of Report All members
Submission of Final Report All members
5.0 Resource Required:

Sr.
Name of resources/Material Specifications Qty Remarks
No.
Processor: i5
1. Computer 1
RAM: 8.00
GB
2. Microsoft Word Word -2016
3. Printer Hp Laser Jet 1
https://www.lucidchart.co
4. Book / website name
m/java (w3schools.in)
1.0 Aims/Benefits of the micro project
The microprocessor is the main component of the computer where 8086 is the base of all upward
developed processors till current processors. This course will cover the basics of 8086 and its
architecture along with instruction set, assembly language programming with effective use of the
procedure, and macros. This course also covers architectural issues such as instruction set
programs and data types. On top of that, the students are also introduced to the increasingly
important area of parallel organization. This subject serves as a basis to develop hardware-related
projects. This course will enable the students to inculcate assembly language programming
concepts and methodology to solve problems.

Analyze the functional block of 8086 microprocessors

1.0 Brief Description:-

The 8086 is a sixteen-bit microprocessor. The term sixteen-bit means that its arithmetic logic unit, its inner
registers, and the maximum of its commands are meant to work with sixteen-bit binary statistics. The 8086 has
a sixteen-bit statistics bus, so it may read data from or write data to memory and ports both sixteen bits or eight
bits at a time. The 8086 has a 20 bit deal with bus, so it may deal with any one of 220, or 1,048,576 memory
locations. 8086 CPU is split into 2 unbiased useful components to hurry up the processing specifically BIU
(Bus interface unit) & EU (execution unit).

The functional block diagram of 8086 is split into functional units.

(1) Bus Interface Unit and (2) Execution Unit They are defined below.

1. Bus Interface Unit:

Bus Interface Unit is a gate (enhance) interface among peripheral devices and processors. Through the bus
interface only, the processor can transfer and obtain data. The bus interface unit contains (a) Instruction Queue
(b) Segment Registers (c) Instruction Pointers

(a) Instruction Queue In 8086 Processor, the instruction queue is a six-byte register used to keep everlasting
data from the Input/Output (I/O) devices or processor. The queue operates withinside the precept of First In
First Out (FIFO) precept. i.e., the primary data is fetched, and data might be taken out first.
(b) Segment Register: In the 8086 Processor, there are 4 phase registers. They are ES – Extra Segment CS –
Code Segment DS – Data Segment SS – Stack Segment The most memory access of the 8086 processor is 1
MB. Each section has a few predefined functions. In the 8086 processor, every phase has a potential of sixty-
four KB. So the 4 segments will save 256 KB of memory places. The remaining memory places are free and in
those places, the user can carry out every other process. These 4 phase registers will preserve the bottom
address of the corresponding section.

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MSBTE
(c) Instruction Pointer (IP): The instruction pointer will deliver the subsequent address of the instruction to
be executed. Instruction Point can't be used for different purposes.

2. Execution Unit:
The execution unit contains
(a) Control Unit (b) Instruction Decoders (c) ALU (d) General Purpose Registers (e) Flag Registers

Address Generation: The I/O processor can acquire data from the memory only if those data have to is going
out via the address generation. General Purpose Registers: AX, BX, CX, DX, SP, BP, SI, DI are General
Purpose Registers.

1. AX register (Accumulator): AX register can keep sixteen-bit data only. 2. BX register: BX register is the
bottom register. It is used to keep the bottom data (value). 3. CX register: CX register is a code register
(Count Register) 4. DX Register: DX register is the data register. DX register is used to store data. 5. SP
(Stack Pointer): Stack Pointer maintains the top of the stack. The stack pointer operates withinside the
principle of Last In First Out (LIFO). Since one region can store only eight-bit data, with the purpose to store
sixteen-bit data, memory places are needed. So the stack pointer will decrease via way of means of memory
places if data is taken.

6. BP (Base Pointer): A base pointer is used to keep the base address of the memory or stack. 7. SI (Source
Index): Source Index is used to keep the index value of the supplied operand for string instructions. 8. DI
(Destination Index): DI is used to maintain the index value of the destination operand for string instructions.
General cause registers are used for containing data, intermediate results, counters, mode of address, and
additionally for storing powerful addresses.

Flag Registers:
The 3 control flags are, 1. Trap Flag (TF) 2. Interrupt flag (IF) 3. Direction Flag (DF)

1. Trap Flag (TP): It is used for single-step control. It lets the user execute one guidance of program at a time
for debugging. When entice flag is set, the program may be run in unmarried step mode.

2. Interrupt Flag (IF): It is an interrupt enable/disable flag. If it's far set, the maskable interrupt of 8086 is
enabled and if it's far reset, the interrupt is disabled. It may be set with the aid of using executing guidance take
a seat down and may be cleared with the aid of using executing CLI instruction.
3. Direction Flag (DF): It is utilized in string operation. If it's far set, string bytes are accessed from a better
reminiscence address to decrease the memory address. When it's far reset, the string bytes are accessed from
decreased memory address to a better memory address.

Instruction Format

15 14 13 12 11 10 9 8 7 6 5 4 3 2
1 0
U U CF DF IF TF SF ZF U AF U PF V CF

Symbolic Representation;

2.0 Actual Resources Used

Sr. no. Name of resource material Specificions

1 textbook Basic Electronics (22225)

2 internet Wikipedia

3 PC windows 11

3.0 Outputs of the Micro-Projects

In this micro project, we get all information about the functional block of 8086
microprocessors It became the first 16-bit processor having 16-bit ALU, 16-bit registers, inner
facts bus, and 16-bit outside data bus resulting in quicker processing.

4.0 Skill Developed / Learning outcomes of this Micro-Project

a.Computer skills increase.
b.Communication skills improved.
5.0 Applications of this Micro-Project
Intel 8086 microprocessor is the improved model of the Intel 8085 microprocessor. It turned into
the design with the aid of using Intel in 1976. The 8086 microprocessor is a16-bit, N-channel,
HMOS microprocessor. Where the HMOs are used for "High-speed Metal Oxide
Semiconductor"

Conclusion

The microprocessor is the main component of the computer where 8086 is the base of all upward
developed processors till current processors. This course will cover the basics of 8086 and its
architecture along with instruction set, assembly language programming with effective use of the
procedure, and macros. This course also covers architectural issues such as instruction set
programs and data types.

The 8086 is a sixteen-bit microprocessor. The term sixteen-bit means that its arithmetic logic
unit, its inner registers, and the maximum of its commands are meant to work with sixteen-bit
binary statistics. The 8086 has a sixteen-bit statistics bus, so it may read data from or write data
to memory and ports both sixteen bits or eight bits at a time. The 8086 has a 20 bit deal with bus,
so it may deal with any one of 220, or 1,048,576 memory locations. 8086 CPU is split into 2
unbiased useful components to hurry up the processing specifically BIU (Bus interface unit) &
EU (execution unit).
1. Bus Interface Unit:

Bus Interface Unit is a gate (enhance) interface among peripheral devices and processors. Through
the bus interface only, the processor can transfer and obtain data. The bus interface unit contains (a)
Instruction Queue (b) Segment Registers (c) Instruction Pointers

(a) Instruction Queue In 8086 Processor, the instruction queue is a six-byte register used to keep
everlasting data from the Input/Output (I/O) devices or processor. The queue operates withinside the
precept of First In First Out (FIFO) precept. i.e., the primary data is fetched, and data might be taken
out first.

(b) Segment Register: In the 8086 Processor, there are 4 phase registers. They are ES – Extra
Segment CS – Code Segment DS – Data Segment SS – Stack Segment The most memory access
of the 8086 processor is 1 MB. Each section has a few predefined functions. In the 8086 processor,
every phase has a potential of sixty-four KB. So the 4 segments will save 256 KB of memory places.
The remaining memory places are free and in those places, the user can carry out every other
process. These 4 phase registers will preserve the bottom address of the corresponding section.

(c) Instruction Pointer (IP): The instruction pointer will deliver the subsequent address of the
instruction to be executed. Instruction Point can't be used for different purposes.

2. Execution Unit:

The execution unit contains

(a) Control Unit (b) Instruction Decoders (c) ALU (d) General Purpose Registers (e) Flag Registers

related post:DCC Data Communication & Computer Network 22414 MSBTE Microproject
Address Generation: The I/O processor can acquire data from the memory only if those data have
to is going out via the address generation. General Purpose Registers: AX, BX, CX, DX, SP, BP,
SI, DI are General Purpose Registers.

1. AX register (Accumulator): AX register can keep sixteen-bit data only. 2. BX register: BX

register is the bottom register. It is used to keep the bottom data (value). 3. CX register: CX register
is a code register (Count Register) 4. DX Register: DX register is the data register. DX register is
used to store data. 5. SP (Stack Pointer): Stack Pointer maintains the top of the stack. The stack
pointer operates withinside the principle of Last In First Out (LIFO). Since one region can store only
eight-bit data, with the purpose to store sixteen-bit data, memory places are needed. So the stack
pointer will decrease via way of means of memory places if data is taken.

6. BP (Base Pointer): A base pointer is used to keep the base address of the memory or stack. 7.
SI (Source Index): Source Index is used to keep the index value of the supplied operand for string
instructions. 8. DI (Destination Index): DI is used to maintain the index value of the destination
operand for string instructions. General cause registers are used for containing data, intermediate
results, counters, mode of address, and additionally for storing powerful addresses.

Flag Registers:

The 3 control flags are, 1. Trap Flag (TF) 2. Interrupt flag (IF) 3. Direction Flag (DF)

1. Trap Flag (TP): It is used for single-step control. It lets the user execute one guidance of program
at a time for debugging. When entice flag is set, the program may be run in unmarried step mode.

2. Interrupt Flag (IF): It is an interrupt enable/disable flag. If it's far set, the maskable interrupt of
8086 is enabled and if it's far reset, the interrupt is disabled. It may be set with the aid of using
executing guidance take a seat down and may be cleared with the aid of using executing CLI
instruction.
3. Direction Flag (DF): It is utilized in string operation. If it's far set, string bytes are accessed from a
better reminiscence address to decrease the memory address. When it's far reset, the string bytes
are accessed from decreased memory address to a better memory address.

3.0 Outputs of the Micro-Projects

In this micro project, we get all information about the functional block of 8086
microprocessors It became the first 16-bit processor having 16-bit ALU, 16-bit
registers, inner facts bus, and 16-bit outside data bus resulting in quicker
processing.

4.0 Skill Developed / Learning outcomes of this Micro-Project

a.Computer skills increase.

b.Communication skills improved.

5.0 Applications of this Micro-Project

Intel 8086 microprocessor is the improved model of the Intel 8085 microprocessor. It
turned into the design with the aid of using Intel in 1976. The 8086 microprocessor is
a16-bit, N-channel, HMOS microprocessor. Where the HMOs are used for "High-speed
Metal Oxide Semiconductor"
 ANNEXURE II
Evolution Sheet for the Micro Project
Academic Year: 2022-23 Name of Faculty: Prof. AMBADE P. S.
Course:MIC Course Code: 22415 Semesters: 4th

Title of the Project :-

COs addressed by the Micro Project: “Analyze the functional block of 8086
microprocessors
A: Use computer system and its peripherals.
B: Prepare business document using word processing tool.
Major learning outcomes achieved by students by doing the Project:
(a)Practical outcomes:
1. Computer system and Peripherals.
2. Create, edit and save document.
3. Document Page Layout.
(b)Unit outcomes in Cognitive domain:
2a. Word processing, Previewing, saving, closing a document.
2b. Editing document, Formatting paragraphs, spacing & align.
2c. Inserting elements to word documents, Changing layout of a document.
(c)Outcomes in Affective Domain----------------------------------------------------------------------
-----------------------------------------------------------------------------------------
Comments/Suggestion about team work/leadership/inter-personal communication
(if any)

Marks out of 6 for Marks out of 4 for

Total
Roll performance in performance in oral/
Student Name out
No. group activity (D5 presentation (D5
of 10
Col. 8) Col.9)
1 RAHUL MAHANOR
2 ROHIT BABAN THORAT
3 SAURABH ASHOK TASTODE
AKASHAY KISHOR PAWAR
4

(Name & Signature of Faculty)