Sel 751a

SEL QuickSet®
Design Template Guide

LDG0007-01
SEL-751A Three-Relay Main-Tie-Main

Automatic Transfer Scheme Control
Application
Larry Wright
20111006
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Date Code 20111006 LDG0007-01

Table of Contents
Introduction ................................................................................................................... 7
Preface ............................................................................................................................................................. 7
Relay Selection and Connections .................................................................................................................... 8
Front-Panel Quick Reference ........................................................................................................................ 13
Description of Operations .......................................................................................... 17

Manual Operation .......................................................................................................................................... 17
General Manual Breaker Operation ...................................................................................................... 17
Manual Transfer to Tie Breaker............................................................................................................ 18
Manual Retransfer to Main Breaker ..................................................................................................... 19
Defeating Manual Close ....................................................................................................................... 19
Automatic Operation ..................................................................................................................................... 19
Automatic Transfer Enable ................................................................................................................... 19
Automatic Retransfer Enable ................................................................................................................ 20
Automatic Transfer Initiation ............................................................................................................... 21
Automatic Retransfer Initiation ............................................................................................................ 21
Live Source Seeking Logic ................................................................................................................... 21
Test Mode ............................................................................................................................................. 22
Transfer Response to External Lockout ................................................................................................ 22
Additional Features ....................................................................................................................................... 22
Reduce Arc-Flash Energy During Maintenance ................................................................................... 22
Trip Coil Monitor ................................................................................................................................. 23
Source Paralleling ................................................................................................................................. 23
Remote Control Logic ................................................................................................. 24

Remote Bits ................................................................................................................................................... 24
Hardwired Remote Inputs ............................................................................................................................. 24
Hardwired Remote Outputs ........................................................................................................................... 25
Design Settings Descriptions and Settings Sheets ................................................. 26

Design Settings Nodes................................................................................................................................... 26
General Settings Node Descriptions .............................................................................................................. 26
General: System Information ................................................................................................................ 26
General: Manual Control and Breaker Failure Settings ........................................................................ 28
General: Special Features ..................................................................................................................... 28
Transfer Scheme Settings Node Descriptions ............................................................................................... 29
Transfer Scheme: Transfer Timer Settings ........................................................................................... 29
Transfer Scheme: Transfer Voltage Settings ........................................................................................ 30
Transfer Scheme: Transfer Block Overcurrent Setting ......................................................................... 31
Transfer Scheme: Synchronism Settings .............................................................................................. 31
Main Breaker 1, Main Breaker 2, and Tie Breaker Settings Node Descriptions ........................................... 32
Main Breaker 1, Main Breaker 2, Tie Breaker: General Settings ......................................................... 32
Main Breaker 1, Main Breaker 2, Tie Breaker: Time Overcurrent Settings ......................................... 33
Main Breaker 1, Main Breaker 2, Tie Breaker: Instantaneous Overcurrent Settings ............................ 34
Date Code 20111006 SEL Design Template Guide 1

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Main Breaker 1, Main Breaker 2: Neutral Overcurrent Settings .......................................................... 35
Design Settings Sheets .................................................................................................................................. 36
Automatic Transfer Scheme Setup ............................................................................ 41

Settings Development.................................................................................................................................... 41
Physical Connections .................................................................................................................................... 41
Sending Settings ............................................................................................................................................ 41
Establishing Settings Groups and Making Port Settings ............................................................................... 42
Configuring Main Breaker 1 Relay....................................................................................................... 42
Configuring Main Breaker 2 Relay....................................................................................................... 43
Configuring Tie-Breaker Relay ............................................................................................................ 43
Select to Trip ........................................................................................................................................ 43
Settings for IEC 61850 GOOSE Messaging.................................................................................................. 43
Other Setting Changes ................................................................................................................................... 45
Commissioning Test ...................................................................................................................................... 46
Troubleshooting .......................................................................................................... 49
Cross-References for Settings, Equations, and Variables.............................................................................. 49
Summary of Logic and I/O Usage ................................................................................................................. 58
Logic Descriptions and Diagrams ................................................................................................................. 61
Main Breaker Overall Trip Logic .................................................................................................................. 62
Main Breaker Automatic Transfer Scheme Trip Logic ........................................................................ 63
Main Breaker Trip from Automatic Transfer Logic ............................................................................. 64
Main Breaker Trip From Tie Breaker Close Logic ............................................................................... 64
Main Breaker Trip From Live Source Seeking Logic .......................................................................... 65
Transfer Initiate Logic .......................................................................................................................... 66
Test Mode Logic ................................................................................................................................... 66
External Transfer Initiate/Block Logic ................................................................................................. 67
Main Breaker Close Logic ............................................................................................................................ 67
Overall Close Logic .............................................................................................................................. 67
Automatic Retransfer Initiate Logic ..................................................................................................... 69
Tie Breaker Overall Trip Logic ..................................................................................................................... 70
Tie-Breaker Automatic Transfer Scheme Trip Logic ........................................................................... 71
Tie-Breaker Trip From Retransfer Logic .............................................................................................. 71
Tie-Breaker Trip From Both Main Breakers Open Logic..................................................................... 72
Tie-Breaker Overall Close Equation ............................................................................................................. 72
Tie Breaker Automatic Transfer Close Logic ....................................................................................... 75
Transfer Enable Logic ................................................................................................................................... 75
Automatic Retransfer Enable Logic .............................................................................................................. 78
Breaker Trip and Close Failure Logic ........................................................................................................... 80
Scheme Error Checking Logic ...................................................................................................................... 81
Select to Trip Logic ....................................................................................................................................... 82
Remote Control Enable/Disable Logic .......................................................................................................... 83
Scheme Alarm Logic ..................................................................................................................................... 84
Enable Instantaneous Overcurrent Elements ................................................................................................. 85
Trip Coil Monitoring ..................................................................................................................................... 85
Source Paralleling ......................................................................................................................................... 86
“Select A Main” Logic .................................................................................................................................. 86
“Communications OK” Logic ....................................................................................................................... 87
Oscillator Logic ............................................................................................................................................. 88
Flasher Logic ................................................................................................................................................. 88
LED Settings ................................................................................................................................................. 88
Display Point Settings ................................................................................................................................... 89
MIRRORED BITS Logic Settings ..................................................................................................................... 90
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GOOSE Messaging Virtual Bit Assignments ................................................................................................ 91
Relay Settings ................................................................................................................................................ 92
Common Settings.................................................................................................................................. 93
Main Breaker 1 Settings ....................................................................................................................... 95
Main Breaker 2 Settings ....................................................................................................................... 99
Tie Breaker Settings ........................................................................................................................... 103
Using Design Templates........................................................................................... 109

What Is a Design Template? ....................................................................................................................... 109
Components ........................................................................................................................................ 109
Purpose and Function ......................................................................................................................... 109
Opening the Design Template ..................................................................................................................... 110
Changing the Part Number .......................................................................................................................... 112
Design Settings ............................................................................................................................................ 113
Sending Settings .......................................................................................................................................... 113
Design Template Reports ............................................................................................................................ 114
Reading Settings From a Device ................................................................................................................. 115
Template Versions .................................................................................................... 117

Design Template Revisions ......................................................................................................................... 117
Tables
Table 1 Common SEL-751A Part Numbers for Automatic Transfer Scheme ...................................................... 8
Table 2 Common SEL-751A Ordering Options for Automatic Transfer Scheme ................................................ 8
Table 3 Status and Target LEDs.......................................................................................................................... 15
Table 4 Operator Control Pushbuttons and LED Functions ................................................................................ 15
Table 5 Remote Bits for Controlling SEL-751A Operator Functions ................................................................. 24
Table 6 Contact Inputs for Controlling SEL-751A Operator Functions ............................................................. 24
Table 7 Contact Outputs for Optional Remote Indicators ................................................................................... 25
Table 8 System Frequency Setting ...................................................................................................................... 26
Table 9 System Phase Rotation Setting ............................................................................................................... 26
Table 10 Potential Transformer Ratio Setting ....................................................................................................... 27
Table 11 System Voltage Setting .......................................................................................................................... 27
Table 12 Delta or Wye Setting .............................................................................................................................. 27
Table 13 Delta or Wye Setting .............................................................................................................................. 27
Table 14 Low DC Voltage Alarm Level Setting ................................................................................................... 27
Table 15 High DC Voltage Alarm Level Setting .................................................................................................. 27
Table 16 Breaker Close Failure Time Setting ....................................................................................................... 28
Table 17 Breaker Trip Failure Time Setting ......................................................................................................... 28
Table 18 Close Pushbutton Delay Setting ............................................................................................................. 28
Table 19 Trip Pushbutton Delay Setting ............................................................................................................... 28
Table 20 Block Manual Close With Bkr Racked In Setting.................................................................................. 28
Table 21 Enable Instantaneous Elements Setting .................................................................................................. 28
Table 22 EnableTrip Coil Monitoring Setting....................................................................................................... 29
Table 23 Enable Source Paralleling Setting .......................................................................................................... 29
Table 24 Enable Remote ....................................................................................................................................... 29
Table 25 Transfer Initiate Time-Delay Setting ..................................................................................................... 29
Table 26 Transfer Tie Close Time-Delay Setting ................................................................................................. 29
Table 27 Automatic Retransfer Time-Delay Setting ............................................................................................. 30
Table 28 Tie Breaker Trip-Delay Setting .............................................................................................................. 30
Table 29 Transfer Initiate Voltage Setting ............................................................................................................ 30
Table 30 Healthy Source Voltage Setting ............................................................................................................. 30
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Table 31 Dead Source Voltage Setting ................................................................................................................. 30
Table 32 Source Undervoltage Alarm Pickup Setting........................................................................................... 30
Table 33 Source Undervoltage Alarm Delay Setting ............................................................................................ 31
Table 34 Transfer Block Phase Overcurrent Level Setting ................................................................................... 31
Table 35 Transfer Block Ground Overcurrent Level Setting ................................................................................ 31
Table 36 Sync Check Low Threshold Voltage Setting ......................................................................................... 31
Table 37 Sync Check High Threshold Voltage Setting......................................................................................... 31
Table 38 Maximum Slip Frequency Setting.......................................................................................................... 32
Table 39 Sync Check Maximum Angle Setting .................................................................................................... 32
Table 40 Terminal Identifier Setting ..................................................................................................................... 32
Table 41 Relay Identifier Setting .......................................................................................................................... 32
Table 42 Phase CT Ratio Setting .......................................................................................................................... 32
Table 43 Neutral CT Ratio Setting ........................................................................................................................ 33
Table 44 Synchronizing Phase Setting .................................................................................................................. 33
Table 44 Phase Time Overcurrent Pickup Setting ................................................................................................ 33
Table 45 Phase Time Overcurrent Curve Setting .................................................................................................. 33
Table 46 Phase Time Overcurrent Delay Setting .................................................................................................. 33
Table 47 Ground Time Overcurrent Pickup Setting.............................................................................................. 33
Table 48 Ground Time Overcurrent Curve Setting ............................................................................................... 34
Table 49 Ground Time Overcurrent Delay Setting ............................................................................................... 34
Table 50 Instantaneous Phase Pickup Setting ....................................................................................................... 34
Table 51 Instantaneous Phase Time Delay Setting ............................................................................................... 34
Table 52 Instantaneous Ground Pickup Setting .................................................................................................... 34
Table 53 Ground Time Overcurrent Delay Setting ............................................................................................... 34
Table 54 Neutral Time Overcurrent Pickup Setting .............................................................................................. 35
Table 55 Neutral Time Overcurrent Curve Setting ............................................................................................... 35
Table 56 Neutral Time Overcurrent Delay Setting ............................................................................................... 35
Table 57 Neutral Instantaneous Overcurrent Pickup ............................................................................................. 35
Table 58 Neutral Instantaneous Overcurrent Delay Setting .................................................................................. 35
Table 59 General: System Information Settings ................................................................................................... 36
Table 60 General: Manual Control and Breaker Failure Settings ......................................................................... 36
Table 61 General: Special Features Settings ......................................................................................................... 36
Table 62 Transfer Scheme: Transfer Timer Settings............................................................................................. 36
Table 63 Transfer Scheme: Transfer Voltage Settings .......................................................................................... 37
Table 64 Transfer Scheme: Transfer Block Overcurrent Settings......................................................................... 37
Table 65 Transfer Scheme: Sync Settings ............................................................................................................. 37
Table 66 Main Breaker 1: General Settings .......................................................................................................... 37
Table 67 Main Breaker 1: Time Overcurrent Settings .......................................................................................... 37
Table 68 Main Breaker 1: Instantaneous Overcurrent Settings ............................................................................. 38
Table 69 Main Breaker 1: Neutral Overcurrent Settings ....................................................................................... 38
Table 70 Main Breaker 2: General Settings .......................................................................................................... 38
Table 71 Main Breaker 2: Time Overcurrent Settings .......................................................................................... 38
Table 72 Main Breaker 2: Instantaneous Overcurrent Settings ............................................................................. 39
Table 73 Main Breaker 2: Neutral Time Overcurrent Settings ............................................................................. 39
Table 74 Tie Breaker: General Settings ................................................................................................................ 39
Table 75 Tie Breaker: Time Overcurrent Settings ................................................................................................ 39
Table 76 Tie Breaker: Instantaneous Overcurrent Settings ................................................................................... 40
Table 77 Relay Settings Affected .......................................................................................................................... 49
Table 78 Design Template Equations ................................................................................................................... 51
Table 79 Design Variables Cross Reference ......................................................................................................... 56
Table 80 Summary of Logic and I/O Usage .......................................................................................................... 58
Table 81 Target LEDs ........................................................................................................................................... 88
Table 82 Main Breaker Relay Pushbutton LEDs .................................................................................................. 89
Table 83 Display Points ........................................................................................................................................ 89
Table 84 MIRRORED BITS Settings for Main Breaker Relays................................................................................ 90
Table 85 MIRRORED BITS Settings for Tie-Breaker Relay .................................................................................... 90
Table 86 GOOSE Messaging Virtual Bit Assignments in Main Breaker 1 Relay ................................................ 91
Table 87 GOOSE Messaging Virtual Bit Assignments in Main Breaker 2 Relay ................................................ 91

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Table 88 GOOSE Messaging Virtual Bit Assignments in Tie-Breaker Relay ...................................................... 92
Table 89 Design Template and Settings File Revision History........................................................................... 117
Figures
Figure 1 Relay Connections ................................................................................................................................. 10
Figure 2 Trip Input Connections .......................................................................................................................... 11
Figure 3 Communications Connections – MIRRORED BITS Communications With SEL
Communications Processor .................................................................................................................... 12
Figure 4 SEL-751A Main Breaker Relay Front-Panel Operator Interface ........................................................... 13
Figure 5 SEL-751A Tie-Breaker Relay Front-Panel Operator Interface .............................................................. 14
Figure 6 SEL-9510 Control Switch Module ......................................................................................................... 17
Figure 7 Main Breaker Overall Trip Logic ........................................................................................................... 63
Figure 8 Main Breaker Automatic Transfer Scheme Trip Equation ..................................................................... 64
Figure 9 Main Breaker Trip From Automatic Transfer ........................................................................................ 64
Figure 10 Trip From Tie Breaker Close ................................................................................................................. 65
Figure 11 Main Breaker Live Source Seeking Logic ............................................................................................. 66
Figure 12 Main Breaker Transfer Initiate Logic ..................................................................................................... 66
Figure 13 Main and Tie Breaker Test Mode Logic ................................................................................................ 66
Figure 14 Main and Tie Breaker External Transfer Block Logic ........................................................................... 67
Figure 15 Main and Tie Breaker External Transfer Initiate Logic ......................................................................... 67
Figure 16 Main Breaker Overall Close Logic ........................................................................................................ 68
Figure 17 Main Breaker Manual Close Permissive Logic ...................................................................................... 68
Figure 18 Main and Tie Breaker Just Closed Logic ............................................................................................... 69
Figure 19 Main Breaker Unlatch Close Logic ........................................................................................................ 69
Figure 20 Main Breaker Close On Automatic Retransfer Logic ............................................................................ 70
Figure 21 Tie Breaker Overall Trip Logic .............................................................................................................. 70
Figure 22 Tie-Breaker Automatic Transfer Scheme Trip Equation ....................................................................... 71
Figure 23 Tie Retransfer Trip ................................................................................................................................. 72
Figure 24 Trip From Both Main Breakers Open Logic .......................................................................................... 72
Figure 25 Tie Breaker Overall Close Logic............................................................................................................ 73
Figure 26 Tie Breaker Manual Close Permissive Logic ......................................................................................... 74
Figure 27 Tie Breaker Unlatch Close Logic ........................................................................................................... 74
Figure 28 Tie Breaker Automatic Transfer Close Logic ........................................................................................ 75
Figure 29 Main 1 Transfer Enable Logic ............................................................................................................... 76
Figure 30 Tie Transfer Enable Logic...................................................................................................................... 77
Figure 31 Tie Transfer Enable Logic (Cont’d) ....................................................................................................... 78
Figure 32 Tie Breaker Automatic Retransfer Enable Logic ................................................................................... 79
Figure 33 Main Breaker 1 Automatic Retransfer Enable Logic ............................................................................. 80
Figure 34 Main Breaker Trip Failure Logic ........................................................................................................... 81
Figure 35 Tie-Breaker Trip Failure Logic .............................................................................................................. 81
Figure 36 Main and Tie-Breaker Close Failure Logic ............................................................................................ 81
Figure 37 Main Breaker 1 Scheme Error Checking Logic ..................................................................................... 82
Figure 38 Tie Breaker Scheme Error Checking Logic ........................................................................................... 82
Figure 39 Main Breaker Select to Trip Logic ......................................................................................................... 83
Figure 40 Remote Control Enable/Disable Logic................................................................................................... 84
Figure 41 Breaker Alarm Logic.............................................................................................................................. 84
Figure 42 Enable Instantaneous Elements .............................................................................................................. 85
Figure 43 Trip Coil Monitoring .............................................................................................................................. 85
Figure 44 Source Paralleling Logic ........................................................................................................................ 86
Figure 45 “Select A Main” Logic ........................................................................................................................... 87
Figure 46 Main Breaker Communications OK Logic............................................................................................. 87
Figure 47 Tie Breaker Communications OK Logic................................................................................................ 87
Figure 48 Oscillator Logic ...................................................................................................................................... 88
Figure 49 Flasher Logic.......................................................................................................................................... 88
Figure 50 Design Template Structure ................................................................................................................... 110
Figure 51 Open a Design Template ...................................................................................................................... 110

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Figure 52 Select Show Settings With Design Templates ..................................................................................... 111
Figure 53 Design Template View in ACSELERATOR QuickSet ............................................................................ 111
Figure 54 Configuring the Part Number in ACSELERATOR QuickSet .................................................................. 112
Figure 55 Design Template Manager Directory Tree ........................................................................................... 113
Figure 56 Sending Settings From the Design Template View ............................................................................. 113
Figure 57 Viewing and Printing Design Template Reports .................................................................................. 114
Figure 58 Design Report Options ......................................................................................................................... 115
Figure 59 Merge Dialog Box in ACSELERATOR QuickSet ................................................................................... 115
Figure 60 Final Step in Merging Settings and Design Template .......................................................................... 116

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Introduction
Preface
A common power system configuration for industrial and power generation facilities consists of two
switchgear lineups with separate power sources. In normal operation, main breakers supplying the
switchgear are closed, and they supply power separately to each switchgear. When one of the two sources
fails, the power system uses an automatic transfer scheme to trip the main breaker and to close a tie
breaker, allowing the remaining main breaker to supply both switchgear lineups.
This automatic transfer scheme has previously been addressed by using the SEL-351S Protection and
Breaker Control Relay using SEL MIRRORED BITS communications. This transfer scheme is described in
SEL QuickSet™ Design Template Guide LDG0003, SEL-351S Three-Relay Main-Tie-Main Automatic
Transfer Scheme Control Application by Lee Underwood.
The SEL-751A Feeder Protection Relay, with its configurable front-panel pushbuttons and LEDs,
significant logic capability, synchronism-check elements, and ability to communicate with other relays by
using either IEC 61850 GOOSE messaging or SEL MIRRORED BITS communications, is also ideal for
controlling automatic transfer schemes. This design template guide is intended to be an update of LDG0003
using the SEL-751A in a manner similar to the SEL-351S.
Through use of an ACSELERATOR QuickSet Designer® Software Design Template, you can easily
configure such a scheme with a small number of settings. A Design Template is a combination of a settings
interface that uses custom variables and equations for calculating the actual relay settings and custom logic
in the relay settings file that would normally remain unchanged. Use ACSELERATOR QuickSet Designer
software, part of the licensed version of ACSELERATOR QuickSet, to develop the custom settings interface.
SEL has developed a Design Template with which you can easily configure three SEL-751A Relays for use
in a three-relay main-tie-main automatic transfer scheme. To use this Design Template, you only need an
unlicensed copy of ACSELERATOR QuickSet® SEL-5030 Software. The licensed version of ACSELERATOR
QuickSet Designer software is necessary only if you want to modify the Design Template or develop new
Design Templates for other products. Refer to the Using Design Templates section at the end of this Design
Template Guide for detailed instructions on using Design Templates.
The SEL-751A Three-Relay Main-Tie-Main Automatic Transfer Scheme Design Template allows easy
configuration of the following features:
Overcurrent protection
Transfer initiate voltages
Transfer time delays
Synchronism-check parameters
Automatic retransfer
Source paralleling
Remote and local control interface
Demand metering parameters
Instantaneous overcurrent protection for arc-flash mitigation
Trip coil monitoring
Breaker failure

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This QuickSet Design Template Guide provides the following information:
Introduction provides a brief description of the Design Template purpose and features.
The Relay Selection and Connections subsection in this section describes the basic
connections necessary for the scheme and the requirements for the selection of the relays.
The Front-Panel Quick Reference subsection in this section describes the functions of the
SEL-751A front-panel LEDs and operator control pushbuttons when you use this Design
Template to program the SEL-751A.
Description of Operations provides an overview of how the scheme works.
Remote Control Logic describes the use of remote bits and hardwired I/O to remotely control
operator functions such as trip, close, transfer enable, retransfer enable, etc.
Design Settings Descriptions and Settings Sheets describes the purpose of each design setting and
contains blank settings sheets.
Automatic Transfer Scheme Setup describes how to send settings to each of the three relays, how
to put each relay into the correct settings group, how to set the communications ports for either
IEC 61850 GOOSE messaging or SEL MIRRORED BITS communications among the relays, and
provides an overview of steps you might use to ensure proper scheme operation.
Troubleshooting includes a listing of design equations for calculating relay settings and a detailed
description of relay logic settings particular to the application.
Using Design Templates describes the Design Template concept and how to work with Design
Templates.
Relay Selection and Connections

The automatic transfer scheme uses an SEL-751A on each main breaker and on the tie breaker. The
features you want for the transfer scheme determine the necessary part numbers. Table 1 and Table 2 list
part numbers for common arrangements that use copper communications cables for the relays . You can
also employ other arrangements that use all fiber-optic communications.
Table 1 Common SEL-751A Part Numbers for Automatic Transfer Scheme

Features Main Breaker Relay Part No. Tie-Breaker Relay Part No.
MIRRORED BITS Communications only 751A5xy0X3y7285000z* 751A5xyA03y7285000z
MIRRORED BITS Communications + RS-232
751A5xyA03y7285000z 751A5xyA03y7285100z
DCS communications for control
MIRRORED BITS Communications + Single
10/100BASE-T Ethernet communications for 751A5xy0X3y7285120z* 751A5xyA03y7285120z
control
10/100BASE-T Dual Ethernet for control and
751A5xy0X3y7285163z* 751A5xy0X3y7285163z
IEC 61850 GOOSE messaging
Table 2 Common SEL-751A Ordering Options for Automatic Transfer Scheme

Options Ordering Information
Power supply voltage x=1 110–250 Vdc, 110–230Vac
x=2 24–48 Vdc
Input Voltage y=A 125 Vdc/Vac

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Options Ordering Information
y=B 24 Vdc/Vac
y=C 48 Vdc/Vac
y=D 110 Vdc/Vac
y=G 220 Vdc/Vac
y=H 250 Vdc/Vac
Conformal Coating z=0 None
z=1 Conformal Coating
Additional I/O (required for 51N output) Replace 0X with 1y in part nos. marked with “*”. Select y from
input voltages above.
Figure 1 shows connections to the relay, and the following text provides description.
Each relay has three-phase CT connections to provide overcurrent protection and overcurrent supervision
of the automatic transfer. Residual current elements, which use residual current the relay calculates through
use of the three-phase currents, provide ground fault protection. By changing the logic and settings to use
neutral elements in place of residual elements, you can cause the scheme to accommodate zero-sequence
CTs.
The automatic transfer scheme is designed for use on solidly grounded or low-resistance grounded systems.
For a high-resistance grounded system, logic and settings changes may be necessary to support the use of
transformer neutral- or zero-sequence current transformers for ground fault protection, ground overcurrent
transfer blocking, or breaker failure ground current detectors. In addition, you may want to use outputs
from the high-resistance grounding equipment to disable the automatic transfer scheme when a ground is
detected. This will prevent a bus with an existing ground from being connected to another bus that might
have a ground on another phase.
Three-phase or single-phase potential transformers (PTs) are connected on the source side of the two main
breaker relays. Single-phase PTs are connected on the bus side of the two main breaker relays and both
sides of the tie-breaker relay. The Design Template configuration provides identical PT ratios for the two
sources and two buses. Two contact inputs of each relay are connected for Breaker 52A contact status and
truck position contacts. Two contact outputs of each relay are connected to provide breaker trip and close
signals. The alarm output from each relay can be wired to a monitored location to provide indication of
relay or control power failure or a general scheme alarm if monitoring via communications is not possible.
IEC 61850 GOOSE messaging or SEL MIRRORED BITS communications between the tie-breaker relay and
each of the main breaker relays provides primary communication for the automatic transfer scheme data
among relays. The scheme uses Dual Ethernet Port 1 during application of IEC 61850 GOOSE messaging
and EIA-232 Ports 3 and 4C during application of MIRRORED BITS for such connections as those in
Figure 3.
An SEL communications processor or communications using MODBUS TCP, DNP3 LAN/WAN,
MODBUS RTU, DNP3 can provide remote manual trip, close, and scheme enable functions. (Note that
DNP3, while not included in the part numbers in Table 1, can be supplied for any arrangement.) The
application provides inputs for hardwired trip and close, transfer enable, retransfer enable, parallel enable
and main breaker select-to-trip. Scheme enable functions are also available via the SEL-751A front-panel
pushbuttons.
You can choose to connect external contacts to inputs of each main breaker relay to either enable or block
the transfer scheme. This way, if the application provides bus differential relays, a normally open contact of
the differential lockout relay (86B) or output of the bus differential relay (87B) should connect to input
IN406 on the main breaker relays. If the bus differential relay operates, the transfer scheme will be blocked.
If the application provides transformer differential relays, you can also connect a normally open contact of
the differential lockout relay (86T) or output of the bus differential relay (87T) to input IN406 on the main
breaker relays. In this way, if the transformer differential relay operates, the transfer scheme will be
blocked. It is a good idea if the transformer differential zone wraps the associated main breaker to disable
the transfer and manual closing in this manner to prevent transfer of a fault within the breaker to the
unfaulted bus. For a more detailed discussion on this subject, see Transfer Scheme Response to
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Transformer Lockout in SEL QuickSet® Design Template Guide LDG0003-02 SEL-351S Three-Relay
Main-Tie-Main Automatic Transfer Scheme Control Application by Lee Underwood.
Alternately, you can initiate transfer by connecting a normally open contact of the differential lockout relay
(86T) or output of the bus differential relay (87T) to input IN407 on the main breaker relays. You can also
initiate transfer by connecting to IN407 on the main breaker relays other external relays that trip the main
breaker for a fault or other adverse condition outside of the switchgear bus, such as transformer fault-
pressure (63), transformer overtemperature (49), etc.
You can use Output 301 as a trip output from the neutral time-overcurrent element to trip a transformer
high-side circuit breaker or lockout relay, but you will need to purchase additional I/O to accomplish this
function. See Table 2 for details.
Figure 1 Relay Connections

The automatic transfer scheme in the Design Template will not work properly if you use external trip/close
switches and wire these directly to breaker trip and close coils; they must be wired to IN403 and IN404. If
you want to hardwire the trip contact to the breaker trip contact, you can wire the contact as in either

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Figure 2(a) or Figure 2(b). Do not wire the trip contact as shown in Figure 2 if you want time-delayed
manual tripping.
Figure 2 Trip Input Connections

Note that IN101 in Figure 2 provides monitoring continuity of the breaker trip coil. Use settings to enable
the trip coil monitor, and always wire it in parallel with the TRIP output, OUT101.
Figure 3 shows the communications connections, including optional connections to an SEL
communications processor, if you use SEL MIRRORED BITS communications.
You can employ IEC 61850 GOOSE messaging communications to form any manner of interconnection
among the three relays simply by using Ethernet crossover cables or connecting to an Ethernet switch with
standard cables. The SEL-751A dual Ethernet ports act as a switch, so an external switch is unnecessary.
You can use spare ports to connect to other relays or a control system.

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Figure 3 Communications Connections – MIRRORED BITS Communications With SEL Communications Processor

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Front-Panel Quick Reference
This Design Template contains customized relay LED and pushbutton labels. Figure 4 and Figure 5 show
the LEDs and operator control pushbuttons in Table 3 and Table 4, respectively.
A Microsoft® Word document containing the configurable label template for printing the labels in Figure 4
and Figure 5 is provided in conjunction with this design template guide. You can delete unused functions
from the template as necessary.
Figure 4 SEL-751A Main Breaker Relay Front-Panel Operator Interface

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Figure 5 SEL-751A Tie-Breaker Relay Front-Panel Operator Interface

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Table 3 Status and Target LEDs
LED Label LED Function
ENABLED Indicates relay is enabled
TRIP Trip occurred that was not caused by automatic transfer or manual trip
PHASE OVERCURRENT Phase element-generated trip
GND/NEUTRAL OVERCURRENT Ground/Neutral element-generated trip
TRIP/CLOSE TIMER Flashes during time delay if you have chosen to enable a time delay for
manual closing and/or manual tripping
NOT AUTO READY Relay is not ready for you to enable automatic transfer. Reasons may
include a disabled scheme, active trip, breaker not racked in, both mains
open, breaker failure, or scheme error.
COMM ERROR GOOSE messaging or MIRRORED BITS Communications failure
BKR FAIL Breaker failed to close or trip on command
Table 4 Operator Control Pushbuttons and LED Functions

Pushbutton Function
INST Press the {INST} operator control pushbutton (PB01) to enable instantaneous protection
elements 50P1, 50G1, and 50N1. This optional feature provides for improved personnel
protection in case of arc flash.
The corresponding top ENABLED LED flashes to indicate the enabled state. The corresponding
bottom TRIPPED LED illuminates for an instantaneous trip.
TRIP SEL Press the {TRIP SEL} operator control pushbutton (PB02) to select which of the two main
breakers will trip when the tie breaker closes during a manual transfer. You can select one
breaker at a time; pressing the {TRIP SEL} operator control pushbutton will automatically
deselect the other breaker. You can program this pushbutton only on the two main breaker
relays.
The corresponding top BKR SELECTED LED illuminates to indicate the enabled state. The
corresponding bottom NO MAN CLOSE LED illuminates to indicate that manual closing is (1)
optionally disabled when the breaker is racked in or (2) disabled because of a fault on the main
bus, unmet synchronization check conditions, loss of communications, or other unmet transfer
conditions.
PARALLEL Press the {PARALLEL} operator control pushbutton (PB02) to defeat the anti-paralleling
logic of the transfer scheme and allow both main breakers and the tie breaker to be
simultaneously closed. You can program this pushbutton only on the tie-breaker relay.
The corresponding top ENABLED LED illuminates to indicate the enabled state. The
corresponding bottom NO MAN CLOSE LED illuminates to indicate that manual closing is (1)
optionally disabled when the breaker is racked in or (2) disabled because of a fault on the main
bus, unmet synchronization check conditions, loss of communications, or other unmet transfer
conditions.
REMOTE Press the {REMOTE} operator control pushbutton (PB03) to enable/disable remote control.
A disabled remote control defeats the following functions:
1. Manual breaker close via DCS communications or external switch
2. Enabling/disabling automatic transfer via DCS communications or external switch
3. Enabling/disabling automatic retransfer via DCS communications or external switch
For safety, the Remote Enabled status does NOT supervise either remote or local tripping
functions.
The corresponding top LED illuminates to indicate the enabled state.

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Pushbutton Function
TRANSFER Press the {TRANSFER} operator control pushbutton (PB04) on the tie-breaker relay to
enable the automatic transfer scheme in all three relays. You can operate this button only
when certain conditions are true, as listed in the Description of Operation. The corresponding
top TRANSFER LED illuminates on all three relays to indicate the enabled state.
Press the {TRANSFER} operator control pushbutton on the tie-breaker relay a second time to
enable automatic retransfer. The corresponding bottom RETRANSFER LED illuminates on all
three relays to indicate the enabled state.
Press the {TRANSFER} operator control pushbutton on the tie-breaker relay a third time to
disable automatic transfer.
The {TRANSFER} operator control pushbutton is active on the tie-breaker relay only. On the
main breaker relay, the LEDs provide indication of the enabled status of the automatic transfer
scheme, but the pushbutton is inactive.

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Description of Operations
The automatic transfer scheme provides control logic for two main breakers (Main Breaker 1 and Main
Breaker 2) and one tie breaker (Tie). Upon loss of any one main source, the scheme automatically transfers
the loads to the other source by closing the tie breaker. It provides automatic, hot-bus, synchronism-
supervised retransfer after the main source is recovered and it remains stable for user-selectable time delay.
The scheme also provides supervision for manual transfers and provides antiparalleling logic. The scheme
uses communication between relays as the primary means of communicating breaker status, fault
conditions, and other data between relays. The scheme is designed such that critical functions are not
attempted during a loss of communication between relays.
Manual Operation
General Manual Breaker Operation
The transfer scheme is designed so that you can perform manual breaker operations after you enable
automatic transfer. For safety reasons, there are certain manual operations that will disable the scheme.
Therefore, it is good practice to write operating procedures to disable automatic transfer before manual
operation and enable automatic transfer (and automatic retransfer, if necessary) after completion of manual
operations.
You can close either main breaker manually by pulsing a manual CLOSE contact or pushbutton, such as on
the SEL-9510 Control Switch Module (Figure 6), connected to the IN404 input, or by using a DCS
communications command. You can obtain front-panel breaker closing with an optional time delay that
allows you to move away from the breaker after pressing the manual {CLOSE} pushbutton. The CLOSE/TRIP
TIMER LED flashes as the close logic is timing. You can choose to disable manual closing except when the
breaker is in the TEST position as indicated by 52/TOC contact. In this case, the MAN CLOSE DISABLE LED
remains on when the breaker is racked in. The communications close is available when the Remote Enable
function is active. The main breakers will close only if the voltage of the source exceeds the healthy source
voltage value you entered in settings.
You can open the breakers manually by pulsing a manual TRIP contact or pushbutton, such as on the SEL-
9510 Control Switch Module connected to the IN403 input, or by using communications. Front-panel
breaker tripping is provided with an optional time delay to allow the operator to move away from the
breaker after the {TRIP} pushbutton is pushed.
Figure 6 SEL-9510 Control Switch Module

LDG0007-01
Manual Transfer to Tie Breaker
You can manually transfer load to the tie breaker via closed or open transition. Perform a closed-transition
transfer as follows:
Select which main breaker you want to trip when the tie breaker closes, through use of any of the following
methods:
Press the {TRIP SEL} pushbutton (PB02) on the front panel of either main breaker relay when the
Remote Enable function of the main breaker relay is inactive.
Pulse the optional remote Trip Select switch when the Remote Enable function of the main
breaker relay is active.
Pulse RB01 in the tie-breaker relay via Distributed Control System (DCS) communications when
the Remote Enable of the main breaker relay is active.
You can select only one breaker at a time. Selecting one breaker to trip deselects the other breaker.
A loss of power at the breaker you do not select to trip will cause it to select itself and deselect the
other.
Initiate closing of the tie breaker by pulsing a manual CLOSE contact or pushbutton on the tie-breaker
relay or via a remote hardwired control switch or DCS communications close command.
The logic will verify the following:
1. Main Breaker 1 and Main Breaker 2 have not tripped because of a fault;
2. The Block Transfer or Initiate Transfer contact inputs on Main Breaker 1 and Main Breaker 2 are
not closed;
3. Communication between relays is okay; and
4. Any one of the following conditions is present:
a. Bus 1 and Bus 2 have voltage and are in synchronism.
b. Bus 1 has voltage, and Bus 2 has no voltage.
c. Bus 1 has no voltage, and Bus 2 has voltage.

The tie breaker will then close, and the main breaker that you have selected to trip will open.
You can perform an open transition transfer as follows:
Open Main Breaker 1 or Main Breaker 2 by pulsing a manual TRIP contact or pushbutton on the
appropriate main breaker or via a remote hardwired control switch or DCScommunications trip command.
Initiate closing of the tie breaker by pulsing a manual CLOSE contact or pushbutton on the tie breaker or a
remote hardwired control switch or DCScommunications close command. The logic will verify that Main
Breaker 1 and Main Breaker 2 have not tripped because of a fault and that either of the following
conditions is present:
Bus 1 has voltage, and Bus 2 has no voltage.
Bus 1 has no voltage, and Bus 2 has voltage.
The tie breaker will close.

LDG0007-01
Manual Retransfer to Main Breaker
To restore the system to normal operation with both main breakers closed, you can perform a closed
transition retransfer as follows:
Initiate closing of the open main by pulsing a manual CLOSE contact or pushbutton on the appropriate
main breaker or via a remote hardwired control switch or DCS communications close command. After the
breaker close time delay, the logic will verify the following:
The tie breaker is closed.
The tie breaker has detected no faults on the bus.
The source and bus have voltage and are in synchronism, or the source has voltage and the bus has
no voltage.
The main breaker will close, and the tie breaker will open.
Perform open transition retransfers by tripping the tie breaker and closing the main breaker. The main
source voltage must be healthy before the main breaker can close.
Defeating Manual Close

You can use this Design Template to defeat manual closing, unless the associated circuit breaker is in the
TEST position as indicated by the truck-operated contact 52/TOC. Select this feature through the use of
settings. Whenever you select this feature and the breaker is racked in, the NO MAN CLOSE LED illuminates to
indicate defeat of manual closing.
Automatic Operation
Automatic Transfer Enable
Automatic transfers will occur only when you have enabled the automatic transfer scheme. You can use
any of the following methods to enable and disable the automatic transfer scheme:
Press the {TRANSFER} pushbutton (PB04) on the front panel of the tie-breaker relay when the
Remote Enable function of the tie-breaker relay is inactive.
Close the optional remote Transfer Enable switch when the Remote Enable function of the tie-
Pulse Remote Bit RB01 in the tie-breaker relay via DCS communications when the Remote
Enable function is active.
Communication between relays transmits the transfer enabled signal to the main breaker relays. The
TRANSFER ENABLED LED on each relay illuminates when you have enabled the automatic transfer scheme.
You can also enable the automatic transfer scheme when all of the following conditions are true:
Source 1 voltage is healthy.
Main Breaker 1 is closed and racked in.
Source 2 voltage is healthy.
Main Breaker 2 is closed and racked in.
Tie breaker is racked in.
No breaker failure has occurred.
Communication between relays is operating properly.

LDG0007-01
The scheme is automatically disabled by any of the following actions:
Scheme error checking asserts.
A breaker failure occurs.
The relay initiates a trip that is neither a manual trip nor an automatic transfer trip.
The Block Transfer input on either main breaker relay asserts.
The NOT AUTO READY LED will be on when any of the above conditions are NOT met. The LED will
extinguish when all of the conditions are met, indicating that you can enable automatic transfer.
You can disable the automatic transfer as follows:
Press the {TRANSFER} pushbutton (PB04) on the tie-breaker relay TWICE when the Remote
Enable function of the tie-breaker relay is inactive. This will switch the relay to automatic
retransfer and turn the transfer off.
Open the optional remote Transfer Enable switch when the Remote Enable function of the tie-
Pulse RB02 in the tie-breaker relay via DCS communications when the Remote Enable function is
active.
Automatic Retransfer Enable

You can enable automatic retransfer of the load from the tie breaker to the main breaker whenever you
enable the automatic transfer scheme. If you disable automatic retransfer, the load will remain connected
through the tie breaker after an automatic transfer and you must manually retransfer it back to the main
breaker. If you have enabled automatic retransfer, the load will retransfer automatically back to the main
breaker after the source voltage is recovered and a user-defined time delay has expired.
Use any of the following methods to enable the automatic retransfer:
With the TRANSFER ENABLED LED already lit, press the {TRANSFER} pushbutton (PB04) on the tie-
breaker relay when the Remote Enable function of the tie-breaker relay is inactive.
Close the optional remote Retransfer Enable switch when the Remote Enable function of the tie-
active.
The RETRANSFER ENABLED LED on each relay will illuminate when you have enabled automatic retransfer.
You can enable automatic retransfer when all of the following conditions are true:
Automatic transfer scheme is enabled.
Tie breaker is not closed.
Communication between relays is operating properly.
Automatic retransfer is disabled if automatic transfer is disabled or when the tie breaker closes manually.
This prevents automatic retransfers if you close the tie breaker to intentionally tie the bus. You can also
disable such retransfers as follows:
With the RETRANSFER ENABLED LED already lit, press the {TRANSFER} pushbutton (PB04) on the
tie-breaker relay when the Remote Enable function of the tie-breaker relay is inactive. This will
disable BOTH automatic transfer and automatic retransfer.
Open the optional remote Retransfer Enable switch when the Remote Enable function of the tie-
active.

LDG0007-01
Automatic Transfer Initiation
Automatic transfer to a tied bus configuration initiates when all of the following conditions are true:
Voltage on one or more phases of a source falls below a user-defined voltage for a user-defined
time delay or the external Initiate Transfer input is energized.
Loss of voltage is not the result of a blown PT fuse, as detected by the loss-of-potential logic of
the relay.
Loss of voltage is not the result of an overcurrent on the bus.
The external Block Transfer input is not energized.
Affected main breaker is closed at the time the loss of voltage occurs.
Other source has healthy voltage.
Main breaker for the other source is closed and racked in.
Tie breaker is open and racked in.
Automatic transfer scheme is enabled.
When transfer initiates, the affected main breaker trips and sends a signal via communications to the tie
breaker. The main breaker logic seals in the transfer signal until a retransfer signal occurs or the transfer
scheme is disabled. This prevents repeated attempts at a transfer.
The transfer signal is sealed in at the tie breaker until you attempt a retransfer or the automatic transfer
scheme is disabled.
Automatic Retransfer Initiation

If automatic retransfer is enabled, the scheme will perform a closed transition transfer of the load from the
tie breaker back to the main breaker by allowing the main breaker to close.
The main breaker can automatically close for a retransfer if all of the following conditions are true:
Automatic retransfer is enabled.
The main breaker has previously tripped on automatic transfer or by the Live Source Seeking
Logic.
Voltage on the associated source has been healthy for a user-defined retransfer time delay.
The tie breaker is closed.
The tie breaker has detected no faults on the bus.
The tie breaker trip coil is continuous.
The bus has voltage and is in synchronism with the source, OR the bus voltage is below the dead-
bus threshold.
The scheme forces the tie breaker to trip after a user-defined time delay when both main breakers and the
tie breaker close simultaneously. The CLOSE/TRIP TIMER LED flashes while the tie breaker trip is pending.
Live Source Seeking Logic

The scheme contains logic that will allow automatic recovery from a time-staggered loss of both sources.
Assume loss of Source 1 and initiation of a transfer to the tie breaker, resulting in Main Breaker 1 opening,
the tie breaker closing, and Main Breaker 2 remaining closed. Suppose that you then lose Source 2. Main
Breaker 2 will not trip because there is no live source to which to transfer the load. If you recover Source 2
before Source 1, Main Breaker 2 will remain closed and Main Breaker 1 will close according to the
Automatic Retransfer Logic.

LDG0007-01
If, however, you recover Source 1 before Source 2, the logic will trip Main Breaker 2 (leaving the tie
breaker closed) and close Main Breaker 1. Tripping Main Breaker 2 avoids backfeeding Source 2 when
Main Breaker 1 closes. If automatic retransfer is enabled, subsequent recovery of Source 2 will cause Main
Breaker 2 to close and the tie breaker to trip, as described in Automatic Retransfer Initiation.
Test Mode
A test mode aids in testing the scheme with voltage sources. In each relay, you can enter the test mode by
pulsing LB1 from the CONTROL menu of the front panel. The relay will remain in the test mode until you
pulse LB2 from the front panel. The test mode also automatically resets after about four and one-half hours.
In the main breaker relays, test mode is reserved for future functions and has no effect on the transfer
scheme.
In the tie-breaker relay, the test mode allows you to manually close the breaker you want to test without
first having to connect ac voltage to the relay. Normally, you cannot close the tie breaker manually unless
one of the two buses exceeds the Healthy Source Voltage setting and the other bus is below the Dead
Source Voltage setting, or the buses are in synchronism. The test mode temporarily relaxes this
requirement.
An additional feature for testing is the latch reset. You can reset all latch bits that do not self-reset by
pulsing LB3 from the CONTROL menu of the front panel.
Transfer Response to External Lockout

You can connect an external contact to either main breaker relay to disable the transfer. If you have
connected this input to a lockout relay, you will be unable to enable automatic transfer or manually close
the main or tie breaker until the lockout condition is reset. If the input is connected to a protective relay, it
will be impossible to enable automatic transfer or manually close the main or tie breaker until you press the
{TARGET RESET} pushbutton on the front panel of the main breaker or issue a DCS target reset
command.
You can connect an external contact to either main breaker relay to initiate the transfer. If this input
connects to a lockout relay, it will be impossible to manually close the main breaker or retransfer until after
reset of the lockout condition. If the input connects to a protective relay, it will be impossible to manually
close the main breaker or retransfer until after you press the {TARGET RESET} pushbutton on the front
panel of the main breaker or issue a DCS target reset command.
Additional Features
Reduce Arc-Flash Energy During Maintenance
You can use this Design Template to enable instantaneous elements during maintenance to limit exposure
of personnel to arc-flash hazards. Use settings to select this feature. Once you have selected this feature,
enable the arc flash detection by pressing the {INST} operator control pushbutton (PB01) for two seconds
to enable instantaneous phase (50P1) and ground (50G1 or 50N1) protection elements. The instantaneous
elements remain enabled until you press the {INST} operator control pushbutton again for two seconds.
The corresponding top ENABLED LED flashes to indicate the enabled state. The instantaneous trip can also be
selected via settings to be on continuously; in this case, the corresponding top ENABLED LED is illuminated
continuously. The corresponding bottom TRIPPED LED illuminates for an instantaneous trip.
The SEL-751 can provide high-speed light-sensitive arc flash detection, along with all features herein, for
continuous arc-flash protection that is faster than the previously described instantaneous elements. You can
revise this Design Template for that purpose. Please contact SEL for assistance.

LDG0007-01
Trip Coil Monitor
This Design Template provides trip coil monitoring (as shown in Figure 2) to ensure that the trip coil is
continuous whenever the associated circuit breaker is closed. The relay will display an alarm on the front-
panel LCD and assert the scheme alarm whenever the trip coil is not continuous.
Source Paralleling
In some applications, you may want to defeat the anti-paralleling logic of the transfer scheme and allow
simultaneous closing of both main breakers and the tie breaker. This is not recommended in cases where
the combined fault current from the two sources exceeds the short-circuit rating of the bus or where
undesirable circulating currents can occur.
Use settings to select this feature. Once you have selected the feature, use any one of the following methods
to enable it:
Press the {PARALLEL} pushbutton (PB02) on the tie-breaker relay when the Remote Enable
function of the tie-breaker relay is inactive.
Close the optional remote Source Parallel switch when the Remote Enable function of the tie-
Pulse RB05 in the tie-breaker relay via DCS communications when the Remote Enable function is active.
Pressing the {PARALLEL} operator control pushbutton again when the Remote Enable function of the tie-
breaker relay is inactive disables the feature. The corresponding top ENABLED LED illuminates to indicate the
enabled state.
The intent of the Source Paralleling function is to allow you to place the Main-Tie-Main system manually
in a tied condition with both mains closed. This may be necessary for certain switching procedures in some
applications. It is a good idea to write the switching procedure to open either the tie breaker or one of the
two main breakers before disabling the Source Paralleling when exiting the bus tie condition. If Source
Paralleling is disabled when all three breakers are closed, the tie breaker will open automatically.
Once you have selected the feature, you can use any one of the following methods to disable it:
Press the {PARALLEL} pushbutton (PB02) on the tie-breaker relay when the Remote Enable
function of the tie-breaker relay is inactive.
Open the optional remote Source Parallel switch when the Remote Enable function of the tie-
active.
You can also use settings to cause source paralleling to be on continuously. In this case, the corresponding
top ENABLE LED illuminates continuously to indicate the enabled state, and both local and remote control of
source paralleling will be unresponsive.

LDG0007-01
Remote Control Logic
Remote Bits
The operator control logic settings in this Design Template include remote bits that you can use to remotely
control some operator functions when you have connected the SEL-751A as part of a Modbus or DNP3
DCS communications network or to an SEL communications processor. Table 5 shows the remote bits the
default logic uses.
Table 5 Remote Bits for Controlling SEL-751A Operator Functions

Function Remote Bits
Select to Trip (main Pulsing or setting RB01 to a main breaker Selecting one breaker to trip deselects
breakers) will select that breaker to trip when the tie the other breaker.
breaker is closed.
Automatic transfer Pulsing RB01 enables automatic transfer. Pulsing RB02 disables automatic
enable (tie breaker) transfer.
Automatic retransfer Pulsing RB03 enables automatic retransfer Pulsing RB04 disables automatic
enable (tie breaker) when automatic transfer is enabled. retransfer.
Source Paralleling (tie Pulsing RB05 enables Source Paralleling. Pulsing RB06 pulse disables Source
breaker) Paralleling.
Trip/close OC trips the breaker. CC closes the breaker.
With the exception of the OC bit, the remote bits have no effect on the SEL-751A unless you enable remote
control either through the {REMOTE} pushbutton (PB03) or continuously via the Remote Enable Setting.
For safety, the Remote Control Latch, LT03 does not supervise the remote trip bit, OC. Asserting OC will
trip the breaker regardless of the status of this latch.
The main board Breaker jumper supervises CC and OC commands.. If the Breaker jumper is not in place
(Breaker jumper = OFF), the relay does not execute the CC and OC commands.
Additionally, as an aid during troubleshooting, the Design Template allows you to pulse RB07 to reset all
latch bits that do not self-reset.
Hardwired Remote Inputs

The operator control logic settings in this Design Template include optional relay contact inputs that you
can connect to optional remote operator control switches as necessary. Table 6 shows the inputs the default
logic uses. For each of these to operate, the corresponding relay must be in REMOTE mode.
Table 6 Contact Inputs for Controlling SEL-751A Operator Functions

Function Description
Automatic transfer enable (tie Close contact connected to IN405 to enable automatic transfer. Open contact
breaker) connected to IN405 to disable automatic transfer.
Automatic retransfer enable (tie Close contact connected to IN406 to enable automatic retransfer. Open
breaker) contact connected to IN406 to disable automatic retransfer.

LDG0007-01
Function Description
Source paralleling enable (tie Close contact connected to IN407 to enable source paralleling. Open contact
breaker) connected to IN407 to disable source paralleling.
Main Breaker Select to Trip (main Momentarily close contact connected to IN405 to select breaker to trip when
breakers only) tie breaker is closed during manual transfer.
Close Momentarily close contact connected to IN408 to close breaker.
Trip Momentarily close contact connected to IN403 to open breaker.
With the exception of the Trip function, the remote bits have no effect on the SEL-751A unless you enable
remote control either by the {REMOTE} pushbutton (PB03) or continuously via the Remote Enable
Setting. Any hardwired manual trip, whether local or remote, is connected to IN403 of the relay.
Hardwired Remote Outputs

The operator control logic settings in this Design Template include relay contact outputs that you can
connect to optional remote indicators as necessary. Table 7 shows the outputs the default logic provides.
Table 7 Contact Outputs for Optional Remote Indicators

Function Contact Output—Main Contact Output—Tie
Scheme Alarm OUT103 OUT103

LDG0007-01
Design Settings Descriptions and
Settings Sheets
Design Settings Nodes

The SEL-751A has three independent settings groups. The SEL-751A Three-Relay Main-Tie-Main
Automatic Transfer Scheme Design Template is configured such that Settings Group 1 contains the settings
specific to Main Breaker 1, Settings Group 2 is for Main Breaker 2, and Settings Group 3 is for the tie
breaker.
The settings for this Design Template are divided into five Design Template nodes as follows:
General
Transfer Scheme
Main Breaker 1
Main Breaker 2
Tie Breaker
The tables below summarize and describe the design settings in each of these settings nodes. You can find
the comments in each table also under the settings button in the Design Template.
General Settings Node Descriptions

The tables below summarize and describe the design settings in the General settings node.
General: System Information

Table 8 System Frequency Setting
Setting Range Default Units Increment
System Frequency 50, 60 60 Hz
Enter nominal system frequency.
Table 9 System Phase Rotation Setting

System Phase Rotation ABC, ACB ABC
Enter power system phase rotation.

LDG0007-01
Table 10 Potential Transformer Ratio Setting
Potential Transformer Ratio 1.00–10000.00 35 0.01
Enter PT ratio as a number, n:1.
The Potential Transformer Ratio is the primary rating divided by the secondary rating. For example, if the PT is
14,400/120, then the Potential Transformer Ratio is 120. The ratios for Source 1, Source 2, Bus 1, and Bus 2 PTs
must be the same. If these PT ratios are different, contact SEL for assistance in modifying the Design Template.
Table 11 System Voltage Setting

System Voltage 0–440 • Potential Transformer 4.16 kV 0.01
Ratio/1000
Enter nominal system phase-to-phase voltage.
Table 12 Delta or Wye Setting

Delta or Wye DELTA, WYE (PT WYE
Connection)
Enter Delta or Wye PT Connection.
Table 13 Delta or Wye Setting

Single Voltage Input on Mains? Y, N N
When set equal to Y, the relay performance changes in the following ways:
Power and Voltage Elements. The relay assumes that the system voltages are balanced in both magnitude and
phase angle. Calculations of power, power factor, and positive-sequence impedance assume balanced voltages.
Metering. The relay displays magnitude and phase angle for the measured PT. The relay displays zero for the
magnitudes of the unmeasured voltages. The relay assumes balanced voltages for power, power factor, VG, and
3V2 metering.
Table 14 Low DC Voltage Alarm Level Setting

Low DC Voltage Alarm Level 20.00–300.00, OFF OFF Volts 0.01
Enter low voltage level for dc alarm.
Table 15 High DC Voltage Alarm Level Setting

High DC Voltage Alarm Level 20.00–300.00, OFF OFF Volts 0.01
Enter high voltage level for dc alarm.

LDG0007-01
General: Manual Control and Breaker Failure Settings
Table 16 Breaker Close Failure Time Setting
Breaker Close Failure Time 0.00–60.00 2.00 Seconds 0.25
If the relay generates a breaker close signal, and the breaker does not close within the Breaker Close Failure Time,
the automatic transfer scheme is disabled, the BKR FAIL LED illuminates, and the Close signal is unlatched.
Table 17 Breaker Trip Failure Time Setting

Breaker Trip Failure Time 0.00–1.00 0.10 Seconds 0.01
If the relay generates a breaker trip signal, and the breaker does not open within the Breaker Trip Failure Time, the
automatic transfer scheme is disabled and the BKR FAIL LED illuminates.
Table 18 Close Pushbutton Delay Setting

Close Pushbutton Delay 0–300 0 Seconds 1
Close Pushbutton Delay defines an optional time delay to allow the operator to move a safe distance away before the
relay closes the breaker.
Table 19 Trip Pushbutton Delay Setting

Trip Pushbutton Delay 0–300 0 Seconds 1
Trip Pushbutton Delay defines an optional time delay to allow the operator to move a safe distance away before the
relay trips the breaker.
Use this setting with care. Consider all implications of a delayed manual trip with regard to the safety of
personnel and equipment.
General: Special Features

Table 20 Block Manual Close With Bkr Racked In Setting
Block Manual Close with Bkr Y, N N
Racked In
When set to “Y”, this feature disables manual closing except when the breaker is in the TEST position as indicated
by the 52/TOC contact. In this case, the MAN CLOSE DISABLE LED remains on when the breaker is racked in.
Table 21 Enable Instantaneous Elements Setting

Enable Instantaneous Elements 1, 2, 3 (1 = Never, 2 By 2
Pressing INST, 3 = Always)
If set to “1”, protection elements 50P1 and 50G1 are always disabled. Setting to “2” allows you to press the {INST}
operator control pushbutton (PB01) to enable instantaneous protection elements 50P1 and 50G1. This optional
feature provides for improved personnel protection in case of arc flash. If set to “3”, protection elements 50P1 and
50G1are always enabled.
The corresponding top ENABLED LED flashes to indicate the enabled state if setting = 2 or is on continuously if
setting = 3. The corresponding bottom TRIPPED LED illuminates for an instantaneous trip.
LDG0007-01
Table 22 EnableTrip Coil Monitoring Setting
EnableTrip Coil Monitoring Y, N Y
Trip coil monitoring is provided to ensure that the trip coil is continuous whenever the associated circuit breaker is
closed. The relay displays an alarm on the front-panel LCD and asserts the scheme alarm whenever the trip coil is
not continuous.
Table 23 Enable Source Paralleling Setting

Enable Source Paralleling 1, 2, 3 (1 = Never, 2 = By 1
Pressing PARALLEL,
3 = Always)
Enabling this feature defeats the anti-paralleling logic of the transfer scheme and allows simultaneous closing of
both main breakers and the tie breaker. If set to “1”, source paralleling is always disabled. Setting to “2” allows you
to press the {PARALLEL} operator control pushbutton (PB02) on the tie breaker to enable source paralleling.
Setting to “3” continuously enables source paralleling. The corresponding top ENABLED LED illuminates to indicate
that source paralleling is enabled.
Table 24 Enable Remote

Enable Remote 1, 2, 3 (1 = Never, 2 = By 2
Pressing REMOTE,
3 = Always)
If set to “1”, remote control via remote switches or DCS commands is always disabled. Setting to “2” allows you to
press the {REMOTE} operator control pushbutton (PB02) to enable remote control. Setting to “3” continuously
enables remote control. The REMOTE LED indicates whether remote control is or is not enabled for any Enable
Remote setting.
Transfer Scheme Settings Node Descriptions

The following tables summarize and describe the design settings in the Transfer Scheme settings node.
These settings control the manner in which the automatic transfer scheme operates.
Transfer Scheme: Transfer Timer Settings

Table 25 Transfer Initiate Time-Delay Setting
Transfer Initiate Time Delay 0.00–16666.65 2.0 Seconds 0.1
Enter time to qualify source undervoltage conditions before a transfer is initiated.
Table 26 Transfer Tie Close Time-Delay Setting

Transfer Tie Close Time Delay 0.00–16666.65 2.0 Seconds 0.1
Enter time delay for tie breaker to close after main breaker opens on automatic transfer initiation.

LDG0007-01
Table 27 Automatic Retransfer Time-Delay Setting
Automatic Retransfer Time Delay 1.00–16666.65 10 Seconds 0.1
Enter time to qualify recovery of source voltage before automatic retransfer occurs.
Table 28 Tie Breaker Trip-Delay Setting

Tie Breaker Trip Delay 0.0–10.0 0.0 Seconds 0.1
Enter time for tie breaker to remain closed after main breaker closes on automatic or manual retransfer.
Transfer Scheme: Transfer Voltage Settings

Table 29 Transfer Initiate Voltage Setting
Transfer Initiate Voltage 0–100 80 Percent 1
Enter voltage that will cause an automatic transfer to be initiated.
If at least one phase of the source falls below the Transfer Initiate Voltage for the Transfer Initiate Time Delay and
the Transfer Block Overcurrent element is not asserted, the main breaker will trip, and the transfer to the tie breaker
will be initiated.
Table 30 Healthy Source Voltage Setting

Healthy Source Voltage 0–100 90 Percent 1
Enter the percent voltage above which a source is considered healthy.
The Healthy Source Voltage setting is used as criterion for:
1. Source voltage that is considered live for hot-line-dead-bus closing.
2. Source voltage that is considered adequate for an automatic retransfer.
Table 31 Dead Source Voltage Setting

Dead Source Voltage 0–100 30 Percent 1
Enter the percent voltage below which a source is considered dead.
The Dead Source Voltage setting is used to determine the voltage that is considered dead for hot-line-dead-bus
closing.
Table 32 Source Undervoltage Alarm Pickup Setting

Source Undervoltage Alarm 0–100 85 Percent 1
Pickup
Enter a voltage below which the scheme generates a source undervoltage alarm.
If at least one phase of the source falls below the Source Undervoltage Alarm Pickup for the Source Undervoltage
Alarm Delay, the scheme alarm relay, OUT103, will operate.

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Table 33 Source Undervoltage Alarm Delay Setting
Source Undervoltage Alarm Delay 0.00–16666.65 5 Seconds 0.1
Enter a time delay for the source undervoltage alarm.
If at least one phase of the source falls below the Source Undervoltage Alarm Pickup for the Source Undervoltage
Alarm Delay, the scheme alarm relay, OUT103, will operate.
Transfer Scheme: Transfer Block Overcurrent Setting

Table 34 Transfer Block Phase Overcurrent Level Setting
Transfer Block Phase Overcurrent OFF, 0.50 ... 100.00 6 Secondary 0.25
Level Amperes
The scheme blocks automatic transfer if the phase current exceeds the Transfer Block Phase Overcurrent Level. This
setting should ideally be greater than twice maximum load and less than half minimum fault current.
Table 35 Transfer Block Ground Overcurrent Level Setting

Transfer Block Ground OFF, 0.50 ... 100.00 0.50 Secondary 0.05
Overcurrent Level Amperes
Automatic transfer will be blocked if the residual ground current exceeds the Transfer Block Ground Overcurrent
Level. For resistance grounded systems, this setting should ideally be less than half the available ground fault
current. For solidly grounded systems, which have phase-neutral connected load, this setting should exceed the
residual current resulting from load unbalance and be less than half the available ground fault current. Note that a
single open conductor will cause residual current and block the transfer if this setting is too low. Where there is the
possibility of a single open phase, you should set Transfer Block Ground Overcurrent Level fairly high or to OFF.
Transfer Scheme: Synchronism Settings

Table 36 Sync Check Low Threshold Voltage Setting
Sync Check Low Threshold 0.0–100.0 80 Percent 0.1
Voltage
If percent voltage is less than the Sync Check Low Threshold Voltage, synchronism-check elements will not operate
and breaker close operations supervised by synchronism check will not occur. Breaker closing supervised by hot-
line-dead-bus may still occur.
Table 37 Sync Check High Threshold Voltage Setting

Sync Check High Threshold 0.0–150.0 110 Percent 0.1
Voltage
If percent voltage exceeds the Sync Check High Threshold Voltage, synchronism-check elements will not operate
and breaker close operations supervised by synchronism check will not occur. Breaker closing supervised by hot-
line-dead-bus may still occur.

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Table 38 Maximum Slip Frequency Setting
Maximum Slip Frequency 0.05-0.50 0.05 Hz 0.01
If the slip between two sources exceeds the Maximum Slip Frequency setting, synchronism-check elements will not
operate and breaker close operations that are supervised by synchronism check will not occur.
Table 39 Sync Check Maximum Angle Setting

Sync Check Maximum Angle 0.00–80.00 10 Degrees 0.01
If the angle between two sources exceeds the Sync Check Maximum Angle, synchronism-check elements will not
operate and breaker close operations that are supervised by synchronism check will not occur.
Main Breaker 1, Main Breaker 2, and Tie Breaker Settings

Node Descriptions
The following tables summarize and describe the design settings in the Main Breaker 1, Main Breaker 2,
and Tie Breaker settings nodes. These settings contain details about the breakers, such as identifying text
fields, CT ratios, and overcurrent protection settings. The individual nodes for each breaker provide settings
fields, and settings descriptions are identical for each breaker.
Main Breaker 1, Main Breaker 2, Tie Breaker: General Settings

Table 40 Terminal Identifier Setting
Terminal Identifier (16 characters) SWITCHGEAR N/A
(0–9, A–Z, -,/, . , space) A
Terminal Identifier contains the greater circuit or substation designation (e.g., SWITCHGEAR A). This identifier is
listed at the top of event, history, meter, and status reports.
Table 41 Relay Identifier Setting

Relay Identifier (16 characters) MAIN N/A
(0–9, A–Z, -,/, . , space) BREAKER 1
Relay Identifier contains the relay installation designation (e.g., MAIN BREAKER 1). This identifier is listed at the
top of event, history, meter, and status reports. The Relay Identifier is also shown on the rotating display.
Table 42 Phase CT Ratio Setting

Phase CT Ratio 1.–5000 600 N/A 1
Phase CT Ratio is the ratio of the phase CTs is a number, n:1.
The Phase CT Ratio is the primary rating divided by the secondary rating. For example, if the CT is 3000/5, then
Phase CT Ratio is 600.

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Table 43 Neutral CT Ratio Setting
Neutral CT Ratio 1–5000 20 N/A
Neutral CT Ratio is the ratio of the optional neutral CTs on the Main Breaker and is a number, n:1.
The Neutral CT Ratio is the primary rating divided by the secondary rating. For example, if the CT is 100/5, then the
Neutral CT ratio is 20.
Table 44 Synchronizing Phase Setting

Synchronizing Phase 0–330, VAB, VBC, VCA 0 Degrees 30
Enter the phase designation for voltage connected to VS, or enter the number of degrees that VS lags VA in
multiples of 30 degrees (0, 30, 60…300, 330).
Main Breaker 1, Main Breaker 2, Tie Breaker: Time Overcurrent Settings

Table 45 Phase Time Overcurrent Pickup Setting
Phase Time Overcurrent Pickup 0.50–16.00 6.00 Secondary 0.01
Amperes
Enter the pickup current for the phase time-overcurrent element.
Table 46 Phase Time Overcurrent Curve Setting

Phase Time Overcurrent Curve U1–U5, C1–C5, Recloser U3
Available settings are:
ANSI curves: U1, U2, U3, U4, U5
IEC curves: C1, C2, C3, C4, C5
See the SEL-751A Instruction Manual for more detail on available curves.
Table 47 Phase Time Overcurrent Delay Setting

Phase Time Overcurrent Delay 0.5–15 for U1–U5, 0.05–1.00 3
for C1–C5
Enter the delay for the phase time-overcurrent element.
Table 48 Ground Time Overcurrent Pickup Setting

Ground Time Overcurrent Pickup 0.50–16.00 1.50 Secondary 0.01
Amperes
Enter the pickup current for the residual ground time-overcurrent element.

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Table 49 Ground Time Overcurrent Curve Setting
Ground Time Overcurrent Curve U1–U5, C1–C5, Recloser U3
Table 50 Ground Time Overcurrent Delay Setting

Ground Time Overcurrent Delay 0.5–15 for U1–U5, 0.05–1.00 1.5
for C1–C5
Enter the delay for the ground time-overcurrent element.
Main Breaker 1, Main Breaker 2, Tie Breaker: Instantaneous Overcurrent

Settings
Table 51 Instantaneous Phase Pickup Setting
Instantaneous Phase Pickup OFF, 0.50–100.00 0.50 Secondary 0.01
Amperes
Enter the pickup current for the phase instantaneous overcurrent element. Use the maintenance switch, {INST}
operator control pushbutton (PB01), to enable this element, to enable instantaneous protection elements, and to
provide for improved personnel protection in case of arc flash.
Table 52 Instantaneous Phase Time Delay Setting

Instantaneous Phase Time Delay 0.00–5.00 0.00 Seconds 0.01
Enter the delay for the phase instantaneous overcurrent element.
Table 53 Instantaneous Ground Pickup Setting

Instantaneous Ground Pickup OFF, 0.50–100.00 0.50 Secondary 0.01
Amperes
Enter the pickup current for the ground instantaneous overcurrent element. Use the maintenance switch, {INST}
Table 54 Ground Time Overcurrent Delay Setting

Instantaneous Ground Time 0.00–5.00 0.00 Seconds 0.01
Delay
Enter the delay for the ground instantaneous overcurrent element.

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Main Breaker 1, Main Breaker 2: Neutral Overcurrent Settings
Table 55 Neutral Time Overcurrent Pickup Setting
Neutral Time Overcurrent Pickup 0.50–16.00 OFF Secondary 0.01
Amperes
Enter the pickup current for the neutral time-overcurrent element.
Table 56 Neutral Time Overcurrent Curve Setting

Neutral Time Overcurrent Curve U1–U5, C1–C5, Recloser U3
Table 57 Neutral Time Overcurrent Delay Setting

Neutral Time Overcurrent Delay 0.5–15 for U1–U5, 0.05–1.00 1.5
for C1–C5
Enter the delay for the neutral time-overcurrent element.
Table 58 Neutral Instantaneous Overcurrent Pickup

Neutral Instantaneous OFF, 0.50–100.00 OFF Secondary 0.01
Overcurrent Pickup Amperes
Enter the pickup current for the neutral instantaneous overcurrent element. Use the maintenance switch, {INST}
Table 59 Neutral Instantaneous Overcurrent Delay Setting

Neutral Instantaneous 0.00–5.00 0.5 Seconds 0.01
Overcurrent Delay
Enter the delay for the neutral instantaneous overcurrent element.

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Design Settings Sheets
Use these blank settings sheets to record settings for the scheme.
Table 60 General: System Information Settings

Setting Range Value Units
System Frequency 50, 60 Hz
System Phase Rotation ABC, ACB
Potential Transformer Ratio 1.00–10000.00
System Voltage kV
Delta or Wye DELTA, WYE (PT Connection)
Single Voltage Input on Mains? Y, N
Low DC Voltage Alarm Level 20.00–300.00, OFF Volts
High DC Voltage Alarm Level 20.00–300.00, OFF Volts
Table 61 General: Manual Control and Breaker Failure Settings

Breaker Close Failure Time 0.00–60.00 [0.25] Seconds
Breaker Trip Failure Time 0.00–1.00 [0.01] Seconds
Close Pushbutton Delay 0 ... 300 [1] Seconds
Trip Pushbutton Delay 0 ... 300 [1] Seconds
Table 62 General: Special Features Settings

Block Manual Close with Bkr Racked Y, N
In
Enable Instantaneous Elements 1 = Never, 2 = During Maintenance,
3 = Always
Trip Coil Monitoring Y, N
Source Paralleling 1 = Never, 2 = By Pressing PARALLEL,

3 = Always
Remote Enable 1 = Never, 2 = By Pressing REMOTE,
3 = Always
Table 63 Transfer Scheme: Transfer Timer Settings

Transfer Initiate Time Delay 0.00–16666.65 [0.1] Seconds
Transfer Tie Close Time Delay 0.00–16666.65 [0.1] Seconds
Automatic Retransfer Time Delay 0.00–16666.65 [0.1] Seconds
Tie Breaker Trip Delay 0.00–10.00 [0.1] Seconds

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Table 64 Transfer Scheme: Transfer Voltage Settings
Transfer Initiate Voltage 0–100.0 [0.1] Percent
Healthy Source Voltage 0.00–100.0 [0.1] Percent
Dead Source Voltage 0.00–100.0 [0.1] Percent
Source Undervoltage Alarm Pickup OFF, 2 … 100 [1] Percent
Source Undervoltage Alarm Delay 0.00–16666.65 [0.1] Seconds
Table 65 Transfer Scheme: Transfer Block Overcurrent Settings

Transfer Block Phase Overcurrent Level OFF, 0.50 … 100.00 [0.25] Secondary
Amperes
Transfer Block Ground Overcurrent OFF, 0.50 ... 100.00 [0.05] Secondary
Level Amperes
Table 66 Transfer Scheme: Sync Settings

Sync Check Low Threshold Voltage 0–100 [1] Percent
Sync Check High Threshold Voltage 0–150 [1] Percent
Maximum Slip Frequency 0.05–0.50 [0.01] Hz
Sync Check Maximum Angle 0.00–80.00 Degrees
Table 67 Main Breaker 1: General Settings

Terminal Identifier Text string with a maximum length of 16
Relay Identifier Text string with a maximum length of 16
Phase CT Ratio 1–5000
Neutral CT Ratio 1–5000
Synchronizing Phase 0–330 [30], VAB, VBC, VCA
Table 68 Main Breaker 1: Time Overcurrent Settings

Phase Time Overcurrent Pickup 0.50–16.00 Secondary
Amperes
Phase Time Overcurrent Curve U1–U5, C1–C5
Phase Time Overcurrent Delay 0.5–15 for U1–U5, 0.05–1.00 for
C1–C5
Ground Time Overcurrent Pickup 0.50–16.00, OFF Secondary
Amperes
Ground Time Overcurrent Curve U1–U5, C1–C5
Ground Time Overcurrent Delay 0.5–15 for U1–U5, 0.05–1.00 for
C1–C5

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Table 69 Main Breaker 1: Instantaneous Overcurrent Settings
Phase Instantaneous Overcurrent Pickup OFF, 0.50–100.00 Secondary
Amperes
Phase Instantaneous Overcurrent Delay 0.00–5.00 Seconds
Ground Instantaneous Overcurrent OFF, 0.50–100.00 Secondary
Pickup Amperes
Ground Instantaneous Overcurrent 0.00–5.00 Seconds
Delay
Table 70 Main Breaker 1: Neutral Overcurrent Settings

Neutral Time Overcurrent Pickup 0.50–16.00, OFF Secondary
Amperes
Neutral Time Overcurrent Curve U1–U5, C1–C5, Recloser
Neutral Time Overcurrent Delay 0.5–15 for U1–U5, 0.05–1.00 for
C1–C5
Neutral Instantaneous Overcurrent OFF, 0.50–100.00 Secondary
Pickup Amperes
Neutral Instantaneous Overcurrent 0.00–5.00 Seconds
Delay
Table 71 Main Breaker 2: General Settings

Phase CT Ratio 1–5000
Neutral CT Ratio 1–5000
Table 72 Main Breaker 2: Time Overcurrent Settings

Amperes
C1–C5
Amperes
C1–C5

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Table 73 Main Breaker 2: Instantaneous Overcurrent Settings
Amperes
Pickup Amperes
Delay
Table 74 Main Breaker 2: Neutral Time Overcurrent Settings

NeutralTime Overcurrent Pickup 0.50–16.00, OFF Secondary
Amperes
NeutralTime Overcurrent Curve U1–U5, C1–C5
NeutralTime Overcurrent Delay 0.5–15 for U1–U5, 0.05–1.00 for
C1–C5
Neutral Instantaneous Overcurrent OFF, 0.50–100.00 Secondary
Pickup Amperes
Neutral Instantaneous Overcurrent 0.00–5.00 Seconds
Delay
Table 75 Tie Breaker: General Settings

Phase CT Ratio 1.0–5000.0
Table 76 Tie Breaker: Time Overcurrent Settings

Amperes
C1–C5
Amperes
C1–C5

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Table 77 Tie Breaker: Instantaneous Overcurrent Settings
Amperes
Pickup Amperes
Delay

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Automatic Transfer Scheme Setup
Settings Development
The first step in applying the automatic transfer scheme is to develop the settings. Review the Description
of Operations section, the Design Settings Descriptions and Settings Sheets section, and theLogic
Descriptions and Diagrams subsection of the Troubleshooting section to gain an understanding of how the
scheme operates and how each setting affects operation. Be sure to revise the setting version number of the
design template according to the relay firmware revision. Do this through the use of ACSELERATOR
QuickSet® SEL-5030 Software under the menu item Tools/Settings/Convert. Next, determine if you need
any changes to the logic or need any additional functions. Modify the logic and design settings as necessary
for the specific application. See the Other Setting Changes section to gain an understanding of how to
modify settings.
Finally, enter the settings into the Design Template and save the settings. Use the settings sheets provided
in the subsection, or print the settings from ACSELERATOR QuickSet to maintain a hardcopy.
Use the front-panel configurable label template included with the Design Template or on the relay Product
Literature CD to create labels for the relays. Install the labels in the relays.
Physical Connections
Connect the relays as shown in Figure 1. Make any modifications necessary to support the logic and
settings changes you made under the previous subsection Settings Development.
Test all relay I/O to verify that you have made proper connections. Verify voltage and current metering to
ensure correct PT and CT connections.
Sending Settings
Connect a PC to each of the three relays in turn. After verifying communications between the PC and relay,
select File > Send. ACSELERATOR QuickSet will send the following settings groups to each relay:
Set 1
Set 2
Set 3
Logic 1
Logic 2
Logic 3
Global
Front Panel
Report
Port 1

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Port 3
Port 4
You should ignore the “Part Number Difference” error when you send settings.
Note: Do not change Port 3 or Port 4 settings in your ACSELERATOR database, even if you use IEC 61850
GOOSE messaging; this prevents transmission of the MIRRORED BITS® transmit SELOGIC®
equations (TMB1A–TMP8A and TMB1B–TMB8B). IEC 61850 GOOSE implementation uses the
MIRRORED BITS transmit SELOGIC equations. You can use terminal mode to change Port 3 or Port 4
settings once settings are loaded.
Establishing Settings Groups and Making Port Settings

For the scheme to operate properly, Settings Group 1 must be the active settings group in Main Breaker 1,
Settings Group 2 must be the active settings group in Main Breaker 2, and Settings Group 3 must be the
active settings group in the tie breaker.
Configuring Main Breaker 1 Relay

Step 1. Connect the PC to the front port of the Main Breaker 1 relay.
Step 2. Select Tools > Terminal to open the terminal window.
Step 3. Type ACC <Enter>.
Step 4. Type the Level 1 password in response to the prompt, and press <Enter>. The default password
is “OTTER”.
Step 5. Type 2AC <Enter>.
Step 6. Type the Level 2 password in response to the prompt and press <Enter>. The default password is
“TAIL”.
Step 7. Type GRO 1 <Enter>.
Step 8. Type Y <Enter> in response to the “Are you sure (Y/N)?” prompt.
Step 9. Verify that the relay responds with “Active Group = 1” and that “MAIN BREAKER 1” shows on
the front-panel display.
Step 10. If you use MIRRORED BITS communications, type SET P 3 <Enter>. Enter each of the settings in
response to the following prompts and then save them:
Protocol Select
PROTOCOL (SEL,DNP,MOD,EVMSG,PMU,MBA,MBB,MB8A,MB8B,MBTA,MBTB)
PROTO := MBA ?
Comm Settings
SPEED (300,1200,2400,4800,9600,19200,38400 bps)

SPEED := 9600 ?
SEL Mirrored Bits Protocol Settings
MB TRANSMIT IDENTIFIER (1-4) TXID := 2 ? 1

MB RECEIVE IDENTIFIER (1-4) RXID := 1 ? 2
MB RX BAD PICKUP TIME (1-10000 sec) RBADPU := 10 ? END

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Configuring Main Breaker 2 Relay
Step 1. Connect the PC to the front port of the Main Breaker 2 relay.
“OTTER”.
“TAIL”.
Step 9. Verify that the relay responds with “Active Group = 2” and that “MAIN BREAKER 2” shows on
the front-panel display.
Configuring Tie-Breaker Relay

Step 1. Connect the PC to the front port of the tie-breaker relay.
“OTTER”.
“TAIL”.
Step 9. Verify that the relay responds with “Active Group = 3” and that “TIE BREAKER” shows on the
front-panel display.
Select to Trip
After you send settings to the relays, LT11 (Select to Trip Latch) will not be set in either main breaker
relay. Use the {TRIP SEL} pushbutton (PB02) on either relay to select one of the breakers to trip. Until
you complete this step, the scheme will block manual closing of the tie breaker, the tie-breaker relay will
display “Select Main to Trip” on the LCD display, and the SELECT TO TRIP LED on both main breakers will
flash.
Settings for IEC 61850 GOOSE Messaging

Perform the following steps for each relay when you use IEC 61850 GOOSE Messaging over Ethernet for
peer-to-peer relay communications instead of MIRRORED BITS communications. These steps are based on
the following Design Template default IP addresses:
Gateway 192.168.1.1
Main Breaker 1 192.168.1.11

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Main Breaker 2 192.168.1.12
Tie Breaker 192.168.1.13
You will first need to enter these or other IP addresses by connecting to the relay serially and then using the
terminal window to type SET P 1 <Enter>. Additionally, set E61850 = Y in each relay. Once you have
entered the IP addresses into the relay, you can use the Ethernet connection for engineering access and
DCS controls, as well as GOOSE messaging.
Step 1. Connect to any open Ethernet port on an SEL-751A, using an Ethernet crossover cable connected
to your PC.
Step 2. Set up TCP/IP from the Windows START menu via Settings > Network Connections > Local
Area Connection as follows:
Step 3. Click on the file icon for the ACSELERATOR Architect® SEL-5032 Software file provided with
the design template to open ACSELERATOR Architect and load the GOOSE messaging (CID) file.
Step 4. Select the appropriate intelligent electronic device (IED) for the SEL-751A you want to
configure:

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Step 5. Right-click and send the CID file to the relay:
Step 6. Send settings, including FTP Address and User Name for the chosen IED, as follows. Password =
TAIL.
Step 7. Press Next, Next, Finish to send the file.

Step 8. Perform Step 4 through Step 7 for all three relays.
Other Setting Changes

Settings that the design template does not control, such as the Modbus User Map, are still accessible for
you to change. To view the conventional ACSELERATOR QuickSet settings editor for the SEL-751A, select
View/Settings Editor from the menu or type <Ctrl + E>. Settings that the design template controls are
highlighted in blue and cannot be changed using the settings editor. To return to the design template editor,
select View/ Design Template Editor from the menu or type <Ctrl + D>.
The ACSELERATOR QuickSet Graphical Logic Editor Logic assisted development and documentation of
logic under Graphical Logic 1 and Graphical Logic 3. You can revise graphical logic here and then compile
this logic to the settings as necessary. You would then need to copy Group 1 and Logic 1 to Group 2 and
Logic 2 by selecting Edit/Copy from the menu. Test any logic changes thoroughly prior to implementation.
If you must modify the design template, see the Using Design Templates section to gain an understanding
of how to modify Design Templates.

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Commissioning Test
The following is a partial outline of steps you might take to commission the scheme and verify proper
operation. Other steps may be necessary depending on modifications to the scheme, conditions and
procedures at the facility, and code requirements. Take appropriate safety precautions, especially if you
perform testing with live sources.
Step 1. Using a relay test set or by closing source breakers, apply balanced voltages to the source PT
input (VA, VB, and VC) of both main breakers to simulate healthy source voltage.
Step 2. Verify that the metered primary voltage exceeds 5.77 • Healthy Source Voltage Setting • System
Voltage Setting. (Example, for default settings, 5.77 • 90 • 4.16 = 2160.)
Step 3. Use the local close switch, remote close switch, or communications to close both main breakers.
Step 4. When both breakers are closed, the NOT AUTO READY LED on each relay should be extinguished. If
not, verify that communications between all three relays are working, that there are no breaker
trip or close failure conditions, there are no active trip conditions, both main breakers are closed,
all three breakers are racked in, and both sources exceed the Healthy Source Voltage setting.
Step 5. Use the {TRANSFER} pushbutton (PB04) on the tie-breaker relay, the remote transfer enable
switch, or communications to enable automatic transfer.
Step 6. Verify that the TRANSFER LED on all three relays is on.
Step 7. Enable retransfer by again pushing the {TRANSFER} pushbutton (PB04) TRANSFER on the
tie-breaker relay, remote retransfer enable switch, or communications.
Step 8. Verify that the RETRANSFER LED on all three relays is on.
Step 9. Check closed transition manual transfers as follows:
Note: For the tie breaker to manually close, the tie-breaker relay either has to sense that the Bus 1 voltage
is in synchronism with the Bus 2 voltage, OR Bus 1 is live and Bus 2 is dead, OR Bus 1 is dead and
Bus 2 is live. When you use live buses for testing, closing the main breakers should create proper
conditions for the tie breaker to be closed. However, when using certain types of test sets, there may
not be enough voltage sources available to connect to the tie-breaker relay. In this case, use LB1 in
the front-panel CONTROL menu to place the tie-breaker relay in the test mode. The test mode
temporarily bypasses the synchronism check and voltage requirement. DO NOT place the relay in
test mode if you use live sources.
a. Select which main breaker you want to trip when the tie breaker is closed by using the
{TRIP SEL} pushbutton (PB02) on the main breaker relay or the remote select to trip
switch. You can select only one breaker at a time. Selecting one breaker to trip deselects the
other breaker.
b. Initiate closing of the tie breaker by using the local close switch on the tie-breaker relay, the
remote close switch, or communications.
c. Verify that the tie breaker closes and, a short time later, that the main breaker trips.
d. Verify that the RETRANSFER LED goes off on all three relays.
e. Close the main breaker by using the local close switch on the main breaker relay, the remote
close switch, or communications.
f. Verify that the tie breaker trips.
g. Change the main breaker that you have selected to trip, and close the tie breaker by using the
local close switch on the tie-breaker relay, the remote close switch, or communications.
h. Verify that the tie breaker closes and that the other main breaker trips.

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i. Close the main breaker by using the local close switch on the main breaker relay, the remote
close switch, or communications.
j. Verify that the tie breaker trips.

Step 10. Check automatic transfer to the tie breaker as follows:
a. With both main breakers closed, enable automatic transfer by using the {TRANSFER}
pushbutton (PB04) on the tie-breaker relay, the remote transfer enable switch,
communications, or the optional External Initiate Transfer contact
b. Verify that the TRANSFER LED on all three relays is on.
c. Enable retransfer by again pushing the {TRANSFER} pushbutton (PB04) on the tie-breaker
relay, the remote retransfer enable switch, or communications.
d. Verify that the RETRANSFER LED on all three relays is on.
e. Reduce the phase-phase voltage on at least one phase of the source voltages from the Main
Breaker 1 relay to less than [(Transfer Initiate Voltage/100) • System Voltage/Potential
Transformer Ratio].
f. Leave voltage input to the Main Breaker 2 relay greater than the Healthy Source Voltage
setting.
g. Verify that “SOURCE UV” displays on the LCD screen.
h. Verify that Main Breaker 1 opens after a time equal to the Transfer Initiate Time Delay
setting.
i. Verify that the tie breaker closes after a time equal to the Transfer Tie Close Time Delay
setting after Main Breaker 1 opens.
j. Recover source voltage to the Main Breaker 1 relay.
k. Verify that Main Breaker 1 closes and the tie breaker trips after a time equal to the
Automatic Retransfer Time Delay setting.
l. Disable retransfer by using the {TRANSFER} pushbutton (PB04) on the tie-breaker relay,
the remote retransfer enable switch, or communications. If you do this locally, press the
{TRANSFER} pushbutton (PB04) on the tie-breaker relay again to re-enable the automatic
transfer.
m. Verify that the RETRANSFER LED on all three relays is off.
n. Perform Step e through Step k, and verify that the main breaker DOES NOT close
automatically when you reapply source voltage.
o. Close Main Breaker 1 manually.
p. Perform Step a through Step n for Main Breaker 2.

Step 11. Remove voltage from both sources simultaneously, and verify that neither main breaker trips.
This simulates a complete loss of supply voltage, and the scheme does not react.
Step 12. Verify operation of the Live Source Seeking Logic as follows:
a. With both main breakers closed, use the {TRANSFER} pushbutton (PB04) on the tie-
breaker relay, the remote transfer enable switch, or communications to enable automatic
transfer.
b. Verify that the TRANSFER LED on all three relays is on.

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c. Enable retransfer by again pushing the {TRANSFER} pushbutton (PB04) on the tie-breaker
relay, the remote retransfer enable switch, or communications.
d. Verify that the RETRANSFER LED on all three relays is on.
e. Remove voltage from Source 1 to cause tripping of Main Breaker 1 and closing of the tie
breaker.
f. Remove voltage from Source 2. Verify that Main Breaker 2 does not open.
g. Reapply voltage to Source 1. Verify that Main Breaker 2 trips, the tie breaker remains
closed, and Main Breaker 1 closes.
h. Reapply voltage to Source 2, and verify that Main Breaker 2 closes.
i. Repeat Step a through Step h for Main Breaker 2 by initially removing Source 2.
Step 13. If the optional External Block Transfer contact is connected to the inputs on the main breaker
relays, test the function as follows:
a. Use Step 1 through Step 7 to enable automatic transfer and retransfer.
b. Operate the 86B lockout, bus differential relay, or other initiating device for Bus 1 and verify
that the TRANSFER and RETRANSFER LEDs on all three relays are extinguished.
c. Enable automatic transfer and retransfer and repeat Step 13b for Bus 2 lockout.
Step 14. If you use the Source Paralleling function, test the function as follows:
a. Use Step 1 through Step 4 to close both main breakers.
b. Press the {PARALLEL} pushbutton (PB02) on the tie breaker.
c. Close the tie breaker and verify that all breakers remained closed.
d. Again, press the {PARALLEL} pushbutton (PB02) on the tie breaker.
e. The tie breaker should open after Tie Breaker Trip delay expires.
Step 15. If you use the Maintenance Switch function, test the function as follows:
a. Press the {INST} pushbutton (PB01) on Main Breaker 1. The ENABLED LED should flash.
b. Apply current that exceeds the Instantaneous Phase Pickup of the relay.
c. Verify that the relay trips on instantaneous. The TRIPPED LED associated with PB01 should
come on.
d. Use the {TARGET RESET} pushbutton to reset. The TRIPPED LED should go off.
e. Press the {INST} pushbutton (PB01) on Main Breaker 1. The ENABLED LED should go off.
f. Apply current that exceeds the Instantaneous Phase Pickup of the relay and verify that the
relay trips on time delay.
g. Repeat Step a through Step f for Main Breaker 2 and Tie Breaker.
Step 16. If you use the Trip Coil Monitor function, test the function as follows:
a. With Main Breaker 1 closed, lift the input to IN101.
b. Verify that “TRIP COIL BAD” displays on the LCD screen.
c. Replace the input to IN101.
d. Use the {TARGET RESET} pushbutton to reset.
e. Repeat Step a through Step d for Main Breaker 2 and Tie Breaker.

LDG0007-01
Troubleshooting
This section contains the following information:
Cross-reference between design settings and relay settings
Cross-reference between design equations and relay settings
Cross-reference between design variables and design settings
Summary of I/O and logic usage
Relay logic schemes and diagrams
Listing of all relay settings
Cross-References for Settings, Equations, and Variables

Design Templates use custom equations (design equations) to calculate designated relay settings. The
equations consist of math operators, variables, and predefined constants. The templates apply design
settings you enter to the design equations as variables known as design variables.
A specific format identifies relay settings and variables within the equations:
Relay settings format:
[setting group label^setting name], e.g., 1^PTR
Design variable format:
[UV^variable name], e.g., [UV^1_Potential_Transformer_Ratio]
See Table 78 for a cross-reference between the design settings and the relay settings that they affect.
Table 79 is a cross-reference of all design equations each relay setting in this Design Template uses, and
Table 80 is a cross-reference between the design variables and the design settings that define each variable.
Table 78 Relay Settings Affected
Global Design Settings SEL‑751A Settings Affected
Global Groups 1 and 2 Group 3
Automatic Retransfer Time Delay SV04PU, SV13PU SV13PU
Block Manual Close with Bkr Racked In SV17 SV17
Breaker Close Failure Time CFD CFD
Breaker Trip Failure Time SV01DO, SV02DO, SV01DO, SV10PU,

SV11PU, SV15PU SV15PU
Close Pushbutton Delay SV27PU SV27PU
Dead Source Voltage 27P1P
Delta or Wye DELTA_Y DELTA_Y
Enable Instantaneous Elements MV01 MV01
Enable Source Paralleling MV03

LDG0007-01
Enable Remote Control MV02 MV02
Enable Trip Coil Monitoring SV18 SV18
Ground Time Overcurrent Curve 51G1C 51G1C
Ground Time Overcurrent Pickup 51G1P 51G1P
Ground Time Overcurrent Delay 51G1TD 51G1TD
Healthy Source Voltage 59P1P 59P1P, 59S1P
High DC Voltage Alarm Level DCHIP
Instantaneous Ground Pickup 50G1P 50G1P
Instantaneous Ground Time Delay 50G1D 50G1D
Instantaneous Phase Pickup 50P1P 50P1P
Instantaneous Phase Time Delay 50P1D 50P1D
Low DC Voltage Alarm Level DCLOP
Maximum Slip Frequency 25SF 25SF
Neutral Instantaneous Overcurrent Delay 50N1D
Neutral Instantaneous Overcurrent Pickup 50N1P
Neutral Time Overcurrent Curve 51N1C
Neutral Time Overcurrent Delay 51N1TD
Neutral Time Overcurrent Pickup 51N1P
Phase CT Ratio CTR CTR
Phase Time Overcurrent Curve 51P1C 51P1C
Phase Time Overcurrent Delay 51P1TD 51P1TD
Phase Time Overcurrent Pickup 51P1P 51P1P
Potential Transformer Ratio PTR, PTRS, 25VHI, PTR, PTRS, 25VHI,

25VLO, VNOM 25VLO, VNOM,
27S1P, 59S1P
Relay Identifier RID RID
Single Voltage Input on Mains? SINGLEV
Source Undervoltage Alarm Pickup 27P2P
Source Undervoltage Alarm_Delay 27P2D
Sync Check High Threshold Voltage 25VHI 25VHI
Sync Check Low Threshold Voltage 25VLO 25VLO
Sync Check Maximum Angle 25ANG1 25ANG1
Synchronizing Phase SYNCP SYNCP
System Frequency FNOM
System Phase Rotation PHROT

LDG0007-01
System Voltage 25VHI, 25VLO, 25VHI, 25VLO,

VNOM VNOM, 27S1P,
59S1P
Terminal Identifier TID TID
Tie Breaker Trip Delay SV11PU
Transfer Block Ground Overcurrent Level 50G2P
Transfer Block Phase Overcurrent Level 50P2P
Transfer Initiate Time Delay 27P1D, SV06PU
Transfer Initiate Voltage 27P1P
Transfer Tie Close Time Delay SV04PU
Trip Pushbutton Delay SV11PU, SV28PU SV28PU
Table 79 Design Template Equations
SEL-751A Setting Design Equation
[1^25ANG1] [UV^Sync_Check_Maximum_Angle]
[1^25SF] [UV^Maximum_Slip_Frequency]
([UV^Sync_Check_Hi_Threshold_Voltage]/100) * [UV^System_Voltage]/
[1^25VHI]
[UV^Potential_Transformer_Ratio]/1.732
([UV^Sync_Check_Low_Threshold_Voltage]/100) *
[1^25VLO]
[UV^System_Voltage]/ [UV^Potential_Transformer_Ratio]/1.732
[1^27P1D] [UV^Transfer_Intitiate_Time_Delay]
[1^27P1P] [UV^Transfer_Initiate_Voltage] /100
[1^27P2D] [UV^Source_Undervoltage_Alarm_Delay]
[1^27P2P] [UV^Source_Undervoltage_Alarm_Pickup]/100
[1^50G1D] [UV^1_50G1D]
[1^50G1P] [UV^1_50G1P]
[1^50G2P] [UV^Transfer_Block_Ground_Overcurrent_Level]
[1^50N1D] [UV^1_50N1D]
[1^50N1P] [UV^1_50N1P]
[1^50P1D] [UV^1_50P1D]
[1^50P1P] [UV^1_50P1P]
[1^50P2P] [UV^Transfer_Block_Phase_OC_Level]
[1^51G1C] [UV^1_51G1C]
[1^51G1P] [UV^1_51G1P]
[1^51G1TD] [UV^1_51G1TD]
[1^51N1C] [UV^1_51N1C]
LDG0007-01
[1^51N1P] [UV^1_51N1P]
[1^51N1TD] [UV^1_51N1TD]
[1^51P1C] [UV^1_51P1C]
[1^51P1P] [UV^1_51P1P]
[1^51P1TD] [UV^1_51P1TD]
[1^59P1P] [UV^Healthy_Source_Voltage]/100
[1^CFD] [UV^Breaker_Close_Failure_Time]
[1^CTR] [UV^1_CTR]
[1^DELTA_Y] [UV^Delta_or_Wye]
[1^PTR] [UV^Potential_Transformer_Ratio]
[1^PTRS] [UV^Potential_Transformer_Ratio]
[1^RID] [UV^1_RID]
[1^SINGLEV] [UV^Single_Volt]
[1^SYNCPH] [UV^1_SYNCP]
[1^TID] [UV^1_TID]
[1^VNOM] [UV^System_Voltage] / [UV^Potential_Transformer_Ratio]
[2^25VHI]
[2^25VLO]
[2^27P1D] [UV^Transfer_Initiate_Time_Delay]
[2^27p1P] [UV^Transfer_Initiate_Voltage] /100
[2^27P2D] [UV^Source_Undervoltage_Alarm_Delay]
[2^27P2P] [UV^Source_Undervoltage_Alarm_Pickup]/100
[2^50G1D] [UV^2_50G1D]
[2^50G1P] [UV^2_50G1P]
[2^50G2P] [UV^Transfer_Block_Ground_Overcurrent_Level]
[2^50N1D] [UV^2_50N1D]
[2^50N1P] [UV^2_50N1P]
[2^50P1D] [UV^2_50P1D]
[2^50P1P] [UV^2_50P1P]
[2^50P2P] [UV^Transfer_Block_Phase_OC_Level]
[2^51G1C] [UV^2_51G1C]
[2^51G1P] [UV^2_51G1P]

LDG0007-01
[2^51G1TD] [UV^2_51G1TD]
[2^51N1C] [UV^2_51N1C]
[2^51N1P] [UV^2_51N1P]
[2^51N1TD] [UV^2_51N1TD]
[2^51P1C] [UV^2_51P1C]
[2^51P1P] [UV^2_51P1P]
[2^51P1TD] [UV^2_51P1TD]
[2^CTR] [UV^2_CTR]
[2^RID] [UV^2_RID]
[2^SINGLEV] [UV^Single_Volt]
[2^TID] [UV^2_TID]
[2^VNOM] [UV^System_Voltage] / [UV^Potential_Transformer_Ratio]
[3^25VHI]
[3^25VLO]
[3^27P1P] [UV^Dead_Source_Voltage]/100
[3^27P2P] OFF
[UV^Dead_Source_Voltage] /100 * [UV^System_Voltage]/

[3^27S1P]
[3^50G1D] [UV^3_50G1D]
[3^50G1P] [UV^3_50G1P]
[3^50P1D] [UV^3_50P1D]
[3^50P1P] [UV^3_50P1P]
[3^51G1C] [UV^3_51G1C]
[3^51G1P] [UV^3_51G1P]
[3^51G1TD] [UV^3_51G1TD]
[3^51P1C] [UV^3_51P1C]

LDG0007-01
[3^51P1P] [UV^3_51P1P]
[3^51P1TD] [UV^3_51P1TD]
[UV^Healthy_Source_Voltage]/100 * [UV^System_Voltage]/
[3^59S1P]
[3^CTR] [UV^3_CTR]
[3^RID] [UV^3_RID]
[3^SINGLEV] Y
[3^TID] [UV^3_TID]
[3^VNOM] [UV^System_Voltage]/ [UV^Potential_Transformer_Ratio]
[G^DCHIP] [UV^G_DCHIP]
[G^DCLOP] [UV^G_DCLOP]
[G^FNOM] [UV^G_FNOM]
[G^PHROT] [UV^G_PHROT]
[L1^MV01] [UV^Enable_Instantaneous_Elements]
[L1^MV02] [UV^Remote_Enable]
[L1^RST07] 0
[L1^SET07] 1
[L1^SV01DO] [UV^Breaker_Trip_Failure_Time] + 0.13
[L1^SV04PU] [UV^Retransfer_Time_Delay]
[L1^SV06PU] [UV^Transfer_Initiate_Time_Delay]
[L1^SV11PU] [UV^Breaker_Trip_Failure_Time] + [UV^Trip_Pushbutton_Delay] + 0.1
[L1^SV13PU] [UV^Retransfer_Time_Delay]-0.2
[L1^SV15PU] [UV^Breaker_Trip_Failure_Time]
[L1^SV17] [UV^Block_Manual_Close]
[L1^SV18] [UV^TCM]
[L1^SV27PU] [UV^Close_Pushbutton_Delay]
[L1^SV28PU] [UV^Trip_Pushbutton_Delay]

LDG0007-01
[L2^RST07] 0
[L2^SET07] 1
[L2^SV04PU] [UV^Retransfer_Time_Delay]
[L2^SV06PU] [UV^Transfer_Initiate_Time_Delay]
[L2^SV11PU] [UV^Breaker_Trip_Failure_Time] + [UV^Trip_Pushbutton_Delay] + 0.1
[L2^SV13PU] [UV^Retransfer_Time_Delay]-0.2
[L2^SV18] [UV^TCM]
[L3^RST07] 1
[L3^SET07] 0
[L3^SV04PU] [UV^Tie_Close_Time_Delay]
[L3^SV10PU] [UV^Breaker_Trip_Failure_Time] + 0.1
[L3^SV11PU] [UV^Tie_Breaker_Trip_Delay]
[L3^SV13PU] [UV^Retransfer_Time_Delay] + 0.02
[L3^SV18] [UV^TCM]
[UV^Block_Manual_Close] [UV^Block_Manual_Close_with_Bkr_Racked_In]=Y
[UV^System_Voltage] [UV^System_Voltage_kV] * 1000
[UV^TCM] [UV^Trip_Coil_Monitoring] = Y

LDG0007-01
Table 80 Design Variables Cross Reference
Design Variable Design Setting
1_50G1D Instantaneous Ground Time Delay
1_50G1P Instantaneous Ground Pickup
1_50N1D Neutral Instantaneous Overcurrent Delay
1_50N1P Neutral Instantaneous Overcurrent Pickup
1_50P1D Instantaneous Phase Time Delay
1_50P1P Instantaneous Phase Pickup
1_51G1C Ground Time Overcurrent Curve
1_51G1P Ground Time Overcurrent Pickup
1_51G1TD Ground Time Overcurrent Time Delay
1_51N1C Neutral Time Overcurrent Curve
1_51N1P Neutral Time Overcurrent Pickup
1_51N1TD Neutral Time Overcurrent Delay
1_51P1C Phase Time Overcurrent Curve
1_51P1P Phase Time Overcurrent Pickup
1_51P1TD Phase Time Overcurrent Delay
1_CTR Phase CT Ratio
1_RID Relay Identifier
1_SYNCP Synchronizing Phase
1_TID Terminal Identifier
2_50N1D Neutral Instantaneous Overcurrent Delay
2_50N1P Neutral Instantaneous Overcurrent Pickup
2_51G1TD Ground Time Overcurrent Delay
2_51N1C Neutral Time Overcurrent Curve
2_51N1P Neutral Time Overcurrent Pickup
2_51N1TD Neutral Time Overcurrent Delay

LDG0007-01
3_51G1TD Ground Time Overcurrent Delay
Block_Manual_Close_with_Bkr_Racked_In Block Manual Close with Bkr Racked In
Breaker_Close_Failure_Time Breaker Close Failure Time
Breaker_Trip_Failure_Time Breaker Trip Failure Time
Close_Pushbutton_Delay Close Pushbutton Delay
Dead_Source_Voltage Dead Source Voltage
Delta_or_Wye Delta or Wye
Enable_Instantaneous_Elements Enable Instantaneous Elements
G_DCHIP High DC Voltage Alarm Level
G_DCLOP Low DC Voltage Alarm Level
G_FNOM System Frequency
G_PHROT System Phase Rotation
Healthy_Source_Voltage Healthy Source Voltage
Maximum_Slip_Frequency Maximum Slip Frequency
L3_MV03 Enable Source Paralleling
Potential_Transformer_Ratio Potential Transformer Ratio
Remote_Enable Remote Enable
Retransfer_Time_Delay Automatic Retransfer Time Delay

LDG0007-01
Single_Volt Single Voltage Input on Mains?
Source_Undervoltage_Alarm_Delay Source Undervoltage Alarm Delay
Source_Undervoltage_Alarm_Pickup Source Undervoltage Alarm Pickup
Sync_Check_Hi_Threshold_Voltage Sync Check High Threshold Voltage
Sync_Check_Low_Threshold_Voltage Sync Check Low Threshold Voltage
Sync_Check_Maximum_Angle Sync Check Maximum Angle
System_Voltage_kV System Voltage
Tie_Breaker_Trip_Delay Tie Breaker Trip Delay
Tie_Close_Time_Delay Transfer Tie Close Time Delay
Transfer_Block_Ground_Overcurrent_Level Transfer Block Ground Overcurrent Level
Transfer_Block_Phase_OC_Level Transfer Block Phase Overcurrent Level
Transfer_Initiate_Voltage Transfer Initiate Voltage
Transfer_Intitiate_Time_Delay Transfer Initiate Time Delay
Trip_Coil_Monitoring EnableTrip Coil Monitoring
Trip_Pushbutton_Delay Trip Pushbutton Delay
Summary of Logic and I/O Usage

The following table lists how the main and tie breaker control schemes use the relay SELOGIC® control
equations, latch bits, pushbuttons, MIRRORED BITS® communications, inputs, and outputs. Elements not
listed or listed as “Not Used” are available for use in other control logic.
Table 81 Summary of Logic and I/O Usage

Element Main Breaker 1 and Main Breaker 2 Tie
SV01 Breaker Just Closed Timer Breaker Just Closed Timer
SV02 Trip for Automatic Transfer Transfer Enable (Intermediate Logic)
SV03 Communication Failure Communication Failure
SV04 Automatic Retransfer Close Timer Tie Automatic Transfer Close Timer
SV05 Test Mode Reset Timer Test Mode Reset Timer
SV06 Automatic Transfer Initiate Scheme Error (Intermediate Logic)
SV07 Scheme Error Checking Scheme Error Checking
SV08 Transfer Scheme Trip Transfer Scheme Trip
SV09 Manual Transfer Trip Transfer Enabled
SV10 Not Used Manual Retransfer Trip
SV11 Main Breaker Trip for Tie Failure to Trip Communication Failure Alarm
SV12 Flasher Flasher
SV13 Live Source Seeking Logic Both Main Breakers Open Trip

LDG0007-01
SV14 Breaker Close Failure Breaker Close Failure
SV15 Breaker Trip Failure Breaker Trip Failure
SV16 Breaker Manual Trip Initiated Breaker Manual Trip Initiated
SV17 Block Manual Close with Bkr Racked In Block Manual Close with Bkr Racked In
SV18 Trip Coil Monitor Enable Trip Coil Monitor Enable
SV19 Not Used Not Used
SV20 External Block Transfer Display Point Not Used
SV21 External Initiate Transfer Display Point Not Used
SV22 Not Used Retransfer Enabled
SV23 Auto Ready Auto Ready
SV24 Trip Coil Monitor Alarm Trip Coil Monitor Alarm
SV25 Not Used Select A Main
SV26 Manual Close Permissive Manual Close Permissive
SV27 Close Pushbutton Delay Close Pushbutton Delay
SV28 Trip Pushbutton Delay Trip Pushbutton Delay
SV29 Communications OK Communications OK
SV30 GOOSE Message Watchdog Oscillator GOOSE Message Watchdog Oscillator
SV31 GOOSE Message Watchdog Timer GOOSE Message Watchdog Timer 1
SV32 Not Used GOOSE Message Watchdog Timer 2
MV01 Enable Instantaneous Elements Enable Instantaneous Elements
MV02 Enable Remote Control Enable Remote Control
MV03 Not Used Enable Source Paralleling
LT01 Enable Instantaneous Elements During Enable Instantaneous Elements During
Maintenance Maintenance
LT02 Not Used Not Used
LT03 Remote Enable Remote Enable
LT04 Transfer Scheme Trip Latch Transfer Scheme Trip Latch
LT05 Not Used Retransfer Enable (Intermediate Logic)
LT06 Transfer Enable Transfer Enable
LT07 LT07 = 1 (Used in target logic) LT07 = 0 (Used in target logic)
LT08 Retransfer Enable Retransfer Enable
LT09 Close Pushbutton Delay Latch Close Pushbutton Delay Latch
LT10 Trip Pushbutton Delay Latch Trip Pushbutton Delay Latch
LT11 Select to Trip Source Paralleling
LT12 External Block Transfer Latch Not Used
LT13 External Initiate Transfer Latch Not Used
LT16 LT16 = 27P2T (Used in display logic) LT16 = 0 (Used in display logic)

LDG0007-01
PB01A_LED Instantaneous Enabled Instantaneous Enabled
PB01B_LED Instantaneous Trip Instantaneous Trip
PB02A_LED Select to Trip Parallel Enabled
PB02B_LED No Manual Close No Manual Close
PB03A_LED Remote Enable Remote Enable
PB03B_LED Not Used Not Used
PB04A_LED Transfer Enable Transfer Enable
PB04B_LED Retransfer Enable Retransfer Enable
RB01 SCADA Trip Select Remote Transfer Enable
RB02 Not Used Remote Retransfer Enable Remote Transfer
Disable
RB03 Not Used Latch Bit Remote Reset Latch Bit Remote Reset Remote Retransfer Enable
RB04 Not Used SCADADCS Paralleling Remote Retransfer
Disable
RB05 Not Used Paralleling Enable
RB06 Not Used Paralleling Disable
RB07 Latch Bit Remote Reset Latch Bit Remote Reset
TMB1A Transfer Enabled
TMB2A Main 1 Select to Trip/Main 2 Select to
Trip
TMB3A Source Healthy
TMB4A Main 1/Main 2 Closed
TMB5A Automatic Transfer Initiated
TMB6A No Fault
TMB7A Retransfer Enabled
TMB8A Main 1/Main 2 Racked In
TMB1A/1B Transfer Enabled
TMB2A/2B Main 2 Select to Trip/Main 1 Select to Trip
TMB3A/3B Source 2 Healthy, Main 2 Closed, Main 2 Racked
In, Tie Racked In, and ROKB/Source 1 Healthy,
Main 1 Closed, Main 1 Racked In, Tie Racked In,
and ROKA
TMB4A/4B Tie Breaker Closed
TMB5A/5B Tie and Main 2 Closed and Racked In and
ROKB/Tie and Main 1 Closed and Racked In and
ROKA
TMB6A/6B No Fault and ROKB/No Fault and ROKA
TMB7A/7B Retransfer Enabled
TMB8A/8B Source 2 Healthy, Main 2 Racked In, Tie Closed,
Tie Racked In, and ROKB/Source 1 Healthy, Main
1 Racked In, Tie Closed, Tie Racked In, and
ROKA
VB001 Tie Breaker Message Bad Quality Main Breaker 1 Message Bad Quality

LDG0007-01
VB002 Tie Breaker 1 GOOSE Watchdog Timer Main Breaker 1 GOOSE Watchdog Timer
VB003 Tie Breaker Trip Fail Main Breaker 2 Message Bad Quality
VB004 Not Used Main Breaker 2 GOOSE Watchdog Timer
VB011/12 Transfer Enabled Transfer Enabled
VB021/22 Main 2 Select to Trip/Main 1 Select to Main 1 Select to Trip/Main 2 Select to Trip
Trip
VB031/32 Source 2 Healthy, Main 2 Closed, Main 2 Source Healthy
Racked-In, Tie Racked In, and
ROKB/Source 1 Healthy, Main 1 Closed,
Main 1 Racked In, Tie Racked In, and
ROKA
VB041/42 Tie Breaker Closed Main 1/Main 2 Closed
VB051/52 Tie and Main 2 Closed and Racked In and Automatic Transfer Initiated
ROKB/Tie and Main 1 Closed and Racked
In and ROKA
VB061/62 No Fault and ROKB/No Fault and ROKA No Fault
VB071/72 Retransfer Enabled Retransfer Enabled
VB081/82 Source 2 Healthy, Main 2 Racked In, Tie Main 1/Main 2 Racked In
Closed, Tie Racked In, and ROKB/Source
1 Healthy, Main 1 Racked In, Tie Closed,
Tie Racked In, and ROKA
IN101 Trip Coil Monitor Trip Coil Monitor
IN401 Breaker Status (52A) Breaker Status (52A)
IN402 Breaker Racked In Breaker Racked In
IN403 Manual Trip Manual Trip
IN404 Manual Close Manual Close
IN405 Select to Trip External Transfer Enable Switch
IN406 External Block Transfer External Retransfer Enable Switch
IN407 External Initiate Transfer Remote Parallel
IN408 Remote Close Remote Close
OUT101 Breaker Trip Breaker Trip
OUT102 Breaker Close Breaker Close
OUT103 Scheme/Relay Self-Test Alarm Scheme/Relay Self-Test Alarm
Logic Descriptions and Diagrams

For the automatic transfer scheme to function as this Design Template Guide describes, you must use the
settings in the SEL-751A Three-Relay Main-Tie-Main Automatic Transfer Scheme Design Template to
change factory default SEL-751A logic. Accomplish this by using ACSELERATOR QuickSet® SEL-5030
Software to upload the settings from the Design Template to the relays. The following is a detailed
description of the logic settings you need to use to accomplish the functions particular to the main-tie-main
design template.
Besides basic Boolean logic symbols, the logic diagrams include the following symbols:

LDG0007-01
IN
Input Symbol or Literal Constant
Output of the logic equation*
Variable within the logic equation*
Connector from another logical equation
Continuation to another logical equation
RS logic latch: S is set bit, R is reset bit, Q is output bit.
Timer circuit: PU is the pick-up delay time, DO is the drop-out time, T is output bit.
*
Number indicates processing order, which is irrelevant for the SEL-751A relay.
Main Breaker Overall Trip Logic

The following abnormal conditions can cause tripping of the main breakers: time delay overcurrent
elements (51P1T, 51G1T, and 51N1T), instantaneous overcurrent elements (50P1T, 50G1T, and 50N1T)
where enabled (by MV01/LT01) , or a failure of the tie breaker to trip (VB003, only when GOOSE
messaging is used). Abnormal tripping will light the TRIP LED and lock out the breaker until you press the
{TARGET RESET} pushbutton or issue a DCS target reset command. You can normally trip the main
breakers through use of the DCS communications open command (OC), the hardwired TRIP switch
(IN403), and through the automatic transfer scheme (SV08T) in response to automatic transfer conditions
or operator action. The Trip Pushbutton Delay (SV28PU) provides a time delay for the hardwired TRIP
switch.
Overcurrent trips are latched until you press the {TARGET RESET} pushbutton (or issue a DCS target
reset command). Manual trips last 0.5 seconds. SV28DO provides the Trip Pushbutton Delay.

LDG0007-01
Figure 7 Main Breaker Overall Trip Logic
Main Breaker Automatic Transfer Scheme Trip Logic

The main breakers can be tripped by the following three conditions associated with the automatic transfer
scheme (see Figure 8):
Trip from Automatic Transfer (SV02T)
Trip from Tie Breaker Close (SV09T)
Trip from Live Source Seeking Logic (SV13T)
Setting SV08DO for longer than the maximum setting for the Breaker Trip Failure Timer ensures proper
operation of the Breaker Trip Failure Logic.
SV08T trips the breaker via OUT101 (Figure 21). LT04 displays “XFER SCHEME TRIP” (DP15) on the
tie breaker LCD display. LT04 is reset by pressing the {TARGET RESET} pushbutton (TRGTR) on the
front panel of the tie-breaker relay, issuing a DCS target reset command, or by the tie breaker closing.
LT04 can also be reset by local (LB03) or remote (RB07) reset during testing.

LDG0007-01
Figure 8 Main Breaker Automatic Transfer Scheme Trip Equation
Main Breaker Trip from Automatic Transfer Logic

Automatic transfer from Main Breaker 1 initiates as a result of time-qualified undervoltage conditions on
Source 1 (SV06T) or from closing of the external initiate transfer contact (IN407) as in the case of an 87T
or 86T contact, for example. A number of additional conditions supervise the initiate signal before a trip
from the automatic transfer signal (SV02) can initiate. The logic generates SV02 only if the tie breaker is
not closed (RMB4A or VB041), there is no error in the scheme logic (SV07T), transfer is not blocked by
the external block transfer contact (IN406), transfer is enabled (LT06), and Main Breaker 1 is closed.
Once the logic initiates it, SV02T picks up immediately and, once the main breaker opens, seals in to
ensure completion of the transfer. Setting the time delay SV02DO slightly longer than the maximum
expected trip time of the breaker, as identified by the Breaker Trip Failure Time setting, ensures that the
transfer occurs even if the transfer initiate conditions (SV06T) reset before the breaker is actually open. The
SV02T automatic transfer signal remains sealed-in until the logic initiates an automatic retransfer (SV02T),
automatic transfer is disabled (NOT LT06), or the main breaker closes again, such as through a manual
close.
Figure 9 Main Breaker Trip From Automatic Transfer
Main Breaker Trip From Tie Breaker Close Logic

The trip from Tie Breaker Close Logic (SV09) controls which main breaker trips when you close the tie
breaker manually. Main Breaker 1 will trip if both the tie breaker and Main Breaker 2 are closed and racked
LDG0007-01
in (RMB5A or VB051), Main Breaker 1 is closed, Main Breaker 1 is selected to trip (LT11), Main Breaker
1 has not just been closed (SV01T), the tie breaker has just closed as indicated by a rising edge of RMB4A
or VB041, and communications are operating normally (SV03T). This final requirement ensures that SV09
operates only during a manual transfer of load from the main to the tie and not during an automatic
retransfer from the tie back to the main. If SV09 were to operate during automatic retransfers, it might trip
the main breaker if the tie breaker is slow to open and is not open when SV01T deasserts after the close.
If the tie breaker fails to trip during an automatic or manual retransfer, the transfer scheme would be auto-
matically disabled. All three breakers would, however, remain closed and parallel the sources. The purpose
of SV11T is to prevent extended paralleling by asserting to trip one of the main breakers if all three
breakers remain closed for SV11PU time. The logic sets SV11PU automatically to the maximum time the
tie breaker is expected to need for a trip, including the Breaker Trip Failure Time, the Tie Breaker Trip
Delay, if applicable, plus margin for status communications between the relays.
Figure 10 Trip From Tie Breaker Close
Main Breaker Trip From Live Source Seeking Logic

In the event that both sources lose voltage at different times during an event, the system could initiate a
transfer to an apparently healthy source, only to lose that source also. This would result in one main breaker
remaining open with the second main and tie breakers closed. If voltage returns first to the main breaker
that is still closed, the system will return to normal through an automatic retransfer. However, if the voltage
returns first to the main breaker that is open, it is best to trip the main breaker that is closed, leave the tie
breaker closed, and close the other main breaker (which now has healthy voltage).
SV13 controls tripping for the main breaker that remained closed. If Main Breaker 1 is the breaker that
remained closed, Main Breaker 1 will trip if Source 1 voltage is less than Transfer Initiate Voltage and the
undervoltage is not the result of overcurrent, Source 2 is healthy, Main Breaker 2 is racked in, and the tie
breaker is closed and racked in (RMB8A or VB081), Main Breaker 1 has not initiated an automatic transfer
(TMB5A), and Main Breaker 1 has not just been closed (SV1T). Once initiated, the Staggered Source Loss
Timer (SV13T) seals in until the logic initiates an automatic retransfer close or it disables automatic
transfer. An SV13PU setting slightly shorter than the Automatic Retransfer Timer in Main Breaker 2,
SV4PU, causes Main Breaker 1 to trip before Main Breaker 2 closes. Failure to coordinate SV13PU and
SV4PU properly will result in Main Breaker 1, Main Breaker 2, and the tie breaker being closed at the
same time, which causes the tie breaker to trip. In the default settings, SV13PU is automatically set 0.2
seconds less than the setting for Automatic Retransfer Time Delay.

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COMM OK
SV03T
BKR JUST CLOSED
AUTO XFER INITIATED
VOLTAGE BELOW XFER VOLTAGE
SV01T
SOURCE 2 AVAILABLE & TIE CLOSED
XFER BLOCK 50P SV13
XFER BLOCK 50G
3
TMB5A VarTmr
9.80 PU T SV13T
27P1
SETTING DO
RMB8A
0.00
VB081
50P2P
50G2P
4
52A
XFER ENABLE
LT06
RE-XFER CLOSE TIMER
SV04T
Figure 11 Main Breaker Live Source Seeking Logic
Transfer Initiate Logic

After the Transfer Initiate Time Delay (SV06PU) provides time qualification, SV06T initiates transfer if any phase
voltage is less than the Transfer Initiate Voltage (27P1), there is no overcurrent, and communications are operating
properly (SV03T). Overcurrent supervision prevents transfer as a result of undervoltage from a fault or high-load
current. The opposite source must also be available, as RMB3B or VB031 indicates, before the logic will initiate
transfer. This ensures that the scheme, upon voltage return to only one source after a simultaneous loss of voltage to
both sources, will wait for the entire Transfer Initiate Time Delay before initiating a transfer.
Figure 12 Main Breaker Transfer Initiate Logic
Test Mode Logic

See the Test Mode subsection for a discussion of the purpose and operation of test mode. See Figure 13 for
a Test Mode Logic diagram. Pulsing local bit LB01 asserts and seals in SV05 and starts SV05T timing out
according to its pickup setting, SV05PU. The relay remains in the test mode until the logic pulses LB02 or
SV05T asserts, after approximately 50 minutes.
SV05
LB01 VarTmr
3000.00 PU T
DO
0.00
LB02
Figure 13 Main and Tie Breaker Test Mode Logic

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External Transfer Initiate/Block Logic
You can connect an external contact from a device that trips the main breaker to IN406 to disable the
transfer and manual closing of the main or tie breaker. If input IN406 connects to a protective relay, the
External Block Transfer Latch (LT12) will latch and it will be impossible to enable automatic transfer or to
manually close the main or tie breaker until you reset the External Block Transfer Latch by pressing the
{TARGET RESET} pushbutton (TRGTR) on the front panel of the main breaker relay or issuing a DCS
target reset command. This logic will also initiate breaker failure, as described in Breaker Trip and Close
Failure Logic.
Figure 14 Main and Tie Breaker External Transfer Block Logic

By connecting an external contact from a device that trips the main breaker to IN407, you can initiate
transfer and disable closing of the main breaker. If input IN407 is connected to a protective relay, the
External Block Transfer Latch (LT13) will latch and it will be impossible to close the main breaker until
you reset the External Block Transfer Latch by pressing the {TARGET RESET} pushbutton (TRGTR) on
the front panel of the main breaker relay or issuing a DCS target reset command. This logic will also
initiate breaker failure as described in Breaker Trip and Close Failure Logic.
Figure 15 Main and Tie Breaker External Transfer Initiate Logic
Main Breaker Close Logic

You can close the main breakers manually or automatically on a retransfer from the tie breaker.
Overall Close Logic

Close the main breakers manually by using the hardwired CLOSE switch (IN404) or, if remote control is
enabled (LT03), by issuing the DCS communications close command (CC) or remote close input (IN408) if
the Main Breaker Manual Close Permissive Logic (SV26T) is satisfied. The Close Pushbutton Delay
(SV27PU) provides a time delay for the hardwired CLOSE switch. The main breaker closes automatically
when the Automatic Retransfer Timer (SV04T) expires.
The logic prevents an operator from inadvertently closing the main breaker onto a faulted bus by blocking
manual close when the tie breaker has tripped on a fault. If the breaker fails to close because of a tie
breaker trip condition, you can use the {TARGET RESET} pushbutton on the tie-breaker relay or a DCS

LDG0007-01
target reset command to reset the trip condition after you have properly investigated and corrected the
cause of the trip.
Figure 16 Main Breaker Overall Close Logic

You can close the breaker manually if Main Breaker Manual Close Permissive Logic is satisfied as shown
in Figure 17. This would mean that communications with the tie-breaker relay is operating properly
(SV03T), the tie-breaker relay did not trip on a fault and communications between the tie breaker and the
other main breaker are okay (RMB6A or VB061), and either the line and bus are in synchronism (25A1) or
the line is hot (3P59) and the bus is dead (27S1). Also, neither the External Block Transfer Latch (LT12)
nor the External Initiate Transfer Latch (LT13) can be asserted.
Figure 17 Main Breaker Manual Close Permissive Logic

Timer SV01T, shown in Figure 18, is the Breaker Just Closed Timer. SV01T asserts whenever a close
command is issued to the breaker to temporarily block tripping of the main breaker by the Manual Transfer
Trip Logic (SV09) or the Live Source Seeking Logic (SV13). SV01 seals in until the breaker either closes
or the close failure timer asserts. The SV1DO timer is set longer than the Breaker Trip Failure Time plus
communications time. This ensures extension of protection against tripping until the tie breaker has had
time to trip during manual transfers.
The SV01T logic for the tie breaker is identical.

LDG0007-01
Figure 18 Main and Tie Breaker Just Closed Logic
If the Unlatch Close equation (ULCL) equation is asserted, the internal close logic remains deasserted and
the CL equation will fail to cause the relay to close the breaker.
TRIP
EXT BLOCK XFER LATCH
2
EXT INIT XFER LATCH ULCL
LT12
LT13
3P59
27S1
25A1
Figure 19 Main Breaker Unlatch Close Logic

ULCL blocks closing for any main breaker trip condition, whether it is internal (TRIP) or external but
internally latched ( LT12 or LT13). If the breaker fails to close because of a main breaker trip condition,
you can reset any associated tripped external lockouts and/or use the {TARGET RESET} pushbutton or a
DCS target reset command to reset the trip condition after properly investigating and correcting the cause
of the trip.
The ULCL equation will remain asserted if voltage conditions are incorrect for a successful close. A
successful close will result only if either the source and bus are in sync (25A1) or the source is hot (3P59)
and the bus is dead (27S1).
Automatic Retransfer Initiate Logic

Accomplish automatic retransfer from the tie breaker to the main breaker is by closing the main breaker
and then allowing the tie breaker to trip, see Figure 16 and Figure 20. The logic initiates closing of the main
breaker after voltage has returned to the source and it has undergone qualification by the Automatic
Retransfer Time Delay, SV04PU. SV04 asserts when automatic transfer is enabled (LT06), automatic
retransfer is enabled (LT08), source voltage is healthy (3P59), the tie breaker is closed (RMB4A or
VB041), the tie breaker has not detected a fault (RMB6A or VB061), the main breaker has been previously
tripped on automatic transfer (SV02T) or by Live Source Seeking Logic (SV13T), and the source and the
bus are in synchronism (25A1), or the bus is dead (27S). When SV04T asserts, the logic provides a close
signal to the main breaker and resets the seal-in for SV02 (Figure 9) and SV13 (Figure 11). Assertion of
SV10 in the tie breaker logic (see the Tie-Breaker Trip From Retransfer Logic subsection) subsequently
trips the tie breaker.
If Main Breaker 2 trips because of the Live Source Seeking Logic (SV13T) and automatic retransfer is
enabled, then SV04T will close Main Breaker 1, as this subsection describes previously. However, if
automatic retransfer is disabled, this portion of the SV04 logic cannot close Main Breaker 1. In this
situation, Main Breaker 1 should still be allowed to close to connect the load to the healthy source. This
portion of the logic operates by detecting that automatic retransfer is disabled (NOT LT08), and the bus is
dead (27S1). Dead bus indicates that Main Breaker 2 has tripped, or will soon trip, as a result of action
from Live Source Seeking Logic (SV13) in the Main Breaker 2 relay.

LDG0007-01
Figure 20 Main Breaker Close On Automatic Retransfer Logic
Tie Breaker Overall Trip Logic

Trip the tie breaker using of the DCS communications open command (OC), hardwired TRIP switch
(IN403), time-delay overcurrent elements (51P1T and 51G1T), instantaneous overcurrent elements (50P1T
and 50G1T) where enabled (MV01/LT01), tie breaker failure (SV15T), or the automatic transfer scheme
(SV08T) in response to automatic transfer conditions (Figure 21). The Trip Pushbutton Delay (SV28PU)
provides a time delay to the hardwired TRIP switch. Trip unlatch logic is identical to that of the main
breakers.
Figure 21 Tie Breaker Overall Trip Logic

LDG0007-01
Tie-Breaker Automatic Transfer Scheme Trip Logic
As long as the tie breaker is racked in (IN402), you can use the following two conditions to trip it
automatically:
Trip from Retransfer Logic (SV10)
Trip from Both Main Breakers Open Logic (SV13)
SV08T trips the breaker via OUT101 (Figure 21). The logic uses LT04 to display “XFER SCHEME TRIP”
(DP15) on the tie-breaker LCD display. LT04 is reset by pressing the {TARGET RESET} pushbutton
(TRGTR) on the front panel of the tie-breaker relay or a DCS target reset command, or by the tie breaker
closing. Local (LB03) or remote (RB07) reset during testing can also reset LT04.
Figure 22 Tie-Breaker Automatic Transfer Scheme Trip Equation
Tie-Breaker Trip From Retransfer Logic

The tie breaker will trip when the tie-breaker relay receives indication that both main breakers are closed
(RMB4A and RMB4B or VB041 and VB042) and that both main breakers are racked in (RMB8A and
RMB8B or VB081 and VB082). The logic verifies that communications are operating properly (SV03T)
and that the tie breaker is closed. The logic also prevents tripping on a manual transfer to the tie by
verifying that the tie breaker has not just been closed (SV01T). When SV10T asserts, the seal-in for
automatic transfer close (SV04) resets (Figure 20).
If a main breaker fails to trip during a manual transfer to the tie breaker, the logic disables the automatic
transfer scheme, but all three breakers remain closed, paralleling the sources. SV10 serves to prevent
extended paralleling by asserting to retrip the tie breaker if all three breakers are closed. SV01T supervises
this trip to prevent tripping of the tie for a normal close condition.
The Tie Breaker Trip Time controls SV10PU. After the main breaker closes during an automatic or manual
retransfer, the tie breaker remains closed until the Tie Breaker Trip Time expires. By setting this timer to 0,
you can ensure that the sources are paralleled for the minimum possible time.

LDG0007-01
Figure 23 Tie Retransfer Trip
Tie-Breaker Trip From Both Main Breakers Open Logic

Should both main breakers somehow be open, SV13 within this logic asserts to trip the tie breaker and
allow orderly system recovery. The logic sets the pickup time of SV13T (SV13PU) automatically to be
slightly greater than the automatic retransfer delay in the main breakers (SV04PU). This is necessary to
ensure that this logic does not cause the tie breaker to trip during operation of Live Source Seeking Logic.
Both main breakers can be open during such an event as long as the automatic retransfer delay if the second
source voltage drops below the Healthy Source Voltage but not below the Dead Source Voltage. In this
case, voltage on the tied bus prevents the Automatic Retransfer Timer (SV04) from beginning to time until
main breaker SV13T times out and trips the main with unhealthy source voltage. The bus is not dead, so
27S1 remains deasserted. See the Main Breaker Trip From Live Source Seeking Logic and Automatic
Retransfer Initiate Logic subsections.
Figure 24 Trip From Both Main Breakers Open Logic
Tie-Breaker Overall Close Equation

You can close the tie breaker using the Automatic Transfer Logic, manually using the hardwired CLOSE
switch (IN404) or, if remote control is enabled (LT03), using the DCS communications close command
(CC) or remote close input (IN408).

LDG0007-01
Figure 25 Tie Breaker Overall Close Logic
SV26T supervises manual closing. As shown in Figure 26, SV26T prevents closing if any of the main
breakers (RMB6A, RMB6B, VB061, or VB062) has detected a fault. The two buses must also be in
synchronism, one of the two buses must be dead, or the relay must be in Test Mode (SV05T).
Communications must also be operating properly (SV03T). Supervision of manual closing means that you
must select Main Breaker 1 to trip (RMB2A or VB021) or Main Breaker 2 to trip (RMB2B or VB022).
This logic prevents the tie breaker from closing if you have selected neither main breaker to trip, as might
be the case at initial commissioning or after an inadvertent settings group change.
It is unnecessary to provide supervision of automatic transfer signal SV04T by main breaker fault
detection, because the main breaker transfer initiate signal, SV02T, via RMB5A (VB051) or RMB5B
(VB052) controls SV04T. This signal cannot be initiated if the main breaker detects an overcurrent or if the
main breaker trips because of a fault. It is also unnecessary to provide supervision by synchronism-check
functions, because SV04T has built-in logic to verify that the main breaker is open and that the bus has no
voltage.
Communications supervision is necessary to prevent a manual close when communications are not
operating properly. Such a close, when it is impossible to transmit breaker status to the other relays in the
scheme, could result in all three breakers closing simultaneously.
You cannot close the tie breaker if the breaker is racked in (IN402) and the Block Manual Close with Bkr
Racked In setting is set to “Y” (SV17 = 1).

LDG0007-01
Figure 26 Tie Breaker Manual Close Permissive Logic
The Unlatch Close equation (ULCL) serves two purposes. First, if the equation is asserted, the internal
close logic remains deasserted and the relay will not close the breaker via the CL equation.
Figure 27 Tie Breaker Unlatch Close Logic

ULCL blocks closing for tie breaker TRIP. If the breaker fails to close because of a breaker trip condition,
you can use the {TARGET RESET} pushbutton or a DCS target reset command to reset the trip condition
after you have properly investigated and corrected the cause of the trip.
The equation will also remain asserted if voltage conditions are incorrect for a successful close. Conditions
for a successful close include the following: either the source and bus are in sync (25A1), Bus 1 is hot
(3P59) and Bus 2 is dead (27S), Bus 1 is dead (3P27) and Bus 2 is hot (59S1), or the relay is in Test Mode
(SV05). This prevents the relay from starting to time toward a close and causes the relay to flash the
TRIP/CLOSE TIMER LED if voltage conditions would prevent a successful close.
LDG0007-01
Closing can also occur if logic has already initiated a transfer and both sides of the tie breaker go dead
during the transfer.
Tie Breaker Automatic Transfer Close Logic

SV04 controls closing of the tie breaker during an automatic transfer (see Figure 28). When the tie-breaker
relay receives an automatic transfer signal from one of the main breakers (RMB5A, RMB5B, VB051, or
VB052), the tie-breaker relay verifies that the associated bus is dead (27P1 or 27S1), that the main breaker
has tripped (RMB4A, RMB4B, VB041, or VB042), that the automatic transfer scheme is enabled (LT06),
and that communications are operating correctly (SV03T). Once initiated, SV04T seals in until the logic
initiates an automatic retransfer or manual retransfer trip, or until the logic disables the automatic transfer
scheme. The Transfer Tie Close Time Delay controls the SV04PU setting.
Figure 28 Tie Breaker Automatic Transfer Close Logic
Transfer Enable Logic

Enable and disable the automatic transfer scheme by setting latch bit LT06 (see Figure 29–Figure 31). Set
LT06 locally using the {TRANSFER} pushbutton (PB04) on the front panel of the tie-breaker relay. You
can set LT06 remotely by pulsing RB01 or by energizing IN405 on the tie-breaker relay when the Remote
Control Latch is active (LT03). When any of these Relay Word bits asserts, the logic sets LT06 in the tie
breaker if Sources 1 and 2 are healthy, Main Breaker 1 and Main Breaker 2 are closed, both Main Breaker
1 and Main Breaker 2 are racked in, and the tie breaker is racked in (TMB3A and TMB3B, see Table 86).
LT06 cannot already be set, and communications must be operating properly (SV03T).
The source healthy and breaker-position supervisions are necessary to prevent the scheme from being
enabled when either source is de-energized, main breakers are open or racked out, or the tie breaker is
closed. Enabling the scheme in such situations could cause breakers to close unexpectedly.
Once LT06 is set in the tie-breaker relay, the logic transmits the condition of this setting to Main Breaker 1
and Main Breaker 2 relays via TMB1A and TMB1B. The rising edge of the associated RMB1A or VB011
will set LT06 in the Main Breaker.
LDG0007-01
The logic resets LT06 locally if you press the {TRANSFER} pushbutton (PB04) on the front panel of the
tie-breaker relay during setting of the Automatic Retransfer Enable Logic (SV22T) in the tie breaker. You
can reset LT06 remotely by pulsing RB02 when the Remote Control Latch is active (LT03) or by de-
energizing IN405 on the tie-breaker relay. LT06 is also reset by the falling edge of RMB1A, RMB1B,
VB0011 or VB0012, indicating that the Main Breaker 1 or Main Breaker 2 relay has reset LT06. Scheme
error (SV07T), breaker close (SV14T) or trip failure (SV15T), a trip other than an automatic transfer or
manual trip in any of the three relays (TRIP), bus differential lockout (IN406), or racking any of the
breakers out will also reset LT06 (IN402). The last requirement prevents unexpected closing of a breaker if
the scheme is enabled and a breaker is racked out and then subsequently racked in after conditions become
correct for a transfer to occur. Finally, LT06 in the main breaker will reset when the main breaker has been
closed (/52A) with the tie breaker already open (NOT RMB4A or VB041). This logic disables transfer
when the main breaker is closed during a manual open-transition transfer. You can also reset LT06 using
local (LB03) or remote (RB07) reset during testing.
Recall that the optional External Block Transfer is wired to IN406 on the main breaker relays. If transfer is
enabled and either of these inputs asserts, LT06 will reset in the main breaker and the logic will transmit a
message over the communication channels to reset Transfer Enable in the tie-breaker relay and the other
main breaker relay. For any attempt to re-enable transfer via the tie breaker, LT06 in the tie breaker will
momentarily assert, light the TRANSFER ENABLED LED, and send a message to the main breaker relays to set
LT06 in those relays. If the bus lockout input keeps LT06 reset in one of the main breaker relays, an
attempt to set LT06 in that breaker will fail, and the transfer enable latch in the tie breaker will reset after a
short delay by the scheme error checking logic.
Figure 29 Main 1 Transfer Enable Logic

LDG0007-01
Figure 30 Tie Transfer Enable Logic

LDG0007-01
Figure 31 Tie Transfer Enable Logic (Cont’d)
Automatic Retransfer Enable Logic

Setting latch bit LT08 enables and disables tie-breaker relay automatic retransfer. The tie-breaker relay
checks all permissives for setting the latch before LT08 is set, and it then communicates the set condition to
the main breaker relays via M IRRORED BITS 7A and 7B.
Use the {TRANSFER} pushbutton (PB04) on the front panel of the tie-breaker relay to set LT08 locally.
Set LT08 remotely by pulsing remote bit RB03 to the tie-breaker relay or via a hardwired retransfer enable
contact connected to IN406 of the tie-breaker relay when the Remote Control Latch is active (LT03). When
PB04, RB03 or IN406 assert, LT08 in the tie-breaker relay will be set if LT08 is not already set, the
automatic transfer scheme is enabled (SV09T) and the tie breaker is open, and communications are
operating properly (SV03T). The logic cannot enable retransfer when the tie breaker is closed.
Upon setting LT08 in the tie-breaker relay, the logic transmits the condition of the LT08 setting to the Main
Breaker 1 relay via TMB7A and to the Main Breaker 2 relay via TMB7B.
LT08 is reset if you push the {TRANSFER} pushbutton (PB04) on the tie-breaker relay again, RB04 is
pulsed, or IN406 deasserts, and communications are operating properly (SV03T). LT08 will also reset if
LT06 resets or if the logic detects the falling edge of RMB7A, RMB7B, VB071 or VB072, indicating that
one of the other relays has reset LT08..
In addition, LT08 resets if IN404, IN408, or CC closes the tie breaker manually by. Manual closing of the
tie breaker defeats automatic retransfer to the main breaker, because a necessary prerequisite for an
automatic retransfer, SV02T, asserts only during automatic transfers and not by a manual transfer. This is
necessary to prevent the scheme from automatically separating the buses if manual closing purposely tied
them together. Resetting LT08 and the associated indicating lights and messages during manual transfers
serves as a reminder that automatic retransfer cannot occur and avoids false indication that the scheme will
retransfer automatically.
You can also reset LT08 through the use of local (LB03) or remote (RB07) reset during testing.
LDG0007-01
Note that the tie breaker uses LT05 only to increase the number of logic bits the reset equation uses for
LT08. The tie breaker uses LT05 as if it were a sampled value (SV) by inverting the set equation in the
reset equation. Functionally, it never latches.
Figure 32 Tie Breaker Automatic Retransfer Enable Logic

LDG0007-01
Figure 33 Main Breaker 1 Automatic Retransfer Enable Logic
The logic in the tie breaker controls the Automatic Retransfer Enable Logic for the main breakers, and
RMB7A and VB071 transmit this logic to the main breaker. Note that automatic retransfer is disabled if the
External Block Transfer contact connected to IN406 is closed. You can also reset LT08 using local (LB03)
or remote (RB07) reset during testing.
Breaker Trip and Close Failure Logic

Each relay contains logic that detects when the breaker fails to respond to a trip or close signal the relay
issues. This logic disables the automatic transfer scheme by resetting LT06. It also illuminates the BREAKER
FAILURE LED and indicates “Breaker Trip Fail” or “Breaker Close Fail” on the display.
Figure 34 and Figure 35 show the trip failure logic. The trip failure logic initiates whenever Relay Word bit
TRIP asserts. For the main breaker, the trip failure logic also initiates whenever an external relay contact
connected to the External Block Transfer IN406 or External Initiate Transfer IN407 asserts or LT12 or
LT13 latches in this contact. Whenever either an internal or external trip initiates the trip failure logic and
the breaker is closed as indicated by Relay Word bit 52A or current detectors 50P3 or 50G3 after SV15PU
time delay, SV15T asserts and seals in. Pressing {TARGET RESET} or issuing a DCS target reset
command breaks this seal-in and allows SV15T to deassert. If the breaker opens properly before SV15PU
time expires, SV15T does not assert. The Breaker Trip Failure Time setting controls SV15PU. The logic
pulses certain breaker trips, including manual open commands and some automatic transfer functions, and
latches these trips only until SV16T or SV08T deassert to assert the unlatch trip (ULTR) equation, see the
Main Breaker Overall Trip Logic and Tie Breaker Overall Trip Logic sections. The logic automatically
sets SV16DO and SV08DO timers slightly longer than the maximum allowed setting for the Breaker Trip
Failure Time to ensure continued assertion of Relay Word bit TRIP when SV15 times out. Overcurrent
trips remain latched until you press the {TARGET RESET} pushbutton or issue the DCS target reset
command, which should not occur before the Breaker Trip Failure Logic has had time to operate.
Figure 36 shows the close failure logic. Relay Word bit CF is the built-in close failure bit, which asserts for
one relay processing interval if the breaker does not open within Close Failure Delay (CFD) time after
Relay Word bit CLOSE asserts. When CF asserts, SV14 asserts and seals in. Press the {TARGET
RESET} pushbutton or issue the DCS target reset command to break the seal-in.

LDG0007-01
Figure 34 Main Breaker Trip Failure Logic
Figure 35 Tie-Breaker Trip Failure Logic
Figure 36 Main and Tie-Breaker Close Failure Logic

Failure of a breaker to close will at worst result in loss of load. Failure of a breaker to trip could result in
extended paralleling of sources, a serious condition considering the typical short-circuit rating basis for
metal-clad switchgear. Therefore, logic prevents extended paralleling should a breaker fail to trip on
command. This logic operates when the Source Paralleling feature is not on.
Scheme Error Checking Logic

The automatic transfer scheme includes error checking to detect conditions where the transfer enable and
automatic retransfer enable latches are set improperly. Such errors will assert SV07, which disables the
automatic transfer scheme and blocks initiation of a transfer. The setting for SV07PU provides a short time
delay to avoid asserting the block during normal enable/disable transitions. SV07 asserts whenever the
Transfer Enable latch (LT06) or Automatic Retransfer Enable latch (LT08) is set in one relay, but the
connected relay fails to assert the appropriate MIRRORED BIT to indicate that the connected relay’s latch is

LDG0007-01
also set. SV07 also asserts when LT06 or LT08 is not set in one relay, but the connected relay asserts the
appropriate MIRRORED BIT to indicate that the connected relay’s latch is set.
Figure 37 Main Breaker 1 Scheme Error Checking Logic
Figure 38 Tie Breaker Scheme Error Checking Logic
Select to Trip Logic

One of the main breakers is always selected to trip such that if both main breakers are closed and the tie
breaker closes manually, that main breaker will trip (see Figure 39). The main breaker is selected to trip
when latch bit LT11 within the main breaker relay is set. Setting of LT11 can occur in only one breaker at a
time and occurs when you press the {TRIP SEL} pushbutton (PB02), IN405 is asserted, or you pulse RB01
when Remote is enabled, and communications are working properly (SV03T). Setting of LT11 also occurs
if the breaker is closed (52A) and loses power (27P1T). Setting LT11 asserts TMB2A, which causes
resetting of LT11 in the other breaker. Resetting LT11 in one breaker can occur by setting LT11 in the
other breaker, ensuring that LT11 is always set in one and only one breaker. You can also reset LT11
through local (LB03) or remote (RB07) reset during testing.
LDG0007-01
Figure 39 Main Breaker Select to Trip Logic
Remote Control Enable/Disable Logic

The logic accompanying the Design Template allows latch bit LT03 to supervise DCS and hardwired
remote control. Set and reset LT03 through use of the {REMOTE} pushbutton (PB03) on the front of each
relay or set LT03 continuously by setting Remote Enable Setting = 3. You can reset LT03 through local
(LB03) or remote (RB07) reset during testing.

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LT03
3 Latch
MV02 EQ S Q LT03
SETTING R
3
PB03_PUL
LB03
LOCAL
RESET
RB07
REMOTE
RESET
4
MV02 EQ
SETTING
Figure 40 Remote Control Enable/Disable Logic
Scheme Alarm Logic

Programming for OUT103 in each relay causes it to close on several scheme and system trouble conditions
and allows its use for remote monitoring. Conditions are included in the default scheme Alarm Logic are
source undervoltage, breaker close and trip failure, extended loss of communications, software alarm,
hardware alarm, trip coil monitor, and dc power high and low. You can add more alarm conditions by
editing the OUT103 logic for each relay as necessary.
Figure 41 Breaker Alarm Logic

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Enable Instantaneous Overcurrent Elements
Use the Enable Instantaneous Elements (MV01) setpoint and logic within the Maximum Phase Overcurrent
and Residual Overcurrent Torque Control settings, 50P1TC and 50G1TC to enable the instantaneous
overcurrent elements. . Setting Enable Instantaneous Elements = 3 always enables the instantaneous
overcurrent elements. Setting Enable Instantaneous Elements = 2 allows you to enable the instantaneous
overcurrent elements by pressing the {INST} operator control pushbutton (PB01). Pressing the {INST}
operator control pushbutton a second time disables the elements.
Figure 42 Enable Instantaneous Elements

The corresponding top ENABLED LED (PB01A_LED) flashes to indicate the enabled state when you use the
{INST} pushbutton to enable the instantaneous elements. The ENABLED LED illuminates steadily to indicate
when enabling of the instantaneous elements results from MV01 = 3. The corresponding bottom TRIPPED
LED (PB01B_LED) illuminates for a trip of instantaneous elements 50P1T or 50G1T.
You can also reset LT01 through local (LB03) or remote (RB07) reset during testing.
Trip Coil Monitoring

To use the optional trip coil monitoring feature, you must wire the trip bus into IN101 as shown in
Figure 2. Setting Enable Trip Coil Monitoring = Y sets the Trip Coil Monitor Enable, SV18 = 1. Once the
trip coil monitor is enabled, the Trip Coil Monitor Alarm (SV24T) engages whenever the breaker is closed
(52A) and no voltage is on the trip bus (IN101).
Figure 43 Trip Coil Monitoring

LDG0007-01
Source Paralleling
The intent of the Source Paralleling feature is to allow the manual placement of the Main-Tie-Main system
in a tied condition with both mains closed. Setting Enable Source Paralleling (MV03) = 1 will never allow
Source Paralleling. With Enable Source Paralleling set to “2”, the {PARALLEL} operator control
pushbutton (PB02) on the tie breaker serves as the Source Paralleling Switch. Pressing the {PARALLEL}
operator control pushbutton will set LT11 and allow paralleling of sources. This will also illuminate the
corresponding top ENABLED LED (PB02A_LED). Pressing the {PARALLEL} operator control pushbutton a
second time disables the function. You can also reset the function through local (LB03) or remote (RB07)
reset during testing. Setting Enable Source Paralleling (MV03) = 3 will always allow Source Paralleling.
Figure 44 Source Paralleling Logic
“Select A Main” Logic

The “Select A Main” logic, SV25T, will display the message, “Select A Main” on the tie breaker LCD if you have
selected neither main breaker to trip, the automatic transfer is enabled, and communications are operating properly.

LDG0007-01
Figure 45 “Select A Main” Logic
“Communications OK” Logic

The “Communications OK” logic, SV03T, helps verify that either MIRRORED BITS communications is functioning
properly via ROKA and ROKB or that IEC 61850 GOOSE messaging is functioning properly by looking at virtual
bits for bad quality (VB001 and VB003), verifying proper receipt of the oscillator (VB002 and VB004) by the other
relay(s) (see Oscillator Logic below), and verifying that LINKFAIL is not true. You can use the output of SV03T to
enable multiple functions as shown in previous figures and use SV29T, should SV03T fail, to light the COMM ERROR
LED after 0.5 seconds.
Figure 46 Main Breaker Communications OK Logic
SV03
ROKA VarTmr
0.00 PU T SV03T
ROKB DO
0.00
VB001
MAIN 1
BAD QUALITY
VB003
MAIN 2 SV31
BAD QUALITY
VB002 VarTmr
MAIN 1 0.00 PU T
OSCILLATOR DO
0.10
SV32
VB004 VarTmr
MAIN 2 0.00 PU T
OSCILLATOR DO
0.10
LINKFAIL
Figure 47 Tie Breaker Communications OK Logic

LDG0007-01
Oscillator Logic
The Communications OK Logic in Figure 46 and Figure 47 contains Oscillator Logic for use in the main
and tie breakers, respectively. The changing state of the oscillator logic travels via IEC 61850 GOOSE
messaging to a watchdog timer to provide verification of relay communication over GOOSE.
Figure 48 Oscillator Logic
Flasher Logic
Figure 49 Flasher Logic

The flasher logic continuously toggles at half-second intervals in all three relays. Variable SV12 combines with
other elements to generate flashing LEDs.
LED Settings
Programming for the LEDs in each relay is as follows:
Table 82 Target LEDs

LED Label LED Name Setting Latched?
PHASE T01_LED 51AT OR 51BT OR 51CT OR 51P1T OR 51P2T Y
OVERCURRENT
GND/NEUTRAL T02_LED 51N1T OR 51G1T OR 51N2T OR 51G2T Y
OVERCURRENT
TRIP/CLOSE TIMER T03_LED (LT09 OR LT10) AND SV12T N
NOT AUTO READY T04_LED SV23T N
COMM ERROR T05_LED SV29T N
BKR FAIL T06_LED SV14T OR SV15T Y

LDG0007-01
Table 83 Main Breaker Relay Pushbutton LEDs
Main Breaker LED Label Tie Breaker LED Label LED Name Setting
(50P1TC OR 50G1TC) AND SV12T OR
(INST) ENABLED (INST) ENABLED PB01A_LED
MV01 = 3.00
(50P1T OR 50G1T) AND TRIP OR
(INST) TRIPPED (INST) TRIPPED PB01B_LED
PB01B_LED AND NOT TRGTR
(PARALLEL) LT11 OR NOT ( (RMB2A OR VB021)
BKR SELECTED PB02A_LED
ENABLED AND SV03) AND SV12 AND LT07
(NOT SV26T OR ULCL OR SV17 AND
NO MAN CLOSE NO MAN CLOSE PB02B_LED
IN402) AND NOT 52A
REMOTE REMOTE PB03A_LED LT03
TRANSFER TRANSFER PB04A_LED LT06
RETRANSFER RETRANSFER PB04B_LED LT08
Display Point Settings

Programming for the Display Points in each relay is as follows:
Table 84 Display Points

DP # Display Point Text Display Point Setting
DP01 RELAY IDENTIFIER RID,"{16}"
DP02 TERMINAL IDENTIFIER TID,"{16}"
DP03 VA VA_MAG, "VA = {5} V"
DP04 VS VS_MAG, "VS = {5} V"
DP05 IAV IAV, "I(AVE) = {5} A"
DP06 IG IG MAG,"IG = {5} A"
DP07 SELECT A MAIN SV25T,"","SELECT A MAIN",""
DP08 SOURCE UV LT16,"","SOURCE UV",""
DP09 BKR CLOSE FAIL SV14T,"","BKR CLOSE FAIL",""
DP10 BKR TRIP FAIL SV15T,"","BKR TRIP FAIL",""
DP11 BLOWN PT FUSE LOP ,"","BLOWN PT FUSE",""
DP12 TRIP COIL BAD SV24T,"","TRIP COIL BAD",""
DP13 DC VOLTS HI DCHI ,"","DC VOLTS HI",""
DP14 DC VOLTS LO DCLO,"","DC VOLTS LO",""
DP15 XFER SCHEME TRIP LT04,"","XFER SCHEME TRIP",""
DP16 EXTERNAL XFER BLOCK LT12,"","EXT XFER BLOCK",""
DP17 EXTERNAL XFER INIT LT13,"","EXT XFER INIT",""
DP18 TEST MODE SV05,"","TEST MODE",""

LDG0007-01
MIRRORED BITS Logic Settings
Table 85 MIRRORED BITS Settings for Main Breaker Relays
TMB Setting Function
TMB1A LT06 Transfer enabled

TMB2A LT11 Selected to trip
TMB3A 3P59 Source healthy
TMB4A 52A Main breaker closed
TMB5A SV02T Automatic transfer trip signal
TMB6A NOT TRIP AND NOT IN406 AND NOT LT12 No bus fault
TMB7A LT08 Retransfer enabled
TMB8A IN402 Main breaker racked in
Table 86 MIRRORED BITS Settings for Tie-Breaker Relay
TMB1A LT06 Transfer enabled

TMB2A RMB2B OR VB022 Main 2 breaker selected to trip
TMB3A (RMB3B OR VB032) AND (RMB4B OR VB042) Source 2 healthy and main 2 breaker closed and
AND (RMB8B OR VB082) AND IN402 AND main 2 breaker racked in and tie racked in and
SV03T communications okay
TMB4A 52A Tie breaker closed
TMB5A (RMB4B OR VB042) AND (RMB8B OR VB082) Main 2 breaker closed and main 2 breaker racked in
AND IN402 AND 52A AND NOT LT11 AND and tie breaker racked in and tie breaker closed and
SV03T source paralleling switch not closed and
communications okay
TMB6A NOT TRIP AND SV03T AND NOT SV24T Tie breaker not tripped, no fault, and
communications okay
TMB7A LT08 Retransfer enabled
TMB8A (RMB3B OR VB032) AND (RMB8B OR VB082) Source 2 healthy and main 2 breaker racked in and
AND IN402 AND 52A AND SV03T tie breaker racked in and tie breaker closed and
communications okay
TMB1B LT06 Transfer enabled
TMB2B RMB2A OR VB021 Main 1 selected to trip
TMB3B (RMB3A OR VB031) AND (RMB4A OR Source 1 healthy and main 1 breaker closed and
VB041) AND (RMB8A OR VB081) AND IN402 main 1 breaker racked in and tie racked in and
AND SV03T communications okay
TMB4B 52A Tie breaker closed
TMB5B (RMB4A OR VB041) AND (RMB8A OR Main 1 breaker closed and main 1 breaker racked in
VB081) AND IN402 AND 52A AND NOT LT11 and tie breaker racked in and tie breaker closed and
AND SV03T source paralleling switch not closed and
communications okay
TMB6B NOT TRIP AND SV03T AND NOT SV24T Tie breaker not tripped, no fault, and
communications okay

LDG0007-01
TMB7B LT08 Retransfer enabled
TMB8B (RMB3A OR VB031) AND (RMB8A OR Source 1 healthy and main 1 breaker racked in and
VB081) AND 52A AND IN402 AND SV03T tie breaker racked in and tie breaker closed and
communications okay
GOOSE Messaging Virtual Bit Assignments

Table 87 GOOSE Messaging Virtual Bit Assignments in Main Breaker 1 Relay
Virtual Bit From Relay Assigned Relay Function

Word Bit
VB001 Tie Breaker Message Bad Quality

VB002 Tie Breaker SV30T GOOSE Watchdog Timer
VB003 Tie Breaker SV15T Tie Breaker failed to trip
VB011 Tie Breaker TMB1A Transfer enabled
VB021 Tie Breaker TMB2A Main 2 breaker selected to trip
VB031 Tie Breaker TMB3A Source 2 healthy and main 2 breaker closed and main 2
breaker racked in and tie racked in and communications
okay
VB041 Tie Breaker TMB4A Tie breaker closed
VB051 Tie Breaker TMB5A Main 2 breaker closed and main 2 breaker racked in and
tie breaker racked in and tie breaker closed and source
paralleling switch not closed and communications okay
VB061 Tie Breaker TMB6A Tie breaker not tripped and communications okay
VB071 Tie Breaker TMB7A Retransfer enabled
VB081 Tie Breaker TMB8A Source 2 healthy and main 2 breaker racked in and tie
breaker racked in and tie breaker closed and
communications okay
Table 88 GOOSE Messaging Virtual Bit Assignments in Main Breaker 2 Relay

Word Bit
VB001 Tie Breaker Message Bad Quality

VB002 Tie Breaker SV30T GOOSE watchdog timer
VB003 Tie Breaker SV15T Tie breaker failed to trip
VB011 Tie Breaker TMB1B Transfer enabled
VB021 Tie Breaker TMB2B Main 1 selected to trip
VB031 Tie Breaker TMB3B Source 1 healthy and main 1 breaker closed and main 1
breaker racked in and tie racked in and communications
okay
VB041 Tie Breaker TMB4B Tie breaker closed

LDG0007-01
Word Bit
VB051 Tie Breaker TMB5B Main 1 breaker closed and main 1 breaker racked in and
tie breaker racked in and tie breaker closed and source
paralleling switch not closed and communications okay
VB061 Tie Breaker TMB6B Tie breaker not tripped and communications okay
VB071 Tie Breaker TMB7B Retransfer enabled
VB081 Tie Breaker TMB8B Source 1 healthy and main 1 breaker racked in and tie
breaker racked in and tie breaker closed and
communications okay
Table 89 GOOSE Messaging Virtual Bit Assignments in Tie-Breaker Relay

Word Bit
VB001 Main Breaker 1 Message Bad Quality

VB002 Main Breaker 1 SV30T GOOSE watchdog timer
VB003 Main Breaker 2 Message Bad Quality
VB004 Main Breaker 2 SV30T GOOSE watchdog timer
VB011 Main Breaker 1 TMB1A Transfer enabled
VB021 Main Breaker 1 TMB2A Selected to trip
VB031 Main Breaker 1 TMB3A Source healthy
VB041 Main Breaker 1 TMB4A Main breaker closed
VB051 Main Breaker 1 TMB5A Automatic transfer trip signal
VB061 Main Breaker 1 TMB6A No bus fault
VB071 Main Breaker 1 TMB7A Retransfer enabled
VB081 Main Breaker 1 TMB8A Main breaker racked in
VB012 Main Breaker 2 TMB1A Transfer enabled
VB022 Main Breaker 2 TMB2A Selected to trip
VB032 Main Breaker 2 TMB3A Source healthy
VB042 Main Breaker 2 TMB4A Main breaker closed
VB052 Main Breaker 2 TMB5A Automatic transfer trip signal
VB062 Main Breaker 2 TMB6A No bus rault
VB072 Main Breaker 2 TMB7A Retransfer enabled
VB082 Main Breaker 2 TMB8A Main breaker racked in
Relay Settings
The following is a list of the relay settings the SEL-751A will contain if you use the default Design
Template (no change to the design settings) to send the settings to the control. Modifying design settings
will result in changes to one or more of the relay settings. These settings are for Setting Version Number 9.

LDG0007-01
Common Settings
Global
General Settings
PHROT := ABC FNOM := 60 DATE_F := MDY
FAULT := 50G1P OR 50N1P OR 51P1P OR 51QP OR 50Q1P OR TRIP
Event Messenger
EMP := N
Group Selection
TGR := 0
SS1 := 0
SS2 := 0
SS3 := 0
PMU Settings
EPMU := N
Time and Date Management Settings

IRIGC := NONE UTC_OFF := 0.00 DST_BEGM := OFF
Bkr Failure Set

52ABF := N BFD := 0.50
BFI := R_TRIG TRIP
Station DC Battery Monitor Settings

DCLOP := OFF DCHIP := OFF
Base Input Debounce Settings

IN101D := AC IN102D := AC
Slot D Input Debounce Settings

IN401D := AC IN402D := AC IN403D := AC
IN404D := AC IN405D := AC IN406D := AC
IN407D := AC IN408D := AC
Breaker Monitor Settings

EBMON := N
Data Reset
RSTTRGT := 0
RSTENRGY := 0
RSTMXMN := 0
Access Control
DSABLSET := 0
BLKMBSET := NONE
Time Synchronization Source

TIME_SRC := IRIG1
Front Panel
General Settings
EDP := 30 ELB := 3 FP_TO := 15
FP_CONT := 5 FP_AUTO := OVERRIDE RSTLED := Y
Target LED Set

T01LEDL := Y
T01_LED := 51AT OR 51BT OR 51CT OR 51P1T OR 51P2T # PHASE OVERCURRENT
T02LEDL := Y
T02_LED := 51N1T OR 51G1T OR 51N2T OR 51G2T # GND/NEUTRAL OVERCURRENT
T03LEDL := N
T03_LED := ( LT09 OR LT10 ) AND SV12T # TRIP/CLOSE TIMER
T04LEDL := N
T04_LED := SV23T # NOT AUTO READY
T05LEDL := N
T05_LED := SV29T # COMM ERROR
T06LEDL := Y

LDG0007-01
T06_LED := SV14T OR SV15T # BKR FAIL
PB1A_LED := ( 50P1TC OR 50G1TC ) AND SV12T OR MV01 = 3.00 # INSTANTANEOUS
ENABLED
PB1B_LED := ( 50P1T OR 50G1T ) AND TRIP OR PB1B_LED AND NOT TRGTR #
INSTANTANEOUS TRIP
PB2A_LED := LT11 OR NOT ( ( RMB2A OR VB021 ) AND SV03T ) AND SV12T AND LT07 #
SELECT TO TRIP/PARALLEL ENABLED
PB2B_LED := ( NOT SV26T OR ULCL OR SV17T AND IN402 ) AND NOT 52A # NO MANUAL
CLOSE
PB3A_LED := LT03 # REMOTE ENABLE
PB3B_LED := 0
PB4A_LED := LT06 # TRANSFER ENABLE
PB4B_LED := LT08 # RETRANSFER ENABLE
Display Point Settings (maximum 60 characters):

(Boolean): Relay Word Bit Name, "Alias", "Set String", "Clear String"
(Analog) : Analog Quantity Name, "User Text and Formatting"
DP01 := RID,"{16}"
DP02 := TID,"{16}"
DP03 := VA_MAG, "VA = {5} V"
DP04 := VS_MAG, "VS = {5} V"
DP05 := IAV, "I(AVE) = {5} A"
DP06 := IG_MAG, "IG = {5} A"
DP07 := SV25T,"","SELECT A MAIN",""
DP08 := LT16,"","SOURCE UV",""
DP09 := SV14T,"","BKR CLOSE FAIL",""
DP10 := SV15T,"","BKR TRIP FAIL",""
DP11 := LOP,"","BLOWN PT FUSE",""
DP12 := SV24T,"","TRIP COIL BAD",""
DP13 := DCHI ,"","DC VOLTS HI",""
DP14 := DCLO,"","DC VOLTS LO",""
DP15 := LT04,"","XFER SCHEME TRIP",""
DP16 := LT12,"","EXT XFER BLOCK",""
DP17 := LT13,"","EXT XFER INIT",""
DP18 := SV05,"","TEST MODE",""
DP19 :=
DP20 :=
DP21 :=
DP22 :=
DP23 :=
DP24 :=
DP25 :=
DP26 :=
DP27 :=
DP28 :=
DP29 :=
DP30 :=
Local Bits Labels:

NLB01 := TEST
CLB01 := ENABLE SLB01 := PLB01 := ENABLE
NLB02 := TEST
CLB02 := DISABLE SLB02 := PLB02 := DISABLE
NLB03 := LATCH
CLB03 := RESET SLB03 := PLB03 := RESET
Report Settings
SER Chatter Criteria

ESERDEL := Y SRDLCNT := 5 SRDLTIM := 1.0
SER Trigger Lists

SERn = Up to 24 Relay-Word elements separated by spaces or commas.
Use NA to disable setting.
SER1 := IN101 IN102 51P1T 51G1T 51P1P 51G1P 50P1T 50G1T 50N1T 51N1T PB01
PB02 PB03 PB04 SALARM ER OUT101 OUT102 OUT103
SER2 := CLOSE 52A CC IN401 IN402 IN403 IN404 IN405 IN406 IN407 IN408 CF
PB1A_LED PB1B_LED PB2A_LED PB2B_LED PB3A_LED PB4A_LED PB4B_LED RB01
RB02 RB03 RB04 TRIP
SER3 := T06_LED T05_LED T04_LED T03_LED T02_LED T01_LED SV09T SV13T SV04T
SV10T SV13T SV14T SV15T SV07T SV24T 27S1 27P1 27P2 3P59
SER4 := NA

LDG0007-01
Relay-Word Bit Aliases
ALIASn= 'RW Bit'(space)'Alias'(space)'Asserted Text'(space)'Deasserted Text'.
Alias, Asserted, and Deasserted text strings can be up to 15 characters long.
Use NA to disable setting.
EALIAS := N
Event Report Set

ER := R_TRIG 51P1P OR R_TRIG 51G1P OR R_TRIG 50P1P OR R_TRIG 50G1P OR
R_TRIG 51N1P OR R_TRIG CF OR R_TRIG SV08T
LER := 15 PRE := 5
Load Profile Set

LDLIST := NA
LDAR := 15
Main Breaker 1 Settings
Group 1
Relay Settings
ID Settings
RID := MAIN BREAKER 1
TID := SWITCHGEAR A
Config Settings
CTR := 600 CTRN := 120 PTR := 35.00
PTRS := 35.00 DELTA_Y := WYE VNOM := 118.86
SINGLEV := N
Max Ph Overcurr
50P1P := 0.50 50P1D := 0.00
50P1TC := LT01 OR MV01 = 3.00
50P2P := 6.00 50P2D := 0.00
50P2TC := 1
50P3P := 0.50 50P3D := 0.00
50P3TC := 1
50P4P := OFF
Neutral Overcurr
50N1P := OFF 50N2P := OFF 50N3P := OFF
50N4P := OFF
Residual Overcurr
50G1P := 0.50 50G1D := 0.00
50G1TC := LT01 OR MV01 = 3.00
50G2P := 0.50 50G2D := 0.50
50G2TC := 1
50G3P := 0.50 50G3D := 0.50
50G3TC := 1
50G4P := OFF
Neg Seq Overcurr

50Q1P := OFF 50Q2P := OFF 50Q3P := OFF
50Q4P := OFF
Phase TOC
51AP := 6.00 51AC := U3 51ATD := 3.00
51ARS := N 51ACT := 0.00 51AMR := 0.00
51ATC := 1
51BP := 6.00 51BC := U3 51BTD := 3.00
51BRS := N 51BCT := 0.00 51BMR := 0.00
51BTC := 1
51CP := 6.00 51CC := U3 51CTD := 3.00
51CRS := N 51CCT := 0.00 51CMR := 0.00
51CTC := 1
Maximum Ph TOC
51P1P := 6.00 51P1C := U3 51P1TD := 3.00

LDG0007-01
51P1RS := N 51P1CT := 0.00 51P1MR := 0.00
51P1TC := 1
51P2P := OFF
Negative Seq TOC

51QP := OFF
Neutral TOC
51N1P := OFF 51N2P := OFF
Residual TOC
51G1P := 1.50 51G1C := U3 51G1TD := 1.50
51G1RS := N 51G1CT := 0.00 51G1MR := 0.00
51G1TC := 1
51G2P := OFF
RTD Settings
E49RTD := NONE
Undervoltage Set
27P1P := 0.80 27P1D := 2.0 27P2P := 0.85
27P2D := 5.0 27S1P := 35.00 27S1D := 0.5
27S2P := OFF
Overvoltage Set
59P1P := 0.90 59P1D := 0.5 59P2P := OFF
59S1P := OFF 59S2P := OFF
SyncCheck Set
E25 := Y 25VLO := 54.90 25VHI := 75.49
25RCF := 1.00 25SF := 0.05 25ANG1 := 10
25ANG2 := 40 SYNCPH := 0 TCLOSD := OFF
BSYNCH := 52A
Power Factor Set

55LGTP := OFF 55LDTP := OFF 55LGAP := OFF
55LDAP := OFF
Frequency Set
81D1TP := OFF 81D2TP := OFF 81D3TP := OFF
Trip/Close Logic
TDURD := 0.5 CFD := 2.0
TR := 51P1T OR 51G1T OR 50P1T OR 50G1T OR 51N1T OR 50N1T OR VB003
REMTRIP := 0
ULTRIP := 0
52A := IN401
CL := SV26T AND ( LT03 AND ( CC OR R_TRIG IN408 ) OR SV27T AND NOT ( SV17
AND IN402 ) ) OR R_TRIG SV04T
ULCL := TRIP OR LT12 OR LT13 OR NOT ( 3P59 AND 27S1 OR 25A1 )
Group 1
Logic Settings
SELogic Enables
ELAT := 16 ESV := 32 ESC := N
EMV := 2
Latch Bits Eqns

SET01 := PB01_PUL AND MV01 = 2.00 AND NOT LT01 # ENABLE INSTANTANEOUS
ELEMENTS DURING MAINTENANCE
RST01 := PB01_PUL AND LT01 OR LB03 OR RB07
SET02 := 0
RST02 := 1
SET03 := MV02 = 3.00 OR NOT LT03 AND PB03_PUL # REMOTE ENABLE
RST03 := LT03 AND PB03_PUL OR LB03 OR RB07 OR MV02 = 1.00
SET04 := SV08T # TRANSFER SCHEME TRIP LATCH
RST04 := TRGTR OR 52A OR LB03 OR RB07
SET05 := 0
RST05 := 1
SET06 := R_TRIG RMB1A OR R_TRIG VB011 # TRANSFER ENABLE
RST06 := F_TRIG RMB1A OR F_TRIG VB011 OR R_TRIG SV23T
SET07 := 1
RST07 := 0
LDG0007-01
SET08 := R_TRIG RMB7A OR R_TRIG VB071 # RETRANSFER ENABLE
RST08 := F_TRIG RMB7A OR F_TRIG VB071 OR NOT LT06 OR IN406 OR LB03 OR RB07
SET09 := SV26T AND NOT LT03 AND R_TRIG IN404 AND NOT ULCL # CLOSE PUSHBUTTON
DELAY LATCH
RST09 := SV27T
SET10 := R_TRIG IN403 # TRIP PUSHBUTTON DELAY LATCH
RST10 := SV28T
SET11 := NOT LT11 AND ( NOT LT03 AND PB02_PUL OR ( R_TRIG RB01 OR R_TRIG
IN405 ) AND LT03 OR R_TRIG 27P1T AND 52A ) AND ( RMB6A OR VB061 )
AND SV03T # SELECT TO TRIP
RST11 := R_TRIG RMB2A OR R_TRIG VB021 OR LB03 OR RB07
SET12 := IN406 # EXTERNAL BLOCK TRANSFER LATCH
RST12 := NOT SV20T AND F_TRIG IN406 OR TRGTR
SET13 := IN407 # EXTERNAL INITIATE TRANSFER LATCH
SET14 := 0
RST14 := 1
SET15 := 0
RST15 := 1
SET16 := 27P2T # USED IN DISPLAY LOGIC
RST16 := NOT 27P2T
SV/Timers Set
SV01PU := 0.00 SV01DO := 0.23
SV01 := SV01 AND NOT 52A AND NOT SV14T OR R_TRIG CLOSE # BREAKER JUST
CLOSED TIMER
SV02PU := 0.00 SV02DO := 0.12
SV02 := NOT ( IN406 OR SV07T ) AND LT06 AND ( SV06T OR IN407 ) AND NOT (
RMB4A OR VB041 ) AND 52A OR NOT 52A AND LT06 AND NOT SV04T AND
SV02T # TRIP FOR AUTOMATIC TRANSFER
SV03PU := 0.00 SV03DO := 0.00
SV03 := ROKA OR NOT VB001 AND SV31T AND NOT LINKFAIL # COMMUNICATION
FAILURE
SV04PU := 10.00 SV04DO := 0.00
SV04 := 3P59 AND LT06 AND ( RMB4A OR VB041 ) AND ( 25A1 OR 27S1 ) AND (
RMB6A OR VB061 ) AND ( SV02T OR SV13T ) AND ( NOT LT08 AND 27S1 OR
LT08 ) AND SV03T # AUTOMATIC RETRANSFER CLOSE TIMER
SV05PU := 3000.00 SV05DO := 0.00
SV05 := ( LB01 OR SV05 ) AND NOT ( LB02 OR SV05T ) # TEST MODE RESET TIMER
SV06PU := 2.00 SV06DO := 0.00
SV06 := 27P1T AND ( RMB3A OR VB031 ) AND NOT 50P2P AND NOT 50G2P AND SV03T
# AUTOMATIC TRANSFER INITIATE
SV07PU := 0.60 SV07DO := 0.00
SV07 := NOT ( RMB1A OR VB011 ) AND LT06 OR ( RMB1A OR VB011 ) AND NOT LT06
OR NOT ( RMB7A OR VB071 ) AND LT08 OR ( RMB7A OR VB071 ) AND NOT
LT08 # SCHEME ERROR CHECKING
SV08PU := 0.00 SV08DO := 0.50
SV08 := ( R_TRIG SV02T OR R_TRIG SV09T OR R_TRIG SV13T ) AND IN402 #
TRANSFER SCHEME TRIP
SV09PU := 0.10 SV09DO := 0.00
SV09 := LT11 AND NOT SV01T AND SV03T AND 52A AND ( ( R_TRIG RMB4A OR R_TRIG
VB041 ) AND ( RMB5A OR VB051 ) OR SV11T ) # MANUAL TRANSFER TRIP
SV10PU := 0.00 SV10DO := 0.00
SV10 := NA
SV11PU := 0.20 SV11DO := 0.00
SV11 := ( RMB5A OR VB051 ) AND 52A # MAIN BREAKER TRIP FOR TIE FAILURE TO
TRIP
SV12PU := 0.50 SV12DO := 0.50
SV12 := NOT SV12T # FLASHER
SV13PU := 9.80 SV13DO := 0.00
SV13 := SV03T AND NOT SV01T AND NOT TMB5A AND 27P1 AND ( RMB8A OR VB081 )
AND NOT 50P2P AND NOT 50G2P AND 52A OR NOT 52A AND LT06 AND NOT
SV04T AND SV13T # LIVE SOURCE SEEKING LOGIC
SV14PU := 0.00 SV14DO := 0.00
SV14 := ( SV14 OR CF ) AND NOT TRGTR # BREAKER CLOSE FAILURE
SV15PU := 0.10 SV15DO := 0.00
SV15 := ( OUT101 OR IN407 OR IN406 OR LT12 OR LT13 ) AND ( 52A OR 50P3T OR
50G3T ) OR NOT TRGTR AND SV15T # BREAKER TRIP FAILURE
SV16PU := 0.00 SV16DO := 0.50
SV16 := R_TRIG SV28T OR R_TRIG OC # BREAKER MANUAL TRIP INITIATED
SV17PU := 0.00 SV17DO := 0.00
SV17 := 0 # BLOCK MANUAL CLOSE WITH BKR RACKED IN
SV18PU := 0.00 SV18DO := 0.00
SV18 := 1 # TRIP COIL MONITOR ENABLE
SV19PU := 0.00 SV19DO := 0.00
LDG0007-01
SV19 := NA
SV20PU := 0.00 SV20DO := 1.00
SV20 := R_TRIG IN406 # EXTERNAL BLOCK TRANSFER DISPLAY POINT
SV21PU := 0.00 SV21DO := 1.00
SV21 := R_TRIG IN407 # EXTERNAL INITIATE TRANSFER DISPLAY POINT
SV22PU := 0.00 SV22DO := 0.00
SV22 := NA
SV23PU := 0.00 SV23DO := 0.00
SV23 := SV15T OR SV14T OR TRIP OR NOT IN402 OR SV07T OR IN406 OR R_TRIG 52A
AND NOT ( RMB4A OR VB041 ) OR LB03 OR RB07 # AUTO READY
SV24PU := 0.50 SV24DO := 0.00
SV24 := SV18 AND 52A AND NOT IN101 # TRIP COIL MONITOR ALARM
SV25PU := 0.00 SV25DO := 0.00
SV25 := NA
SV26PU := 0.00 SV26DO := 0.25
SV26 := ( RMB6A OR VB061 ) AND ( 3P59 AND 27S1 OR 25A1 ) AND SV03T AND NOT
( LT12 OR LT13 ) # MANUAL CLOSE PERMISSIVE
SV27PU := 0.00 SV27DO := 0.00
SV27 := LT09 # CLOSE PUSHBUTTON DELAY
SV28PU := 0.00 SV28DO := 0.00
SV28 := LT10 # TRIP PUSHBUTTON DELAY
SV29PU := 0.50 SV29DO := 0.00
SV29 := NOT SV03T # COMMUNICATIONS OK
SV30PU := 0.02 SV30DO := 0.02
SV30 := NOT SV30T # GOOSE MESSAGE WATCHDOG OSCILLATOR
SV31PU := 0.00 SV31DO := 0.10
SV31 := R_TRIG VB002 OR F_TRIG VB002
SV32PU := 0.00 SV32DO := 0.00
SV32 := NA
Math Variables
MV01 := 2.00 # ENABLE INSTANTANEOUS ELEMENTS
MV02 := 2.00 # ENABLE REMOTE CONTROL
Base Output Set

OUT101FS := N
OUT101 := TRIP OR SV08T OR SV16T
OUT102FS := N
OUT102 := CLOSE
OUT103FS := N
OUT103 := HALARM OR SALARM OR 27P2T OR SV14T OR SV15T OR DCHI OR DCLO OR LOP
OR SV24T OR SV29T
Mirrored Bits Transmit SELogic Equations

TMB1A := LT06 # TRANSFER ENABLED
TMB2A := LT11 # SELECT TO TRIP
TMB3A := 3P59 # SOURCE HEALTHY
TMB4A := 52A # BREAKER CLOSED
TMB5A := SV02T # AUTOMATIC TRANSFER INITIATED
TMB6A := NOT TRIP AND NOT IN406 AND NOT LT12 # NO FAULT
TMB7A := LT08 # RETRANSFER ENABLED
TMB8A := IN402 # BREAKER RACKED IN
TMB1B := NA
TMB2B := NA
TMB3B := NA
TMB4B := NA
TMB5B := NA
TMB6B := NA
TMB7B := NA
TMB8B := NA
Port 1
Port 1 Settings
IPADDR := 192.168.1.11
SUBNETM := 255.255.255.0
DEFRTR := 192.168.1.1
ETCPKA := Y KAIDLE := 10 KAINTV := 1
KACNT := 6 FASTOP := N NETMODE := SWITCHED
NETPORT := A NETASPD := AUTO NETBSPD := AUTO
TPORT := 23 TIDLE := 30
FTPUSER := FTPUSER
E61850 := N EMOD := 0

LDG0007-01
DNP Protocol Settings
EDNP := 0
SNTP Protocol Settings

ESNTP := OFF
Port 3
Protocol Select
Protocol Select
PROTO := MBA
Comm Settings
SPEED := 9600

TXID := 1 RXID := 2 RBADPU := 10
CBADPU := 1000 RXDFLT := XXXXXXXX RMB1PU := 1
RMB1DO := 1 RMB2PU := 1 RMB2DO := 1
RMB3PU := 1 RMB3DO := 1 RMB4PU := 1
Main Breaker 2 Settings
Group 2
Relay Settings
ID Settings
RID := MAIN BREAKER 2
TID := SWITCHGEAR A
Config Settings
CTR := 600 CTRN := 120 PTR := 35.00
SINGLEV := N
Max Ph Overcurr
50P1P := 0.50 50P1D := 0.00
50P1TC := LT01 OR MV01 = 3.00
50P2P := 6.00 50P2D := 0.00
50P2TC := 1
50P3P := 0.50 50P3D := 0.00
50P3TC := 1
50P4P := OFF
Neutral Overcurr
50N4P := OFF
Residual Overcurr
50G1P := 0.50 50G1D := 0.00
50G1TC := LT01 OR MV01 = 3.00
50G2P := 0.50 50G2D := 0.50
50G2TC := 1
50G3P := 0.50 50G3D := 0.50
50G3TC := 1
50G4P := OFF
Neg Seq Overcurr

50Q4P := OFF
Phase TOC
51AP := 6.00 51AC := U3 51ATD := 3.00

LDG0007-01
51ARS := N 51ACT := 0.00 51AMR := 0.00
51ATC := 1
51BP := 6.00 51BC := U3 51BTD := 3.00
51BRS := N 51BCT := 0.00 51BMR := 0.00
51BTC := 1
51CP := 6.00 51CC := U3 51CTD := 3.00
51CRS := N 51CCT := 0.00 51CMR := 0.00
51CTC := 1
Maximum Ph TOC
51P1P := 6.00 51P1C := U3 51P1TD := 3.00
51P1RS := N 51P1CT := 0.00 51P1MR := 0.00
51P1TC := 1
51P2P := OFF
Negative Seq TOC

51QP := OFF
Neutral TOC
Residual TOC
51G1P := 1.50 51G1C := U3 51G1TD := 2.00
51G1RS := N 51G1CT := 0.00 51G1MR := 0.00
51G1TC := 1
51G2P := OFF
RTD Settings
E49RTD := NONE
Undervoltage Set
27P1P := 0.80 27P1D := 2.0 27P2P := 0.85
27P2D := 5.0 27S1P := 35.00 27S1D := 0.5
27S2P := OFF
Overvoltage Set
59P1P := 0.90 59P1D := 0.5 59P2P := OFF
59S1P := OFF 59S2P := OFF
SyncCheck Set
E25 := Y 25VLO := 54.90 25VHI := 75.49
25RCF := 1.00 25SF := 0.05 25ANG1 := 10
25ANG2 := 40 SYNCPH := 0 TCLOSD := OFF
BSYNCH := 52A
Power Factor Set

55LDAP := OFF
Frequency Set
Trip/Close Logic
TDURD := 0.5 CFD := 2.0
TR := 51P1T OR 51G1T OR 50P1T OR 50G1T OR 51N1T OR 50N1T OR VB003
REMTRIP := 0
ULTRIP := 0
52A := IN401
CL := SV26T AND ( LT03 AND ( CC OR R_TRIG IN408 ) OR SV27T AND NOT ( SV17
AND IN402 ) ) OR R_TRIG SV04T
ULCL := TRIP OR LT12 OR LT13 OR NOT ( 3P59 AND 27S1 OR 25A1 )
Group 2
Logic Settings
SELogic Enables
ELAT := 16 ESV := 32 ESC := N
EMV := 2
Latch Bits Eqns

LDG0007-01
SET02 := 0
RST02 := 1
SET05 := 0
RST05 := 1
SET06 := R_TRIG RMB1A OR R_TRIG VB011 # TRANSFER ENABLE
RST06 := F_TRIG RMB1A OR F_TRIG VB011 OR R_TRIG SV23T
SET07 := 1
RST07 := 0
SET08 := R_TRIG RMB7A OR R_TRIG VB071 # RETRANSFER ENABLE
RST08 := F_TRIG RMB7A OR F_TRIG VB071 OR NOT LT06 OR IN406 OR LB03 OR RB07
SET09 := SV26T AND NOT LT03 AND R_TRIG IN404 AND NOT ULCL # CLOSE PUSHBUTTON
DELAY LATCH
RST09 := SV27T
RST10 := SV28T
SET11 := NOT LT11 AND ( NOT LT03 AND PB02_PUL OR ( R_TRIG RB01 OR R_TRIG
IN405 ) AND LT03 OR R_TRIG 27P1T AND 52A ) AND ( RMB6A OR VB061 )
AND SV03T # SELECT TO TRIP
RST11 := R_TRIG RMB2A OR R_TRIG VB021 OR LB03 OR RB07
SET12 := IN406 # EXTERNAL BLOCK TRANSFER LATCH
SET13 := IN407 # EXTERNAL INITIATE TRANSFER LATCH
SET14 := 0
RST14 := 1
SET15 := 0
RST15 := 1
SET16 := 27P2T # USED IN DISPLAY LOGIC
RST16 := NOT 27P2T
SV/Timers Set
SV01PU := 0.00 SV01DO := 0.23
CLOSED TIMER
SV02PU := 0.00 SV02DO := 0.12
SV02 := NOT ( IN406 OR SV07T ) AND LT06 AND ( SV06T OR IN407 ) AND NOT (
RMB4A OR VB041 ) AND 52A OR NOT 52A AND LT06 AND NOT SV04T AND
SV02T # TRIP FOR AUTOMATIC TRANSFER
SV03PU := 0.00 SV03DO := 0.00
SV03 := ROKA OR NOT VB001 AND SV31T AND NOT LINKFAIL # COMMUNICATION
FAILURE
SV04PU := 10.00 SV04DO := 0.00
SV04 := 3P59 AND LT06 AND ( RMB4A OR VB041 ) AND ( 25A1 OR 27S1 ) AND (
RMB6A OR VB061 ) AND ( SV02T OR SV13T ) AND ( NOT LT08 AND 27S1 OR
LT08 ) AND SV03T # AUTOMATIC RETRANSFER CLOSE TIMER
SV05PU := 3000.00 SV05DO := 0.00
SV06PU := 2.00 SV06DO := 0.00
SV06 := 27P1T AND ( RMB3A OR VB031 ) AND NOT 50P2P AND NOT 50G2P AND SV03T
# AUTOMATIC TRANSFER INITIATE
SV07PU := 0.60 SV07DO := 0.00
SV07 := NOT ( RMB1A OR VB011 ) AND LT06 OR ( RMB1A OR VB011 ) AND NOT LT06
OR NOT ( RMB7A OR VB071 ) AND LT08 OR ( RMB7A OR VB071 ) AND NOT
LT08 # SCHEME ERROR CHECKING
SV08PU := 0.00 SV08DO := 0.50
SV08 := ( R_TRIG SV02T OR R_TRIG SV09T OR R_TRIG SV13T ) AND IN402 #
TRANSFER SCHEME TRIP
SV09PU := 0.10 SV09DO := 0.00
SV09 := LT11 AND NOT SV01T AND SV03T AND 52A AND ( ( R_TRIG RMB4A OR R_TRIG
VB041 ) AND ( RMB5A OR VB051 ) OR SV11T ) # MANUAL TRANSFER TRIP
SV10PU := 0.00 SV10DO := 0.00
SV10 := NA
SV11PU := 0.20 SV11DO := 0.00
SV11 := ( RMB5A OR VB051 ) AND 52A # MAIN BREAKER TRIP FOR TIE FAILURE TO
TRIP
SV12PU := 0.50 SV12DO := 0.50
SV13PU := 9.80 SV13DO := 0.00
SV13 := SV03T AND NOT SV01T AND NOT TMB5A AND 27P1 AND ( RMB8A OR VB081 )
AND NOT 50P2P AND NOT 50G2P AND 52A OR NOT 52A AND LT06 AND NOT
SV04T AND SV13T # LIVE SOURCE SEEKING LOGIC
LDG0007-01
SV14PU := 0.00 SV14DO := 0.00
SV14 := ( SV14 OR CF ) AND NOT TRGTR # BREAKER CLOSE FAILURE
SV15PU := 0.10 SV15DO := 0.00
SV15 := ( OUT101 OR IN407 OR IN406 OR LT12 OR LT13 ) AND ( 52A OR 50P3T OR
50G3T ) OR NOT TRGTR AND SV15T # BREAKER TRIP FAILURE
SV16PU := 0.00 SV16DO := 0.50
SV17PU := 0.00 SV17DO := 0.00
SV18PU := 0.00 SV18DO := 0.00
SV19PU := 0.00 SV19DO := 0.00
SV19 := NA
SV20PU := 0.00 SV20DO := 1.00
SV20 := R_TRIG IN406 # EXTERNAL BLOCK TRANSFER DISPLAY POINT
SV21PU := 0.00 SV21DO := 1.00
SV21 := R_TRIG IN407 # EXTERNAL INITIATE TRANSFER DISPLAY POINT
SV22PU := 0.00 SV22DO := 0.00
SV22 := NA
SV23PU := 0.00 SV23DO := 0.00
SV23 := SV15T OR SV14T OR TRIP OR NOT IN402 OR SV07T OR IN406 OR R_TRIG 52A
AND NOT ( RMB4A OR VB041 ) OR LB03 OR RB07 # AUTO READY
SV24PU := 0.50 SV24DO := 0.00
SV25PU := 0.00 SV25DO := 0.00
SV25 := NA
SV26PU := 0.00 SV26DO := 0.25
SV26 := ( RMB6A OR VB061 ) AND ( 3P59 AND 27S1 OR 25A1 ) AND SV03T AND NOT
( LT12 OR LT13 ) # MANUAL CLOSE PERMISSIVE
SV27PU := 0.00 SV27DO := 0.00
SV28PU := 0.00 SV28DO := 0.00
SV29PU := 0.50 SV29DO := 0.00
SV30PU := 0.02 SV30DO := 0.02
SV31PU := 0.00 SV31DO := 0.10
SV31 := R_TRIG VB002 OR F_TRIG VB002
SV32PU := 0.00 SV32DO := 0.00
SV32 := NA
Math Variables
Base Output Set

OUT101FS := N
OUT102FS := N
OUT102 := CLOSE
OUT103FS := N
OUT103 := HALARM OR SALARM OR 27P2T OR SV14T OR SV15T OR DCHI OR DCLO OR LOP
OR SV24T OR SV29T

TMB2A := LT11 # SELECT TO TRIP
TMB3A := 3P59 # SOURCE HEALTHY
TMB4A := 52A # BREAKER CLOSED
TMB5A := SV02T # AUTOMATIC TRANSFER INITIATED
TMB6A := NOT TRIP AND NOT IN406 AND NOT LT12 # NO FAULT
TMB8A := IN402 # BREAKER RACKED IN
TMB1B := NA
TMB2B := NA
TMB3B := NA
TMB4B := NA
TMB5B := NA
TMB6B := NA
TMB7B := NA
TMB8B := NA

LDG0007-01
Port 1
Port 1 Settings
IPADDR := 192.168.1.12
SUBNETM := 255.255.255.0
DEFRTR := 192.168.1.1
FTPUSER := FTPUSER
E61850 := N EMOD := 0

EDNP := 0

ESNTP := OFF
Port 3
Protocol Select
PROTO := MBA
Comm Settings
SPEED := 9600

Tie Breaker Settings
Group 3
Relay Settings
ID Settings
RID := TIE BREAKER
TID := SWITCHGEAR A
Config Settings
CTR := 600 CTRN := 120 PTR := 35.00
SINGLEV := Y
Max Ph Overcurr
50P1P := 0.50 50P1D := 0.00
50P1TC := LT01 OR MV01 = 3.00
50P2P := OFF 50P3P := 0.50 50P3D := 0.00
50P3TC := 1
50P4P := OFF
Neutral Overcurr
50N4P := OFF
Residual Overcurr
50G1P := 0.50 50G1D := 0.00
50G1TC := LT01 OR MV01 = 3.00
50G2P := OFF 50G3P := OFF 50G4P := OFF
Neg Seq Overcurr


LDG0007-01
50Q4P := OFF
Phase TOC
51AP := 6.00 51AC := U3 51ATD := 3.00
51ARS := N 51ACT := 0.00 51AMR := 0.00
51ATC := 1
51BP := 6.00 51BC := U3 51BTD := 3.00
51BRS := N 51BCT := 0.00 51BMR := 0.00
51BTC := 1
51CP := 6.00 51CC := U3 51CTD := 3.00
51CRS := N 51CCT := 0.00 51CMR := 0.00
51CTC := 1
Maximum Ph TOC
51P1P := 6.00 51P1C := U3 51P1TD := 3.00
51P1RS := N 51P1CT := 0.00 51P1MR := 0.00
51P1TC := 1
51P2P := OFF
Negative Seq TOC

51QP := OFF
Neutral TOC
Residual TOC
51G1P := 1.50 51G1C := U3 51G1TD := 1.50
51G1RS := N 51G1CT := 0.00 51G1MR := 0.00
51G1TC := 1
51G2P := OFF
RTD Settings
E49RTD := NONE
Undervoltage Set
27P1P := 0.30 27P1D := 0.5 27P2P := OFF
27S1P := 20.59 27S1D := 0.5 27S2P := OFF
Overvoltage Set
59P1P := 0.90 59P1D := 0.5 59P2P := OFF
59S1P := 61.76 59S1D := 0.5 59S2P := OFF
SyncCheck Set
E25 := Y 25VLO := 54.90 25VHI := 75.49
25RCF := 1.00 25SF := 0.05 25ANG1 := 10
25ANG2 := 40 SYNCPH := 0 TCLOSD := 50
BSYNCH := 52A
Power Factor Set

55LDAP := OFF
Frequency Set
Trip/Close Logic
TDURD := 0.5 CFD := 2.0
TR := 51P1T OR 51G1T OR 50P1T OR 50G1T OR SV15T
REMTRIP := 0
ULTRIP := 0
52A := IN401
CL := SV26T AND ( ( IN408 OR CC ) AND LT03 OR SV27T AND NOT ( SV17 AND
IN402 ) ) OR R_TRIG SV04T AND LT06
ULCL := TRIP OR NOT ( 3P59 AND 27S1 OR 25A1 OR 3P27 AND 59S1 OR SV05 OR
3P27 AND 27S1 AND SV04 )
Group 3
Logic Settings
SELogic Enables
ELAT := 16 ESV := 32 ESC := N
EMV := 3

LDG0007-01
Latch Bits Eqns
SET02 := 0
RST02 := 1
SET05 := F_TRIG RMB7A OR F_TRIG VB071 OR NOT SV09T OR F_TRIG RMB7B OR F_TRIG
VB072 OR ( RB04 OR F_TRIG IN406 ) AND LT03 OR ( IN404 OR CC ) AND
NOT LT11 OR PB04_PUL AND NOT LT03 # RETRANSFER ENABLE (
INTERMEDIATE LOGIC )
RST05 := NOT ( F_TRIG RMB7A OR F_TRIG VB071 OR NOT SV09T OR F_TRIG RMB7B OR
F_TRIG VB072 OR ( RB04 OR F_TRIG IN406 ) AND LT03 OR ( IN404 OR CC
) AND NOT LT11 OR PB04_PUL AND NOT LT03 )
SET06 := NOT LT06 AND SV03T AND ( PB04_PUL AND NOT LT03 OR ( RB01 OR IN405 )
AND LT03 ) AND TMB3A AND TMB3B # TRANSFER ENABLE
RST06 := R_TRIG SV23T
SET07 := 0
RST07 := 1
SET08 := NOT LT08 AND ( PB04_PUL AND NOT LT03 OR ( RB03 OR IN406 ) AND LT03
) AND SV03T AND SV09T # RETRANSFER ENABLE
RST08 := LB03 OR RB07 OR SV22T AND SV03 AND LT05
SET09 := NOT LT03 AND R_TRIG IN404 AND SV26T AND NOT ULCL # CLOSE PUSHBUTTON
DELAY LATCH
RST09 := SV27T
RST10 := SV28T
SET11 := MV03 = 3.00 OR MV03 = 2.00 AND ( ( RB05 OR IN407 ) AND LT03 OR
PB02_PUL AND NOT LT03 AND NOT LT11 ) # SOURCE PARALLELING
RST11 := PB02_PUL AND NOT LT03 AND LT11 OR ( RB06 OR F_TRIG IN407 ) AND LT03
OR LB03 OR RB07 OR MV03 = 1.00
SET12 := 0
RST12 := 1
SET13 := 0
RST13 := 1
SET14 := 0
RST14 := 1
SET15 := 0
RST15 := 1
SET16 := 0
RST16 := 1
SV/Timers Set
SV01PU := 0.00 SV01DO := 0.23
CLOSED TIMER
SV02PU := 0.00 SV02DO := 0.00
SV02 := SV03T AND SV09T AND ( F_TRIG RMB1A OR F_TRIG VB011 OR F_TRIG RMB1B
OR F_TRIG VB012 OR LT03 AND ( F_TRIG IN405 OR R_TRIG RB02 ) OR
PB04_PUL AND SV22T AND NOT LT03 ) # TRANSFER ENABLE (
INTERMEDIATE LOGIC
)
SV03PU := 0.00 SV03DO := 0.00
SV03 := ROKA AND ROKB OR NOT VB001 AND NOT VB003 AND SV31T AND SV32T AND
NOT LINKFAIL # COMMUNICATION FAILURE
SV04PU := 2.00 SV04DO := 0.00
SV04 := SV04T AND LT06 AND NOT SV10T OR ( NOT ( RMB4A OR VB041 ) AND (
RMB5A OR VB051 ) AND 27P1 OR NOT ( RMB4B OR VB042 ) AND ( RMB5B OR
VB052 ) AND 27S1 ) AND LT06 AND SV03T # TIE AUTOMATIC TRANSFER
CLOSE TIMER
SV05PU := 3000.00 SV05DO := 0.00
SV06PU := 0.00 SV06DO := 0.00
SV06 := NOT LT06 AND ( RMB1A OR VB011 OR RMB1B OR VB011 ) OR ( NOT ( RMB1A
OR VB011 ) OR NOT ( RMB1B OR VB011 ) ) AND LT06 # SCHEME ERROR (
INTERMEDIATE LOGIC
)
SV07PU := 0.60 SV07DO := 0.00
SV07 := SV06T OR LT08 AND ( NOT ( RMB7A OR VB071 ) OR NOT ( RMB7B OR VB072
) ) OR ( RMB7A OR VB071 OR RMB7B OR VB072 ) AND NOT LT08 # SCHEME
ERROR CHECKING
SV08PU := 0.00 SV08DO := 0.50
LDG0007-01
SV08 := ( R_TRIG SV10T OR R_TRIG SV13T ) AND IN402 # TRANSFER SCHEME TRIP
SV09PU := 0.50 SV09DO := 0.00
SV09 := LT06 # TRANSFER ENABLED
SV10PU := 0.20 SV10DO := 0.00
SV10 := ( RMB4A OR VB041 ) AND ( RMB4B OR VB042 ) AND ( RMB8A OR VB081 )
AND ( RMB8B OR VB082 ) AND 52A AND NOT SV01T AND SV03T AND NOT LT11
# MANUAL RETRANSFER TRIP
SV11PU := 0.00 SV11DO := 0.00
SV11 := NOT SV03T # COMMUNICATION FAILURE ALARM
SV12PU := 0.50 SV12DO := 0.50
SV13PU := 10.02 SV13DO := 0.00
SV13 := NOT ( RMB4A OR VB041 ) AND NOT ( RMB4B OR VB042 ) AND SV03T AND 52A
# BOTH MAIN BREAKERS OPEN TRIP
SV14PU := 0.00 SV14DO := 0.00
SV14 := ( CF OR SV14T ) AND NOT TRGTR # BREAKER CLOSE FAILURE
SV15PU := 0.10 SV15DO := 0.00
SV15 := OUT101 AND ( 52A OR 50P3P OR 50G3P ) OR NOT TRGTR AND SV15T #
BREAKER TRIP FAILURE
SV16PU := 0.00 SV16DO := 0.50
SV17PU := 0.50 SV17DO := 0.00
SV18PU := 0.00 SV18DO := 0.00
SV19PU := 0.00 SV19DO := 0.00
SV19 := NA
SV20PU := 0.00 SV20DO := 0.00
SV20 := NA
SV21PU := 0.00 SV21DO := 0.00
SV21 := NA
SV22PU := 0.50 SV22DO := 0.00
SV22 := LT08 # RETRANSFER ENABLED
SV23PU := 0.00 SV23DO := 0.00
SV23 := SV02T OR TRIP OR NOT IN402 OR SV14T OR SV15T OR SV07T OR SV13T OR
LB03 OR RB07 # AUTO READY
SV24PU := 0.50 SV24DO := 0.00
SV25PU := 0.00 SV25DO := 0.00
SV25 := SV03T AND NOT ( RMB2A OR VB021 OR RMB2B OR VB022 ) # SELECT A MAIN
SV26PU := 0.00 SV26DO := 0.25
SV26 := SV03T AND ( RMB6A OR VB061 ) AND ( RMB6B OR VB062 ) AND ( 3P59 AND
27S1 OR 25A1 OR 3P27 AND 59S1 OR SV05 ) AND ( RMB2A OR VB021 OR
RMB2B OR VB022 ) # MANUAL CLOSE PERMISSIVE
SV27PU := 0.00 SV27DO := 0.00
SV28PU := 0.00 SV28DO := 0.00
SV29PU := 0.50 SV29DO := 0.00
SV30PU := 0.02 SV30DO := 0.02
SV31PU := 0.00 SV31DO := 0.10
SV31 := R_TRIG VB002 OR F_TRIG VB002 # GOOSE MESSAGE WATCHDOG TIMER 1
SV32PU := 0.00 SV32DO := 0.10
SV32 := R_TRIG VB004 OR F_TRIG VB004 # GOOSE MESSAGE WATCHDOG TIMER 2
Math Variables
MV03 := 1.00 # ENABLE SOURCE PARALLELING
Base Output Set

OUT101FS := N
OUT102FS := N
OUT102 := CLOSE
OUT103FS := N
OUT103 := HALARM OR SALARM OR SV14T OR SV15T OR DCHI OR DCLO OR LOP OR SV24T
OR SV11T

TMB2A := RMB2B OR VB022 # MAIN 2 BREAKER SELECTED TO TRIP
TMB3A := ( RMB3B OR VB032 ) AND ( RMB4B OR VB042 ) AND ( RMB8B OR VB082 )
LDG0007-01
AND IN402 AND SV03T # SOURCE 2 HEALTHY AND MAIN 2 BREAKER CLOSED
AND MAIN 2 BREAKER RACKED-IN AND TIE RACKED-IN AND COMMUNICATIONS
OK
TMB4A := 52A # TIE BREAKER CLOSED
TMB5A := ( RMB4B OR VB042 ) AND ( RMB8B OR VB082 ) AND IN402 AND 52A AND NOT
LT11 AND SV03T # MAIN 2 BREAKER CLOSED AND MAIN 2 BREAKER RACKED-IN
AND TIE BREAKER RACKED-IN AND TIE BREAKER CLOSED AND SOURCE
PARALLELING SWITCH NOT CLOSED AND COMMUNICATIONS OK
TMB6A := NOT TRIP AND SV03T AND NOT SV24T # TIE BREAKER NOT TRIPPED, NO
FAULT AND COMMUNICATIONS OK
TMB8A := ( RMB3B OR VB032 ) AND ( RMB8B OR VB082 ) AND IN402 AND 52A AND
SV03T # SOURCE 2 HEALTHY AND MAIN 2 BREAKER RACKED-IN AND TIE
BREAKER RACKED-IN AND TIE BREAKER CLOSED AND COMMUNICATIONS OK
TMB1B := LT06 # TRANSFER ENABLED
TMB2B := RMB2A OR VB021 # MAIN 1 BREAKER SELECTED TO TRIP
TMB3B := ( RMB3A OR VB031 ) AND ( RMB4A OR VB041 ) AND ( RMB8A OR VB081 )
AND IN402 AND SV03T # SOURCE 1 HEALTHY AND MAIN 1 BREAKER CLOSED
AND MAIN 1 BREAKER RACKED-IN AND TIE RACKED-IN AND COMMUNICATIONS
OK
TMB4B := 52A # TIE BREAKER CLOSED
TMB5B := ( RMB4A OR VB041 ) AND ( RMB8A OR VB081 ) AND IN402 AND 52A AND NOT
LT11 AND SV03T # MAIN 1 BREAKER CLOSED AND MAIN 1 BREAKER RACKED-IN
AND TIE BREAKER RACKED-IN AND TIE BREAKER CLOSED AND SOURCE
PARALLELING SWITCH NOT CLOSED AND COMMUNICATIONS OK
TMB6B := NOT TRIP AND SV03T AND NOT SV24T # TIE BREAKER NOT TRIPPED, NO
FAULT AND COMMUNICATIONS OK
TMB7B := LT08 # RETRANSFER ENABLED
TMB8B := ( RMB3A OR VB031 ) AND ( RMB8A OR VB081 ) AND 52A AND IN402 AND
SV03T # SOURCE 1 HEALTHY AND MAIN 1 BREAKER RACKED-IN AND TIE
BREAKER RACKED-IN AND TIE BREAKER CLOSED AND COMMUNICATIONS OK
Port 1
IPADDR := 192.168.1.13
SUBNETM := 255.255.255.0
DEFRTR := 192.168.1.1
FTPUSER := FTPUSER
E61850 := N EMOD := 0

EDNP := 0

ESNTP := OFF
Port 3
Protocol Select
PROTO := MBA
Comm Settings
SPEED := 9600

Port 4
Protocol Select
PROTO := MBB
Interface Select
COMMINF := 232
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Comm Settings
SPEED := 9600


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Using Design Templates
What Is a Design Template?

A Design Template is a customized user interface for manipulating the settings of any SEL product
supported by ACSELERATOR QuickSet® SEL-5030 Software. Design Templates are created with
®
ACSELERATOR QuickSet Designer SEL-5031 Software. They are stored as relay files in an
ACSELERATOR QuickSet relay database file (*.rdb) and can be used with ACSELERATOR QuickSet.
This section gives general instructions for working with Design Templates in ACSELERATOR QuickSet.
The graphical user interface (GUI) screen captures in this section are not specific to the examples in the
preceding sections of this Design Template Guide.
Components
Design Templates consist of the following components:
Design settings that are entered using a custom settings interface
A set of design equations that use the design settings and/or constants to derive the device settings
A device settings file that contains a complete set of the derived device settings
While some device settings are calculated by the equations, others are not affected by the Design Template
(see Figure 50). Generally, these other settings do not require any modification from the default values that
were established when the Design Template was developed.
Purpose and Function

The intention of a Design Template is to make available to the user only particular settings that might need
to be modified for a specific device application. These user-defined settings are referred to as design
settings. They are the settings that are accessible through the Design Template view in ACSELERATOR
QuickSet software. All of the actual device settings remain unseen while in the Design Template view; only
the design settings are visible in this view.
Note: For Design Templates written by SEL, SEL recommends that only users experienced with the
Design Template and the device settings attempt to directly modify any of the device settings in the
SEL device (such as through a terminal emulation program or front-panel interface) or within the
database via the settings editor. Incorrectly altering these settings (especially the logic) can result in
failure of the device to operate as intended for a specific application.

LDG0007-01
DESIGN SETTINGS DEVICE SETTINGS FILE
and
DESIGN EQUATIONS
Derived Settings
Settings modified and

manipulated by the
Design Template
DESIGN TEMPLATE DESIGN EQUATIONS
VIEW
Device settings are
Remaining Settings
Design settings are calculated when settings
entered in the Design in the Design Template
Settings not
Template view view are merged with
associated with a
design equations
design equation
remain unchanged
(user-defined settings) (user-defined equations)
Figure 50 Design Template Structure
Opening the Design Template

Follow the same steps to open a Design Template as you would when opening other device settings in
ACSELERATOR QuickSet.
Step 1. Select File > Open… from the toolbar.
Figure 51 Open a Design Template

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Step 2. In the Open Settings dialog box, check the box labeled Show Settings with Design Templates
and then select the Design Template to open, as shown in Figure 52.
If the desired Design Template is not listed, then it is not in the currently active database. Select
Cancel. From the toolbar, select File > Active Database… to select another database. Design
Templates can also be copied from other databases using the Database Manager… option under
the File menu.
Figure 52 Select Show Settings With Design Templates

When the Design Template is loaded, the view will default to the Design Template view as shown in
Figure 53.
Figure 53 Design Template View in ACSELERATOR QuickSet

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Changing the Part Number
Each device in an ACSELERATOR QuickSet database has a part number associated with it. ACSELERATOR
QuickSet uses this part number to determine what rules to use for checking the settings entered by the user.
Before modifying the settings in the Design Template, configure the settings part number to match the
device you are working with.
Step 1. From the toolbar, select Edit > Part Number to open the Device Part Number dialog box.
Step 2. Modify the part number using the Device Part Number dialog box as shown in Figure 54.
When finished, click OK.
Figure 54 Configuring the Part Number in ACSELERATOR QuickSet

Step 3. Save the changes to the part number by selecting File > Save or Save As… from the toolbar.

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Design Settings
Design settings are organized in forms that can be selected using the tabs in the Design Template view or
by using the Design Template Manager directory tree on the left side of the Design Template view (see
Figure 55.
Figure 55 Design Template Manager Directory Tree
Sending Settings
To send the settings to the device, select File > Send… from the toolbar in the Design Template view, as
shown in Figure 56.
Figure 56 Sending Settings From the Design Template View

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ACSELERATOR QuickSet sends only the groups of device settings that were specified when the Design
Template was developed. This option can be modified only by using ACSELERATOR QuickSet Designer.
It is important to note that the settings sent to the device are the device settings and not the design settings.
Because the design settings are not stored in the device, SEL recommends that a Design Template for each
installed device or relay be maintained in a database as a record of how the device is configured. Do not
modify device settings directly in the device via terminal communications or the front panel unless you
have a detailed knowledge of the interaction of design settings and device settings.
Design Template Reports

The following Design Template reports can be viewed and printed from ACSELERATOR QuickSet:
Design Report—a list of all design settings, including range, value, units, comments, and legend.
Design Settings Sheet—the settings report with the Value field left blank.
Design Equations Report—a list of design equations, including the value derived by the equation
and, for equations that calculate device settings, the value that will be used for the device setting.
A table is also included at the beginning of the report, which shows the design setting associated
with each design variable. The design variables are used in the equations, and the design settings
are the actual panel names presented to the user in the settings forms.
To view reports for the open Design Template, select File > Print Design… from the toolbar in the Design
Template view as shown in Figure 57. Use the Print Page Settings dialog box shown in Figure 58 to select
the report options; when finished, click OK. The selected report(s) will open in a print preview window.
The report can be printed or saved to an HTML file using the File menu.
Figure 57 Viewing and Printing Design Template Reports

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Figure 58 Design Report Options
Reading Settings From a Device

The design settings are not stored in the device, only the device settings are present. For this reason, when
you read settings from a device using ACSELERATOR QuickSet, the settings will not be associated with a
Design Template unless you choose to perform a merge operation.
Device settings are read from the device by selecting File > Read from the toolbar in ACSELERATOR
QuickSet. While the settings are being read, the transfer status is displayed. After the settings files have
been read, ACSELERATOR QuickSet checks to see if Design Templates for the same device model are in the
active database. If so, you will have the option of merging the newly read settings with a Design Template
(see Figure 59). The merged data are stored as a new settings file in the database, so the existing Design
Template is unaffected by this merge operation. If you choose not to merge with a Design Template (or
there is no Design Template in the active database), then the settings will appear in the main settings view.
Figure 59 Merge Dialog Box in ACSELERATOR QuickSet

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When device settings are merged with a Design Template, it is important to understand the merge process
and what the end result will be. A review of the Design Template structure is beneficial in order to
understand what happens when the merge operation is performed.
As stated previously, the Design Template consists of three major components:
Design settings
Design equations
A complete set of derived device settings
Referring back to Figure 50, the design equations use the design settings (and sometimes constants) to
derive certain device settings. These derived device settings, while residing in the ACSELERATOR QuickSet
database, are always controlled by an equation and cannot be directly manipulated by the user.
Additionally, the derived settings are not refreshed with settings read from the device during the merge
process because the design settings and design equations have precedence over derived device settings.
When a merge takes place, the design settings and design equations for the existing Design Template are
combined with the newly read device settings to form a new Design Template. Therefore, as the design
settings and design equations are merged with the device settings, it is possible that some of the newly read
settings will be recalculated so that they no longer match the settings in the device. ACSELERATOR
QuickSet will notify the user that this condition exists before the merge is completed (see Figure 60). The
other difference that may occur is between the nonderived settings that were in the original Design
Template and the nonderived settings that have been read from the device. In this case, the settings read
from the device have precedence over those in the Design Template and will replace them. ACSELERATOR
QuickSet also informs the user of this condition.
Figure 60 Final Step in Merging Settings and Design Template

As the preceding instructions indicate, it is impossible for ACSELERATOR Quickset to derive the original
design settings using the settings read from the device. Therefore, the Design Template that was originally
used to set the device should be maintained as a record of how the device was configured. If there is any
doubt about how a device is actually set, reading the settings and merging them with a Design Template
known to contain the desired settings will reveal if the device settings have been changed and no longer
match those settings in the original Design Template.
Merging a Design Template with settings read from the device is considered to be an advanced feature that
is rarely required. It is recommended, in most cases, that the merge option be declined at the time that
settings are retrieved.

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Template Versions
Design Template Revisions

Table 90 shows the revision history for the Name QuickSet Design Template and accompanying .rdb
settings file.
Table 90 Design Template and Settings File Revision History
Template Date Code Description of Changes

20111006 Initial version.
Note: Any Name Design Template obtained from SEL prior to (initial release date) was a preliminary
release. Use the most recent settings file for best results.

LDG0007-01
SEL Solutions
Systems, Services, and Products for the

Protection, Monitoring, Control, Automation,
and Metering of Utility and Industrial Electric Power
Systems Worldwide
*LDG0007-01*

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SEL QuickSet®

Design Template Guide

SEL-751A Three-Relay Main-Tie-Main

Date Code 20111006 LDG0007-01

Description of Operations .......................................................................................... 17

Remote Control Logic ................................................................................................. 24

Design Settings Descriptions and Settings Sheets ................................................. 26

Date Code 20111006 SEL Design Template Guide 1

Automatic Transfer Scheme Setup ............................................................................ 41

2 SEL Design Template Guide Date Code 20111006

Using Design Templates........................................................................................... 109

Template Versions .................................................................................................... 117

4 SEL Design Template Guide Date Code 20111006

Date Code 20111006 SEL Design Template Guide 5

6 SEL Design Template Guide Date Code 20111006

Date Code 20111006 SEL Design Template Guide 7

Relay Selection and Connections

Table 1 Common SEL-751A Part Numbers for Automatic Transfer Scheme

Table 2 Common SEL-751A Ordering Options for Automatic Transfer Scheme

8 SEL Design Template Guide Date Code 20111006

Figure 1 Relay Connections

10 SEL Design Template Guide Date Code 20111006

Figure 2 Trip Input Connections

Date Code 20111006 SEL Design Template Guide 11

12 SEL Design Template Guide Date Code 20111006

Figure 4 SEL-751A Main Breaker Relay Front-Panel Operator Interface

Date Code 20111006 SEL Design Template Guide 13

14 SEL Design Template Guide Date Code 20111006

Table 4 Operator Control Pushbuttons and LED Functions

Date Code 20111006 SEL Design Template Guide 15

16 SEL Design Template Guide Date Code 20111006

Figure 6 SEL-9510 Control Switch Module

Date Code 20111006 SEL Design Template Guide 17

b. Bus 1 has voltage, and Bus 2 has no voltage.

c. Bus 1 has no voltage, and Bus 2 has voltage.

18 SEL Design Template Guide Date Code 20111006

Defeating Manual Close

Date Code 20111006 SEL Design Template Guide 19

Automatic Retransfer Enable

20 SEL Design Template Guide Date Code 20111006

Automatic Retransfer Initiation

Live Source Seeking Logic

Date Code 20111006 SEL Design Template Guide 21

Transfer Response to External Lockout

22 SEL Design Template Guide Date Code 20111006

Date Code 20111006 SEL Design Template Guide 23

Table 5 Remote Bits for Controlling SEL-751A Operator Functions

Hardwired Remote Inputs

Table 6 Contact Inputs for Controlling SEL-751A Operator Functions

24 SEL Design Template Guide Date Code 20111006

Hardwired Remote Outputs

Table 7 Contact Outputs for Optional Remote Indicators

Date Code 20111006 SEL Design Template Guide 25

Design Settings Nodes

General Settings Node Descriptions

General: System Information

Table 9 System Phase Rotation Setting

26 SEL Design Template Guide Date Code 20111006

Table 11 System Voltage Setting