AG Lab
AG Lab
AG Lab
0-5 v Regulated
1 ECE 2 1 EC307PC DIGITAL LOGIC DESIGNpower suply Y
0-12 v
Regulated
2 ECE 2 1 EC307PC DIGITAL LOGIC DESIGNpower suply Y
CROs (0-20
Mhz) dual
3 ECE 2 1 EC307PC DIGITAL LOGIC DESIGNchannel Y
Bread Boards /
General
Purpose IC
4 ECE 2 1 EC307PC DIGITAL LOGIC DESIGNTrainee Kits Y
209 66 5 .. .. SMSK/ECE/DSD/RPS/001-005
209 66 5 .. .. SMSK/ECE/DSD/RPS/005-010
29/10/2007 29/10/2007
29/10/2007 29/10/2007
29/10/2007 29/10/2007
27/01/2020 27/01/2020
26/08/2019 26/08/2019
29/09/2007 29/09/2007
ogic Gate-003
Available
Specializa Lab Equipmen Avail. Room
Sno SEM Yr Lab Name Floor Area
tion Code t Name (Y/N) No.
(in Sqm)
generatio
n of clock
using
DIGITAL NAND /
ELECTRO NOR
1 EEE 2 2 EE406PC NICS LAB gates kit Y 216 66
Realizatio
n of
Boolean
DIGITAL Expressio
ELECTRO ns using
2 EEE 2 2 EE406PC NICS LAB Gates kit Y 216 66
Design
and
realizatio
na
Synchron
ous and
Asynchro
nous
DIGITAL counters
ELECTRO using flip-
3 EEE 2 2 EE406PC NICS LAB flops kit Y 216 66
Design
and
realizatio
n of
Asynchro
nous
DIGITAL counters
ELECTRO using flip-
5 EEE 2 2 EE406PC NICS LAB flops kit Y 216 66
Design
and
realizatio
n of a 4
bit
pseudo
random
sequence
generator
DIGITAL using
ELECTRO logic
6 EEE 2 2 EE406PC NICS LAB gates kit Y 216 66
Design
and
realizatio
n of an 8
bit
parallel
load and
serial out
shift
DIGITAL register
ELECTRO using flip-
7 EEE 2 2 EE406PC NICS LAB flops kit Y 216 66
Design a 4
– bit
DIGITAL Adder /
ELECTRO Subtracto
8 EEE 2 2 EE406PC NICS LAB r kit Y 216 66
Design
and
realizatio
n a 4 – bit
gray to
Binary
and
Binary to
DIGITAL Gray
ELECTRO Converter
9 EEE 2 2 EE406PC NICS LAB kit Y 216 66
Design
and
realizatio
DIGITAL n 8x1
ELECTRO using 2x1
10 EEE 2 2 EE406PC NICS LAB mux kit Y 216 66
Design
and
realizatio
DIGITAL n 2 bit
ELECTRO comparat
11 EEE 2 2 EE406PC NICS LAB or kit Y 216 66
Design
and
realizatio
n logic
gates
DIGITAL using
ELECTRO universal
12 EEE 2 2 EE406PC NICS LAB gates kit Y 216 66
Available Date of Date of
Make Model UNIQUE ID IMAGE
Units Invoice Delivery