MPMC QB ANS 3.

SHORT
1. What is the size of address and data bus of Intel 8085 Microprocessor?
Ans: The Intel 8085 Microprocessor has an 16-bit address bus and an 8-bit data bus.
2. What is the operating frequency of Intel 8085 Microprocessor?
Ans: The operating frequency of the Intel 8085 Microprocessor is typically 3-6 MHz.
3. What do you understand by a T-state, Machine cycle, and Instruction cycle?
Ans:

T-state: A T-state is the basic unit of time for the Intel 8085 Microprocessor. Each T-state is 3 clock cycles long.

Machine cycle: A machine cycle is the time it takes for Microprocessor to fetch and execute an instruction.

Instruction cycle: An instruction cycle is the sequence of T-states required to execute a single instruction.

4. How many active flags are present in the flag register of Intel 8085? Name them.
Ans:
There are five active flags in the flag register of the Intel 8085:

Sign (S) flag

Zero (Z) flag

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 Auxiliary Carry (AC) flag

Parity (P) flag

Carry (CY) flag

5. What is the role of ALE pin of Intel 8085 Microprocessor?

Ans:

The ALE (Address Latch Enable) pin of the Intel 8085 Microprocessor is used to output the lower eight

bits of the address during the first T-state of each machine cycle.

This allows the external memory devices to latch the address and prepare the data for the next T-state.

6. What is the difference between a one-byte and two-byte instructions. Give examples.
Ans:
One-byte instructions are those instructions that require only one byte of machine code for their execution.
Two-byte instructions, on the other hand, require two bytes of machine code. For example:

One-byte instruction: MOV A, B (opcode: 78)

Two-byte instruction: LXI B, 1624H (opcode: 01, immediate data: 24H, 16H)

7. What is the role of HOLD pin of Intel 8085 Microprocessor?

Ans:

The HOLD pin of the Intel 8085 Microprocessor is used to suspend the execution of the microprocessor by an
external device.

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 This is typically used to allow another device, such as a direct memory access (DMA) controller, to access the
memory or I/O bus.

8. What is the role of SOD pin of Intel 8085 Microprocessor?

Ans:

The SOD (Serial Output Data) pin of the Intel 8085 Microprocessor is used for serial data output during the execution
of certain instructions.

It is used in serial communication.

9. What is the role of TRAP pin of Intel 8085 Microprocessor?

Ans:

The TRAP (TRAP) pin of the Intel 8085 Microprocessor is used to generate a non-maskable interrupt.

This is typically used to handle critical events, such as power failures.

10. What is the role of READY pin of Intel 8085 Microprocessor?

Ans:

The READY pin of the Intel 8085 Microprocessor is used to indicate to the microprocessor that an external device is
ready to transfer data.

This is typically used with slower memory devices, such as DRAM.

11. What is the size of address and data bus of Intel 8086 Microprocessor?
Ans: 16-bit data bus and 20-bit address bus
12. What is the operating frequency of Intel 8086 Microprocessor?

MPMC QB ANS 3.0 3

 Ans: The operating frequency of the Intel 8086 Microprocessor is typically 5, 8, or 10 MHz
13. Explain the instruction MUL BX of Intel 8086 Microprocessor.
Ans: The MUL BX instruction multiplies the contents of the AX register by the contents of the BX register. The result is
stored in the AX register.
14. Explain the instruction DIV BL of Intel 8086 Microprocessor.

Ans: The DIV BL instruction divides the contents of the AX register by the contents of the BL register. The quotient is
stored in the AX register, and the remainder is stored in the DX register.
15. What is the size of instruction queue of Intel 8086 Microprocessor?

Ans: The Intel 8086 microprocessor has a 6-byte instruction queue. This means that it can hold up to 6 instructions at a
time.
16. What are the roles of ̅̅̅̅̅̅BHE & A0 pins of Intel 8086 Microprocessor?
Ans:

The BHE (Bus High Enable) pin is used to indicate the byte being transferred on the data bus.

The A0 pin is used to select the lower order byte or the higher order byte on the data bus.

17. What is the role of MN⁄MX ̅̅̅̅̅ pin of Intel 8086 Microprocessor?

Ans: The MN/MX (Memory/No Memory) pin is used to indicate whether the microprocessor is accessing memory or I/O
devices.
18. Explain the instruction XLAT of Intel 8086 Microprocessor.

Ans: The XLAT instruction translates the contents of the AL register into its corresponding ASCII code. The translated
code is stored in the AL register.
19. Explain the instruction CMP of Intel 8086 Microprocessor.
Ans:

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 The CMP instruction in the Intel 8086 Microprocessor is used for comparing two operands.

It subtracts the second operand from the first without storing the result and updates the flags based on the result.

20. How many memory locations that an Intel 8086 Microprocessor can access?

Ans: The Intel 8086 Microprocessor can access up to 1 MB (2^20) memory locations.
21. What is the size of address and data bus of Intel 8051 Microcontroller?
Ans: The Intel 8051 microcontroller has an 8-bit data bus and an 8-bit address bus.
22. What is the operating frequency of Intel 8051 Microcontroller?
Ans: 12 MHz.
23. What is the size of on-chip ROM for Intel 8051 Microcontroller?

Ans: 4KB
24. What is the size of on-chip RAM for Intel 8051 Microcontroller?

Ans: 128 bytes

25. How many bidirectional input output lines are present in Intel 8051?
Ans: 4 bidirectional I/O lines

26. List the register banks that are present in Intel 8051 Microcontroller.

Ans: The Intel 8051 microcontroller has four register banks, each with eight registers. These register banks are named
R0, R1, R2, and R3.
27. What is the role of ̅̅̅̅̅̅̅̅PSEN pin of Intel 8051 Microcontroller?

Ans:

The PSEN (Program Store Enable) pin is an active-low signal that is used to select the external program memory.

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 When PSEN is low, the microcontroller reads data from the external program memory. When PSEN is high, the
microcontroller accesses the internal program memory.

28. What is the role of PROG ̅̅̅ ̅̅̅̅̅ pin of Intel 8051 Microcontroller?

Ans:

The PROG (Program) pin is used to enable programming mode.

When PROG is high, the microcontroller is in normal operating mode. When PROG is low, the microcontroller is in
programming mode and can be programmed with new code.

29. How does the pin ̅EA ̅̅̅ work in Intel 8051 Microcontroller?

Ans:

The EA (External Access Enable) pin is used to enable external interrupts.

When EA is low, external interrupts are disabled. When EA is high, external interrupts are enabled.

30. How does the pin VPP work in Intel 8051 Microcontroller?
Ans: The VPP(Voltage Programming Pulse) pin provides a high voltage for programming the microcontroller's flash
memory and can also be used for external memory interfacing in some variants.
31. What is the role of RS pin in a 16 X 2 LCD Module?

Ans:

The RS (Register Select) pin is used to select the data or command register of the LCD module.

When RS is low, the data register is selected. When RS is high, the command register is selected.

32. How the contrast of a 16 X 2 LCD Module is adjusted?

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 Ans: The contrast of a 16x2 LCD module is adjusted by setting the voltage on the Vcom pin. The Vcom pin is connected
to a potentiometer that can be adjusted to control the voltage.
33. What is the function of command register of a 16 X 2 LCD Module?
Ans: The command register is used to send commands to the LCD module. These commands can control various
aspects of the display, such as the cursor position, the display mode, and the backlight.
34. What are two methods that are used for digital to analog conversion?
Ans:

Pulse Width Modulation (PWM): In PWM, a digital signal is used to control the duty cycle of a pulse train. The
average voltage of the pulse train is proportional to the duty cycle.

R-2R Ladder DAC: In an R-2R ladder DAC, a series of resistors is used to divide a reference voltage into smaller
voltages. The digital signal is used to select which of these smaller voltages is output.

35. What is the step size for a 10 bit Analog to Digital Converter?

Ans: The step size of an ADC is the smallest change in input voltage that will cause a change in the output code. For a
10-bit ADC, the step size is equal to the reference voltage divided by 1024.
36. What is the function of E pin in a 16 X 2 LCD Module?

Ans: The E (Enable) pin is used to enable the LCD module to accept data or commands. When E is high, the data or
command is latched onto the data bus. When E is low, the data or command is ignored.
37. What is the role of ̅̅̅̅RD pin of ADC 0804 chip?

Ans: The RD (Read) pin of the ADC 0804 chip is used to initiate the conversion process. When RD is low, the conversion
starts. When RD is high, the conversion is complete and the converted data can be read.
38. How many data lines are present in DAC 0808 chip?

MPMC QB ANS 3.0 7

 Ans: The DAC 0808 chip has 8 data lines, which means that it can output analog voltages with 8-bit resolution.
39. How many data lines are present in ADC 0804 chip?

Ans: The ADC 0804 chip has 8 data lines, which means that it can input analog voltages with 8-bit resolution.
40. What is the role of CLK IN pin of ADC 0804 chip?

Ans: The CLK IN (Clock Input) pin of the ADC 0804 chip is used to provide a clock signal for the conversion process. The
clock signal should have a frequency of at least 500 kHz.
41. How many bidirectional I/O lines are present in Intel 8255?

Ans:

24 bidirectional I/O lines:

Organized into three 8-bit ports: Port A, Port B, and Port C.

42. What are the modes that can be used in Intel 8255?

Ans:
Three modes of operation:

Mode 0: Basic Input/Output (I/O).

Mode 1: Strobed Input/Output (I/O).

Mode 2: Bidirectional Bus.

43. How does the instruction LEA works for Intel 8086 Microprocessor?

Ans:

LEA Purpose: The LEA (Load Effective Address) instruction in Intel 8086 Microprocessor calculates the effective
address of a specified operand.

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 Functionality: LEA does not access the data at the calculated address; it loads the offset into a register for further
computation or indirect addressing.

44. What is the SP register do in Intel 8085 Microprocessor?

Ans:

1. Stack Pointer (SP): The SP register in Intel 8085 Microprocessor is a 16-bit register.

2. Stack Operations: SP is used to point to the memory location where the next push or pop operation will occur in the
stack. It manages the stack for subroutine calls and interrupt handling.

45. What is the significance of S1 and S0 pin of Intel 8085 Microprocessor?

Ans:

1. Register Set Selection: S1 and S0 are status pins in the Intel 8085 Microprocessor.

2. Register Bank Selection: S1 and S0 pins determine which register set (B, C, D, or E) is currently active, allowing the
microprocessor to access different sets of registers during program execution.

FOCUS
1. Explain the addressing modes of Intel 8085 Microprocessor with examples.
Ans:

Addressing Modes of Intel 8085:

1. Immediate Addressing: Data is directly specified in the instruction. Example: MVI A, 05H .

2. Register Addressing: Data is in a register. Example: MOV B, C .

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 3. Direct Addressing: Operand's address is directly specified. Example: LDA 2000H .

4. Indirect Addressing: Address of the operand is in a register pair. Example: MOV A,(B) .

5. Implicit Addressing: No explicit address is specified. Example: NOP (No

Operation).

2. Explain instructions DAA, XRA, INR, JMP, CMP, PUSH, LDA, and LXI of Intel 8085.
Ans:

Intel 8085 Instructions:

1. DAA (Decimal Adjust Accumulator): Adjusts the accumulator after BCD addition.

2. XRA (Exclusive OR Accumulator): Performs XOR operation with the accumulator and a specified operand.

3. INR (Increment Register): Increments the specified register or memory location.

4. JMP (Jump): Unconditional jump to the specified address.

5. CMP (Compare): Compares the accumulator with the specified register/memory.

6. PUSH: Pushes the contents of the specified register pair onto the stack.

7. LDA (Load Accumulator Direct): Loads the accumulator with the content of the specified memory location.

8. LXI (Load Register Pair Immediate): Loads a 16-bit immediate data into a register pair.

3. Write an ALP for Intel 8085 to find the sum of first 10 natural numbers.
Ans:

MPMC QB ANS 3.0 10

 ORG 0000H ; Set the origin address
START:
MVI B, 00H ; Initialize B register to 00 (sum)
MVI C, 0AH ; Load C register with 0AH (count of natural numbers)
MVI D, 01H ; Load D register with 01 (starting natural number)
MVI E, 00H ; Initialize E register to 00 (carry)
LOOP:
ADD D ; Add the number in D register to the sum in B register
JNC NO_CARRY ; Jump if no carry occurred
INR E ; Increment carry register if there is a carry
NO_CARRY:
DCR C ; Decrement count
JNZ LOOP ; Continue loop if count is not zero
MOV A, B ; Move the result (sum) to A register
ADD E ; Add the carry to the result
HLT ; Halt the program
END

4. Explain the concept of pipelining used in Intel 8086 microprocessor.

Ans:

1. Definition of Pipelining: Pipelining is a microprocessor optimization technique that enhances performance by

simultaneously executing multiple stages of instruction processing.

2. Intel 8086 Example: The Intel 8086 microprocessor employs a two-stage pipeline comprising fetch and execute
stages. While one instruction is executed, the next one is fetched, enhancing efficiency.

3. Prefetch Queue Function: The 8086 includes a prefetch queue capable of storing up to six instruction bytes. This
feature enables continuous instruction fetching even if the execution stage is still processing a previous instruction.

4. Performance Improvement: The key benefit of pipelining is a significant reduction in the time a microprocessor
spends waiting for instructions to be fetched from memory, thereby enhancing overall performance.

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 5. Overall Impact: Through overlapping instruction execution, pipelining is a valuable technique that optimizes
microprocessor efficiency and accelerates computational tasks.

5. Write an ALP for Intel 8086 Microprocessor to divide 12345678 H by ABCDH. Store the quotient at memory
location 11234 H and remainder at 11236 H.

Ans:

; Divide 12345678 H by ABCD H and store the quotient at memory location 11234 H and remain
der at 11236 H
MOV AX, 12345678H ; Load dividend into AX register
MOV BX, ABCD H ; Load divisor into BX register
DIV BX ; Divide AX by BX and store quotient in AX and remainder in DX
MOV [11234H], AX ; Store quotient at memory location 11234 H
MOV [11236H], DX ; Store remainder at memory location 11236 H

6. Explain different addressing modes used in Intel 8086 microprocessor.

Ans: The Intel 8086 microprocessor supports the following addressing modes:

Register addressing: Access data in internal registers.

e.g. MOV AX, BX ; Move the contents of the BX register to the AX register

Direct addressing: Access data in memory directly using operand as address.

e.g. MOV [1000H], AX ; Move the contents of the AX register to memory location 1000H

Indirect addressing: Access data in memory indirectly using register value as address.
e.g. MOV AX, [BX] ; Move the contents of the memory location pointed to by the BX register to the AX register

Indexed addressing: Access data using base address and index value.
e.g. MOV AX, [BX + SI] ; Move the contents of the memory location pointed to by the BX register plus the value of the

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 SI register to the AX register

Based addressing: Access data using base address and displacement value.
e.g. MOV AX, [DI + 10H] ; Move the contents of the memory location pointed to by the DI register plus 10H to the AX
register

Immediate addressing: Access data directly using operand value.

e.g. MOV AX, 10H ; Move the value 10H to the AX register

7. Explain different addressing modes used in Intel 8051 with examples.

Ans:
The Intel 8051 microcontroller supports various addressing modes, allowing flexibility in accessing data and operands.
Here are some addressing modes used in the 8051:

Immediate Addressing Mode (e.g., MOV A, #25H): The operand is directly specified in the instruction.

Register Addressing Mode (e.g., MOV A, R0): The operand is in one of the general-purpose registers.

Direct Addressing Mode (e.g., MOV A, 30H): The operand is specified by a direct address in the instruction.

Indirect Addressing Mode (e.g., MOV A, @R0): The operand is located at the address stored in a register (R0 or
R1).

Indexed Addressing Mode (e.g., MOV A, 20H+R1): The operand is at the address obtained by adding an immediate
value to a register content.

Bit Addressing Mode (e.g., MOV C, 40H.3): Used for bit manipulation. The operand is a specific bit in the bit-
addressable RAM area.

8. Explain the instructions MOVX, MOVC, MUL, and ADDC of Intel 8051.
Ans:

MPMC QB ANS 3.0 13

 MOVX (Move External): This instruction is used for moving data between the 8051 and external memory. Examples:

assemblyCopy code
MOVX A, @DPTR ; Move data from external memory to accumulator
MOVX @DPTR, A ; Move data from accumulator to external memory

MOVC (Move Code): MOVC is used to move code bytes from the program memory to the accumulator. Examples:

MOVC A, @A+DPTR ; Move code byte from program memory to accumulator

MOVC A, @A+PC ; Move code byte from program memory to accumulator using the PC register

MUL (Multiply): MUL is used to multiply two unsigned numbers. Example:

MOV A, #25 ; Multiplier

MOV B, #10 ; Multiplicand
MUL AB ; Result in B (higher byte) and A (lower byte)

ADDC (Add with Carry): ADDC adds the accumulator, a register, and the carry flag. Example:

MOV A, #25 ; Accumulator

MOV B, #10 ; Register
MOV C, #1 ; Carry flag
ADDC A, B ; A = A + B + C

9. Find the size of delay in the following program. The frequency is 11.0592MHz.

MPMC QB ANS 3.0 14

 DELAY: MOV R3, #C8
HERE: DJNZ R3, HERE
RET

Ans:
The program has a loop that decrements the value in register R3 until it becomes zero. The initial value in R3 is 0xC8 or
200. The clock frequency is 11.0592MHz.

1. Calculate Time for One Iteration:

Time for one iteration =1/Clock frequency=1/11.0592 MHz

2. Calculate Total Delay:

Total Delay = Number of iterations * Time for one iteration= 200*(1/11.0592 MHz) = 18.09 μs

So, the size of the delay in the program is approximately 18.09 μs.
10. How does the clock frequency of ADC 0804 chip is determined?
Ans:

The ADC 0804 is an analog-to-digital converter.

Its clock frequency is typically determined by an external clock source connected to its clock input (CLK). The formula
to calculate the clock frequency is:

Clock Frequency=External Clock Frequency/2

In other words, the external clock frequency is divided by 2 to generate the internal clock pulses used by the ADC
0804 for its conversion process.

11. Explain the steps to be followed in ADC 0804 chip for data conversion?

MPMC QB ANS 3.0 15

 Ans:

Data Conversion Steps in ADC 0804 Chip:

The ADC 0804 is an 8-bit successive approximation analog-to-digital converter (ADC) that converts analog input voltages
to 8-bit digital outputs. The conversion process involves the following steps:

1. Sampling: The analog input voltage is sampled and held by a sample-and-hold circuit.

2. Initialization: The ADC is initialized by applying a high-to-low transition to the START/EOC (Start of Conversion/End
of Conversion) pin.

3. Comparison: The analog input voltage is compared to the output of an internal voltage divider.

4. Approximation: The internal voltage divider is adjusted until its output is as close as possible to the analog input
voltage.

5. Output Latch: The digital output is latched onto the data bus.

6. Data Read: The digital output is read from the data bus.

7. Detecting a Pressed Key by a Microcontroller: A microcontroller detects a pressed key by monitoring the voltage
level on the corresponding row and column of the keyboard matrix.

12. How a pressed key is detected by a microcontroller?

Ans:

A microcontroller detects a pressed key by monitoring the voltage level on the corresponding row and column of the
keyboard matrix.

When a key is pressed, the row and column connected to that key are shorted together, causing a change in voltage.

Microcontrollers often use a matrix keypad. The steps to detect a pressed key are:

MPMC QB ANS 3.0 16

 1. Scan Rows: The microcontroller sequentially activates each row of the keypad.

2. Read Columns: While a row is activated, the microcontroller reads the state of each column.

3. Detect Key Press: The microcontroller identifies the pressed key based on the row and column intersection. If a
key is pressed, the corresponding row and column will have a connection.

13. How the double word 123478924H will be store at the address 23456H?
Ans:
Storing Double Word 123478924H at Address 23456H:

To store the double word 123478924H at address 23456H, the following steps are performed:

1. Divide the double word into two 16-bit words: 1234H and 7892H.

2. Store 1234H at address 23456H.

3. Store 7892H at address 23458H.

Since a double word occupies two consecutive memory locations, the lower word is stored at the specified address, and
the higher word is stored at the next highest address.
14. Describer the difference between the instructions MOV AX, 1234H and MOV AX, [1234H] in 8086?

Ans:
Difference between MOV AX, 1234H and MOV AX, [1234H] in 8086:

The instructions MOV AX, 1234H and MOV AX, [1234H] both involve moving data to the AX register. However, they differ
in the source of the data.

MOV AX, 1234H: This instruction moves the immediate value 1234H (hexadecimal) to the AX register.

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 MOV AX, [1234H]: This instruction moves the data stored at the memory location 1234H (hexadecimal) to the AX
register.

In essence, MOV AX, 1234H loads a constant value into the register, while MOV AX, [1234H] loads the contents of a
memory location into the register.
15. What are the advantages of memory segmentation concept?
Ans:

Advantages of Memory Segmentation Concept:

1. Enhanced Memory Addressing: Segmentation allows for addressing a larger memory space than what is directly
addressable by the processor's registers.

2. Memory Protection: Segmentation enables memory protection by isolating different segments and assigning access
privileges to each segment.

3. Modular Programming: Segmentation facilitates modular programming by allowing program modules to have their
own separate address spaces.

4. Efficient Memory Management: Segmentation enhances memory management by allowing unused segments to be
swapped out to external storage and reloaded as needed.

5. Simplified Addressing: Segmentation simplifies addressing by dividing memory into manageable chunks, making it
easier to locate and access specific memory locations.

LONG
1. Draw and explain the timing diagram of the execution of instruction MVI A, 32H.

Ans:

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 Explanation:

Time Calculation:
MVI A,32H >>32H→ To be moved in Accumulator

2 machine cycle:
memory read: 3T state required
opcode fetch: 4T state required
clock frequency(f) = 5MHz
1T state = clock period =1/f=0.2 micro sec
❎
Execution time for M1=0.2 4=0.8 micro sec
❎
Execution time for M1=0.2 3=0.6 micro sec
Execution time for instruction =M1+M2=1.4 micro sec

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 2. Interface 2732 (4KB EPROM) with Intel 8085 Microprocessor and find the memory map.

Ans:
Interface 2732 (4KB EPROM) with Intel 8085 Microprocessor:
The 2732 EPROM can be interfaced with the Intel 8085 microprocessor using the following connections:

Address bus: The 2732 EPROM uses the address bus lines A0-A14 to select a specific memory location.

Data bus: The 2732 EPROM uses the data bus lines D0-D7 to read and write data to memory.

Control signals: The 8085 microprocessor uses the following control signals to control the 2732 EPROM:

ALE (Address Latch Enable): This signal is used to latch the address bus
value onto the address latch of the 2732 EPROM.

WR (Write): This signal is used to write data to the 2732 EPROM.

RD (Read): This signal is used to read data from the 2732 EPROM.

Memory map:
The memory map for the 2732 EPROM is as follows:

Address Range Memory Device

0000H - FFFFH 2732 EPROM

3. Draw and explain the architecture of Intel 8085 Microprocessor.

Ans:

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 1. ALU (Arithmetic Logic Unit):
Performs arithmetic and logic operations like addition, subtraction, AND, OR. Processes data from registers and
produces results.

2. TCU (Timing and Control Unit):

Manages timing and control signals for microprocessor operations.
Generates signals for fetch, decode, and execute phases.

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 3. Registers:
a. General Purpose Registers: Used for various data manipulation operations. e.g. B, C, D, E, H, L in the Intel 8085.
b. Special Purpose Registers: Serve specific functions in the microprocessor. e.g. Accumulator (A), Program
Counter (PC), Stack Pointer(SP), and Flag Register (FLAGS).

4. Address Bus:
- Carries addresses from microprocessor to memory/devices.
- Determines which memory location or device is accessed.

5. Data Bus:
- Transfers data between microprocessor and memory/peripherals.
- Bus width determines the parallel transfer capacity.

4. Draw and Explain the architecture of Intel 8086 Microprocessor.

Ans:

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 The architecture of the 8086 can be divided into three main parts:

BIU(Bus Interface unit): The BIU is responsible for transferring data between the CPU and other devices on the
system bus. It also handles interrupts and other control signals.

EU(Execution unit): The EU is responsible for executing instructions. It contains the instruction decoder, the
arithmetic logic unit (ALU), and the control unit.

MMU(Memory Management Unit): The MMU is responsible for managing the memory system. It translates virtual
addresses to physical addresses and handles paging and segmentation.

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 Registers:

4 segment registers (CS, DS, ES, SS)

Flag register (FLAGS)

14 general-purpose 16-bit registers (AX, BX, CX, DX, SI, DI, BP, SP)

ALU (Arithmetic Logic Unit):

Performs arithmetic and logical operations.

Control Unit:

Manages the execution of instructions.

Instruction Pointer (IP):

Contains the offset of the next instruction to be executed.

Address Bus:

20-bit address bus for accessing memory.

Data Bus:

16-bit data bus for transferring data between the CPU and memory.

Segmentation:

Memory is organized into segments of 64 KB, determined by segment registers

(CS, DS, ES, SS).

5. Suppose DS= 3000H, ES = 2000H, CS= 4000H, SS= 6000H, BX= 1234H, BP=3333H, SI= F000H,

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 DI= 2222H, What physical address are accessed by the following instruction of Intel 8086
microprocessor?
a. MOV AH, [BX+SI+10H]
b. MOV BH, [BP]
c. MOV CX, CS:[SI]

Ans:

1. MOV AH, [BX+SI+10H]

Physical address = DS * 16 + BX + SI + 10H
Physical address = 3000H * 10H + 1234H + F000H + 10H = 40244H

2. MOV BH, [BP]

Physical address = SS * 16 + BP
Physical address = 6000H * 10H + 3333H = 63333H

3. MOV CX, CS:[SI]

Physical address = CS * 16 + SI
Physical address = 4000H * 10H + F000H = 4F000H

6. Write an ALP for Intel 8086 microprocessor to find the largest number from the array of data bytes.
Ans:

MOV AX, 0H ; Initialize AX to 0H

MOV CX, N ; Initialize CX to the number of elements in the array
MOV SI, 0H ; Initialize SI to the index of the first element in the array

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 LOOP:
MOV AL, [ARRAY + SI] ; Load the current element of the array into AL
CMP AL, AX ; Compare AL to AX
JG GREATER ; If AL is greater than AX, jump to GREATER
MOV AX, AL ; Otherwise, move AL to AX

GREATER:
INC SI ; Increment SI
LOOP LOOP ; Loop until CX is zero
MOV LARGEST, AX ; Move AX to LARGEST, which contains the largest number in the array

7. Draw and Explain the architecture of Intel 8051 Microcontroller?

Ans:

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 1. CPU (Central Processing Unit):

8-bit Processor: The 8051 is an 8-bit processor, meaning it processes data in 8-bit chunks.

Accumulator: The primary register for arithmetic and logic operations.

General-Purpose Registers: Four additional 8-bit registers (B, DPH, DPL, and PSW) are available for general-
purpose use.

2. Memory:

ROM (Read-Only Memory): Program memory for storing the program code. The 8051 typically has 4KB of on-chip
ROM.

RAM (Random Access Memory): Data memory for temporary storage. The 8051 usually has 128 bytes of on-chip
RAM.

3. I/O Ports:

The 8051 has four parallel I/O ports (P0, P1, P2, P3), each of which is 8 bits wide.

These ports can be used for input or output and are bit-addressable.

4. Serial Communication Control:

The 8051 includes a UART (Universal Asynchronous Receiver/Transmitter) for serial communication.

It supports full-duplex communication and is commonly used for interfacing with other devices.

5. Timers/Counters:

The 8051 has two 16-bit timers/counters (Timer 0 and Timer 1).

These timers can be used for generating time delays, measuring external events, and generating PWM signals.

MPMC QB ANS 3.0 27

 6. Control Registers:

PSW (Program Status Word): Contains flags and the stack pointer.

PCON (Power Control): Manages power modes and controls the crystal oscillator.

TCON (Timer Control): Controls the timers and external interrupts.

7. On-chip Oscillator and Clock Circuitry:

The 8051 can be operated with an external crystal or an external clock signal.

8. Bus Structure:

The 8051 features a straightforward bus structure with separate address and data buses.

8. Justify, Why a crystal frequency of 11.0592MHz is used for Intel 8051.

Ans:
The crystal frequency of 11.0592 MHz is commonly used for Intel 8051 microcontrollers due to several advantages it
offers:

1. Ease of Baud Rate Generation: The 11.0592MHz frequency allows for straightforward generation of standard
communication baud rates, such as 19200, 9600, 4800, 2400, 1200, and 300 bps.

2. Compatibility with UART Timing Requirements: The Intel 8051 microcontroller's UART (Universal Asynchronous
Receiver/Transmitter) requires specific timing parameters for reliable data transmission. The 11.0592 MHz crystal
frequency aligns well with these timing requirements, ensuring accurate data exchange.

3. Timer Accuracy: The crystal oscillator serves as the primary timekeeping source for the 8051 microcontroller's
timers. The 11.0592 MHz frequency provides a stable and accurate reference for timer operations, ensuring precise

MPMC QB ANS 3.0 28

 timing control.

4. Noise Reduction: Higher crystal frequencies, such as 11.0592 MHz, are less susceptible to noise interference
compared to lower frequencies. This helps maintain the stability and accuracy of the clock signal.

5. Availability and Cost-Effectiveness: Crystal oscillators operating at 11.0592 MHz are widely available and relatively
inexpensive, making them a practical choice for 8051 microcontroller applications.

9. Draw and Explain the programming model of Intel 8051 Microcontroller.

Ans:

1. CPU: 8-bit with registers such as Accumulator (A) and B Register & several special purpose registers.

MPMC QB ANS 3.0 29

 2. RAM: Divided into four banks, each with 128 bytes.

3. ROM: External memory for storing program code.

4. Program Counter (PC): Keeps track of the address of the next instruction.

5. Stack Pointer (SP): Manages the stack for subroutine and interrupt handling.

6. Flags Register (PSW): Contains flags indicating the CPU status.

7. Data Pointer (DPTR): 16-bit register for indirect addressing of external memory.

8. Control Registers: Include TCON, TMOD, and SCON for timers, counters, and serial communication.

9. Timers and Counters: Two 16-bit timers/counters (Timer 0 and Timer 1).

10. Serial Communication: Supported through UART (Universal Asynchronous Receiver/Transmitter) module controlled
by the SCON register.

10. Write an ALP for Intel 8051 to add two 8 bit numbers and store in a memory location A001H.
Ans:

ORG 0H;
MOV A, #25H;
ADD A, #3AH;
MOV @A001H, A;
END;

11. With neat diagram, Explain the interfacing of a LCD Module with microcontroller?

MPMC QB ANS 3.0 30

 Ans:

When interfacing an LCD (Liquid Crystal Display) module with a microcontroller, several pins play crucial roles in
establishing communication and control.

1. VCC (Voltage at the Collector):

VCC is the power supply voltage for the LCD module. It typically operates at +5V or another specified voltage
level.

2. VSS (Voltage at the Source):

VSS is the ground reference for the LCD module, providing the necessary return path for the current flowing from
VCC.

3. VEE (Voltage at the Emitter):

VEE is the contrast control voltage. Adjusting VEE helps control the contrast of the characters displayed on the
LCD.

MPMC QB ANS 3.0 31

 4. RS (Register Select):

RS is a control pin that determines whether the data sent to the LCD is interpreted as a command (RS low) or as
character data to be displayed (RS high).

5. R/W (Read/Write):

R/W is a control pin that specifies the direction of data transfer. When low, it indicates a write operation (sending
data to the LCD), and when high, it indicates a read operation (retrieving data from the LCD).

6. E (Enable):

The E (Enable) pin is used to enable the LCD module and initiate data transfer. A high-to-low transition (or vice
versa) on the E pin is often used to latch or read the data on the data pins.

7. Data Pins:

These are typically labeled as D0-D7 and carry the binary data to be displayed on the LCD. The number of data
pins depends on the chosen data bus width (e.g., 4-bit or 8-bit mode).

Interfacing involves connecting these pins from the LCD module to corresponding pins on the microcontroller. Proper
configuration of control signals (RS, R/W, E) and sending appropriate commands/data on the data bus (D0-D7) allows the
microcontroller to communicate effectively with the LCD module, displaying characters, numbers, or other information as
desired.
12. Explain the interfacing of a 4 X 4 Keyboard and Microcontroller with proper diagram and flow chart.
Ans:

MPMC QB ANS 3.0 32

 1. Matrix Configuration: A 4x4 keyboard with 4 rows and 4 columns is arranged in a matrix, connecting rows and
columns to the microcontroller's pins.

2. Multiplexing: The microcontroller sequentially scans rows and columns, grounding one row at a time while checking
the state of the columns to identify the pressed key.

3. Pull-up or Pull-down Resistors: Each column or row line is connected to the microcontroller with pull-up or pull-
down resistors to establish a default state and detect keypress changes.

4. Debouncing: Debouncing circuits or software routines filter out bouncing signals generated by key switches to
ensure accurate keypress detection.

5. Key Identification and Data Transmission: The microcontroller identifies pressed keys based on the row-column
intersection, mapping this information for various applications like displaying characters or triggering specific actions.

MPMC QB ANS 3.0 33

MPMC QB ANS 3.0 34
 13. Explain the interfacing of ADC0804 and Intel 8051 with proper diagram.
Ans:

1. Data Lines (D0-D7): These are the output lines of the ADC0804, providing the digital output of the converted analog
signal. Connect these to the Port 0 (P0) of the 8051 microcontroller.

2. Control Lines (CS, RD, WR, INTR): These lines control the operation of the ADC. Connect CS (Chip Select) to a
specific pin on the 8051, RD (Read) to P2.7, WR (Write) to P2.6, and INTR (Interrupt) to P3.2.

3. Address Lines (A0-A2): These lines are used to select the internal register of the ADC0804. Connect these to P1.0 -
P1.2 of the 8051.

4. Clock (CLK): Connect this to an appropriate clock source.

MPMC QB ANS 3.0 35

 5. Reference Voltage (Vref+ and Vref-): These are the reference voltage inputs for the ADC. Connect Vref+ and Vref- to
the reference voltage source.

6. Analog Input (IN+ and IN-): Connect the analog signal to be converted to IN+ and IN-.

14. Draw and explain the architecture of Intel 8255.

Ans:

1. Data Bus Interface:

MPMC QB ANS 3.0 36

 The 8255 is connected to the microprocessor through an 8-bit data bus. It communicates with the microprocessor
by sending and receiving data on this bus.

2. Control Register:

The control register is used to configure the operating modes of the 8255. It is an 8-bit register that allows the
microprocessor to set the mode of operation for each of the three ports (Port A, Port B, and Port C) as well as
other control features.

3. Port A, Port B, and Port C:

Each port is an 8-bit bidirectional I/O port. Port A and Port B can be used as general-purpose I/O ports, while Port
C has additional modes depending on the configuration set in the control register.

4. Mode Selection Logic:

The mode selection logic interprets the control register settings to determine the operating mode of each port. The
8255 supports three basic modes of operation for each port: Mode 0 (Basic Input/Output), Mode 1 (Strobed
Input/Output), and Mode 2 (Bidirectional Bus).

5. Bit Set/Reset Logic:

This logic allows individual bits in each port to be set or reset (cleared) independently. It provides the capability to
manipulate specific bits without affecting the entire port.

6. Group A and Group B Control Logic:

The 8255 has two groups of control lines: Group A controls the operation of Port A, and Group B controls the
operation of Port B and Port C. These control lines include Read, Write, and various mode control signals.

7. Port C Upper and Lower Control Logic:

MPMC QB ANS 3.0 37

 For Port C, the upper and lower nibbles (four bits each) can be used in different modes. The upper nibble can be
used as a separate 4-bit I/O port, while the lower nibble can be used for various control functions.

8. Clock Input (CLK):

The 8255 may include an internal clock generator for certain modes of operation. External clock inputs can also
be used.

9. Reset Input (RESET):

The RESET input initializes the internal registers and puts the 8255 into a known state.

15. Write an Assembly Language Program for Intel 8086 to find the largest number in an array of 8 numbers.
Ans:

ARRAY_SIZE EQU 8
ARRAY_START EQU 0x2000
LARGEST_NUM EQU 0x2001

START:

mov cx, ARRAY_SIZE

mov ax, [ARRAY_START]
mov al, ah

loop:
dec cx
jz finish
inc ax
cmp ah, al
jg update
jmp loop

MPMC QB ANS 3.0 38

 update:
mov al, ah

loop loop

finish:
mov [LARGEST_NUM], al
hlt

CSE 1 &3 QB ANS (others QNA 👆)

SHORT
1. Difference between IN and OUT port address.
Ans:

IN Port Address: Used for reading data from an input port.

OUT Port Address: Used for sending data to an output port.

2. What is the size of address and data bus of Intel 8085 and 8086 Microprocessor?
Ans:
Address and Data Bus Size of Intel 8085 and 8086:
Intel 8085:
- Address Bus: 16 bits
- Data Bus: 8 bits

MPMC QB ANS 3.0 39

 Intel 8086:
- Address Bus: 20 bits
- Data Bus: 16 bits
3. What is the operating frequency of Intel 8085 and 8086 Microprocessor?
Ans:
Operating Frequency of Intel 8085 and 8086:
- Intel 8085: Typically 3 MHz
- Intel 8086: Typically 5, 8, or 10 MHz
4. Name different general purpose registers.
Ans:
Different General Purpose Registers:
- In Intel 8085: B, C, D, E, H, L
- In Intel 8086: AX, BX, CX, DX, SI, DI, BP, SP
5. What do you understand by a T-state, Machine cycle, and Instruction cycle?
Ans:

T-State (Time State): One subdivision of an operation cycle.

Machine Cycle: A set of related operations that can be performed in a single clock
period.

Instruction Cycle: Time required to fetch and execute an instruction.

6. How many active flags are present in the flag register of Intel 8085? Name them.
Ans: Zero (Z), Sign (S), Parity (P), Carry (CY), Auxiliary Carry (AC)
7. What is the role of ALE pin of Intel 8085 Microprocessor?

MPMC QB ANS 3.0 40

 Ans: ALE (Address Latch Enable) is used to latch the lower-order address bus during the first clock cycle of
a machine cycle.
8. Define Implicit addressing mode.
Ans: The operands are specified implicitly in the instruction. For example, in the accumulator register (A)
of a microprocessor.
9. What is the difference between a one-byte and two-byte instructions. Give examples.
Ans:

One-Byte Instructions: These instructions operate on data directly in the accumulator

(e.g., ADD A, B).

Two-Byte Instructions: These instructions involve specifying a register or memory

location as an operand (e.g., MOV B, C).

10. What is the role of HOLD pin of Intel 8085 Microprocessor?

Ans: The HOLD pin is used to interrupt the microprocessor's operation and request it to release control of
the system buses. It is part of the Hold/Halt interface for DMA (Direct Memory Access) operations.
11. What is RQ/GT signal pin?

Ans:

In Intel 8085, the RQ/GT (Request/Grant) pin is used in a multiprocessor configuration.

It is used to request control of the system bus (RQ) or to grant control of the bus (GT)
to another requesting device.

12. Define NMI

Ans:

MPMC QB ANS 3.0 41

 NMI stands for Non-Maskable Interrupt, an interrupt type in microprocessors.

It cannot be disabled and takes precedence over other interrupts in the system.

11. What is the role of TRAP pin of Intel 8085 Microprocessor?

Ans:

TRAP is a non-maskable interrupt used for error trapping in the 8085 microprocessor.

It is designed to handle unexpected events and ensure proper system control.

12. What is the role of READY pin of Intel 8085 Microprocessor?

Ans:

READY pin indicates the external device's readiness to communicate.

It allows synchronization between the microprocessor and external peripherals or memory.

13. Define pipelining.

Ans:

Pipelining is a processing technique where multiple instructions overlap in execution stages.

Each stage of the pipeline performs a different task, improving overall instruction throughput.

14. How extra segment register operates?

Ans:

Extra segment register extends addressable memory beyond default segments in the 8086 microprocessor.

It allows specifying additional memory segments for more comprehensive memory access.

15. Explain the instruction MUL BX and DIV BL of Intel 8086 Microprocessor.

MPMC QB ANS 3.0 42

 Ans:

MUL BX multiplies the content of register BX with the accumulator.

DIV BL divides the accumulator content by the content of register BL.

16. What is the size of instruction queue of Intel 8086 Microprocessor?

Ans:

The instruction queue in the 8086 microprocessor can hold up to 6 instruction bytes.

It facilitates efficient instruction fetching and execution.

17. What are the roles of BHE' & A0 pins of Intel 8086 Microprocessor?
Ans:

BHE' (Bus High Enable) enables the higher-order data bus during memory or I/O operations.

A0 is the least significant bit of the memory or I/O address, determining even or odd byte addressing.

18. What is the role of MN⁄MX ‘ pin of Intel 8086 Microprocessor?

Ans:

MN/MX' pin determines whether the microprocessor operates in minimum or maximum mode.

It influences the overall system configuration based on the selected mode.

19. Explain the instruction XLAT of Intel 8086 Microprocessor.

Ans:

XLAT (Translate) instruction is used for table look-up, using AL register as an offset.

It facilitates efficient data retrieval from a table based on the AL register content.

MPMC QB ANS 3.0 43

 20. Explain the instruction CMP of Intel 8086 Microprocessor.
Ans:

CMP (Compare) instruction compares two operands without modifying them.

It sets flags indicating the result of the comparison for conditional branching.

21. How many memory locations that an Intel 8086 Microprocessor can access?
Ans:

The 8086 microprocessor can access 1 MB (2^20) memory locations.

This large address space allows handling extensive data and program storage.

22. What is the size of address and data bus of Intel 8051 Microcontroller?
Ans:

The 8051 microcontroller has an 8-bit address bus and an 8-bit data bus.

These buses determine the range of addresses and data the microcontroller can handle.

23. What is the operating frequency of Intel 8051 Microcontroller?

Ans:

The operating frequency of the 8051 microcontroller typically ranges from 12 MHz to 24 MHz.

It defines the speed at which the microcontroller processes instructions and data.

24. What is the usage of control unit in MCU?

Ans:

The control unit in a microcontroller manages instruction execution and data flow.

MPMC QB ANS 3.0 44

 It coordinates various components to ensure proper functioning of the microcontroller.

25. What is the size of on-chip ROM and on-chip RAM for Intel 8051 Microcontroller?
Ans:

The 8051 microcontroller typically has 4 KB of on-chip ROM and 128 bytes of on-chip RAM.

These memory components store program instructions and data during execution.

26. Explain the instructions MOVX, MOVC in 8051 micro controller

Ans:

MOVX transfers data between the accumulator and external RAM in the 8051 microcontroller.

MOVC is used to move code bytes from code memory to the accumulator.

27. How many bidirectional input output lines are present in Intel 8051?
Ans:

The Intel 8051 microcontroller has 32 bidirectional input/output lines.

These lines are versatile and can be configured for both input and output operations.

28. What is Harvard architecture?

Ans:

Harvard architecture uses separate pathways for instructions and data.

It enhances performance by allowing simultaneous access to instruction and data memory.

29. Explain PCON

Ans:

MPMC QB ANS 3.0 45

 PCON (Power Control) is a register in the 8051 microcontroller.

It manages power modes and monitors external interrupts, contributing to power-efficient operation.

30. What is the usage of delay() function?

Ans:

The delay() function introduces a time delay in program execution.

It is commonly used to create pauses or achieve specific timing intervals in the code.

31. 8257 contains how many bits of address and counters?

Ans: Each channel has 16-bit address and 14-bit counter. Each channel can transfer data up to 64kb.
32. What is the amount of crystal is used to generate clock signal for 8051?Ans:

An 11.0592 MHz crystal is commonly used to generate the clock signal for the 8051 microcontroller.

This specific frequency is chosen for compatibility with standard baud rates used in serial communication

33. List the register banks that are present in Intel 8051 Microcontroller.
Ans:

The Intel 8051 microcontroller features four register banks labeled as Bank 0, Bank 1, Bank 2, and Bank 3.

Switching between these banks allows the microcontroller to access different sets of general-purpose registers.

34. List the Software and Hardware interrupts of 8085?

Ans:

Software Interrupts (RST): RST 0 to RST 7 are restart instructions acting as software interrupts.

MPMC QB ANS 3.0 46

 Hardware Interrupts: INTR, TRAP, RST 7.5, RST 6.5, and RST 5.5 are hardware interrupts in the 8085
microprocessor.

35. Why data bus is bi-directional

Ans:

A bi-directional data bus allows data to flow bidirectionally between the microprocessor and external devices.

It facilitates both reading from and writing to external memory or peripherals.

36. What is register bank?

Ans:

A register bank is a set of general-purpose registers that can be switched in and out of a microcontroller's active
register set.

This switching capability provides additional working storage for the processor.

37. How does the pin 𝑉𝑃𝑃 work in Intel 8051 Microcontroller?
Ans:

The 𝑉𝑃𝑃 (Programming Voltage) pin is used during EPROM programming to apply the programming voltage.

It enables the EPROM programming mode in the Intel 8051 microcontroller.

38. What is the role of RS pin in a 16 X 2 LCD Module?

Ans:

The RS (Register Select) pin in a 16x2 LCD module determines whether the data on the data bus is interpreted as a
command or character data.

MPMC QB ANS 3.0 47

 When RS is high, data is treated as character data; when low, it is treated as a command.

39. What is CAS?

Ans:

CAS is a signal used in dynamic RAM (DRAM) devices to latch the column address during read or write operations.

It helps in selecting the specific column in the memory array.

40. What is the function of command register of a 16 X 2 LCD Module?

Ans:

The command register of a 16x2 LCD module is used to send control commands to the LCD, such as clearing the
display or shifting the cursor.

It controls various aspects of the LCD's behavior.

41. What are two methods that are used for digital to analog conversion?
Ans:

Two methods are PWM (Pulse Width Modulation) and DAC (Digital-to-Analog Converter).

PWM involves varying the duty cycle of a pulse signal, while DAC directly converts digital values to analog voltage.

42. What is the step size for a 10 bit Analog to Digital Converter?
Ans:

The step size for a 10-bit ADC is Vref/2^10, where Vref is the reference voltage.

It represents the smallest change in analog input that can be detected by the ADC.

43. What is the function of E pin in a 16 X 2 LCD Module?

MPMC QB ANS 3.0 48

 Ans:

The E (Enable) pin in a 16x2 LCD module is used to enable the LCD controller for reading data from the data bus.

It signals the LCD to process the data present on the data lines.

44. What is the role of RD’ pin of ADC 0804 chip ?

Ans:

The RD' (Read) pin of the ADC 0804 chip initiates the conversion process and allows reading the converted analog
data.

It triggers the chip to provide the digital representation of the analog input.

45. How many data lines are present in DAC 0808 chip?
Ans:

The DAC 0808 chip has 8 data lines, enabling the conversion of an 8-bit digital input to an analog output.

Each data line represents a bit in the digital input.

46. How many data lines are present in ADC 0804 chip?
Ans:

The ADC 0804 chip typically has 8 data lines, providing an 8-bit digital output representing the converted analog input.

These lines convey the digital result of the analog-to-digital conversion.

47. What is the role of CLK IN pin of ADC 0804 chip?

Ans:

MPMC QB ANS 3.0 49

 The CLK IN (Clock Input) pin of the ADC 0804 chip provides the clock signal necessary for the analog-to-digital
conversion process.

It controls the timing of the conversion.

48. 8257 contains how many bits of address and counters?

Ans:

The 8257 DMA controller has a 16-bit address bus and counter.

This configuration allows efficient memory addressing and control over data transfer operations.

49. What are the functions of contrast pins in LCD?

Ans:

Contrast pins in an LCD module control the contrast or brightness of displayed characters.

They enable adjustments for optimal visibility and readability on the LCD screen.

50. How many bidirectional I/O lines are present in Intel 8255?
Ans:

The Intel 8255 programmable peripheral interface (PPI) features 24 bidirectional I/O lines (Port A, Port B, and Port C).

These lines can be configured for both input and output operations, providing versatile interfacing capabilities.

FOCUS
1 Explain the addressing modes of Intel 8085 Microprocessor with examples.
2. Draw and explain the opcode Fetch machine cycle timing Diagram of 8085 microprocessor.
Ans:

MPMC QB ANS 3.0 50

 Explanation:

T1: Address bus is available, and the microprocessor sends the 16-bit memory address of the next instruction to the
address bus.

T2: The address is stable, and the control signals for memory read (RD) and chip select (CS) are activated.

T3: The memory responds by placing the opcode on the data bus. The microprocessor reads the opcode from the
data bus.

T4: The microprocessor increments the program counter (PC) to point to the next memory location.

3 Write an ALP for Intel 8085 to find the sum of first 10 natural numbers.
4. What is meant by interrupt, Explain priority interrupt of 8085

MPMC QB ANS 3.0 51

 Ans:
Interrupt:

Mechanism to temporarily stop a running process in the CPU to handle another task or event.

Used for immediate attention to events like hardware signals, I/O requests, or errors.

8085 Priority Interrupts:

1. INTR (Interrupt Request):

Maskable interrupt for external devices.

Checked during each instruction execution.

2. TRAP:

Non-maskable interrupt with the highest priority.

Used for critical errors or emergencies.

Jumps to fixed memory location (24H) for TRAP service routine.

3. RST 7.5, RST 6.5, RST 5.5:

Maskable vectored interrupts with lower priority.

Fixed vector addresses (RST 7.5 at 34H, RST 6.5 at 30H, RST 5.5 at 2CH).

Used for specific functions or tasks.

5 Explain the concept of pipelining used in Intel 8086 microprocessor.

6 Draw and explain the architecture of Intel 8086 Microprocessor.
7. Discuss the interrupt system of Intel 8086. What is interrupt pointer?

MPMC QB ANS 3.0 52

 Ans:

1. Interrupt Types:

Hardware Interrupts: Triggered by external devices through interrupt request (IRQ) lines.

Software Interrupts: Initiated by executing the INT instruction with an interrupt number.

2. Interrupt Vector Table (IVT):

Contains 256 entries (vectors) in memory, each pointing to a specific Interrupt Service Routine (ISR).

Hardware interrupts use the IVT to determine the ISR to execute.

3. Interrupt Process (Hardware Interrupt):

Upon hardware interrupt, flags and instruction pointer (IP) are saved onto the stack. Interrupts are disabled.

Segment and offset are fetched from the corresponding IVT entry to jump to the ISR.

4. Software Interrupt:

INT instruction is used with a specified interrupt number.

Directly specifies the vector in the IVT or points to a specific software ISR.

5. Protected Mode:

In later x86 architectures, the Interrupt Descriptor Table (IDT) is used instead of the IVT.

The IDT contains descriptors providing information about interrupt or exception handlers.

Interrupt Pointer:
The interrupt pointer is a 32-bit value formed by combining the CS (code segment) and IP (instruction pointer) values
of the interrupt service routine.

MPMC QB ANS 3.0 53

 8 Describer the difference between the instructions MOV AX, 1234H and MOV AX, [1234H] in 8086?
9. Describe the differences between Microprocessor and Microcontroller.
Ans:

Feature Microprocessor Microcontroller

Functionality Only processing unit Complete computer system on a single chip

Components CPU only CPU, memory (RAM and ROM), and I/O peripherals

Integration Low integration (external components required) High integration (all components on a single chip)

Cost Relatively higher Relatively lower

Power
Higher Lower
consumption

Personal computers, complex industrial Embedded systems like washing machines, keyboards,
Applications
controllers, traffic lights cameras, security alarms

Examples Intel Pentium, AMD Ryzen Atmel AVR, PIC Microcontrollers, ARM Cortex-M

10. Distinguish between Harvard and Von Neumann architecture

Ans:

Feature Harvard Architecture Von Neumann Architecture

Memory separation Separate memory for instructions and data Single memory for both instructions and data

Bus usage Separate buses for instructions and data Single bus for both instructions and data

Performance Potentially faster due to dedicated buses Simpler and cheaper design

Flexibility Less flexible, harder to modify More flexible, easier to modify and update code

MPMC QB ANS 3.0 54

 Applications Microcontrollers, embedded systems General-purpose computers, microprocessors

Examples Atmel AVR, PIC Microcontrollers Intel Pentium, AMD Ryzen

11 Explain different addressing modes used in Intel 8051 with examples.

12. What are special function register(SFR)
Ans:

Special Function Registers in the Intel 8051 microcontroller are memory-mapped registers that control specific
functions and features.

Examples include registers like P0 (Port 0), P1 (Port 1), TCON (TimerControl), TMOD(Timer Mode), etc.

SFRs are used to configure and control I/O, timers, serial communication, and other
peripherals.

13. Elaborate in detail about DAC and explain how it performs?

Ans:

A DAC converts digital signals into analog signals

DAC Function:

Decoding: Receives digital audio stream (e.g., MP3, FLAC).

Filtering: Removes high-frequency noise from the digital signal.

Oversampling: Increases resolution to reduce aliasing distortion.

Conversion: Interprets digital values, reconstructs analog waveform using discrete voltage levels.

Smoothing: Applies low-pass filter to create a continuous analog signal.

MPMC QB ANS 3.0 55

 Amplification: Amplifies analog signal for speakers/headphones.

14. Draw pin configuration diagram of 8259A and explain.

Ans:

1. IR0 - IR7 (Interrupt Request Lines 0-7): Input lines for device-generated interrupt requests.

2. INT (Interrupt Acknowledge): Input signal from the CPU to acknowledge received interrupts (active-low).

3. CAS0 and CAS1 (Cascaded Mode Selection): Select operating mode; used for cascading multiple 8259A chips.

4. RD (Read) and WR (Write): Input signals for reading interrupt request register and writing command words/data.

5. A0 and A1 (Address Lines): Used for addressing specific registers during read or write operations.

6. INTA (Interrupt Acknowledge Output): Output signal to devices, indicating interrupt request acknowledgment.

MPMC QB ANS 3.0 56

 7. SP/EN (Slave Programmable/Enable): Used in cascaded mode to enable or disable the slave 8259A.

8. CLK (Clock): Clock input for synchronization.

9. CS (Chip Select): Input signal to enable or disable the 8259A for input or output operations.

15 Draw and explain the interfacing circuit of LCD with 8051.

LONG
Q. Draw and explain the timing diagram of the execution of instruction MVI A, 32H.
1 Draw and explain the architecture of Intel 8085 Microprocessor.
2 Explain different addressing modes of 8085 microprocessor
3. Describe in detail about 8086 microprocessor with it’s pin Diagram and configuration.

Ans:

MPMC QB ANS 3.0 57

 1. VCC and GND:

Pin 40 (VCC): Power supply (typically +5V).

Pin 20 (GND): Ground.

2. Address and Data Buses:

Pins A0-A19: Address bus (20 lines).

Pins AD0-AD15: Data bus (16 lines).

MPMC QB ANS 3.0 58

 3. Status and Control Signals:

Pins S0, S1, and S2: Status signals indicating the type of operation being performed.

Pin RD (Read) and WR (Write): Control signals for read and write operations.

Pin M/IO: Memory or I/O operation control.

Pin DEN (Data Enable): Data bus enable.

4. Interrupts and Bus Control:

Pins INTA, NMI: Interrupt acknowledgment and non-maskable interrupt.

Pin HOLD, HLDA: Bus hold and bus hold acknowledge.

5. Clock and Reset:

Pins CLK: Clock input.

Pin RESET: Reset input.

6. Segment and Stack Pointers:

Pins A16/A17: Address lines for addressing 1 MB memory.

Pins SP, BP, SI, DI: Stack and base pointers, source and destination index registers.

7. Control and Flag Registers:

Pins FLAGS: Flags register containing various status flags.

Pins CS, DS, ES, SS: Code, data, extra, and stack segment registers.

8. Bus Interface Unit (BIU) and Execution Unit (EU):

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 Pins BHE, S7-S4: Bus interface control and status signals.

Pins EUADDR, EUDATA: Execution unit address and data buses.

4 Suppose DS= 3000H, ES = 2000H, CS= 4000H, SS= 6000H, BX= 1234H, BP=3333H, SI= F000H,
DI= 2222H, What physical address are accessed by the following instruction of Intel 8086 microprocessor?
a. MOV AH, [BX+SI+10H]
b. MOV BH, [BP]
c. MOV CX, CS:[SI]
5 Draw suitable block diagram for register organization of Intel 8086 and explain about all the registers.
6 Write an Assembly Language Program for Intel 8086 to find the largest number in an array of 8 numbers.
7 Draw and Explain the architecture of Intel 8051 Microcontroller?
8. Discuss in detail about different types of interrupts in 8051 microcontroller.
Ans:

1. Timer 0 & 1 Overflow (TF0 & TF1): Triggered when their respective timers overflow, enabling timing applications.
Timer 0 Overflow Interrupt (TF0):

Occurs when Timer 0 overflows its 8-bit counter value

Triggered automatically when the timer reaches its maximum value.

Used for various timing applications, such as periodic tasks, delay generation, and pulse width modulation.

Timer 1 Overflow Interrupt (TF1):

Provides higher resolution timing compared to TF0.

Commonly used for longer time measurements and baud rate generation for serial communication.

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 Like TF0, can be configured for different interrupt frequencies.

2. External Hardware Interrupts (INT0 & INT1): Activated by transitions on specific pins, responding to external events
like button presses.
(INT0):

Triggered by a low-to-high transition on pin P3.2, which is configured as an interrupt input.

Can be used to respond to external events like button presses, sensor signals, or encoder pulses.

(INT1):

Similar to INT0, but triggered by a low-to-high transition on pin P3.3.

Offers an additional interrupt source for handling multiple external events.

3. Serial Communication Interrupt (RI/TI):

Triggered by two sources related to serial communication:

RI (Receive Interrupt): Occurs when a new data byte is received on the serial port.

TI (Transmit Interrupt): Occurs when the previous byte has been transmitted and the transmitter buffer is
empty.

9 Write an ALP for Intel 8051 to add two 8 bit numbers and store in a memory location A001H.
10 Explain the interfacing of a 4 X 4 Keyboard and Microcontroller with proper diagram and flow chart.
11 Explain the interfacing of ADC 0804 and Intel 8051 with proper diagram.
12 Draw and explain the architecture of Intel 8255
13. Draw the circuit diagram to interface 7-segement display with 8051 and explain.

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 Ans:

1. 8051 Microcontroller (P2 Port): Connect the P2 port of the 8051 microcontroller to the inputs of the 7-segment
display. Each segment (A to G and DP) of the 7-segment display is controlled by a separate pin on the microcontroller.

2. 7-segment Display: This is a common cathode 7-segment display, where each segment (A to G and DP) is labeled.
Connect the cathode pins of the 7-segment display to the P2 port of the 8051 microcontroller through current-limiting
resistors (R1 to R4). The resistors are used to limit the current flowing through each segment.

3. Current Limiting Resistors (R1 to R4): These resistors limit the current flowing through each segment of the 7-
segment display to prevent damage. The values of these resistors depend on the specifications of the 7-segment
display and the operating voltage.

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 The software part involves writing a program in assembly or a high-level language like C to control the P2 port of the
8051 microcontroller.

The program will determine which segments need to be illuminated to display the desired numbers or characters on
the 7-segment display.

14 Describe internal architecture of 8257 with it’s block diagram.

Ans:

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 Internal Architecture of 8257:

1. Control Unit:

Mode Set Register (MSR): Determines the operating mode of the 8257.

Request Register (RR): Receives external requests for DMA.

Mask Register (MR): Masks or enables individual DMA channels.

Status Register (SR): Provides the status of the DMA channels.

2. Channel Address Registers (CAR):

Four sets of channel address registers (one for each channel - 0 to 3).

Consists of two 16-bit registers per channel: Base Address Register (BAR) and Word Count Register (WCR).

BAR holds the base address of the memory block for data transfer.

WCR holds the number of words to be transferred.

3. Internal Data Bus:

Connects the internal components of the 8257, facilitating data transfer within the controller.

4. Arbitration Logic:

Resolves priority conflicts when multiple channels request service simultaneously.

Decides which channel gets control of the internal data bus.

5. Control Logic:

Decodes control signals and manages the overall operation of the DMA controller.

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 Generates the necessary signals to control the data transfer.

6. Timing and Control Unit:

Generates various control signals to synchronize the operation of the DMA controller.

Ensures proper timing for address and data transfer.

7. Cascade Control Logic:

Allows multiple 8257 controllers to be cascaded for more DMA channels.

Coordinates the operation of multiple controllers.

15 Draw and explain the architecture of Intel 8255

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